shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

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targets/hal/TARGET_Freescale/TARGET_K20D50M/i2c_api.c@323:9e901b0a5aa1, 2014-09-13 (annotated)

Committer:
shaoziyang
Date:
Sat Sep 13 14:25:46 2014 +0000
Revision:
323:9e901b0a5aa1
Parent:
255:20b371a9491b 
test with CLOCK_SETUP = 0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 68:41613245dfd7 1 /* mbed Microcontroller Library
mbed_official 68:41613245dfd7 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 68:41613245dfd7 3 *
mbed_official 68:41613245dfd7 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 68:41613245dfd7 5 * you may not use this file except in compliance with the License.
mbed_official 68:41613245dfd7 6 * You may obtain a copy of the License at
mbed_official 68:41613245dfd7 7 *
mbed_official 68:41613245dfd7 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 68:41613245dfd7 9 *
mbed_official 68:41613245dfd7 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 68:41613245dfd7 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 68:41613245dfd7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 68:41613245dfd7 13 * See the License for the specific language governing permissions and
mbed_official 68:41613245dfd7 14 * limitations under the License.
mbed_official 68:41613245dfd7 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
mbed_official 68:41613245dfd7 17 #include "i2c_api.h"
mbed_official 68:41613245dfd7 18
mbed_official 68:41613245dfd7 19 #include "cmsis.h"
mbed_official 68:41613245dfd7 20 #include "pinmap.h"
mbed_official 73:299c67215126 21 #include "clk_freqs.h"
mbed_official 68:41613245dfd7 22
mbed_official 68:41613245dfd7 23 static const PinMap PinMap_I2C_SDA[] = {
mbed_official 68:41613245dfd7 24 {PTB1, I2C_0, 2},
mbed_official 68:41613245dfd7 25 {PTB3, I2C_0, 2},
mbed_official 68:41613245dfd7 26 {NC , NC , 0}
mbed_official 68:41613245dfd7 27 };
mbed_official 68:41613245dfd7 28
mbed_official 68:41613245dfd7 29 static const PinMap PinMap_I2C_SCL[] = {
mbed_official 68:41613245dfd7 30 {PTB0, I2C_0, 2},
mbed_official 68:41613245dfd7 31 {PTB2, I2C_0, 2},
mbed_official 68:41613245dfd7 32 {NC , NC, 0}
mbed_official 68:41613245dfd7 33 };
mbed_official 68:41613245dfd7 34
mbed_official 68:41613245dfd7 35 static const uint16_t ICR[0x40] = {
mbed_official 68:41613245dfd7 36 20, 22, 24, 26, 28,
mbed_official 68:41613245dfd7 37 30, 34, 40, 28, 32,
mbed_official 68:41613245dfd7 38 36, 40, 44, 48, 56,
mbed_official 68:41613245dfd7 39 68, 48, 56, 64, 72,
mbed_official 68:41613245dfd7 40 80, 88, 104, 128, 80,
mbed_official 68:41613245dfd7 41 96, 112, 128, 144, 160,
mbed_official 68:41613245dfd7 42 192, 240, 160, 192, 224,
mbed_official 68:41613245dfd7 43 256, 288, 320, 384, 480,
mbed_official 68:41613245dfd7 44 320, 384, 448, 512, 576,
mbed_official 68:41613245dfd7 45 640, 768, 960, 640, 768,
mbed_official 68:41613245dfd7 46 896, 1024, 1152, 1280, 1536,
mbed_official 68:41613245dfd7 47 1920, 1280, 1536, 1792, 2048,
mbed_official 68:41613245dfd7 48 2304, 2560, 3072, 3840
mbed_official 68:41613245dfd7 49 };
mbed_official 68:41613245dfd7 50
mbed_official 68:41613245dfd7 51
mbed_official 68:41613245dfd7 52 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
mbed_official 68:41613245dfd7 53 // determine the I2C to use
mbed_official 68:41613245dfd7 54 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
mbed_official 68:41613245dfd7 55 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
mbed_official 68:41613245dfd7 56 obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
mbed_official 227:7bd0639b8911 57 MBED_ASSERT((int)obj->i2c != NC);
mbed_official 68:41613245dfd7 58
mbed_official 68:41613245dfd7 59 SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
mbed_official 68:41613245dfd7 60 SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK;
mbed_official 68:41613245dfd7 61
mbed_official 68:41613245dfd7 62 // set default frequency at 100k
mbed_official 68:41613245dfd7 63 i2c_frequency(obj, 100000);
mbed_official 68:41613245dfd7 64
mbed_official 68:41613245dfd7 65 // enable I2C interface
mbed_official 68:41613245dfd7 66 obj->i2c->C1 |= 0x80;
mbed_official 68:41613245dfd7 67
mbed_official 68:41613245dfd7 68 pinmap_pinout(sda, PinMap_I2C_SDA);
mbed_official 68:41613245dfd7 69 pinmap_pinout(scl, PinMap_I2C_SCL);
mbed_official 180:097147d37470 70 /* enable open drain for I2C pins, only port b available */
mbed_official 180:097147d37470 71 uint32_t pin_n = (uint32_t)(sda & 0x7C) >> 2;
mbed_official 180:097147d37470 72 PORTB->PCR[pin_n] |= PORT_PCR_ODE_MASK;
mbed_official 180:097147d37470 73 pin_n = (uint32_t)(scl & 0x7C) >> 2;
mbed_official 180:097147d37470 74 PORTB->PCR[pin_n] |= PORT_PCR_ODE_MASK;
mbed_official 68:41613245dfd7 75 }
mbed_official 68:41613245dfd7 76
mbed_official 68:41613245dfd7 77 int i2c_start(i2c_t *obj) {
mbed_official 68:41613245dfd7 78 // if we are in the middle of a transaction
mbed_official 68:41613245dfd7 79 // activate the repeat_start flag
mbed_official 68:41613245dfd7 80 if (obj->i2c->S & I2C_S_BUSY_MASK) {
mbed_official 68:41613245dfd7 81 obj->i2c->C1 |= 0x04;
mbed_official 68:41613245dfd7 82 } else {
mbed_official 68:41613245dfd7 83 obj->i2c->C1 |= I2C_C1_MST_MASK;
mbed_official 68:41613245dfd7 84 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 85 }
mbed_official 68:41613245dfd7 86 return 0;
mbed_official 68:41613245dfd7 87 }
mbed_official 68:41613245dfd7 88
mbed_official 68:41613245dfd7 89 int i2c_stop(i2c_t *obj) {
mbed_official 68:41613245dfd7 90 volatile uint32_t n = 0;
mbed_official 68:41613245dfd7 91 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
mbed_official 68:41613245dfd7 92 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 93
mbed_official 68:41613245dfd7 94 // It seems that there are timing problems
mbed_official 68:41613245dfd7 95 // when there is no waiting time after a STOP.
mbed_official 68:41613245dfd7 96 // This wait is also included on the samples
mbed_official 68:41613245dfd7 97 // code provided with the freedom board
mbed_official 68:41613245dfd7 98 for (n = 0; n < 100; n++)
mbed_official 68:41613245dfd7 99 __NOP();
mbed_official 68:41613245dfd7 100 return 0;
mbed_official 68:41613245dfd7 101 }
mbed_official 68:41613245dfd7 102
mbed_official 68:41613245dfd7 103 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
mbed_official 182:242346c42295 104 uint32_t i, timeout = 100000;
mbed_official 68:41613245dfd7 105
mbed_official 68:41613245dfd7 106 for (i = 0; i < timeout; i++) {
mbed_official 68:41613245dfd7 107 if (obj->i2c->S & mask)
mbed_official 68:41613245dfd7 108 return 0;
mbed_official 68:41613245dfd7 109 }
mbed_official 68:41613245dfd7 110
mbed_official 68:41613245dfd7 111 return 1;
mbed_official 68:41613245dfd7 112 }
mbed_official 68:41613245dfd7 113
mbed_official 68:41613245dfd7 114 // this function waits the end of a tx transfer and return the status of the transaction:
mbed_official 68:41613245dfd7 115 // 0: OK ack received
mbed_official 68:41613245dfd7 116 // 1: OK ack not received
mbed_official 68:41613245dfd7 117 // 2: failure
mbed_official 68:41613245dfd7 118 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
mbed_official 68:41613245dfd7 119
mbed_official 68:41613245dfd7 120 // wait for the interrupt flag
mbed_official 68:41613245dfd7 121 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
mbed_official 68:41613245dfd7 122 return 2;
mbed_official 68:41613245dfd7 123 }
mbed_official 68:41613245dfd7 124
mbed_official 68:41613245dfd7 125 obj->i2c->S |= I2C_S_IICIF_MASK;
mbed_official 68:41613245dfd7 126
mbed_official 68:41613245dfd7 127 // wait transfer complete
mbed_official 68:41613245dfd7 128 if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
mbed_official 68:41613245dfd7 129 return 2;
mbed_official 68:41613245dfd7 130 }
mbed_official 68:41613245dfd7 131
mbed_official 68:41613245dfd7 132 // check if we received the ACK or not
mbed_official 68:41613245dfd7 133 return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0;
mbed_official 68:41613245dfd7 134 }
mbed_official 68:41613245dfd7 135
mbed_official 68:41613245dfd7 136 // this function waits the end of a rx transfer and return the status of the transaction:
mbed_official 68:41613245dfd7 137 // 0: OK
mbed_official 68:41613245dfd7 138 // 1: failure
mbed_official 68:41613245dfd7 139 static int i2c_wait_end_rx_transfer(i2c_t *obj) {
mbed_official 68:41613245dfd7 140 // wait for the end of the rx transfer
mbed_official 68:41613245dfd7 141 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
mbed_official 68:41613245dfd7 142 return 1;
mbed_official 68:41613245dfd7 143 }
mbed_official 68:41613245dfd7 144
mbed_official 68:41613245dfd7 145 obj->i2c->S |= I2C_S_IICIF_MASK;
mbed_official 68:41613245dfd7 146
mbed_official 68:41613245dfd7 147 return 0;
mbed_official 68:41613245dfd7 148 }
mbed_official 68:41613245dfd7 149
mbed_official 68:41613245dfd7 150 static void i2c_send_nack(i2c_t *obj) {
mbed_official 68:41613245dfd7 151 obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK
mbed_official 68:41613245dfd7 152 }
mbed_official 68:41613245dfd7 153
mbed_official 68:41613245dfd7 154 static void i2c_send_ack(i2c_t *obj) {
mbed_official 68:41613245dfd7 155 obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK
mbed_official 68:41613245dfd7 156 }
mbed_official 68:41613245dfd7 157
mbed_official 68:41613245dfd7 158 static int i2c_do_write(i2c_t *obj, int value) {
mbed_official 68:41613245dfd7 159 // write the data
mbed_official 68:41613245dfd7 160 obj->i2c->D = value;
mbed_official 68:41613245dfd7 161
mbed_official 68:41613245dfd7 162 // init and wait the end of the transfer
mbed_official 68:41613245dfd7 163 return i2c_wait_end_tx_transfer(obj);
mbed_official 68:41613245dfd7 164 }
mbed_official 68:41613245dfd7 165
mbed_official 68:41613245dfd7 166 static int i2c_do_read(i2c_t *obj, char * data, int last) {
mbed_official 73:299c67215126 167 if (last) {
mbed_official 68:41613245dfd7 168 i2c_send_nack(obj);
mbed_official 73:299c67215126 169 } else {
mbed_official 68:41613245dfd7 170 i2c_send_ack(obj);
mbed_official 73:299c67215126 171 }
mbed_official 68:41613245dfd7 172
mbed_official 68:41613245dfd7 173 *data = (obj->i2c->D & 0xFF);
mbed_official 68:41613245dfd7 174
mbed_official 68:41613245dfd7 175 // start rx transfer and wait the end of the transfer
mbed_official 68:41613245dfd7 176 return i2c_wait_end_rx_transfer(obj);
mbed_official 68:41613245dfd7 177 }
mbed_official 68:41613245dfd7 178
mbed_official 68:41613245dfd7 179 void i2c_frequency(i2c_t *obj, int hz) {
mbed_official 68:41613245dfd7 180 uint8_t icr = 0;
mbed_official 68:41613245dfd7 181 uint8_t mult = 0;
mbed_official 68:41613245dfd7 182 uint32_t error = 0;
mbed_official 68:41613245dfd7 183 uint32_t p_error = 0xffffffff;
mbed_official 68:41613245dfd7 184 uint32_t ref = 0;
mbed_official 68:41613245dfd7 185 uint8_t i, j;
mbed_official 68:41613245dfd7 186 // bus clk
mbed_official 73:299c67215126 187 uint32_t PCLK = bus_frequency();
mbed_official 68:41613245dfd7 188 uint32_t pulse = PCLK / (hz * 2);
mbed_official 68:41613245dfd7 189
mbed_official 68:41613245dfd7 190 // we look for the values that minimize the error
mbed_official 68:41613245dfd7 191
mbed_official 68:41613245dfd7 192 // test all the MULT values
mbed_official 68:41613245dfd7 193 for (i = 1; i < 5; i*=2) {
mbed_official 68:41613245dfd7 194 for (j = 0; j < 0x40; j++) {
mbed_official 68:41613245dfd7 195 ref = PCLK / (i*ICR[j]);
mbed_official 68:41613245dfd7 196 if (ref > (uint32_t)hz)
mbed_official 68:41613245dfd7 197 continue;
mbed_official 68:41613245dfd7 198 error = hz - ref;
mbed_official 68:41613245dfd7 199 if (error < p_error) {
mbed_official 68:41613245dfd7 200 icr = j;
mbed_official 68:41613245dfd7 201 mult = i/2;
mbed_official 68:41613245dfd7 202 p_error = error;
mbed_official 68:41613245dfd7 203 }
mbed_official 68:41613245dfd7 204 }
mbed_official 68:41613245dfd7 205 }
mbed_official 68:41613245dfd7 206 pulse = icr | (mult << 6);
mbed_official 68:41613245dfd7 207
mbed_official 68:41613245dfd7 208 // I2C Rate
mbed_official 68:41613245dfd7 209 obj->i2c->F = pulse;
mbed_official 68:41613245dfd7 210 }
mbed_official 68:41613245dfd7 211
mbed_official 68:41613245dfd7 212 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
mbed_official 68:41613245dfd7 213 int count;
mbed_official 68:41613245dfd7 214 char dummy_read, *ptr;
mbed_official 68:41613245dfd7 215
mbed_official 68:41613245dfd7 216 if (i2c_start(obj)) {
mbed_official 68:41613245dfd7 217 i2c_stop(obj);
mbed_official 68:41613245dfd7 218 return I2C_ERROR_BUS_BUSY;
mbed_official 68:41613245dfd7 219 }
mbed_official 68:41613245dfd7 220
mbed_official 68:41613245dfd7 221 if (i2c_do_write(obj, (address | 0x01))) {
mbed_official 68:41613245dfd7 222 i2c_stop(obj);
mbed_official 68:41613245dfd7 223 return I2C_ERROR_NO_SLAVE;
mbed_official 68:41613245dfd7 224 }
mbed_official 68:41613245dfd7 225
mbed_official 68:41613245dfd7 226 // set rx mode
mbed_official 68:41613245dfd7 227 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 228
mbed_official 68:41613245dfd7 229 // Read in bytes
mbed_official 68:41613245dfd7 230 for (count = 0; count < (length); count++) {
mbed_official 68:41613245dfd7 231 ptr = (count == 0) ? &dummy_read : &data[count - 1];
mbed_official 68:41613245dfd7 232 uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
mbed_official 68:41613245dfd7 233 if (i2c_do_read(obj, ptr, stop_)) {
mbed_official 68:41613245dfd7 234 i2c_stop(obj);
mbed_official 68:41613245dfd7 235 return count;
mbed_official 68:41613245dfd7 236 }
mbed_official 68:41613245dfd7 237 }
mbed_official 68:41613245dfd7 238
mbed_official 68:41613245dfd7 239 // If not repeated start, send stop.
mbed_official 73:299c67215126 240 if (stop)
mbed_official 68:41613245dfd7 241 i2c_stop(obj);
mbed_official 68:41613245dfd7 242
mbed_official 68:41613245dfd7 243 // last read
mbed_official 68:41613245dfd7 244 data[count-1] = obj->i2c->D;
mbed_official 68:41613245dfd7 245
mbed_official 68:41613245dfd7 246 return length;
mbed_official 68:41613245dfd7 247 }
mbed_official 68:41613245dfd7 248 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
mbed_official 68:41613245dfd7 249 int i;
mbed_official 68:41613245dfd7 250
mbed_official 68:41613245dfd7 251 if (i2c_start(obj)) {
mbed_official 68:41613245dfd7 252 i2c_stop(obj);
mbed_official 68:41613245dfd7 253 return I2C_ERROR_BUS_BUSY;
mbed_official 68:41613245dfd7 254 }
mbed_official 68:41613245dfd7 255
mbed_official 68:41613245dfd7 256 if (i2c_do_write(obj, (address & 0xFE))) {
mbed_official 68:41613245dfd7 257 i2c_stop(obj);
mbed_official 68:41613245dfd7 258 return I2C_ERROR_NO_SLAVE;
mbed_official 68:41613245dfd7 259 }
mbed_official 68:41613245dfd7 260
mbed_official 68:41613245dfd7 261 for (i = 0; i < length; i++) {
mbed_official 68:41613245dfd7 262 if(i2c_do_write(obj, data[i])) {
mbed_official 68:41613245dfd7 263 i2c_stop(obj);
mbed_official 68:41613245dfd7 264 return i;
mbed_official 68:41613245dfd7 265 }
mbed_official 68:41613245dfd7 266 }
mbed_official 68:41613245dfd7 267
mbed_official 68:41613245dfd7 268 if (stop)
mbed_official 68:41613245dfd7 269 i2c_stop(obj);
mbed_official 68:41613245dfd7 270
mbed_official 68:41613245dfd7 271 return length;
mbed_official 68:41613245dfd7 272 }
mbed_official 68:41613245dfd7 273
mbed_official 68:41613245dfd7 274 void i2c_reset(i2c_t *obj) {
mbed_official 68:41613245dfd7 275 i2c_stop(obj);
mbed_official 68:41613245dfd7 276 }
mbed_official 68:41613245dfd7 277
mbed_official 68:41613245dfd7 278 int i2c_byte_read(i2c_t *obj, int last) {
mbed_official 68:41613245dfd7 279 char data;
mbed_official 178:a873352662d8 280
mbed_official 68:41613245dfd7 281 // set rx mode
mbed_official 68:41613245dfd7 282 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 178:a873352662d8 283
mbed_official 178:a873352662d8 284 // Setup read
mbed_official 68:41613245dfd7 285 i2c_do_read(obj, &data, last);
mbed_official 68:41613245dfd7 286
mbed_official 178:a873352662d8 287 // set tx mode
mbed_official 178:a873352662d8 288 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 178:a873352662d8 289 return obj->i2c->D;
mbed_official 68:41613245dfd7 290 }
mbed_official 68:41613245dfd7 291
mbed_official 68:41613245dfd7 292 int i2c_byte_write(i2c_t *obj, int data) {
mbed_official 68:41613245dfd7 293 // set tx mode
mbed_official 68:41613245dfd7 294 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 295
mbed_official 68:41613245dfd7 296 return !i2c_do_write(obj, (data & 0xFF));
mbed_official 68:41613245dfd7 297 }
mbed_official 68:41613245dfd7 298
mbed_official 68:41613245dfd7 299
mbed_official 68:41613245dfd7 300 #if DEVICE_I2CSLAVE
mbed_official 68:41613245dfd7 301 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
mbed_official 68:41613245dfd7 302 if (enable_slave) {
mbed_official 68:41613245dfd7 303 // set slave mode
mbed_official 68:41613245dfd7 304 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
mbed_official 68:41613245dfd7 305 obj->i2c->C1 |= I2C_C1_IICIE_MASK;
mbed_official 68:41613245dfd7 306 } else {
mbed_official 68:41613245dfd7 307 // set master mode
mbed_official 68:41613245dfd7 308 obj->i2c->C1 |= I2C_C1_MST_MASK;
mbed_official 68:41613245dfd7 309 }
mbed_official 68:41613245dfd7 310 }
mbed_official 68:41613245dfd7 311
mbed_official 68:41613245dfd7 312 int i2c_slave_receive(i2c_t *obj) {
mbed_official 68:41613245dfd7 313 switch(obj->i2c->S) {
mbed_official 68:41613245dfd7 314 // read addressed
mbed_official 68:41613245dfd7 315 case 0xE6:
mbed_official 68:41613245dfd7 316 return 1;
mbed_official 68:41613245dfd7 317 // write addressed
mbed_official 68:41613245dfd7 318 case 0xE2:
mbed_official 68:41613245dfd7 319 return 3;
mbed_official 68:41613245dfd7 320 default:
mbed_official 68:41613245dfd7 321 return 0;
mbed_official 68:41613245dfd7 322 }
mbed_official 68:41613245dfd7 323 }
mbed_official 68:41613245dfd7 324
mbed_official 68:41613245dfd7 325 int i2c_slave_read(i2c_t *obj, char *data, int length) {
mbed_official 68:41613245dfd7 326 uint8_t dummy_read;
mbed_official 68:41613245dfd7 327 uint8_t * ptr;
mbed_official 68:41613245dfd7 328 int count;
mbed_official 68:41613245dfd7 329
mbed_official 68:41613245dfd7 330 // set rx mode
mbed_official 68:41613245dfd7 331 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 332
mbed_official 68:41613245dfd7 333 // first dummy read
mbed_official 68:41613245dfd7 334 dummy_read = obj->i2c->D;
mbed_official 68:41613245dfd7 335 if (i2c_wait_end_rx_transfer(obj))
mbed_official 68:41613245dfd7 336 return 0;
mbed_official 68:41613245dfd7 337
mbed_official 68:41613245dfd7 338 // read address
mbed_official 68:41613245dfd7 339 dummy_read = obj->i2c->D;
mbed_official 68:41613245dfd7 340 if (i2c_wait_end_rx_transfer(obj))
mbed_official 68:41613245dfd7 341 return 0;
mbed_official 68:41613245dfd7 342
mbed_official 68:41613245dfd7 343 // read (length - 1) bytes
mbed_official 68:41613245dfd7 344 for (count = 0; count < (length - 1); count++) {
mbed_official 68:41613245dfd7 345 data[count] = obj->i2c->D;
mbed_official 68:41613245dfd7 346 if (i2c_wait_end_rx_transfer(obj))
mbed_official 68:41613245dfd7 347 return count;
mbed_official 68:41613245dfd7 348 }
mbed_official 68:41613245dfd7 349
mbed_official 68:41613245dfd7 350 // read last byte
mbed_official 68:41613245dfd7 351 ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
mbed_official 68:41613245dfd7 352 *ptr = obj->i2c->D;
mbed_official 68:41613245dfd7 353
mbed_official 68:41613245dfd7 354 return (length) ? (count + 1) : 0;
mbed_official 68:41613245dfd7 355 }
mbed_official 68:41613245dfd7 356
mbed_official 68:41613245dfd7 357 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
mbed_official 68:41613245dfd7 358 int i, count = 0;
mbed_official 68:41613245dfd7 359
mbed_official 68:41613245dfd7 360 // set tx mode
mbed_official 68:41613245dfd7 361 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 362
mbed_official 68:41613245dfd7 363 for (i = 0; i < length; i++) {
mbed_official 68:41613245dfd7 364 if (i2c_do_write(obj, data[count++]) == 2)
mbed_official 68:41613245dfd7 365 return i;
mbed_official 68:41613245dfd7 366 }
mbed_official 68:41613245dfd7 367
mbed_official 68:41613245dfd7 368 // set rx mode
mbed_official 68:41613245dfd7 369 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 370
mbed_official 68:41613245dfd7 371 // dummy rx transfer needed
mbed_official 68:41613245dfd7 372 // otherwise the master cannot generate a stop bit
mbed_official 68:41613245dfd7 373 obj->i2c->D;
mbed_official 68:41613245dfd7 374 if (i2c_wait_end_rx_transfer(obj) == 2)
mbed_official 68:41613245dfd7 375 return count;
mbed_official 68:41613245dfd7 376
mbed_official 68:41613245dfd7 377 return count;
mbed_official 68:41613245dfd7 378 }
mbed_official 68:41613245dfd7 379
mbed_official 68:41613245dfd7 380 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
mbed_official 68:41613245dfd7 381 obj->i2c->A1 = address & 0xfe;
mbed_official 68:41613245dfd7 382 }
mbed_official 68:41613245dfd7 383 #endif
mbed_official 68:41613245dfd7 384