shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_K20D5M/i2c_api.c@68:41613245dfd7, 2013-12-26 (annotated)

Committer:
mbed_official
Date:
Thu Dec 26 13:00:06 2013 +0000
Revision:
68:41613245dfd7
Child:
73:299c67215126
Synchronized with git revision fba199a9c4445231b0f38e1e113c118182635546



Full URL: https://github.com/mbedmicro/mbed/commit/fba199a9c4445231b0f38e1e113c118182635546/



target K20D5M

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 68:41613245dfd7 1 /* mbed Microcontroller Library
mbed_official 68:41613245dfd7 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 68:41613245dfd7 3 *
mbed_official 68:41613245dfd7 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 68:41613245dfd7 5 * you may not use this file except in compliance with the License.
mbed_official 68:41613245dfd7 6 * You may obtain a copy of the License at
mbed_official 68:41613245dfd7 7 *
mbed_official 68:41613245dfd7 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 68:41613245dfd7 9 *
mbed_official 68:41613245dfd7 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 68:41613245dfd7 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 68:41613245dfd7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 68:41613245dfd7 13 * See the License for the specific language governing permissions and
mbed_official 68:41613245dfd7 14 * limitations under the License.
mbed_official 68:41613245dfd7 15 */
mbed_official 68:41613245dfd7 16 #include "i2c_api.h"
mbed_official 68:41613245dfd7 17
mbed_official 68:41613245dfd7 18 #include "cmsis.h"
mbed_official 68:41613245dfd7 19 #include "pinmap.h"
mbed_official 68:41613245dfd7 20 #include "error.h"
mbed_official 68:41613245dfd7 21
mbed_official 68:41613245dfd7 22 static const PinMap PinMap_I2C_SDA[] = {
mbed_official 68:41613245dfd7 23 {PTB1, I2C_0, 2},
mbed_official 68:41613245dfd7 24 {PTB3, I2C_0, 2},
mbed_official 68:41613245dfd7 25 {NC , NC , 0}
mbed_official 68:41613245dfd7 26 };
mbed_official 68:41613245dfd7 27
mbed_official 68:41613245dfd7 28 static const PinMap PinMap_I2C_SCL[] = {
mbed_official 68:41613245dfd7 29 {PTB0, I2C_0, 2},
mbed_official 68:41613245dfd7 30 {PTB2, I2C_0, 2},
mbed_official 68:41613245dfd7 31 {NC , NC, 0}
mbed_official 68:41613245dfd7 32 };
mbed_official 68:41613245dfd7 33
mbed_official 68:41613245dfd7 34 static const uint16_t ICR[0x40] = {
mbed_official 68:41613245dfd7 35 20, 22, 24, 26, 28,
mbed_official 68:41613245dfd7 36 30, 34, 40, 28, 32,
mbed_official 68:41613245dfd7 37 36, 40, 44, 48, 56,
mbed_official 68:41613245dfd7 38 68, 48, 56, 64, 72,
mbed_official 68:41613245dfd7 39 80, 88, 104, 128, 80,
mbed_official 68:41613245dfd7 40 96, 112, 128, 144, 160,
mbed_official 68:41613245dfd7 41 192, 240, 160, 192, 224,
mbed_official 68:41613245dfd7 42 256, 288, 320, 384, 480,
mbed_official 68:41613245dfd7 43 320, 384, 448, 512, 576,
mbed_official 68:41613245dfd7 44 640, 768, 960, 640, 768,
mbed_official 68:41613245dfd7 45 896, 1024, 1152, 1280, 1536,
mbed_official 68:41613245dfd7 46 1920, 1280, 1536, 1792, 2048,
mbed_official 68:41613245dfd7 47 2304, 2560, 3072, 3840
mbed_official 68:41613245dfd7 48 };
mbed_official 68:41613245dfd7 49
mbed_official 68:41613245dfd7 50 static uint8_t first_read;
mbed_official 68:41613245dfd7 51
mbed_official 68:41613245dfd7 52
mbed_official 68:41613245dfd7 53 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
mbed_official 68:41613245dfd7 54 // determine the I2C to use
mbed_official 68:41613245dfd7 55 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
mbed_official 68:41613245dfd7 56 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
mbed_official 68:41613245dfd7 57 obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
mbed_official 68:41613245dfd7 58 if ((int)obj->i2c == NC)
mbed_official 68:41613245dfd7 59 error("I2C pin mapping failed");
mbed_official 68:41613245dfd7 60
mbed_official 68:41613245dfd7 61 SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
mbed_official 68:41613245dfd7 62 SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK;
mbed_official 68:41613245dfd7 63
mbed_official 68:41613245dfd7 64 // set default frequency at 100k
mbed_official 68:41613245dfd7 65 i2c_frequency(obj, 100000);
mbed_official 68:41613245dfd7 66
mbed_official 68:41613245dfd7 67 // enable I2C interface
mbed_official 68:41613245dfd7 68 obj->i2c->C1 |= 0x80;
mbed_official 68:41613245dfd7 69
mbed_official 68:41613245dfd7 70 pinmap_pinout(sda, PinMap_I2C_SDA);
mbed_official 68:41613245dfd7 71 pinmap_pinout(scl, PinMap_I2C_SCL);
mbed_official 68:41613245dfd7 72
mbed_official 68:41613245dfd7 73 first_read = 1;
mbed_official 68:41613245dfd7 74 }
mbed_official 68:41613245dfd7 75
mbed_official 68:41613245dfd7 76 int i2c_start(i2c_t *obj) {
mbed_official 68:41613245dfd7 77 // if we are in the middle of a transaction
mbed_official 68:41613245dfd7 78 // activate the repeat_start flag
mbed_official 68:41613245dfd7 79 if (obj->i2c->S & I2C_S_BUSY_MASK) {
mbed_official 68:41613245dfd7 80 obj->i2c->C1 |= 0x04;
mbed_official 68:41613245dfd7 81 } else {
mbed_official 68:41613245dfd7 82 obj->i2c->C1 |= I2C_C1_MST_MASK;
mbed_official 68:41613245dfd7 83 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 84 }
mbed_official 68:41613245dfd7 85 first_read = 1;
mbed_official 68:41613245dfd7 86 return 0;
mbed_official 68:41613245dfd7 87 }
mbed_official 68:41613245dfd7 88
mbed_official 68:41613245dfd7 89 int i2c_stop(i2c_t *obj) {
mbed_official 68:41613245dfd7 90 volatile uint32_t n = 0;
mbed_official 68:41613245dfd7 91 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
mbed_official 68:41613245dfd7 92 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 93
mbed_official 68:41613245dfd7 94 // It seems that there are timing problems
mbed_official 68:41613245dfd7 95 // when there is no waiting time after a STOP.
mbed_official 68:41613245dfd7 96 // This wait is also included on the samples
mbed_official 68:41613245dfd7 97 // code provided with the freedom board
mbed_official 68:41613245dfd7 98 for (n = 0; n < 100; n++)
mbed_official 68:41613245dfd7 99 __NOP();
mbed_official 68:41613245dfd7 100 first_read = 1;
mbed_official 68:41613245dfd7 101 return 0;
mbed_official 68:41613245dfd7 102 }
mbed_official 68:41613245dfd7 103
mbed_official 68:41613245dfd7 104 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
mbed_official 68:41613245dfd7 105 uint32_t i, timeout = 1000;
mbed_official 68:41613245dfd7 106
mbed_official 68:41613245dfd7 107 for (i = 0; i < timeout; i++) {
mbed_official 68:41613245dfd7 108 if (obj->i2c->S & mask)
mbed_official 68:41613245dfd7 109 return 0;
mbed_official 68:41613245dfd7 110 }
mbed_official 68:41613245dfd7 111
mbed_official 68:41613245dfd7 112 return 1;
mbed_official 68:41613245dfd7 113 }
mbed_official 68:41613245dfd7 114
mbed_official 68:41613245dfd7 115 // this function waits the end of a tx transfer and return the status of the transaction:
mbed_official 68:41613245dfd7 116 // 0: OK ack received
mbed_official 68:41613245dfd7 117 // 1: OK ack not received
mbed_official 68:41613245dfd7 118 // 2: failure
mbed_official 68:41613245dfd7 119 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
mbed_official 68:41613245dfd7 120
mbed_official 68:41613245dfd7 121 // wait for the interrupt flag
mbed_official 68:41613245dfd7 122 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
mbed_official 68:41613245dfd7 123 return 2;
mbed_official 68:41613245dfd7 124 }
mbed_official 68:41613245dfd7 125
mbed_official 68:41613245dfd7 126 obj->i2c->S |= I2C_S_IICIF_MASK;
mbed_official 68:41613245dfd7 127
mbed_official 68:41613245dfd7 128 // wait transfer complete
mbed_official 68:41613245dfd7 129 if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
mbed_official 68:41613245dfd7 130 return 2;
mbed_official 68:41613245dfd7 131 }
mbed_official 68:41613245dfd7 132
mbed_official 68:41613245dfd7 133 // check if we received the ACK or not
mbed_official 68:41613245dfd7 134 return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0;
mbed_official 68:41613245dfd7 135 }
mbed_official 68:41613245dfd7 136
mbed_official 68:41613245dfd7 137 // this function waits the end of a rx transfer and return the status of the transaction:
mbed_official 68:41613245dfd7 138 // 0: OK
mbed_official 68:41613245dfd7 139 // 1: failure
mbed_official 68:41613245dfd7 140 static int i2c_wait_end_rx_transfer(i2c_t *obj) {
mbed_official 68:41613245dfd7 141 // wait for the end of the rx transfer
mbed_official 68:41613245dfd7 142 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
mbed_official 68:41613245dfd7 143 return 1;
mbed_official 68:41613245dfd7 144 }
mbed_official 68:41613245dfd7 145
mbed_official 68:41613245dfd7 146 obj->i2c->S |= I2C_S_IICIF_MASK;
mbed_official 68:41613245dfd7 147
mbed_official 68:41613245dfd7 148 return 0;
mbed_official 68:41613245dfd7 149 }
mbed_official 68:41613245dfd7 150
mbed_official 68:41613245dfd7 151 static void i2c_send_nack(i2c_t *obj) {
mbed_official 68:41613245dfd7 152 obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK
mbed_official 68:41613245dfd7 153 }
mbed_official 68:41613245dfd7 154
mbed_official 68:41613245dfd7 155 static void i2c_send_ack(i2c_t *obj) {
mbed_official 68:41613245dfd7 156 obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK
mbed_official 68:41613245dfd7 157 }
mbed_official 68:41613245dfd7 158
mbed_official 68:41613245dfd7 159 static int i2c_do_write(i2c_t *obj, int value) {
mbed_official 68:41613245dfd7 160 // write the data
mbed_official 68:41613245dfd7 161 obj->i2c->D = value;
mbed_official 68:41613245dfd7 162
mbed_official 68:41613245dfd7 163 // init and wait the end of the transfer
mbed_official 68:41613245dfd7 164 return i2c_wait_end_tx_transfer(obj);
mbed_official 68:41613245dfd7 165 }
mbed_official 68:41613245dfd7 166
mbed_official 68:41613245dfd7 167 static int i2c_do_read(i2c_t *obj, char * data, int last) {
mbed_official 68:41613245dfd7 168 if (last)
mbed_official 68:41613245dfd7 169 i2c_send_nack(obj);
mbed_official 68:41613245dfd7 170 else
mbed_official 68:41613245dfd7 171 i2c_send_ack(obj);
mbed_official 68:41613245dfd7 172
mbed_official 68:41613245dfd7 173 *data = (obj->i2c->D & 0xFF);
mbed_official 68:41613245dfd7 174
mbed_official 68:41613245dfd7 175 // start rx transfer and wait the end of the transfer
mbed_official 68:41613245dfd7 176 return i2c_wait_end_rx_transfer(obj);
mbed_official 68:41613245dfd7 177 }
mbed_official 68:41613245dfd7 178
mbed_official 68:41613245dfd7 179 void i2c_frequency(i2c_t *obj, int hz) {
mbed_official 68:41613245dfd7 180 uint8_t icr = 0;
mbed_official 68:41613245dfd7 181 uint8_t mult = 0;
mbed_official 68:41613245dfd7 182 uint32_t error = 0;
mbed_official 68:41613245dfd7 183 uint32_t p_error = 0xffffffff;
mbed_official 68:41613245dfd7 184 uint32_t ref = 0;
mbed_official 68:41613245dfd7 185 uint8_t i, j;
mbed_official 68:41613245dfd7 186 // bus clk
mbed_official 68:41613245dfd7 187 uint32_t PCLK = 24000000u;
mbed_official 68:41613245dfd7 188 uint32_t pulse = PCLK / (hz * 2);
mbed_official 68:41613245dfd7 189
mbed_official 68:41613245dfd7 190 // we look for the values that minimize the error
mbed_official 68:41613245dfd7 191
mbed_official 68:41613245dfd7 192 // test all the MULT values
mbed_official 68:41613245dfd7 193 for (i = 1; i < 5; i*=2) {
mbed_official 68:41613245dfd7 194 for (j = 0; j < 0x40; j++) {
mbed_official 68:41613245dfd7 195 ref = PCLK / (i*ICR[j]);
mbed_official 68:41613245dfd7 196 if (ref > (uint32_t)hz)
mbed_official 68:41613245dfd7 197 continue;
mbed_official 68:41613245dfd7 198 error = hz - ref;
mbed_official 68:41613245dfd7 199 if (error < p_error) {
mbed_official 68:41613245dfd7 200 icr = j;
mbed_official 68:41613245dfd7 201 mult = i/2;
mbed_official 68:41613245dfd7 202 p_error = error;
mbed_official 68:41613245dfd7 203 }
mbed_official 68:41613245dfd7 204 }
mbed_official 68:41613245dfd7 205 }
mbed_official 68:41613245dfd7 206 pulse = icr | (mult << 6);
mbed_official 68:41613245dfd7 207
mbed_official 68:41613245dfd7 208 // I2C Rate
mbed_official 68:41613245dfd7 209 obj->i2c->F = pulse;
mbed_official 68:41613245dfd7 210 }
mbed_official 68:41613245dfd7 211
mbed_official 68:41613245dfd7 212 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
mbed_official 68:41613245dfd7 213 int count;
mbed_official 68:41613245dfd7 214 char dummy_read, *ptr;
mbed_official 68:41613245dfd7 215
mbed_official 68:41613245dfd7 216 if (i2c_start(obj)) {
mbed_official 68:41613245dfd7 217 i2c_stop(obj);
mbed_official 68:41613245dfd7 218 return I2C_ERROR_BUS_BUSY;
mbed_official 68:41613245dfd7 219 }
mbed_official 68:41613245dfd7 220
mbed_official 68:41613245dfd7 221 if (i2c_do_write(obj, (address | 0x01))) {
mbed_official 68:41613245dfd7 222 i2c_stop(obj);
mbed_official 68:41613245dfd7 223 return I2C_ERROR_NO_SLAVE;
mbed_official 68:41613245dfd7 224 }
mbed_official 68:41613245dfd7 225
mbed_official 68:41613245dfd7 226 // set rx mode
mbed_official 68:41613245dfd7 227 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 228
mbed_official 68:41613245dfd7 229 // Read in bytes
mbed_official 68:41613245dfd7 230 for (count = 0; count < (length); count++) {
mbed_official 68:41613245dfd7 231 ptr = (count == 0) ? &dummy_read : &data[count - 1];
mbed_official 68:41613245dfd7 232 uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
mbed_official 68:41613245dfd7 233 if (i2c_do_read(obj, ptr, stop_)) {
mbed_official 68:41613245dfd7 234 i2c_stop(obj);
mbed_official 68:41613245dfd7 235 return count;
mbed_official 68:41613245dfd7 236 }
mbed_official 68:41613245dfd7 237 }
mbed_official 68:41613245dfd7 238
mbed_official 68:41613245dfd7 239 // If not repeated start, send stop.
mbed_official 68:41613245dfd7 240 if (stop) {
mbed_official 68:41613245dfd7 241 i2c_stop(obj);
mbed_official 68:41613245dfd7 242 }
mbed_official 68:41613245dfd7 243
mbed_official 68:41613245dfd7 244 // last read
mbed_official 68:41613245dfd7 245 data[count-1] = obj->i2c->D;
mbed_official 68:41613245dfd7 246
mbed_official 68:41613245dfd7 247 return length;
mbed_official 68:41613245dfd7 248 }
mbed_official 68:41613245dfd7 249 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
mbed_official 68:41613245dfd7 250 int i;
mbed_official 68:41613245dfd7 251
mbed_official 68:41613245dfd7 252 if (i2c_start(obj)) {
mbed_official 68:41613245dfd7 253 i2c_stop(obj);
mbed_official 68:41613245dfd7 254 return I2C_ERROR_BUS_BUSY;
mbed_official 68:41613245dfd7 255 }
mbed_official 68:41613245dfd7 256
mbed_official 68:41613245dfd7 257 if (i2c_do_write(obj, (address & 0xFE))) {
mbed_official 68:41613245dfd7 258 i2c_stop(obj);
mbed_official 68:41613245dfd7 259 return I2C_ERROR_NO_SLAVE;
mbed_official 68:41613245dfd7 260 }
mbed_official 68:41613245dfd7 261
mbed_official 68:41613245dfd7 262 for (i = 0; i < length; i++) {
mbed_official 68:41613245dfd7 263 if(i2c_do_write(obj, data[i])) {
mbed_official 68:41613245dfd7 264 i2c_stop(obj);
mbed_official 68:41613245dfd7 265 return i;
mbed_official 68:41613245dfd7 266 }
mbed_official 68:41613245dfd7 267 }
mbed_official 68:41613245dfd7 268
mbed_official 68:41613245dfd7 269 if (stop)
mbed_official 68:41613245dfd7 270 i2c_stop(obj);
mbed_official 68:41613245dfd7 271
mbed_official 68:41613245dfd7 272 return length;
mbed_official 68:41613245dfd7 273 }
mbed_official 68:41613245dfd7 274
mbed_official 68:41613245dfd7 275 void i2c_reset(i2c_t *obj) {
mbed_official 68:41613245dfd7 276 i2c_stop(obj);
mbed_official 68:41613245dfd7 277 }
mbed_official 68:41613245dfd7 278
mbed_official 68:41613245dfd7 279 int i2c_byte_read(i2c_t *obj, int last) {
mbed_official 68:41613245dfd7 280 char data;
mbed_official 68:41613245dfd7 281
mbed_official 68:41613245dfd7 282 // set rx mode
mbed_official 68:41613245dfd7 283 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 284
mbed_official 68:41613245dfd7 285 if(first_read) {
mbed_official 68:41613245dfd7 286 // first dummy read
mbed_official 68:41613245dfd7 287 i2c_do_read(obj, &data, 0);
mbed_official 68:41613245dfd7 288 first_read = 0;
mbed_official 68:41613245dfd7 289 }
mbed_official 68:41613245dfd7 290
mbed_official 68:41613245dfd7 291 if (last) {
mbed_official 68:41613245dfd7 292 // set tx mode
mbed_official 68:41613245dfd7 293 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 294 return obj->i2c->D;
mbed_official 68:41613245dfd7 295 }
mbed_official 68:41613245dfd7 296
mbed_official 68:41613245dfd7 297 i2c_do_read(obj, &data, last);
mbed_official 68:41613245dfd7 298
mbed_official 68:41613245dfd7 299 return data;
mbed_official 68:41613245dfd7 300 }
mbed_official 68:41613245dfd7 301
mbed_official 68:41613245dfd7 302 int i2c_byte_write(i2c_t *obj, int data) {
mbed_official 68:41613245dfd7 303 first_read = 1;
mbed_official 68:41613245dfd7 304
mbed_official 68:41613245dfd7 305 // set tx mode
mbed_official 68:41613245dfd7 306 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 307
mbed_official 68:41613245dfd7 308 return !i2c_do_write(obj, (data & 0xFF));
mbed_official 68:41613245dfd7 309 }
mbed_official 68:41613245dfd7 310
mbed_official 68:41613245dfd7 311
mbed_official 68:41613245dfd7 312 #if DEVICE_I2CSLAVE
mbed_official 68:41613245dfd7 313 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
mbed_official 68:41613245dfd7 314 if (enable_slave) {
mbed_official 68:41613245dfd7 315 // set slave mode
mbed_official 68:41613245dfd7 316 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
mbed_official 68:41613245dfd7 317 obj->i2c->C1 |= I2C_C1_IICIE_MASK;
mbed_official 68:41613245dfd7 318 } else {
mbed_official 68:41613245dfd7 319 // set master mode
mbed_official 68:41613245dfd7 320 obj->i2c->C1 |= I2C_C1_MST_MASK;
mbed_official 68:41613245dfd7 321 }
mbed_official 68:41613245dfd7 322 }
mbed_official 68:41613245dfd7 323
mbed_official 68:41613245dfd7 324 int i2c_slave_receive(i2c_t *obj) {
mbed_official 68:41613245dfd7 325 switch(obj->i2c->S) {
mbed_official 68:41613245dfd7 326 // read addressed
mbed_official 68:41613245dfd7 327 case 0xE6:
mbed_official 68:41613245dfd7 328 return 1;
mbed_official 68:41613245dfd7 329
mbed_official 68:41613245dfd7 330 // write addressed
mbed_official 68:41613245dfd7 331 case 0xE2:
mbed_official 68:41613245dfd7 332 return 3;
mbed_official 68:41613245dfd7 333
mbed_official 68:41613245dfd7 334 default:
mbed_official 68:41613245dfd7 335 return 0;
mbed_official 68:41613245dfd7 336 }
mbed_official 68:41613245dfd7 337 }
mbed_official 68:41613245dfd7 338
mbed_official 68:41613245dfd7 339 int i2c_slave_read(i2c_t *obj, char *data, int length) {
mbed_official 68:41613245dfd7 340 uint8_t dummy_read;
mbed_official 68:41613245dfd7 341 uint8_t * ptr;
mbed_official 68:41613245dfd7 342 int count;
mbed_official 68:41613245dfd7 343
mbed_official 68:41613245dfd7 344 // set rx mode
mbed_official 68:41613245dfd7 345 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 346
mbed_official 68:41613245dfd7 347 // first dummy read
mbed_official 68:41613245dfd7 348 dummy_read = obj->i2c->D;
mbed_official 68:41613245dfd7 349 if (i2c_wait_end_rx_transfer(obj))
mbed_official 68:41613245dfd7 350 return 0;
mbed_official 68:41613245dfd7 351
mbed_official 68:41613245dfd7 352 // read address
mbed_official 68:41613245dfd7 353 dummy_read = obj->i2c->D;
mbed_official 68:41613245dfd7 354 if (i2c_wait_end_rx_transfer(obj))
mbed_official 68:41613245dfd7 355 return 0;
mbed_official 68:41613245dfd7 356
mbed_official 68:41613245dfd7 357 // read (length - 1) bytes
mbed_official 68:41613245dfd7 358 for (count = 0; count < (length - 1); count++) {
mbed_official 68:41613245dfd7 359 data[count] = obj->i2c->D;
mbed_official 68:41613245dfd7 360 if (i2c_wait_end_rx_transfer(obj))
mbed_official 68:41613245dfd7 361 return count;
mbed_official 68:41613245dfd7 362 }
mbed_official 68:41613245dfd7 363
mbed_official 68:41613245dfd7 364 // read last byte
mbed_official 68:41613245dfd7 365 ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
mbed_official 68:41613245dfd7 366 *ptr = obj->i2c->D;
mbed_official 68:41613245dfd7 367
mbed_official 68:41613245dfd7 368 return (length) ? (count + 1) : 0;
mbed_official 68:41613245dfd7 369 }
mbed_official 68:41613245dfd7 370
mbed_official 68:41613245dfd7 371 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
mbed_official 68:41613245dfd7 372 int i, count = 0;
mbed_official 68:41613245dfd7 373
mbed_official 68:41613245dfd7 374 // set tx mode
mbed_official 68:41613245dfd7 375 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 376
mbed_official 68:41613245dfd7 377 for (i = 0; i < length; i++) {
mbed_official 68:41613245dfd7 378 if (i2c_do_write(obj, data[count++]) == 2)
mbed_official 68:41613245dfd7 379 return i;
mbed_official 68:41613245dfd7 380 }
mbed_official 68:41613245dfd7 381
mbed_official 68:41613245dfd7 382 // set rx mode
mbed_official 68:41613245dfd7 383 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 68:41613245dfd7 384
mbed_official 68:41613245dfd7 385 // dummy rx transfer needed
mbed_official 68:41613245dfd7 386 // otherwise the master cannot generate a stop bit
mbed_official 68:41613245dfd7 387 obj->i2c->D;
mbed_official 68:41613245dfd7 388 if (i2c_wait_end_rx_transfer(obj) == 2)
mbed_official 68:41613245dfd7 389 return count;
mbed_official 68:41613245dfd7 390
mbed_official 68:41613245dfd7 391 return count;
mbed_official 68:41613245dfd7 392 }
mbed_official 68:41613245dfd7 393
mbed_official 68:41613245dfd7 394 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
mbed_official 68:41613245dfd7 395 obj->i2c->A1 = address & 0xfe;
mbed_official 68:41613245dfd7 396 }
mbed_official 68:41613245dfd7 397 #endif
mbed_official 68:41613245dfd7 398