Sinan Divarci
/
max4146x_comp
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max41461_2_reg_cfg2_t Union Reference
CFG2 (0X01) More...
#include <Max41461_2_regs.h>
Detailed Description
CFG2 (0X01)
Definition at line 60 of file Max41461_2_regs.h.
Field Documentation
| unsigned char bclk_postdiv |
Select the Baud Clock Post Division Ratio.
Valid values are from 1 to 5.
Definition at line 63 of file Max41461_2_regs.h.
| unsigned char clkout_delay |
Selects the delay when CLKOUT starts toggling upon exiting SHUTDOWN mode, in divided XO clock cycles.
Definition at line 66 of file Max41461_2_regs.h.
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