schneider françois / mbed-dev

helpfor studient

Dependents:   STM32_F103-C8T6basecanblink_led

Fork of mbed-dev by mbed official

targets/TARGET_NUVOTON/TARGET_M451/lp_ticker.c@183:a56a73fd2a6f, 2018-03-20 (annotated)

Committer:
AnnaBridge
Date:
Tue Mar 20 16:56:18 2018 +0000
Revision:
183:a56a73fd2a6f
Parent:
174:b96e65c34a4d
Child:
185:08ed48f1de7f
mbed-dev library. Release version 160

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2015-2016 Nuvoton
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
AnnaBridge 183:a56a73fd2a6f 16
<> 149:156823d33999 17 #include "lp_ticker_api.h"
<> 149:156823d33999 18
<> 149:156823d33999 19 #if DEVICE_LOWPOWERTIMER
<> 149:156823d33999 20
<> 149:156823d33999 21 #include "sleep_api.h"
AnnaBridge 183:a56a73fd2a6f 22 #include "mbed_wait_api.h"
AnnaBridge 183:a56a73fd2a6f 23 #include "mbed_assert.h"
<> 149:156823d33999 24 #include "nu_modutil.h"
<> 149:156823d33999 25 #include "nu_miscutil.h"
<> 149:156823d33999 26
AnnaBridge 183:a56a73fd2a6f 27 /* Micro seconds per second */
AnnaBridge 183:a56a73fd2a6f 28 #define NU_US_PER_SEC 1000000
AnnaBridge 183:a56a73fd2a6f 29 /* Timer clock per lp_ticker tick */
AnnaBridge 183:a56a73fd2a6f 30 #define NU_TMRCLK_PER_TICK 1
AnnaBridge 183:a56a73fd2a6f 31 /* Timer clock per second */
AnnaBridge 183:a56a73fd2a6f 32 #define NU_TMRCLK_PER_SEC (__LXT)
AnnaBridge 183:a56a73fd2a6f 33 /* Timer max counter bit size */
AnnaBridge 183:a56a73fd2a6f 34 #define NU_TMR_MAXCNT_BITSIZE 24
AnnaBridge 183:a56a73fd2a6f 35 /* Timer max counter */
AnnaBridge 183:a56a73fd2a6f 36 #define NU_TMR_MAXCNT ((1 << NU_TMR_MAXCNT_BITSIZE) - 1)
<> 149:156823d33999 37
AnnaBridge 183:a56a73fd2a6f 38 static void tmr1_vec(void);
<> 149:156823d33999 39
AnnaBridge 183:a56a73fd2a6f 40 /* NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC. */
AnnaBridge 183:a56a73fd2a6f 41 static const struct nu_modinit_s timer1_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_LXT, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
AnnaBridge 183:a56a73fd2a6f 42
AnnaBridge 183:a56a73fd2a6f 43 #define TIMER_MODINIT timer1_modinit
AnnaBridge 183:a56a73fd2a6f 44
AnnaBridge 183:a56a73fd2a6f 45 static int ticker_inited = 0;
<> 149:156823d33999 46
<> 149:156823d33999 47 #define TMR_CMP_MIN 2
<> 149:156823d33999 48 #define TMR_CMP_MAX 0xFFFFFFu
<> 149:156823d33999 49
<> 149:156823d33999 50 void lp_ticker_init(void)
<> 149:156823d33999 51 {
AnnaBridge 183:a56a73fd2a6f 52 if (ticker_inited) {
<> 149:156823d33999 53 return;
<> 149:156823d33999 54 }
AnnaBridge 183:a56a73fd2a6f 55 ticker_inited = 1;
<> 149:156823d33999 56
<> 149:156823d33999 57 // Reset module
AnnaBridge 183:a56a73fd2a6f 58 SYS_ResetModule(TIMER_MODINIT.rsetidx);
AnnaBridge 183:a56a73fd2a6f 59
<> 149:156823d33999 60 // Select IP clock source
AnnaBridge 183:a56a73fd2a6f 61 CLK_SetModuleClock(TIMER_MODINIT.clkidx, TIMER_MODINIT.clksrc, TIMER_MODINIT.clkdiv);
AnnaBridge 183:a56a73fd2a6f 62
<> 149:156823d33999 63 // Enable IP clock
AnnaBridge 183:a56a73fd2a6f 64 CLK_EnableModuleClock(TIMER_MODINIT.clkidx);
<> 149:156823d33999 65
<> 149:156823d33999 66 // Configure clock
AnnaBridge 183:a56a73fd2a6f 67 uint32_t clk_timer = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 183:a56a73fd2a6f 68 uint32_t prescale_timer = clk_timer / NU_TMRCLK_PER_SEC - 1;
AnnaBridge 183:a56a73fd2a6f 69 MBED_ASSERT((prescale_timer != (uint32_t) -1) && prescale_timer <= 127);
AnnaBridge 183:a56a73fd2a6f 70 MBED_ASSERT((clk_timer % NU_TMRCLK_PER_SEC) == 0);
AnnaBridge 183:a56a73fd2a6f 71 uint32_t cmp_timer = TMR_CMP_MAX;
AnnaBridge 183:a56a73fd2a6f 72 MBED_ASSERT(cmp_timer >= TMR_CMP_MIN && cmp_timer <= TMR_CMP_MAX);
<> 149:156823d33999 73 // Continuous mode
<> 149:156823d33999 74 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default.
AnnaBridge 183:a56a73fd2a6f 75 ((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname))->CTL = TIMER_CONTINUOUS_MODE | prescale_timer/* | TIMER_CTL_CNTDATEN_Msk*/;
AnnaBridge 183:a56a73fd2a6f 76 ((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname))->CMP = cmp_timer;
AnnaBridge 183:a56a73fd2a6f 77
<> 149:156823d33999 78 // Set vector
AnnaBridge 183:a56a73fd2a6f 79 NVIC_SetVector(TIMER_MODINIT.irq_n, (uint32_t) TIMER_MODINIT.var);
AnnaBridge 183:a56a73fd2a6f 80
AnnaBridge 183:a56a73fd2a6f 81 NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 183:a56a73fd2a6f 82
AnnaBridge 183:a56a73fd2a6f 83 TIMER_EnableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 183:a56a73fd2a6f 84 TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 183:a56a73fd2a6f 85 /* NOTE: When engine is clocked by low power clock source (LXT/LIRC), we need to wait for 3 engine clocks. */
AnnaBridge 183:a56a73fd2a6f 86 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 183:a56a73fd2a6f 87 TIMER_Start((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
<> 149:156823d33999 88 }
<> 149:156823d33999 89
<> 149:156823d33999 90 timestamp_t lp_ticker_read()
AnnaBridge 183:a56a73fd2a6f 91 {
AnnaBridge 183:a56a73fd2a6f 92 if (! ticker_inited) {
<> 149:156823d33999 93 lp_ticker_init();
<> 149:156823d33999 94 }
<> 149:156823d33999 95
AnnaBridge 183:a56a73fd2a6f 96 TIMER_T * timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 183:a56a73fd2a6f 97
AnnaBridge 183:a56a73fd2a6f 98 return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK);
<> 149:156823d33999 99 }
<> 149:156823d33999 100
<> 149:156823d33999 101 void lp_ticker_set_interrupt(timestamp_t timestamp)
<> 149:156823d33999 102 {
AnnaBridge 183:a56a73fd2a6f 103 /* In continuous mode, counter will be reset to zero with the following sequence:
AnnaBridge 183:a56a73fd2a6f 104 * 1. Stop counting
AnnaBridge 183:a56a73fd2a6f 105 * 2. Configure new CMP value
AnnaBridge 183:a56a73fd2a6f 106 * 3. Restart counting
AnnaBridge 183:a56a73fd2a6f 107 *
AnnaBridge 183:a56a73fd2a6f 108 * This behavior is not what we want. To fix it, we could configure new CMP value
AnnaBridge 183:a56a73fd2a6f 109 * without stopping counting first.
AnnaBridge 183:a56a73fd2a6f 110 */
AnnaBridge 183:a56a73fd2a6f 111 TIMER_T * timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 174:b96e65c34a4d 112
AnnaBridge 183:a56a73fd2a6f 113 /* NOTE: Because H/W timer requests min compare value, our implementation would have alarm delay of
AnnaBridge 183:a56a73fd2a6f 114 * (TMR_CMP_MIN - interval_clk) clocks when interval_clk is between [1, TMR_CMP_MIN). */
AnnaBridge 183:a56a73fd2a6f 115 uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
AnnaBridge 183:a56a73fd2a6f 116 cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
AnnaBridge 183:a56a73fd2a6f 117 timer_base->CMP = cmp_timer;
AnnaBridge 183:a56a73fd2a6f 118
AnnaBridge 183:a56a73fd2a6f 119 /* NOTE: When engine is clocked by low power clock source (LXT/LIRC), we need to wait for 3 engine clocks. */
AnnaBridge 183:a56a73fd2a6f 120 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 183:a56a73fd2a6f 121 TIMER_Start(timer_base);
<> 149:156823d33999 122 }
<> 149:156823d33999 123
<> 149:156823d33999 124 void lp_ticker_disable_interrupt(void)
<> 149:156823d33999 125 {
AnnaBridge 183:a56a73fd2a6f 126 TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
<> 149:156823d33999 127 }
<> 149:156823d33999 128
<> 149:156823d33999 129 void lp_ticker_clear_interrupt(void)
<> 149:156823d33999 130 {
AnnaBridge 183:a56a73fd2a6f 131 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
<> 149:156823d33999 132 }
<> 149:156823d33999 133
AnnaBridge 183:a56a73fd2a6f 134 void lp_ticker_fire_interrupt(void)
<> 149:156823d33999 135 {
AnnaBridge 183:a56a73fd2a6f 136 // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
AnnaBridge 183:a56a73fd2a6f 137 // This prevents a recursive loop under heavy load which can lead to a stack overflow.
AnnaBridge 183:a56a73fd2a6f 138 NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
<> 149:156823d33999 139 }
<> 149:156823d33999 140
AnnaBridge 183:a56a73fd2a6f 141 const ticker_info_t* lp_ticker_get_info()
<> 149:156823d33999 142 {
AnnaBridge 183:a56a73fd2a6f 143 static const ticker_info_t info = {
AnnaBridge 183:a56a73fd2a6f 144 NU_TMRCLK_PER_SEC / NU_TMRCLK_PER_TICK,
AnnaBridge 183:a56a73fd2a6f 145 NU_TMR_MAXCNT_BITSIZE
AnnaBridge 183:a56a73fd2a6f 146 };
AnnaBridge 183:a56a73fd2a6f 147 return &info;
AnnaBridge 183:a56a73fd2a6f 148 }
AnnaBridge 183:a56a73fd2a6f 149
AnnaBridge 183:a56a73fd2a6f 150 static void tmr1_vec(void)
AnnaBridge 183:a56a73fd2a6f 151 {
AnnaBridge 183:a56a73fd2a6f 152 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 183:a56a73fd2a6f 153 TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
<> 149:156823d33999 154
AnnaBridge 183:a56a73fd2a6f 155 // NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler();
AnnaBridge 183:a56a73fd2a6f 156 lp_ticker_irq_handler();
<> 149:156823d33999 157 }
AnnaBridge 183:a56a73fd2a6f 158
<> 149:156823d33999 159 #endif