Diff: ADS1115.h

Revision:

1:63bc0088a8ed

Parent:

0:8edd7b830280

--- a/ADS1115.h	Mon Nov 09 00:33:42 2020 +0000
+++ b/ADS1115.h	Mon Nov 09 04:48:47 2020 +0000
@@ -53,13 +53,22 @@
     #define ADS1115_REG_CONFIG_MODE_SINGLE  (0x0100)  // Power-down single-shot mode (default)
 
     #define ADS1115_REG_CONFIG_DR_MASK      (0x00E0)  
-    #define ADS1115_REG_CONFIG_DR_8SPS    (0x0000)  // 8SPS
-    #define ADS1115_REG_CONFIG_DR_16SPS    (0x0020)  // 16SPS
-    #define ADS1115_REG_CONFIG_DR_32SPS    (0x0040)  // 32SPS
-    #define ADS1115_REG_CONFIG_DR_64SPS    (0x0060)  // 64SPS
-    #define ADS1115_REG_CONFIG_DR_128SPS   (0x0080)  // 128SPS (default)
-    #define ADS1115_REG_CONFIG_DR_475SPS   (0x00A0)  // 475SPS
-    #define ADS1115_REG_CONFIG_DR_860SPS   (0x00C0)  // 860SPS
+    #define ADS1115_REG_CONFIG_DR_128SPS      (0x0000)  // 128SPS
+    #define ADS1115_REG_CONFIG_DR_250SPS     (0x0020)  // 250SPS
+    #define ADS1115_REG_CONFIG_DR_490SPS     (0x0040)  // 490SPS
+    #define ADS1115_REG_CONFIG_DR_920SPS     (0x0060)  // 920SPS
+    #define ADS1115_REG_CONFIG_DR_1600SPS    (0x0080)  // 1600SPS (default)
+    #define ADS1115_REG_CONFIG_DR_2400SPS    (0x00A0)  // 2400SPS
+    #define ADS1115_REG_CONFIG_DR_3300SPS    (0x00C0)  // 3300SPS
+    #define ADS1115_REG_CONFIG_DR_3300SPS    (0x00E0)  // 3300SPS
+    
+//    #define ADS1115_REG_CONFIG_DR_8SPS      (0x0000)  // 8SPS
+//    #define ADS1115_REG_CONFIG_DR_16SPS     (0x0020)  // 16SPS
+//    #define ADS1115_REG_CONFIG_DR_32SPS     (0x0040)  // 32SPS
+//    #define ADS1115_REG_CONFIG_DR_64SPS     (0x0060)  // 64SPS
+//    #define ADS1115_REG_CONFIG_DR_128SPS    (0x0080)  // 128SPS (default)
+//    #define ADS1115_REG_CONFIG_DR_475SPS    (0x00A0)  // 475SPS
+//    #define ADS1115_REG_CONFIG_DR_860SPS    (0x00C0)  // 860SPS
 
     #define ADS1115_REG_CONFIG_CMODE_MASK   (0x0010)
     #define ADS1115_REG_CONFIG_CMODE_TRAD   (0x0000)  // Traditional comparator with hysteresis (default)
@@ -134,7 +143,7 @@
                       ADS1115_REG_CONFIG_CLAT_NONLAT  | // Non-latching (default val)
                       ADS1115_REG_CONFIG_CPOL_ACTVLOW | // Alert/Rdy active low   (default val)
                       ADS1115_REG_CONFIG_CMODE_TRAD   | // Traditional comparator (default val)
-                      ADS1115_REG_CONFIG_DR_475SPS    | // 475SPS
+                      ADS1115_REG_CONFIG_DR_490SPS    | // 490SPS
                       ADS1115_REG_CONFIG_MODE_CONTIN;   // Countinuous-conversion mode 
 
     // Set PGA/voltage range