z ysaito / USBHost2

2018.07.26

Dependencies:   FATFileSystem2 mbed-rtos

Fork of USBHost by mbed official

USBHost/USBHALHost_LPC17.cpp@43:78f328f311dc, 2018-07-26 (annotated)

Committer:
sayzyas
Date:
Thu Jul 26 00:19:16 2018 +0000
Revision:
43:78f328f311dc
2018.07.26

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sayzyas 43:78f328f311dc 1 /* mbed USBHost Library
sayzyas 43:78f328f311dc 2 * Copyright (c) 2006-2013 ARM Limited
sayzyas 43:78f328f311dc 3 *
sayzyas 43:78f328f311dc 4 * Licensed under the Apache License, Version 2.0 (the "License");
sayzyas 43:78f328f311dc 5 * you may not use this file except in compliance with the License.
sayzyas 43:78f328f311dc 6 * You may obtain a copy of the License at
sayzyas 43:78f328f311dc 7 *
sayzyas 43:78f328f311dc 8 * http://www.apache.org/licenses/LICENSE-2.0
sayzyas 43:78f328f311dc 9 *
sayzyas 43:78f328f311dc 10 * Unless required by applicable law or agreed to in writing, software
sayzyas 43:78f328f311dc 11 * distributed under the License is distributed on an "AS IS" BASIS,
sayzyas 43:78f328f311dc 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sayzyas 43:78f328f311dc 13 * See the License for the specific language governing permissions and
sayzyas 43:78f328f311dc 14 * limitations under the License.
sayzyas 43:78f328f311dc 15 */
sayzyas 43:78f328f311dc 16
sayzyas 43:78f328f311dc 17 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2460)
sayzyas 43:78f328f311dc 18
sayzyas 43:78f328f311dc 19 #include "mbed.h"
sayzyas 43:78f328f311dc 20 #include "USBHALHost.h"
sayzyas 43:78f328f311dc 21 #include "dbg.h"
sayzyas 43:78f328f311dc 22
sayzyas 43:78f328f311dc 23 // bits of the USB/OTG clock control register
sayzyas 43:78f328f311dc 24 #define HOST_CLK_EN (1<<0)
sayzyas 43:78f328f311dc 25 #define DEV_CLK_EN (1<<1)
sayzyas 43:78f328f311dc 26 #define PORTSEL_CLK_EN (1<<3)
sayzyas 43:78f328f311dc 27 #define AHB_CLK_EN (1<<4)
sayzyas 43:78f328f311dc 28
sayzyas 43:78f328f311dc 29 // bits of the USB/OTG clock status register
sayzyas 43:78f328f311dc 30 #define HOST_CLK_ON (1<<0)
sayzyas 43:78f328f311dc 31 #define DEV_CLK_ON (1<<1)
sayzyas 43:78f328f311dc 32 #define PORTSEL_CLK_ON (1<<3)
sayzyas 43:78f328f311dc 33 #define AHB_CLK_ON (1<<4)
sayzyas 43:78f328f311dc 34
sayzyas 43:78f328f311dc 35 // we need host clock, OTG/portsel clock and AHB clock
sayzyas 43:78f328f311dc 36 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
sayzyas 43:78f328f311dc 37
sayzyas 43:78f328f311dc 38 #define HCCA_SIZE sizeof(HCCA)
sayzyas 43:78f328f311dc 39 #define ED_SIZE sizeof(HCED)
sayzyas 43:78f328f311dc 40 #define TD_SIZE sizeof(HCTD)
sayzyas 43:78f328f311dc 41
sayzyas 43:78f328f311dc 42 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
sayzyas 43:78f328f311dc 43
sayzyas 43:78f328f311dc 44 static volatile uint8_t usb_buf[TOTAL_SIZE] __attribute((section("AHBSRAM1"),aligned(256))); //256 bytes aligned!
sayzyas 43:78f328f311dc 45
sayzyas 43:78f328f311dc 46 USBHALHost * USBHALHost::instHost;
sayzyas 43:78f328f311dc 47
sayzyas 43:78f328f311dc 48 USBHALHost::USBHALHost() {
sayzyas 43:78f328f311dc 49 instHost = this;
sayzyas 43:78f328f311dc 50 memInit();
sayzyas 43:78f328f311dc 51 memset((void*)usb_hcca, 0, HCCA_SIZE);
sayzyas 43:78f328f311dc 52 for (int i = 0; i < MAX_ENDPOINT; i++) {
sayzyas 43:78f328f311dc 53 edBufAlloc[i] = false;
sayzyas 43:78f328f311dc 54 }
sayzyas 43:78f328f311dc 55 for (int i = 0; i < MAX_TD; i++) {
sayzyas 43:78f328f311dc 56 tdBufAlloc[i] = false;
sayzyas 43:78f328f311dc 57 }
sayzyas 43:78f328f311dc 58 }
sayzyas 43:78f328f311dc 59
sayzyas 43:78f328f311dc 60 void USBHALHost::init() {
sayzyas 43:78f328f311dc 61 NVIC_DisableIRQ(USB_IRQn);
sayzyas 43:78f328f311dc 62
sayzyas 43:78f328f311dc 63 //Cut power
sayzyas 43:78f328f311dc 64 LPC_SC->PCONP &= ~(1UL<<31);
sayzyas 43:78f328f311dc 65 wait_ms(100);
sayzyas 43:78f328f311dc 66
sayzyas 43:78f328f311dc 67 // turn on power for USB
sayzyas 43:78f328f311dc 68 LPC_SC->PCONP |= (1UL<<31);
sayzyas 43:78f328f311dc 69
sayzyas 43:78f328f311dc 70 // Enable USB host clock, port selection and AHB clock
sayzyas 43:78f328f311dc 71 LPC_USB->USBClkCtrl |= CLOCK_MASK;
sayzyas 43:78f328f311dc 72
sayzyas 43:78f328f311dc 73 // Wait for clocks to become available
sayzyas 43:78f328f311dc 74 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK);
sayzyas 43:78f328f311dc 75
sayzyas 43:78f328f311dc 76 // it seems the bits[0:1] mean the following
sayzyas 43:78f328f311dc 77 // 0: U1=device, U2=host
sayzyas 43:78f328f311dc 78 // 1: U1=host, U2=host
sayzyas 43:78f328f311dc 79 // 2: reserved
sayzyas 43:78f328f311dc 80 // 3: U1=host, U2=device
sayzyas 43:78f328f311dc 81 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
sayzyas 43:78f328f311dc 82 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
sayzyas 43:78f328f311dc 83 LPC_USB->OTGStCtrl |= 1;
sayzyas 43:78f328f311dc 84
sayzyas 43:78f328f311dc 85 // now that we've configured the ports, we can turn off the portsel clock
sayzyas 43:78f328f311dc 86 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
sayzyas 43:78f328f311dc 87
sayzyas 43:78f328f311dc 88 // configure USB D+/D- pins
sayzyas 43:78f328f311dc 89 // P0[29] = USB_D+, 01
sayzyas 43:78f328f311dc 90 // P0[30] = USB_D-, 01
sayzyas 43:78f328f311dc 91 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
sayzyas 43:78f328f311dc 92 LPC_PINCON->PINSEL1 |= ((1<<26) | (1<<28));
sayzyas 43:78f328f311dc 93
sayzyas 43:78f328f311dc 94 LPC_USB->HcControl = 0; // HARDWARE RESET
sayzyas 43:78f328f311dc 95 LPC_USB->HcControlHeadED = 0; // Initialize Control list head to Zero
sayzyas 43:78f328f311dc 96 LPC_USB->HcBulkHeadED = 0; // Initialize Bulk list head to Zero
sayzyas 43:78f328f311dc 97
sayzyas 43:78f328f311dc 98 // Wait 100 ms before apply reset
sayzyas 43:78f328f311dc 99 wait_ms(100);
sayzyas 43:78f328f311dc 100
sayzyas 43:78f328f311dc 101 // software reset
sayzyas 43:78f328f311dc 102 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
sayzyas 43:78f328f311dc 103
sayzyas 43:78f328f311dc 104 // Write Fm Interval and Largest Data Packet Counter
sayzyas 43:78f328f311dc 105 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL;
sayzyas 43:78f328f311dc 106 LPC_USB->HcPeriodicStart = FI * 90 / 100;
sayzyas 43:78f328f311dc 107
sayzyas 43:78f328f311dc 108 // Put HC in operational state
sayzyas 43:78f328f311dc 109 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
sayzyas 43:78f328f311dc 110 // Set Global Power
sayzyas 43:78f328f311dc 111 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC;
sayzyas 43:78f328f311dc 112
sayzyas 43:78f328f311dc 113 LPC_USB->HcHCCA = (uint32_t)(usb_hcca);
sayzyas 43:78f328f311dc 114
sayzyas 43:78f328f311dc 115 // Clear Interrrupt Status
sayzyas 43:78f328f311dc 116 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus;
sayzyas 43:78f328f311dc 117
sayzyas 43:78f328f311dc 118 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC;
sayzyas 43:78f328f311dc 119
sayzyas 43:78f328f311dc 120 // Enable the USB Interrupt
sayzyas 43:78f328f311dc 121 NVIC_SetVector(USB_IRQn, (uint32_t)(_usbisr));
sayzyas 43:78f328f311dc 122 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
sayzyas 43:78f328f311dc 123 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
sayzyas 43:78f328f311dc 124
sayzyas 43:78f328f311dc 125 NVIC_EnableIRQ(USB_IRQn);
sayzyas 43:78f328f311dc 126
sayzyas 43:78f328f311dc 127 // Check for any connected devices
sayzyas 43:78f328f311dc 128 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
sayzyas 43:78f328f311dc 129 //Device connected
sayzyas 43:78f328f311dc 130 wait_ms(150);
sayzyas 43:78f328f311dc 131 USB_DBG("Device connected (%08x)\n\r", LPC_USB->HcRhPortStatus1);
sayzyas 43:78f328f311dc 132 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
sayzyas 43:78f328f311dc 133 }
sayzyas 43:78f328f311dc 134 }
sayzyas 43:78f328f311dc 135
sayzyas 43:78f328f311dc 136 uint32_t USBHALHost::controlHeadED() {
sayzyas 43:78f328f311dc 137 return LPC_USB->HcControlHeadED;
sayzyas 43:78f328f311dc 138 }
sayzyas 43:78f328f311dc 139
sayzyas 43:78f328f311dc 140 uint32_t USBHALHost::bulkHeadED() {
sayzyas 43:78f328f311dc 141 return LPC_USB->HcBulkHeadED;
sayzyas 43:78f328f311dc 142 }
sayzyas 43:78f328f311dc 143
sayzyas 43:78f328f311dc 144 uint32_t USBHALHost::interruptHeadED() {
sayzyas 43:78f328f311dc 145 return usb_hcca->IntTable[0];
sayzyas 43:78f328f311dc 146 }
sayzyas 43:78f328f311dc 147
sayzyas 43:78f328f311dc 148 void USBHALHost::updateBulkHeadED(uint32_t addr) {
sayzyas 43:78f328f311dc 149 LPC_USB->HcBulkHeadED = addr;
sayzyas 43:78f328f311dc 150 }
sayzyas 43:78f328f311dc 151
sayzyas 43:78f328f311dc 152
sayzyas 43:78f328f311dc 153 void USBHALHost::updateControlHeadED(uint32_t addr) {
sayzyas 43:78f328f311dc 154 LPC_USB->HcControlHeadED = addr;
sayzyas 43:78f328f311dc 155 }
sayzyas 43:78f328f311dc 156
sayzyas 43:78f328f311dc 157 void USBHALHost::updateInterruptHeadED(uint32_t addr) {
sayzyas 43:78f328f311dc 158 usb_hcca->IntTable[0] = addr;
sayzyas 43:78f328f311dc 159 }
sayzyas 43:78f328f311dc 160
sayzyas 43:78f328f311dc 161
sayzyas 43:78f328f311dc 162 void USBHALHost::enableList(ENDPOINT_TYPE type) {
sayzyas 43:78f328f311dc 163 switch(type) {
sayzyas 43:78f328f311dc 164 case CONTROL_ENDPOINT:
sayzyas 43:78f328f311dc 165 LPC_USB->HcCommandStatus = OR_CMD_STATUS_CLF;
sayzyas 43:78f328f311dc 166 LPC_USB->HcControl |= OR_CONTROL_CLE;
sayzyas 43:78f328f311dc 167 break;
sayzyas 43:78f328f311dc 168 case ISOCHRONOUS_ENDPOINT:
sayzyas 43:78f328f311dc 169 break;
sayzyas 43:78f328f311dc 170 case BULK_ENDPOINT:
sayzyas 43:78f328f311dc 171 LPC_USB->HcCommandStatus = OR_CMD_STATUS_BLF;
sayzyas 43:78f328f311dc 172 LPC_USB->HcControl |= OR_CONTROL_BLE;
sayzyas 43:78f328f311dc 173 break;
sayzyas 43:78f328f311dc 174 case INTERRUPT_ENDPOINT:
sayzyas 43:78f328f311dc 175 LPC_USB->HcControl |= OR_CONTROL_PLE;
sayzyas 43:78f328f311dc 176 break;
sayzyas 43:78f328f311dc 177 }
sayzyas 43:78f328f311dc 178 }
sayzyas 43:78f328f311dc 179
sayzyas 43:78f328f311dc 180
sayzyas 43:78f328f311dc 181 bool USBHALHost::disableList(ENDPOINT_TYPE type) {
sayzyas 43:78f328f311dc 182 switch(type) {
sayzyas 43:78f328f311dc 183 case CONTROL_ENDPOINT:
sayzyas 43:78f328f311dc 184 if(LPC_USB->HcControl & OR_CONTROL_CLE) {
sayzyas 43:78f328f311dc 185 LPC_USB->HcControl &= ~OR_CONTROL_CLE;
sayzyas 43:78f328f311dc 186 return true;
sayzyas 43:78f328f311dc 187 }
sayzyas 43:78f328f311dc 188 return false;
sayzyas 43:78f328f311dc 189 case ISOCHRONOUS_ENDPOINT:
sayzyas 43:78f328f311dc 190 return false;
sayzyas 43:78f328f311dc 191 case BULK_ENDPOINT:
sayzyas 43:78f328f311dc 192 if(LPC_USB->HcControl & OR_CONTROL_BLE){
sayzyas 43:78f328f311dc 193 LPC_USB->HcControl &= ~OR_CONTROL_BLE;
sayzyas 43:78f328f311dc 194 return true;
sayzyas 43:78f328f311dc 195 }
sayzyas 43:78f328f311dc 196 return false;
sayzyas 43:78f328f311dc 197 case INTERRUPT_ENDPOINT:
sayzyas 43:78f328f311dc 198 if(LPC_USB->HcControl & OR_CONTROL_PLE) {
sayzyas 43:78f328f311dc 199 LPC_USB->HcControl &= ~OR_CONTROL_PLE;
sayzyas 43:78f328f311dc 200 return true;
sayzyas 43:78f328f311dc 201 }
sayzyas 43:78f328f311dc 202 return false;
sayzyas 43:78f328f311dc 203 }
sayzyas 43:78f328f311dc 204 return false;
sayzyas 43:78f328f311dc 205 }
sayzyas 43:78f328f311dc 206
sayzyas 43:78f328f311dc 207
sayzyas 43:78f328f311dc 208 void USBHALHost::memInit() {
sayzyas 43:78f328f311dc 209 usb_hcca = (volatile HCCA *)usb_buf;
sayzyas 43:78f328f311dc 210 usb_edBuf = usb_buf + HCCA_SIZE;
sayzyas 43:78f328f311dc 211 usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE);
sayzyas 43:78f328f311dc 212 }
sayzyas 43:78f328f311dc 213
sayzyas 43:78f328f311dc 214 volatile uint8_t * USBHALHost::getED() {
sayzyas 43:78f328f311dc 215 for (int i = 0; i < MAX_ENDPOINT; i++) {
sayzyas 43:78f328f311dc 216 if ( !edBufAlloc[i] ) {
sayzyas 43:78f328f311dc 217 edBufAlloc[i] = true;
sayzyas 43:78f328f311dc 218 return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
sayzyas 43:78f328f311dc 219 }
sayzyas 43:78f328f311dc 220 }
sayzyas 43:78f328f311dc 221 perror("Could not allocate ED\r\n");
sayzyas 43:78f328f311dc 222 return NULL; //Could not alloc ED
sayzyas 43:78f328f311dc 223 }
sayzyas 43:78f328f311dc 224
sayzyas 43:78f328f311dc 225 volatile uint8_t * USBHALHost::getTD() {
sayzyas 43:78f328f311dc 226 int i;
sayzyas 43:78f328f311dc 227 for (i = 0; i < MAX_TD; i++) {
sayzyas 43:78f328f311dc 228 if ( !tdBufAlloc[i] ) {
sayzyas 43:78f328f311dc 229 tdBufAlloc[i] = true;
sayzyas 43:78f328f311dc 230 return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
sayzyas 43:78f328f311dc 231 }
sayzyas 43:78f328f311dc 232 }
sayzyas 43:78f328f311dc 233 perror("Could not allocate TD\r\n");
sayzyas 43:78f328f311dc 234 return NULL; //Could not alloc TD
sayzyas 43:78f328f311dc 235 }
sayzyas 43:78f328f311dc 236
sayzyas 43:78f328f311dc 237
sayzyas 43:78f328f311dc 238 void USBHALHost::freeED(volatile uint8_t * ed) {
sayzyas 43:78f328f311dc 239 int i;
sayzyas 43:78f328f311dc 240 i = (ed - usb_edBuf) / ED_SIZE;
sayzyas 43:78f328f311dc 241 edBufAlloc[i] = false;
sayzyas 43:78f328f311dc 242 }
sayzyas 43:78f328f311dc 243
sayzyas 43:78f328f311dc 244 void USBHALHost::freeTD(volatile uint8_t * td) {
sayzyas 43:78f328f311dc 245 int i;
sayzyas 43:78f328f311dc 246 i = (td - usb_tdBuf) / TD_SIZE;
sayzyas 43:78f328f311dc 247 tdBufAlloc[i] = false;
sayzyas 43:78f328f311dc 248 }
sayzyas 43:78f328f311dc 249
sayzyas 43:78f328f311dc 250
sayzyas 43:78f328f311dc 251 void USBHALHost::resetRootHub() {
sayzyas 43:78f328f311dc 252 // Initiate port reset
sayzyas 43:78f328f311dc 253 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS;
sayzyas 43:78f328f311dc 254
sayzyas 43:78f328f311dc 255 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS);
sayzyas 43:78f328f311dc 256
sayzyas 43:78f328f311dc 257 // ...and clear port reset signal
sayzyas 43:78f328f311dc 258 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
sayzyas 43:78f328f311dc 259 }
sayzyas 43:78f328f311dc 260
sayzyas 43:78f328f311dc 261
sayzyas 43:78f328f311dc 262 void USBHALHost::_usbisr(void) {
sayzyas 43:78f328f311dc 263 if (instHost) {
sayzyas 43:78f328f311dc 264 instHost->UsbIrqhandler();
sayzyas 43:78f328f311dc 265 }
sayzyas 43:78f328f311dc 266 }
sayzyas 43:78f328f311dc 267
sayzyas 43:78f328f311dc 268 void USBHALHost::UsbIrqhandler() {
sayzyas 43:78f328f311dc 269 if( LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable ) //Is there something to actually process?
sayzyas 43:78f328f311dc 270 {
sayzyas 43:78f328f311dc 271
sayzyas 43:78f328f311dc 272 uint32_t int_status = LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable;
sayzyas 43:78f328f311dc 273
sayzyas 43:78f328f311dc 274 // Root hub status change interrupt
sayzyas 43:78f328f311dc 275 if (int_status & OR_INTR_STATUS_RHSC) {
sayzyas 43:78f328f311dc 276 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
sayzyas 43:78f328f311dc 277 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
sayzyas 43:78f328f311dc 278 // When DRWE is on, Connect Status Change
sayzyas 43:78f328f311dc 279 // means a remote wakeup event.
sayzyas 43:78f328f311dc 280 } else {
sayzyas 43:78f328f311dc 281
sayzyas 43:78f328f311dc 282 //Root device connected
sayzyas 43:78f328f311dc 283 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
sayzyas 43:78f328f311dc 284
sayzyas 43:78f328f311dc 285 // wait 150ms to avoid bounce
sayzyas 43:78f328f311dc 286 wait_ms(150);
sayzyas 43:78f328f311dc 287
sayzyas 43:78f328f311dc 288 //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
sayzyas 43:78f328f311dc 289 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
sayzyas 43:78f328f311dc 290 }
sayzyas 43:78f328f311dc 291
sayzyas 43:78f328f311dc 292 //Root device disconnected
sayzyas 43:78f328f311dc 293 else {
sayzyas 43:78f328f311dc 294
sayzyas 43:78f328f311dc 295 if (!(int_status & OR_INTR_STATUS_WDH)) {
sayzyas 43:78f328f311dc 296 usb_hcca->DoneHead = 0;
sayzyas 43:78f328f311dc 297 }
sayzyas 43:78f328f311dc 298
sayzyas 43:78f328f311dc 299 // wait 200ms to avoid bounce
sayzyas 43:78f328f311dc 300 wait_ms(200);
sayzyas 43:78f328f311dc 301
sayzyas 43:78f328f311dc 302 deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
sayzyas 43:78f328f311dc 303
sayzyas 43:78f328f311dc 304 if (int_status & OR_INTR_STATUS_WDH) {
sayzyas 43:78f328f311dc 305 usb_hcca->DoneHead = 0;
sayzyas 43:78f328f311dc 306 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
sayzyas 43:78f328f311dc 307 }
sayzyas 43:78f328f311dc 308 }
sayzyas 43:78f328f311dc 309 }
sayzyas 43:78f328f311dc 310 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
sayzyas 43:78f328f311dc 311 }
sayzyas 43:78f328f311dc 312 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
sayzyas 43:78f328f311dc 313 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
sayzyas 43:78f328f311dc 314 }
sayzyas 43:78f328f311dc 315 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_RHSC;
sayzyas 43:78f328f311dc 316 }
sayzyas 43:78f328f311dc 317
sayzyas 43:78f328f311dc 318 // Writeback Done Head interrupt
sayzyas 43:78f328f311dc 319 if (int_status & OR_INTR_STATUS_WDH) {
sayzyas 43:78f328f311dc 320 transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
sayzyas 43:78f328f311dc 321 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
sayzyas 43:78f328f311dc 322 }
sayzyas 43:78f328f311dc 323 }
sayzyas 43:78f328f311dc 324 }
sayzyas 43:78f328f311dc 325 #endif