publishing to check changes in cdms code
Dependencies: FreescaleIAP SimpleDMA mbed-rtos mbed
Fork of CDMS_CODE_samp_23SEP_DMA_flag by
Diff: adf.h
- Revision:
- 165:60a4a23131a3
- Parent:
- 161:a63672bf4423
- Child:
- 166:2174ce7f153e
- Child:
- 167:9e1775d19ac3
--- a/adf.h Mon Apr 18 12:18:53 2016 +0000 +++ b/adf.h Tue Apr 19 17:03:29 2016 +0000 @@ -7,8 +7,8 @@ bool buffer_state; bool finish_write_data; uint8_t signal = 0x00; -unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,0x7F,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x10,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00}; - +//unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,0x7F,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x10,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00}; +unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,/*PA Level Byte*/0x7F/*PA Parameters*/,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x20,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x00,0x10,0x04,0x00,0x00,0x00,0x00,0x00}; //int initialise_card(); //int disk_initialize(); @@ -91,6 +91,39 @@ }\ }\ } +bool bbram_err=false; +int err_arr[64]; +int err[64]; +#define bbram_check gCS_ADF=0;\ + for(int i=0;i<64;i++){\ + err_arr[i]=0;\ + }\ + for(int i=0;i<64;i++){\ + err[i]=0;\ + }\ + bbram_err=false;\ + gCS_ADF=0;\ + spi.write(0x39);\ + spi.write(0x00);\ + spi.write(0xFF);\ + for(int i=0;i<64;i++){\ + err_arr[i]=spi.write(0xFF);\ + if(err_arr[i]!=bbram_buffer[i+2]){\ + err[i]=1;\ + bbram_err=true;\ + }\ + }\ + gCS_ADF=1;\ + for(int i=0;i<64;i++){\ + gPC.printf("%d ",err[i]);\ + }\ + gPC.printf("Write \t read \r\n");\ + for(int i=0;i<64;i++){\ + gPC.printf("%x \t %x \r\n",bbram_buffer[i+2],err_arr[i]);\ + }\ + if(!bbram_err)\ + gPC.printf("BBRAM verified \r\n");\ + #define initial_adf_check {\ @@ -111,6 +144,8 @@ /*gPC.puts("Resetting hardware\r\n");*/\ }\ }\ + bbram_write;\ + bbram_check;\ if( flag == false ){\ /*gPC.puts("Seems to be SPI problem\r\n");*/\ }\ @@ -159,10 +194,6 @@ # define initiate {\ SPI_mutex.lock();\ gCS_ADF=0;\ - spi.write(0xFF);\ - spi.write(0xFF);\ - gCS_ADF=1;\ - gCS_ADF=0;\ spi.write(0x08);\ spi.write(0x14);\ spi.write(0xFF);\ @@ -295,8 +326,14 @@ loop_on = true;\ ADF_off = false;\ initial_adf_check;\ + bbram_write;\ + bbram_check;\ /*gPC.puts("initial adf check\r\n");*/\ initiate;\ + gCS_ADF=0;\ + spi.write(0xBB);\ + gCS_ADF=1;\ + wait_ms(1);\ /*gPC.puts("adf configured\r\n");*/\ /*gLEDR = !gLEDR;*/\ }