Diff: seeed_can_defs.h

Revision:

2:fd026fcfde94

Parent:

1:ad71faa09868

diff -r ad71faa09868 -r fd026fcfde94 seeed_can_defs.h
--- a/seeed_can_defs.h	Wed Nov 06 20:16:11 2013 +0000
+++ b/seeed_can_defs.h	Tue Nov 12 20:54:16 2013 +0000
@@ -170,7 +170,9 @@
 
     /** EFLG Register Values
      */
-#define MCP_EFLG_ERRORMASK  (0xF8)                                      /* 5 MS-Bits                    */
+#define MCP_EFLG_ALLMASK    (0xFF)                                      // All Bits
+#define MCP_EFLG_ERRORMASK  (0xF8)                                      // 5 MS-Bits
+#define MCP_EFLG_WARNMASK   (0x07)                                      // 3 LS-Bits
 #define MCP_EFLG_EWARN      (1<<0)
 #define MCP_EFLG_RXWAR      (1<<1)
 #define MCP_EFLG_TXWAR      (1<<2)
@@ -200,8 +202,8 @@
 
     /** Bit Rate timing
      */
-#define MCP_CLOCK_FREQ          16000000    // 16 MHz Crystal frequency
-#define CAN_SYNCSEG             1           // CAN-BUS Sync segment is always 1 Time Quantum
+#define MCP_CLOCK_FREQ          16000000                                // 16 MHz Crystal frequency
+#define CAN_SYNCSEG             1                                       // CAN-BUS Sync segment is always 1 Time Quantum
 #define CAN_MAX_RATE            MCP_CLOCK_FREQ/(2 * MCP_MIN_TIME_QUANTA)
 #define CAN_MIN_RATE            MCP_CLOCK_FREQ/(2 * MCP_MAX_PRESCALER * MCP_MAX_TIME_QUANTA)
 #define MCP_MAX_TIME_QUANTA     25
@@ -227,6 +229,10 @@
 #define SOF_DISABLE         (0<<7)
     /** CANINTF Register Bits
      */
+#define MCP_NO_INTS         (0x00)                                      // Disable all interrupts
+#define MCP_ALL_INTS        (0xFF)                                      // All Bits
+#define MCP_RX_INTS         (MCP_RX1IF | MCP_RX0IF)                     // Enable all receive interrupts
+#define MCP_TX_INTS         (MCP_TX2IF | MCP_TX1IF | MCP_TX0IF)         // Enable all transmit interrupts
 #define MCP_RX0IF           (1<<0)
 #define MCP_RX1IF           (1<<1)
 #define MCP_TX0IF           (1<<2)
@@ -236,15 +242,6 @@
 #define MCP_WAKIF           (1<<6)
 #define MCP_MERRF           (1<<7)
 
-#define MCP_TX_INT          0x1C                                        // Enable all transmit interrupts
-#define MCP_TX01_INT        0x0C                                        // Enable TXB0 and TXB1 interrupts
-#define MCP_RX_INT          0x03                                        // Enable receive interrupts
-#define MCP_NO_INT          0x00                                        // Disable all interrupts
-
-#define MCP_TX01_MASK       0x14
-#define MCP_TX_MASK         0x54
-
-
 //#define MCP_RXBUF_0         (MCP_RXB0SIDH)
 //#define MCP_RXBUF_1         (MCP_RXB1SIDH)