Rik Van Dyck / Mbed 2 deprecated Project_Embedded_C

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Dependencies:   mbed DS1307 Servo TextLCD

NetServices/drv/usb/UsbInc.h@2:55b6fd49b738, 2014-12-18 (annotated)

Committer:
rikvandyck
Date:
Thu Dec 18 10:43:07 2014 +0000
Revision:
2:55b6fd49b738
Parent:
0:e1edd52b1ee2 
Project_Embedded_C

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rikvandyck 0:e1edd52b1ee2 1
rikvandyck 0:e1edd52b1ee2 2 /*
rikvandyck 0:e1edd52b1ee2 3 Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
rikvandyck 0:e1edd52b1ee2 4
rikvandyck 0:e1edd52b1ee2 5 Permission is hereby granted, free of charge, to any person obtaining a copy
rikvandyck 0:e1edd52b1ee2 6 of this software and associated documentation files (the "Software"), to deal
rikvandyck 0:e1edd52b1ee2 7 in the Software without restriction, including without limitation the rights
rikvandyck 0:e1edd52b1ee2 8 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
rikvandyck 0:e1edd52b1ee2 9 copies of the Software, and to permit persons to whom the Software is
rikvandyck 0:e1edd52b1ee2 10 furnished to do so, subject to the following conditions:
rikvandyck 0:e1edd52b1ee2 11
rikvandyck 0:e1edd52b1ee2 12 The above copyright notice and this permission notice shall be included in
rikvandyck 0:e1edd52b1ee2 13 all copies or substantial portions of the Software.
rikvandyck 0:e1edd52b1ee2 14
rikvandyck 0:e1edd52b1ee2 15 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
rikvandyck 0:e1edd52b1ee2 16 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
rikvandyck 0:e1edd52b1ee2 17 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
rikvandyck 0:e1edd52b1ee2 18 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
rikvandyck 0:e1edd52b1ee2 19 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
rikvandyck 0:e1edd52b1ee2 20 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
rikvandyck 0:e1edd52b1ee2 21 THE SOFTWARE.
rikvandyck 0:e1edd52b1ee2 22 */
rikvandyck 0:e1edd52b1ee2 23
rikvandyck 0:e1edd52b1ee2 24 #ifndef USB_INC_H
rikvandyck 0:e1edd52b1ee2 25 #define USB_INC_H
rikvandyck 0:e1edd52b1ee2 26
rikvandyck 0:e1edd52b1ee2 27 #include "mbed.h"
rikvandyck 0:e1edd52b1ee2 28
rikvandyck 0:e1edd52b1ee2 29 #define MIN(a,b) ((a)<(b)?(a):(b))
rikvandyck 0:e1edd52b1ee2 30 #define MAX(a,b) ((a)>(b)?(a):(b))
rikvandyck 0:e1edd52b1ee2 31
rikvandyck 0:e1edd52b1ee2 32 //typedef int32_t RC;
rikvandyck 0:e1edd52b1ee2 33
rikvandyck 0:e1edd52b1ee2 34 typedef uint8_t byte;
rikvandyck 0:e1edd52b1ee2 35 typedef uint16_t word;
rikvandyck 0:e1edd52b1ee2 36
rikvandyck 0:e1edd52b1ee2 37 enum UsbErr
rikvandyck 0:e1edd52b1ee2 38 {
rikvandyck 0:e1edd52b1ee2 39 __USBERR_MIN = -0xFFFF,
rikvandyck 0:e1edd52b1ee2 40 USBERR_DISCONNECTED,
rikvandyck 0:e1edd52b1ee2 41 USBERR_NOTFOUND,
rikvandyck 0:e1edd52b1ee2 42 USBERR_BADCONFIG,
rikvandyck 0:e1edd52b1ee2 43 USBERR_PROCESSING,
rikvandyck 0:e1edd52b1ee2 44 USBERR_HALTED, //Transfer on an ep is stalled
rikvandyck 0:e1edd52b1ee2 45 USBERR_BUSY,
rikvandyck 0:e1edd52b1ee2 46 USBERR_TDFAIL,
rikvandyck 0:e1edd52b1ee2 47 USBERR_ERROR,
rikvandyck 0:e1edd52b1ee2 48 USBERR_OK = 0
rikvandyck 0:e1edd52b1ee2 49 };
rikvandyck 0:e1edd52b1ee2 50
rikvandyck 0:e1edd52b1ee2 51
rikvandyck 0:e1edd52b1ee2 52 /* From NXP's USBHostLite stack's usbhost_lpc17xx.h */
rikvandyck 0:e1edd52b1ee2 53 /* Only the types names have been changed to avoid unecessary typedefs */
rikvandyck 0:e1edd52b1ee2 54
rikvandyck 0:e1edd52b1ee2 55
rikvandyck 0:e1edd52b1ee2 56 /*
rikvandyck 0:e1edd52b1ee2 57 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 58 * NXP USB Host Stack
rikvandyck 0:e1edd52b1ee2 59 *
rikvandyck 0:e1edd52b1ee2 60 * (c) Copyright 2008, NXP SemiConductors
rikvandyck 0:e1edd52b1ee2 61 * (c) Copyright 2008, OnChip Technologies LLC
rikvandyck 0:e1edd52b1ee2 62 * All Rights Reserved
rikvandyck 0:e1edd52b1ee2 63 *
rikvandyck 0:e1edd52b1ee2 64 * www.nxp.com
rikvandyck 0:e1edd52b1ee2 65 * www.onchiptech.com
rikvandyck 0:e1edd52b1ee2 66 *
rikvandyck 0:e1edd52b1ee2 67 * File : usbhost_lpc17xx.h
rikvandyck 0:e1edd52b1ee2 68 * Programmer(s) : Ravikanth.P
rikvandyck 0:e1edd52b1ee2 69 * Version :
rikvandyck 0:e1edd52b1ee2 70 *
rikvandyck 0:e1edd52b1ee2 71 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 72 */
rikvandyck 0:e1edd52b1ee2 73
rikvandyck 0:e1edd52b1ee2 74
rikvandyck 0:e1edd52b1ee2 75
rikvandyck 0:e1edd52b1ee2 76 /*
rikvandyck 0:e1edd52b1ee2 77 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 78 * OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
rikvandyck 0:e1edd52b1ee2 79 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 80 */
rikvandyck 0:e1edd52b1ee2 81
rikvandyck 0:e1edd52b1ee2 82 /* ------------------ HcControl Register --------------------- */
rikvandyck 0:e1edd52b1ee2 83 #define OR_CONTROL_CLE 0x00000010
rikvandyck 0:e1edd52b1ee2 84 #define OR_CONTROL_BLE 0x00000020
rikvandyck 0:e1edd52b1ee2 85 #define OR_CONTROL_HCFS 0x000000C0
rikvandyck 0:e1edd52b1ee2 86 #define OR_CONTROL_HC_OPER 0x00000080
rikvandyck 0:e1edd52b1ee2 87 /* ----------------- HcCommandStatus Register ----------------- */
rikvandyck 0:e1edd52b1ee2 88 #define OR_CMD_STATUS_HCR 0x00000001
rikvandyck 0:e1edd52b1ee2 89 #define OR_CMD_STATUS_CLF 0x00000002
rikvandyck 0:e1edd52b1ee2 90 #define OR_CMD_STATUS_BLF 0x00000004
rikvandyck 0:e1edd52b1ee2 91 /* --------------- HcInterruptStatus Register ----------------- */
rikvandyck 0:e1edd52b1ee2 92 #define OR_INTR_STATUS_WDH 0x00000002
rikvandyck 0:e1edd52b1ee2 93 #define OR_INTR_STATUS_RHSC 0x00000040
rikvandyck 0:e1edd52b1ee2 94 #define OR_INTR_STATUS_UE 0x00000010
rikvandyck 0:e1edd52b1ee2 95 /* --------------- HcInterruptEnable Register ----------------- */
rikvandyck 0:e1edd52b1ee2 96 #define OR_INTR_ENABLE_WDH 0x00000002
rikvandyck 0:e1edd52b1ee2 97 #define OR_INTR_ENABLE_RHSC 0x00000040
rikvandyck 0:e1edd52b1ee2 98 #define OR_INTR_ENABLE_MIE 0x80000000
rikvandyck 0:e1edd52b1ee2 99 /* ---------------- HcRhDescriptorA Register ------------------ */
rikvandyck 0:e1edd52b1ee2 100 #define OR_RH_STATUS_LPSC 0x00010000
rikvandyck 0:e1edd52b1ee2 101 #define OR_RH_STATUS_DRWE 0x00008000
rikvandyck 0:e1edd52b1ee2 102 /* -------------- HcRhPortStatus[1:NDP] Register -------------- */
rikvandyck 0:e1edd52b1ee2 103 #define OR_RH_PORT_CCS 0x00000001
rikvandyck 0:e1edd52b1ee2 104 #define OR_RH_PORT_PRS 0x00000010
rikvandyck 0:e1edd52b1ee2 105 #define OR_RH_PORT_CSC 0x00010000
rikvandyck 0:e1edd52b1ee2 106 #define OR_RH_PORT_PRSC 0x00100000
rikvandyck 0:e1edd52b1ee2 107
rikvandyck 0:e1edd52b1ee2 108
rikvandyck 0:e1edd52b1ee2 109 /*
rikvandyck 0:e1edd52b1ee2 110 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 111 * FRAME INTERVAL
rikvandyck 0:e1edd52b1ee2 112 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 113 */
rikvandyck 0:e1edd52b1ee2 114
rikvandyck 0:e1edd52b1ee2 115 #define FI 0x2EDF /* 12000 bits per frame (-1) */
rikvandyck 0:e1edd52b1ee2 116 #define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI)
rikvandyck 0:e1edd52b1ee2 117
rikvandyck 0:e1edd52b1ee2 118 /*
rikvandyck 0:e1edd52b1ee2 119 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 120 * ENDPOINT DESCRIPTOR CONTROL FIELDS
rikvandyck 0:e1edd52b1ee2 121 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 122 */
rikvandyck 0:e1edd52b1ee2 123
rikvandyck 0:e1edd52b1ee2 124 #define ED_SKIP (uint32_t) (0x00001000) /* Skip this ep in queue */
rikvandyck 0:e1edd52b1ee2 125
rikvandyck 0:e1edd52b1ee2 126 /*
rikvandyck 0:e1edd52b1ee2 127 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 128 * TRANSFER DESCRIPTOR CONTROL FIELDS
rikvandyck 0:e1edd52b1ee2 129 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 130 */
rikvandyck 0:e1edd52b1ee2 131
rikvandyck 0:e1edd52b1ee2 132 #define TD_ROUNDING (uint32_t) (0x00040000) /* Buffer Rounding */
rikvandyck 0:e1edd52b1ee2 133 #define TD_SETUP (uint32_t)(0) /* Direction of Setup Packet */
rikvandyck 0:e1edd52b1ee2 134 #define TD_IN (uint32_t)(0x00100000) /* Direction In */
rikvandyck 0:e1edd52b1ee2 135 #define TD_OUT (uint32_t)(0x00080000) /* Direction Out */
rikvandyck 0:e1edd52b1ee2 136 #define TD_DELAY_INT(x) (uint32_t)((x) << 21) /* Delay Interrupt */
rikvandyck 0:e1edd52b1ee2 137 #define TD_TOGGLE_0 (uint32_t)(0x02000000) /* Toggle 0 */
rikvandyck 0:e1edd52b1ee2 138 #define TD_TOGGLE_1 (uint32_t)(0x03000000) /* Toggle 1 */
rikvandyck 0:e1edd52b1ee2 139 #define TD_CC (uint32_t)(0xF0000000) /* Completion Code */
rikvandyck 0:e1edd52b1ee2 140
rikvandyck 0:e1edd52b1ee2 141 /*
rikvandyck 0:e1edd52b1ee2 142 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 143 * USB STANDARD REQUEST DEFINITIONS
rikvandyck 0:e1edd52b1ee2 144 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 145 */
rikvandyck 0:e1edd52b1ee2 146
rikvandyck 0:e1edd52b1ee2 147 #define USB_DESCRIPTOR_TYPE_DEVICE 1
rikvandyck 0:e1edd52b1ee2 148 #define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
rikvandyck 0:e1edd52b1ee2 149 #define USB_DESCRIPTOR_TYPE_INTERFACE 4
rikvandyck 0:e1edd52b1ee2 150 #define USB_DESCRIPTOR_TYPE_ENDPOINT 5
rikvandyck 0:e1edd52b1ee2 151 /* ----------- Control RequestType Fields ----------- */
rikvandyck 0:e1edd52b1ee2 152 #define USB_DEVICE_TO_HOST 0x80
rikvandyck 0:e1edd52b1ee2 153 #define USB_HOST_TO_DEVICE 0x00
rikvandyck 0:e1edd52b1ee2 154 #define USB_REQUEST_TYPE_CLASS 0x20
rikvandyck 0:e1edd52b1ee2 155 #define USB_RECIPIENT_DEVICE 0x00
rikvandyck 0:e1edd52b1ee2 156 #define USB_RECIPIENT_INTERFACE 0x01
rikvandyck 0:e1edd52b1ee2 157 /* -------------- USB Standard Requests -------------- */
rikvandyck 0:e1edd52b1ee2 158 #define SET_ADDRESS 5
rikvandyck 0:e1edd52b1ee2 159 #define GET_DESCRIPTOR 6
rikvandyck 0:e1edd52b1ee2 160 #define SET_CONFIGURATION 9
rikvandyck 0:e1edd52b1ee2 161 #define SET_INTERFACE 11
rikvandyck 0:e1edd52b1ee2 162
rikvandyck 0:e1edd52b1ee2 163 /*
rikvandyck 0:e1edd52b1ee2 164 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 165 * TYPE DEFINITIONS
rikvandyck 0:e1edd52b1ee2 166 **************************************************************************************************************
rikvandyck 0:e1edd52b1ee2 167 */
rikvandyck 0:e1edd52b1ee2 168
rikvandyck 0:e1edd52b1ee2 169 typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
rikvandyck 0:e1edd52b1ee2 170 volatile uint32_t Control; /* Endpoint descriptor control */
rikvandyck 0:e1edd52b1ee2 171 volatile uint32_t TailTd; /* Physical address of tail in Transfer descriptor list */
rikvandyck 0:e1edd52b1ee2 172 volatile uint32_t HeadTd; /* Physcial address of head in Transfer descriptor list */
rikvandyck 0:e1edd52b1ee2 173 volatile uint32_t Next; /* Physical address of next Endpoint descriptor */
rikvandyck 0:e1edd52b1ee2 174 } HCED;
rikvandyck 0:e1edd52b1ee2 175
rikvandyck 0:e1edd52b1ee2 176 typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
rikvandyck 0:e1edd52b1ee2 177 volatile uint32_t Control; /* Transfer descriptor control */
rikvandyck 0:e1edd52b1ee2 178 volatile uint32_t CurrBufPtr; /* Physical address of current buffer pointer */
rikvandyck 0:e1edd52b1ee2 179 volatile uint32_t Next; /* Physical pointer to next Transfer Descriptor */
rikvandyck 0:e1edd52b1ee2 180 volatile uint32_t BufEnd; /* Physical address of end of buffer */
rikvandyck 0:e1edd52b1ee2 181 } HCTD;
rikvandyck 0:e1edd52b1ee2 182
rikvandyck 0:e1edd52b1ee2 183 typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
rikvandyck 0:e1edd52b1ee2 184 volatile uint32_t IntTable[32]; /* Interrupt Table */
rikvandyck 0:e1edd52b1ee2 185 volatile uint32_t FrameNumber; /* Frame Number */
rikvandyck 0:e1edd52b1ee2 186 volatile uint32_t DoneHead; /* Done Head */
rikvandyck 0:e1edd52b1ee2 187 volatile uint8_t Reserved[116]; /* Reserved for future use */
rikvandyck 0:e1edd52b1ee2 188 volatile uint8_t Unknown[4]; /* Unused */
rikvandyck 0:e1edd52b1ee2 189 } HCCA;
rikvandyck 0:e1edd52b1ee2 190
rikvandyck 0:e1edd52b1ee2 191
rikvandyck 0:e1edd52b1ee2 192
rikvandyck 0:e1edd52b1ee2 193 #endif