Richard Vasquez / DMA_RAM_DAC
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File Index

File List

Here is a list of all documented files with brief descriptions:
core_cm4.h [code]CMSIS Cortex-M4 Core Peripheral Access Layer Header File
core_cm4_simd.h [code]CMSIS Cortex-M4 SIMD Header File
core_cmFunc.h [code]CMSIS Cortex-M Core Function Access Header File
core_cmInstr.h [code]CMSIS Cortex-M Core Instruction Access Header File
main.c [code]
main.h [code]
stm32f30x.h [code]CMSIS Cortex-M4 Device Peripheral Access Layer Header File. This file contains all the peripheral registers definitions, bits definitions and memory mapping for STM32F30x devices
stm32f30x_conf.h [code]Library configuration file
stm32f30x_tim.c [code]This file provides firmware functions to manage the following functionalities of the TIM peripheral: + TimeBase management + Output Compare management + Input Capture management + Advanced-control timers (TIM1 and TIM8) specific features + Interrupts, DMA and flags management + Clocks management + Synchronization management + Specific interface management + Specific remapping management
stm32f30x_tim.h [code]This file contains all the functions prototypes for the TIM firmware library
stm32f3348_discovery.c [code]This file provides set of firmware functions to manage Leds, push-button for STM32F3348 DISCO
stm32f3348_discovery.h [code]This file contains definitions for STM32F3348 DISCO's Leds, push-buttons hardware resources
stm32f3xx_it.c [code]
stm32f3xx_it.h [code]
system_stm32f30x.c [code]CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. This file contains the system clock configuration for STM32F30x devices and is customized for use with stm32f301_nucleo Kit. The STM32F30x is configured to run at 72 MHz, following the three configuration below:

  • PLL_SOURCE_HSI (default) : HSI (~8MHz) used to clock the PLL, and the PLL is used as system clock source, 64 MHz is maximum frequency on PLL HSI mode.
  • PLL_SOURCE_HSE : HSE (8MHz) used to clock the PLL, and the PLL is used as system clock source.
  • PLL_SOURCE_HSE_BYPASS : HSE bypassed with an external clock (8MHz, coming from ST-Link) used to clock the PLL, and the PLL is used as system clock source
system_stm32f30x.h [code]CMSIS Cortex-M4 Device System Source File for STM32F30x devices