Ricardo Benitez / mbed

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed by mbed official

TARGET_WIZwiki_W7500/W7500x_i2c.h@102:da0ca467f8b5, 2015-07-08 (annotated)

Committer:
Kojto
Date:
Wed Jul 08 11:22:30 2015 +0100
Revision:
102:da0ca467f8b5
Parent:
101:7cff1c4259d7
Child:
104:b9ad9a133dc7
Release 102 of the mbed library



Changes:

- new platform: MPS2

- K64f - mac address fix

- Freescale Kinetis - Serial NC handling fix

- Asynch constnes fixes

- startup files .s - change extension to .S

- APPNEARME_MICRONFCBOARD rename to MICRONFCBOARD

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 102:da0ca467f8b5 1 /* mbed Microcontroller Library
Kojto 102:da0ca467f8b5 2 *******************************************************************************
Kojto 102:da0ca467f8b5 3 * Copyright (c) 2015 WIZnet Co.,Ltd. All rights reserved.
Kojto 102:da0ca467f8b5 4 * All rights reserved.
Kojto 102:da0ca467f8b5 5 *
Kojto 102:da0ca467f8b5 6 * Redistribution and use in source and binary forms, with or without
Kojto 102:da0ca467f8b5 7 * modification, are permitted provided that the following conditions are met:
Kojto 102:da0ca467f8b5 8 *
Kojto 102:da0ca467f8b5 9 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 102:da0ca467f8b5 10 * this list of conditions and the following disclaimer.
Kojto 102:da0ca467f8b5 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 102:da0ca467f8b5 12 * this list of conditions and the following disclaimer in the documentation
Kojto 102:da0ca467f8b5 13 * and/or other materials provided with the distribution.
Kojto 102:da0ca467f8b5 14 * 3. Neither the name of ARM Limited nor the names of its contributors
Kojto 102:da0ca467f8b5 15 * may be used to endorse or promote products derived from this software
Kojto 102:da0ca467f8b5 16 * without specific prior written permission.
Kojto 102:da0ca467f8b5 17 *
Kojto 102:da0ca467f8b5 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 102:da0ca467f8b5 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 102:da0ca467f8b5 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 102:da0ca467f8b5 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 102:da0ca467f8b5 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 102:da0ca467f8b5 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 102:da0ca467f8b5 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 102:da0ca467f8b5 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 102:da0ca467f8b5 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 102:da0ca467f8b5 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 102:da0ca467f8b5 28 *******************************************************************************
Kojto 102:da0ca467f8b5 29 */
Kojto 102:da0ca467f8b5 30
Kojto 101:7cff1c4259d7 31 #include "W7500x.h"
Kojto 101:7cff1c4259d7 32
Kojto 101:7cff1c4259d7 33 typedef enum
Kojto 101:7cff1c4259d7 34 {
Kojto 101:7cff1c4259d7 35 I2C_WRITE_SA7=0,
Kojto 101:7cff1c4259d7 36 I2C_READ_SA7,
Kojto 101:7cff1c4259d7 37 I2C_CTRWRITE_SA7,
Kojto 101:7cff1c4259d7 38 I2C_CTRREAD_SA7,
Kojto 101:7cff1c4259d7 39 } I2C_CTR;
Kojto 101:7cff1c4259d7 40
Kojto 101:7cff1c4259d7 41 typedef enum
Kojto 101:7cff1c4259d7 42 {
Kojto 101:7cff1c4259d7 43 I2C_ACKR=0,
Kojto 101:7cff1c4259d7 44 I2C_ACKT,
Kojto 101:7cff1c4259d7 45 I2C_OACKR,
Kojto 101:7cff1c4259d7 46 I2C_SACKR,
Kojto 101:7cff1c4259d7 47 I2C_BT,
Kojto 101:7cff1c4259d7 48 } I2C_SR;
Kojto 101:7cff1c4259d7 49
Kojto 101:7cff1c4259d7 50
Kojto 101:7cff1c4259d7 51 typedef enum
Kojto 101:7cff1c4259d7 52 {
Kojto 101:7cff1c4259d7 53 INT_ACKR=-1,
Kojto 101:7cff1c4259d7 54 INT_ACKT=-2,
Kojto 101:7cff1c4259d7 55 INT_NACKR=-3,
Kojto 101:7cff1c4259d7 56 INT_NACKT=-4,
Kojto 101:7cff1c4259d7 57 INT_BT=-5,
Kojto 101:7cff1c4259d7 58 } I2C_ERROR;
Kojto 101:7cff1c4259d7 59
Kojto 101:7cff1c4259d7 60
Kojto 101:7cff1c4259d7 61 /**
Kojto 101:7cff1c4259d7 62 *@
Kojto 101:7cff1c4259d7 63 */
Kojto 101:7cff1c4259d7 64 /** @defgroup I2C_registers
Kojto 101:7cff1c4259d7 65 * @{
Kojto 101:7cff1c4259d7 66 */
Kojto 101:7cff1c4259d7 67
Kojto 101:7cff1c4259d7 68 #define I2C_Register_PRER ((uint8_t)0x00)
Kojto 101:7cff1c4259d7 69 #define I2C_Register_CTR ((uint8_t)0x04)
Kojto 101:7cff1c4259d7 70 #define I2C_Register_CMDR ((uint8_t)0x08)
Kojto 101:7cff1c4259d7 71 #define I2C_Register_SR ((uint8_t)0x0C)
Kojto 101:7cff1c4259d7 72 #define I2C_Register_TSR ((uint8_t)0x10)
Kojto 101:7cff1c4259d7 73 #define I2C_Register_SADDR ((uint8_t)0x14)
Kojto 101:7cff1c4259d7 74 #define I2C_Register_TXR ((uint8_t)0x18)
Kojto 101:7cff1c4259d7 75 #define I2C_Register_RXR ((uint8_t)0x1C)
Kojto 101:7cff1c4259d7 76 #define I2C_Register_ISR ((uint8_t)0x20)
Kojto 101:7cff1c4259d7 77 #define I2C_Register_ISCR ((uint8_t)0x24)
Kojto 101:7cff1c4259d7 78 #define I2C_Register_ISMR ((uint8_t)0x28)
Kojto 101:7cff1c4259d7 79 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_PRER) || \
Kojto 101:7cff1c4259d7 80 ((REGISTER) == I2C_Register_CTR) || \
Kojto 101:7cff1c4259d7 81 ((REGISTER) == I2C_Register_CMDR) || \
Kojto 101:7cff1c4259d7 82 ((REGISTER) == I2C_Register_SR) || \
Kojto 101:7cff1c4259d7 83 ((REGISTER) == I2C_Register_TSR) || \
Kojto 101:7cff1c4259d7 84 ((REGISTER) == I2C_Register_SADDR) || \
Kojto 101:7cff1c4259d7 85 ((REGISTER) == I2C_Register_TXR) || \
Kojto 101:7cff1c4259d7 86 ((REGISTER) == I2C_Register_RXR) || \
Kojto 101:7cff1c4259d7 87 ((REGISTER) == I2C_Register_ISR)|| \
Kojto 101:7cff1c4259d7 88 ((REGISTER) == I2C_Register_ISCR)| \
Kojto 101:7cff1c4259d7 89 ((REGISTER) == I2C_Register_ISMR))
Kojto 101:7cff1c4259d7 90
Kojto 101:7cff1c4259d7 91 /** @defgroup I2C_Private_Defines
Kojto 101:7cff1c4259d7 92 * @{
Kojto 101:7cff1c4259d7 93 */
Kojto 101:7cff1c4259d7 94 /* I2C COREEN mask */
Kojto 101:7cff1c4259d7 95 #define I2C_CTR_COREEN_DIS ((uint16_t)0xFF7F)
Kojto 101:7cff1c4259d7 96
Kojto 101:7cff1c4259d7 97 /* I2C INTEREN mask */
Kojto 101:7cff1c4259d7 98 #define I2C_CTR_INTEREN_DIS ((uint16_t)0xFFBF)
Kojto 101:7cff1c4259d7 99
Kojto 101:7cff1c4259d7 100 /* I2C MODE(M/SN) mask */
Kojto 101:7cff1c4259d7 101 #define I2C_CTR_MODE_SLAVE ((uint16_t)0xFFDF)
Kojto 101:7cff1c4259d7 102
Kojto 101:7cff1c4259d7 103 /* I2C ADDR10(10/7N) mask */
Kojto 101:7cff1c4259d7 104 #define I2C_CTR_ADDR10_7BIT ((uint16_t)0xFFEF)
Kojto 101:7cff1c4259d7 105
Kojto 101:7cff1c4259d7 106 /* I2C CTRRWN(R/WN) mask */
Kojto 101:7cff1c4259d7 107 #define I2C_CTR_CTRRWN_DIS ((uint16_t)0xFFF7)
Kojto 101:7cff1c4259d7 108
Kojto 101:7cff1c4259d7 109 /* I2C CTREN mask */
Kojto 101:7cff1c4259d7 110 #define I2C_CTR_CTEN_DIS ((uint16_t)0xFFFB)
Kojto 101:7cff1c4259d7 111
Kojto 101:7cff1c4259d7 112
Kojto 101:7cff1c4259d7 113 /* I2C START mask */
Kojto 101:7cff1c4259d7 114 #define I2C_CMDR_START_DIS ((uint16_t)0xFF7F)
Kojto 101:7cff1c4259d7 115
Kojto 101:7cff1c4259d7 116 /* I2C STOP mask */
Kojto 101:7cff1c4259d7 117 #define I2C_CMDR_STOP_DIS ((uint16_t)0xFFBF)
Kojto 101:7cff1c4259d7 118
Kojto 101:7cff1c4259d7 119 /* I2C ACK mask */
Kojto 101:7cff1c4259d7 120 #define I2C_CMDR_ACK_NAK ((uint16_t)0xFFDF)
Kojto 101:7cff1c4259d7 121
Kojto 101:7cff1c4259d7 122 /* I2C RESTART mask */
Kojto 101:7cff1c4259d7 123 #define I2C_CMDR_RESTA_DIS ((uint16_t)0xFFEF)
Kojto 101:7cff1c4259d7 124
Kojto 101:7cff1c4259d7 125 /* I2C INTERRUPT RESET mask */
Kojto 101:7cff1c4259d7 126 #define I2C_ISCR_RST_DIS ((uint16_t)0xFFFE)
Kojto 101:7cff1c4259d7 127 /**
Kojto 101:7cff1c4259d7 128 * @}
Kojto 101:7cff1c4259d7 129 */
Kojto 101:7cff1c4259d7 130
Kojto 101:7cff1c4259d7 131
Kojto 101:7cff1c4259d7 132
Kojto 101:7cff1c4259d7 133 #define I2C_WRITE 0
Kojto 101:7cff1c4259d7 134 #define I2C_READ 1
Kojto 101:7cff1c4259d7 135 #define I2C_RWSEL(NewState) (((NewState) == I2C_WRITE)|| \
Kojto 101:7cff1c4259d7 136 ((NewState) == I2C_READ))
Kojto 101:7cff1c4259d7 137
Kojto 101:7cff1c4259d7 138
Kojto 101:7cff1c4259d7 139 #define I2C_Ack_Enable (0x01ul << 5)
Kojto 101:7cff1c4259d7 140 #define I2C_Ack_Disable (0x00ul << 5)
Kojto 101:7cff1c4259d7 141 #define IS_I2C_ACK_NewState(NewState) (((NewState) == I2C_Ack_Enable) || \
Kojto 101:7cff1c4259d7 142 ((NewState) == I2C_Ack_Disable))
Kojto 101:7cff1c4259d7 143
Kojto 101:7cff1c4259d7 144 #define I2C_MASTER_MODE (0x01ul << 5 ) // 0x20
Kojto 101:7cff1c4259d7 145 #define I2C_SLAVE_MODE (0x00ul << 5 ) // 0x20
Kojto 101:7cff1c4259d7 146 #define IS_I2C_MODE(MODE) ((MODE) == I2C_MASTER_MODE)|| \
Kojto 101:7cff1c4259d7 147 (MODE) == I2C_SLAVE_MODE))
Kojto 101:7cff1c4259d7 148
Kojto 101:7cff1c4259d7 149 #define I2C_CTR_MODE (0x01ul << 5 ) // 0x20
Kojto 101:7cff1c4259d7 150
Kojto 101:7cff1c4259d7 151 #define SLAVE_ADDR10 0x208
Kojto 101:7cff1c4259d7 152
Kojto 101:7cff1c4259d7 153
Kojto 101:7cff1c4259d7 154 typedef enum
Kojto 101:7cff1c4259d7 155 {
Kojto 101:7cff1c4259d7 156 I2C_Master = I2C_MASTER_MODE,
Kojto 101:7cff1c4259d7 157 I2C_Slave = I2C_SLAVE_MODE
Kojto 101:7cff1c4259d7 158 }I2C_MODE;
Kojto 101:7cff1c4259d7 159
Kojto 101:7cff1c4259d7 160
Kojto 101:7cff1c4259d7 161 typedef struct
Kojto 101:7cff1c4259d7 162 {
Kojto 101:7cff1c4259d7 163 uint8_t prescale;
Kojto 101:7cff1c4259d7 164 uint16_t timeout;
Kojto 101:7cff1c4259d7 165 I2C_CTR control;
Kojto 101:7cff1c4259d7 166 }I2C_MasterConfStruct;
Kojto 101:7cff1c4259d7 167
Kojto 101:7cff1c4259d7 168
Kojto 101:7cff1c4259d7 169 typedef struct
Kojto 101:7cff1c4259d7 170 {
Kojto 101:7cff1c4259d7 171 uint32_t mode;
Kojto 101:7cff1c4259d7 172 uint16_t slave_address; // only on slave mode
Kojto 101:7cff1c4259d7 173 I2C_MasterConfStruct master;
Kojto 101:7cff1c4259d7 174 }I2C_ConfigStruct;
Kojto 101:7cff1c4259d7 175
Kojto 101:7cff1c4259d7 176
Kojto 101:7cff1c4259d7 177 /** @defgroup I2C_Exported_Functions
Kojto 101:7cff1c4259d7 178 * @{
Kojto 101:7cff1c4259d7 179 */
Kojto 101:7cff1c4259d7 180
Kojto 101:7cff1c4259d7 181 uint32_t I2C_Init (I2C_TypeDef* I2Cx, I2C_ConfigStruct conf);
Kojto 101:7cff1c4259d7 182 void setFrequency (I2C_TypeDef* I2Cx, uint8_t prescale);
Kojto 101:7cff1c4259d7 183 void I2C_DeInit (I2C_TypeDef* I2Cx);
Kojto 101:7cff1c4259d7 184
Kojto 101:7cff1c4259d7 185 ErrorStatus I2C_Start (I2C_TypeDef* I2Cx, uint16_t slave_address, I2C_CTR ctr);
Kojto 101:7cff1c4259d7 186 void I2C_Stop (I2C_TypeDef* I2Cx);
Kojto 101:7cff1c4259d7 187 void I2C_Reset (I2C_TypeDef* I2Cx);
Kojto 101:7cff1c4259d7 188
Kojto 101:7cff1c4259d7 189 void I2C_SendData (I2C_TypeDef* I2Cx,uint16_t Data);
Kojto 101:7cff1c4259d7 190 int8_t I2C_SendDataAck (I2C_TypeDef* I2Cx,uint16_t Data);
Kojto 101:7cff1c4259d7 191 int I2C_ReceiveData (I2C_TypeDef* I2Cx, int last);
Kojto 101:7cff1c4259d7 192
Kojto 101:7cff1c4259d7 193 int I2C_Burst_Read (I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop);
Kojto 101:7cff1c4259d7 194 int I2C_Burst_Write (I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop);
Kojto 101:7cff1c4259d7 195
Kojto 101:7cff1c4259d7 196 void I2C_GenerateSTART (I2C_TypeDef* I2Cx, FunctionalState NewState);
Kojto 101:7cff1c4259d7 197 void I2C_GenerateSTOP (I2C_TypeDef* I2Cx, FunctionalState NewState);
Kojto 101:7cff1c4259d7 198
Kojto 101:7cff1c4259d7 199 void I2C_AcknowledgeConfig (I2C_TypeDef* I2Cx, FunctionalState NewState);
Kojto 101:7cff1c4259d7 200 void I2C_RESTART (I2C_TypeDef * I2Cx, FunctionalState NewState);
Kojto 101:7cff1c4259d7 201
Kojto 101:7cff1c4259d7 202 void I2C_CoreEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
Kojto 101:7cff1c4259d7 203 void I2C_InterEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
Kojto 101:7cff1c4259d7 204 void I2C_MasterSlave(I2C_TypeDef* I2Cx,FunctionalState NewState);
Kojto 101:7cff1c4259d7 205 void I2C_ControlRW (I2C_TypeDef* I2Cx,FunctionalState NewState);
Kojto 101:7cff1c4259d7 206 void I2C_ControlEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
Kojto 101:7cff1c4259d7 207
Kojto 101:7cff1c4259d7 208 void I2C_InterRst (I2C_TypeDef* I2Cx,FunctionalState NewState);
Kojto 101:7cff1c4259d7 209 void I2C_Prescale (I2C_TypeDef* I2Cx,uint16_t Data);
Kojto 101:7cff1c4259d7 210 void I2C_TimeoutSet (I2C_TypeDef* I2Cx,uint16_t Data);
Kojto 101:7cff1c4259d7 211 void I2C_SetSlavAddress (I2C_TypeDef* I2Cx,uint16_t Data);
Kojto 101:7cff1c4259d7 212 uint8_t I2C_StatusRead (I2C_TypeDef* I2Cx);
Kojto 101:7cff1c4259d7 213
Kojto 101:7cff1c4259d7 214 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx,I2C_SR sr);
Kojto 101:7cff1c4259d7 215
Kojto 101:7cff1c4259d7 216 void I2C_MasterInit (I2C_TypeDef * I2Cx,uint8_t Prescale,uint16_t Timeout,I2C_CTR Ctr);
Kojto 101:7cff1c4259d7 217 void I2C_SlaveInit (I2C_TypeDef * I2Cx,FunctionalState NewState, uint16_t data);
Kojto 101:7cff1c4259d7 218 void I2C_SendSlaveAddress (I2C_TypeDef* I2Cx, uint8_t SlaveAddress,I2C_CTR Ctr);
Kojto 101:7cff1c4259d7 219
Kojto 101:7cff1c4259d7 220 int8_t I2C_Restart_Structure(I2C_TypeDef * I2Cx,uint32_t SlaveAddress,I2C_CTR Ctr);
Kojto 101:7cff1c4259d7 221 uint16_t I2C_ReadRegister (I2C_TypeDef* I2Cx, uint8_t I2C_Register);
Kojto 101:7cff1c4259d7 222
Kojto 102:da0ca467f8b5 223 void I2C_GPIO(void);
Kojto 102:da0ca467f8b5 224 void GPIO_I2C(void );
Kojto 102:da0ca467f8b5 225
Kojto 102:da0ca467f8b5 226 void WriteByte(uint8_t val);
Kojto 102:da0ca467f8b5 227
Kojto 102:da0ca467f8b5 228 void digitalWrite(GPIO_TypeDef* GPIOx,uint16_t pin, uint16_t val);
Kojto 102:da0ca467f8b5 229 uint16_t digitalRead(GPIO_TypeDef* GPIOx,uint16_t pin);
Kojto 102:da0ca467f8b5 230 void i2c_loop_us(int us);
Kojto 102:da0ca467f8b5 231 void i2c_loop_ms(int count) ;
Kojto 102:da0ca467f8b5 232
Kojto 101:7cff1c4259d7 233 /**
Kojto 101:7cff1c4259d7 234 * @}
Kojto 101:7cff1c4259d7 235 */
Kojto 101:7cff1c4259d7 236