meh
Fork of mbed by
TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_iwdg.h@106:ba1f97679dad, 2015-09-02 (annotated)
- Committer:
- Kojto
- Date:
- Wed Sep 02 14:17:43 2015 +0100
- Revision:
- 106:ba1f97679dad
- Parent:
- 99:dbbf35b96557
- Child:
- 110:165afa46840b
Release 106 of the mbed library
Changes:
- new platform - Nucleo F446RE
- STM32F4 Cube driver update v2.3.2
- ST cmsis driver v2.3.2
- nordic bugfix gcc linker start address
- lpc11u68 - bugfix for serial ports
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 92:4fc01daae5a5 | 1 | /** |
bogdanm | 92:4fc01daae5a5 | 2 | ****************************************************************************** |
bogdanm | 92:4fc01daae5a5 | 3 | * @file stm32f4xx_hal_iwdg.h |
bogdanm | 92:4fc01daae5a5 | 4 | * @author MCD Application Team |
Kojto | 106:ba1f97679dad | 5 | * @version V1.3.2 |
Kojto | 106:ba1f97679dad | 6 | * @date 26-June-2015 |
bogdanm | 92:4fc01daae5a5 | 7 | * @brief Header file of IWDG HAL module. |
bogdanm | 92:4fc01daae5a5 | 8 | ****************************************************************************** |
bogdanm | 92:4fc01daae5a5 | 9 | * @attention |
bogdanm | 92:4fc01daae5a5 | 10 | * |
Kojto | 99:dbbf35b96557 | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
bogdanm | 92:4fc01daae5a5 | 12 | * |
bogdanm | 92:4fc01daae5a5 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 92:4fc01daae5a5 | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 92:4fc01daae5a5 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 92:4fc01daae5a5 | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 92:4fc01daae5a5 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 92:4fc01daae5a5 | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 92:4fc01daae5a5 | 19 | * and/or other materials provided with the distribution. |
bogdanm | 92:4fc01daae5a5 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 92:4fc01daae5a5 | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 92:4fc01daae5a5 | 22 | * without specific prior written permission. |
bogdanm | 92:4fc01daae5a5 | 23 | * |
bogdanm | 92:4fc01daae5a5 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 92:4fc01daae5a5 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 92:4fc01daae5a5 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 92:4fc01daae5a5 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 92:4fc01daae5a5 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 92:4fc01daae5a5 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 92:4fc01daae5a5 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 92:4fc01daae5a5 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 92:4fc01daae5a5 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 92:4fc01daae5a5 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 92:4fc01daae5a5 | 34 | * |
bogdanm | 92:4fc01daae5a5 | 35 | ****************************************************************************** |
bogdanm | 92:4fc01daae5a5 | 36 | */ |
bogdanm | 92:4fc01daae5a5 | 37 | |
bogdanm | 92:4fc01daae5a5 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 39 | #ifndef __STM32F4xx_HAL_IWDG_H |
bogdanm | 92:4fc01daae5a5 | 40 | #define __STM32F4xx_HAL_IWDG_H |
bogdanm | 92:4fc01daae5a5 | 41 | |
bogdanm | 92:4fc01daae5a5 | 42 | #ifdef __cplusplus |
bogdanm | 92:4fc01daae5a5 | 43 | extern "C" { |
bogdanm | 92:4fc01daae5a5 | 44 | #endif |
bogdanm | 92:4fc01daae5a5 | 45 | |
bogdanm | 92:4fc01daae5a5 | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 92:4fc01daae5a5 | 47 | #include "stm32f4xx_hal_def.h" |
bogdanm | 92:4fc01daae5a5 | 48 | |
bogdanm | 92:4fc01daae5a5 | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
bogdanm | 92:4fc01daae5a5 | 50 | * @{ |
bogdanm | 92:4fc01daae5a5 | 51 | */ |
bogdanm | 92:4fc01daae5a5 | 52 | |
bogdanm | 92:4fc01daae5a5 | 53 | /** @addtogroup IWDG |
bogdanm | 92:4fc01daae5a5 | 54 | * @{ |
bogdanm | 92:4fc01daae5a5 | 55 | */ |
bogdanm | 92:4fc01daae5a5 | 56 | |
bogdanm | 92:4fc01daae5a5 | 57 | /* Exported types ------------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 58 | /** @defgroup IWDG_Exported_Types IWDG Exported Types |
Kojto | 99:dbbf35b96557 | 59 | * @{ |
Kojto | 99:dbbf35b96557 | 60 | */ |
Kojto | 99:dbbf35b96557 | 61 | |
bogdanm | 92:4fc01daae5a5 | 62 | /** |
bogdanm | 92:4fc01daae5a5 | 63 | * @brief IWDG HAL State Structure definition |
bogdanm | 92:4fc01daae5a5 | 64 | */ |
bogdanm | 92:4fc01daae5a5 | 65 | typedef enum |
bogdanm | 92:4fc01daae5a5 | 66 | { |
bogdanm | 92:4fc01daae5a5 | 67 | HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */ |
bogdanm | 92:4fc01daae5a5 | 68 | HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */ |
bogdanm | 92:4fc01daae5a5 | 69 | HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */ |
bogdanm | 92:4fc01daae5a5 | 70 | HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */ |
bogdanm | 92:4fc01daae5a5 | 71 | HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */ |
bogdanm | 92:4fc01daae5a5 | 72 | }HAL_IWDG_StateTypeDef; |
bogdanm | 92:4fc01daae5a5 | 73 | |
bogdanm | 92:4fc01daae5a5 | 74 | /** |
bogdanm | 92:4fc01daae5a5 | 75 | * @brief IWDG Init structure definition |
bogdanm | 92:4fc01daae5a5 | 76 | */ |
bogdanm | 92:4fc01daae5a5 | 77 | typedef struct |
bogdanm | 92:4fc01daae5a5 | 78 | { |
bogdanm | 92:4fc01daae5a5 | 79 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. |
bogdanm | 92:4fc01daae5a5 | 80 | This parameter can be a value of @ref IWDG_Prescaler */ |
bogdanm | 92:4fc01daae5a5 | 81 | |
bogdanm | 92:4fc01daae5a5 | 82 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. |
bogdanm | 92:4fc01daae5a5 | 83 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
bogdanm | 92:4fc01daae5a5 | 84 | }IWDG_InitTypeDef; |
bogdanm | 92:4fc01daae5a5 | 85 | |
bogdanm | 92:4fc01daae5a5 | 86 | /** |
Kojto | 99:dbbf35b96557 | 87 | * @brief IWDG Handle Structure definition |
bogdanm | 92:4fc01daae5a5 | 88 | */ |
bogdanm | 92:4fc01daae5a5 | 89 | typedef struct |
bogdanm | 92:4fc01daae5a5 | 90 | { |
bogdanm | 92:4fc01daae5a5 | 91 | IWDG_TypeDef *Instance; /*!< Register base address */ |
bogdanm | 92:4fc01daae5a5 | 92 | |
bogdanm | 92:4fc01daae5a5 | 93 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
bogdanm | 92:4fc01daae5a5 | 94 | |
Kojto | 99:dbbf35b96557 | 95 | HAL_LockTypeDef Lock; /*!< IWDG Locking object */ |
bogdanm | 92:4fc01daae5a5 | 96 | |
bogdanm | 92:4fc01daae5a5 | 97 | __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */ |
bogdanm | 92:4fc01daae5a5 | 98 | }IWDG_HandleTypeDef; |
bogdanm | 92:4fc01daae5a5 | 99 | |
bogdanm | 92:4fc01daae5a5 | 100 | /** |
bogdanm | 92:4fc01daae5a5 | 101 | * @} |
bogdanm | 92:4fc01daae5a5 | 102 | */ |
bogdanm | 92:4fc01daae5a5 | 103 | |
Kojto | 99:dbbf35b96557 | 104 | /* Exported constants --------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 105 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants |
Kojto | 99:dbbf35b96557 | 106 | * @{ |
Kojto | 99:dbbf35b96557 | 107 | */ |
Kojto | 99:dbbf35b96557 | 108 | |
Kojto | 99:dbbf35b96557 | 109 | /** @defgroup IWDG_Registers_BitMask IWDG Registers BitMask |
Kojto | 99:dbbf35b96557 | 110 | * @brief IWDG registers bit mask |
Kojto | 99:dbbf35b96557 | 111 | * @{ |
Kojto | 99:dbbf35b96557 | 112 | */ |
Kojto | 99:dbbf35b96557 | 113 | /* --- KR Register ---*/ |
Kojto | 99:dbbf35b96557 | 114 | /* KR register bit mask */ |
Kojto | 99:dbbf35b96557 | 115 | #define IWDG_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */ |
Kojto | 99:dbbf35b96557 | 116 | #define IWDG_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */ |
Kojto | 99:dbbf35b96557 | 117 | #define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */ |
Kojto | 99:dbbf35b96557 | 118 | #define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */ |
Kojto | 99:dbbf35b96557 | 119 | /** |
Kojto | 99:dbbf35b96557 | 120 | * @} |
Kojto | 99:dbbf35b96557 | 121 | */ |
Kojto | 99:dbbf35b96557 | 122 | |
Kojto | 99:dbbf35b96557 | 123 | /** @defgroup IWDG_Flag_definition IWDG Flag definition |
Kojto | 99:dbbf35b96557 | 124 | * @{ |
Kojto | 99:dbbf35b96557 | 125 | */ |
Kojto | 99:dbbf35b96557 | 126 | #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update Flag */ |
Kojto | 99:dbbf35b96557 | 127 | #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update Flag */ |
Kojto | 99:dbbf35b96557 | 128 | /** |
Kojto | 99:dbbf35b96557 | 129 | * @} |
Kojto | 99:dbbf35b96557 | 130 | */ |
Kojto | 99:dbbf35b96557 | 131 | |
Kojto | 99:dbbf35b96557 | 132 | /** @defgroup IWDG_Prescaler IWDG Prescaler |
bogdanm | 92:4fc01daae5a5 | 133 | * @{ |
bogdanm | 92:4fc01daae5a5 | 134 | */ |
bogdanm | 92:4fc01daae5a5 | 135 | #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */ |
bogdanm | 92:4fc01daae5a5 | 136 | #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */ |
bogdanm | 92:4fc01daae5a5 | 137 | #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */ |
bogdanm | 92:4fc01daae5a5 | 138 | #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */ |
bogdanm | 92:4fc01daae5a5 | 139 | #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */ |
bogdanm | 92:4fc01daae5a5 | 140 | #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */ |
bogdanm | 92:4fc01daae5a5 | 141 | #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */ |
bogdanm | 92:4fc01daae5a5 | 142 | /** |
bogdanm | 92:4fc01daae5a5 | 143 | * @} |
bogdanm | 92:4fc01daae5a5 | 144 | */ |
bogdanm | 92:4fc01daae5a5 | 145 | |
bogdanm | 92:4fc01daae5a5 | 146 | /** |
bogdanm | 92:4fc01daae5a5 | 147 | * @} |
bogdanm | 92:4fc01daae5a5 | 148 | */ |
bogdanm | 92:4fc01daae5a5 | 149 | |
Kojto | 99:dbbf35b96557 | 150 | /* Exported macros -----------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 151 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros |
Kojto | 99:dbbf35b96557 | 152 | * @{ |
Kojto | 99:dbbf35b96557 | 153 | */ |
bogdanm | 92:4fc01daae5a5 | 154 | |
bogdanm | 92:4fc01daae5a5 | 155 | /** @brief Reset IWDG handle state |
Kojto | 99:dbbf35b96557 | 156 | * @param __HANDLE__: IWDG handle. |
bogdanm | 92:4fc01daae5a5 | 157 | * @retval None |
bogdanm | 92:4fc01daae5a5 | 158 | */ |
bogdanm | 92:4fc01daae5a5 | 159 | #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET) |
bogdanm | 92:4fc01daae5a5 | 160 | |
bogdanm | 92:4fc01daae5a5 | 161 | /** |
bogdanm | 92:4fc01daae5a5 | 162 | * @brief Enables the IWDG peripheral. |
bogdanm | 92:4fc01daae5a5 | 163 | * @param __HANDLE__: IWDG handle |
bogdanm | 92:4fc01daae5a5 | 164 | * @retval None |
bogdanm | 92:4fc01daae5a5 | 165 | */ |
Kojto | 99:dbbf35b96557 | 166 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
bogdanm | 92:4fc01daae5a5 | 167 | |
bogdanm | 92:4fc01daae5a5 | 168 | /** |
bogdanm | 92:4fc01daae5a5 | 169 | * @brief Reloads IWDG counter with value defined in the reload register |
bogdanm | 92:4fc01daae5a5 | 170 | * (write access to IWDG_PR and IWDG_RLR registers disabled). |
bogdanm | 92:4fc01daae5a5 | 171 | * @param __HANDLE__: IWDG handle |
bogdanm | 92:4fc01daae5a5 | 172 | * @retval None |
bogdanm | 92:4fc01daae5a5 | 173 | */ |
Kojto | 99:dbbf35b96557 | 174 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
bogdanm | 92:4fc01daae5a5 | 175 | |
bogdanm | 92:4fc01daae5a5 | 176 | /** |
bogdanm | 92:4fc01daae5a5 | 177 | * @brief Gets the selected IWDG's flag status. |
bogdanm | 92:4fc01daae5a5 | 178 | * @param __HANDLE__: IWDG handle |
bogdanm | 92:4fc01daae5a5 | 179 | * @param __FLAG__: specifies the flag to check. |
bogdanm | 92:4fc01daae5a5 | 180 | * This parameter can be one of the following values: |
bogdanm | 92:4fc01daae5a5 | 181 | * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag |
bogdanm | 92:4fc01daae5a5 | 182 | * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag |
bogdanm | 92:4fc01daae5a5 | 183 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
bogdanm | 92:4fc01daae5a5 | 184 | */ |
bogdanm | 92:4fc01daae5a5 | 185 | #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
bogdanm | 92:4fc01daae5a5 | 186 | |
Kojto | 99:dbbf35b96557 | 187 | /** |
Kojto | 99:dbbf35b96557 | 188 | * @} |
Kojto | 99:dbbf35b96557 | 189 | */ |
Kojto | 99:dbbf35b96557 | 190 | |
bogdanm | 92:4fc01daae5a5 | 191 | /* Exported functions --------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 192 | /** @addtogroup IWDG_Exported_Functions |
Kojto | 99:dbbf35b96557 | 193 | * @{ |
Kojto | 99:dbbf35b96557 | 194 | */ |
bogdanm | 92:4fc01daae5a5 | 195 | |
Kojto | 99:dbbf35b96557 | 196 | /** @addtogroup IWDG_Exported_Functions_Group1 |
Kojto | 99:dbbf35b96557 | 197 | * @{ |
Kojto | 99:dbbf35b96557 | 198 | */ |
bogdanm | 92:4fc01daae5a5 | 199 | /* Initialization/de-initialization functions ********************************/ |
bogdanm | 92:4fc01daae5a5 | 200 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
bogdanm | 92:4fc01daae5a5 | 201 | void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg); |
Kojto | 99:dbbf35b96557 | 202 | /** |
Kojto | 99:dbbf35b96557 | 203 | * @} |
Kojto | 99:dbbf35b96557 | 204 | */ |
bogdanm | 92:4fc01daae5a5 | 205 | |
Kojto | 99:dbbf35b96557 | 206 | /** @addtogroup IWDG_Exported_Functions_Group2 |
Kojto | 99:dbbf35b96557 | 207 | * @{ |
Kojto | 99:dbbf35b96557 | 208 | */ |
bogdanm | 92:4fc01daae5a5 | 209 | /* I/O operation functions ****************************************************/ |
bogdanm | 92:4fc01daae5a5 | 210 | HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg); |
bogdanm | 92:4fc01daae5a5 | 211 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
Kojto | 99:dbbf35b96557 | 212 | /** |
Kojto | 99:dbbf35b96557 | 213 | * @} |
Kojto | 99:dbbf35b96557 | 214 | */ |
bogdanm | 92:4fc01daae5a5 | 215 | |
Kojto | 99:dbbf35b96557 | 216 | /** @addtogroup IWDG_Exported_Functions_Group3 |
Kojto | 99:dbbf35b96557 | 217 | * @{ |
Kojto | 99:dbbf35b96557 | 218 | */ |
bogdanm | 92:4fc01daae5a5 | 219 | /* Peripheral State functions ************************************************/ |
bogdanm | 92:4fc01daae5a5 | 220 | HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg); |
bogdanm | 92:4fc01daae5a5 | 221 | |
bogdanm | 92:4fc01daae5a5 | 222 | /** |
bogdanm | 92:4fc01daae5a5 | 223 | * @} |
Kojto | 99:dbbf35b96557 | 224 | */ |
Kojto | 99:dbbf35b96557 | 225 | |
Kojto | 99:dbbf35b96557 | 226 | /** |
Kojto | 99:dbbf35b96557 | 227 | * @} |
Kojto | 99:dbbf35b96557 | 228 | */ |
Kojto | 99:dbbf35b96557 | 229 | |
Kojto | 99:dbbf35b96557 | 230 | /* Private macro -------------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 231 | /** @defgroup IWDG_Private_Macros IWDG Private Macros |
Kojto | 99:dbbf35b96557 | 232 | * @{ |
Kojto | 99:dbbf35b96557 | 233 | */ |
Kojto | 99:dbbf35b96557 | 234 | |
Kojto | 99:dbbf35b96557 | 235 | /** |
Kojto | 99:dbbf35b96557 | 236 | * @brief Enables write access to IWDG_PR and IWDG_RLR registers. |
Kojto | 99:dbbf35b96557 | 237 | * @param __HANDLE__: IWDG handle |
Kojto | 99:dbbf35b96557 | 238 | * @retval None |
Kojto | 99:dbbf35b96557 | 239 | */ |
Kojto | 99:dbbf35b96557 | 240 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
Kojto | 99:dbbf35b96557 | 241 | |
Kojto | 99:dbbf35b96557 | 242 | /** |
Kojto | 99:dbbf35b96557 | 243 | * @brief Disables write access to IWDG_PR and IWDG_RLR registers. |
Kojto | 99:dbbf35b96557 | 244 | * @param __HANDLE__: IWDG handle |
Kojto | 99:dbbf35b96557 | 245 | * @retval None |
Kojto | 99:dbbf35b96557 | 246 | */ |
Kojto | 99:dbbf35b96557 | 247 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
Kojto | 99:dbbf35b96557 | 248 | |
Kojto | 99:dbbf35b96557 | 249 | |
Kojto | 99:dbbf35b96557 | 250 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
Kojto | 99:dbbf35b96557 | 251 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ |
Kojto | 99:dbbf35b96557 | 252 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ |
Kojto | 99:dbbf35b96557 | 253 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ |
Kojto | 99:dbbf35b96557 | 254 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ |
Kojto | 99:dbbf35b96557 | 255 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ |
Kojto | 99:dbbf35b96557 | 256 | ((__PRESCALER__) == IWDG_PRESCALER_256)) |
Kojto | 99:dbbf35b96557 | 257 | |
Kojto | 99:dbbf35b96557 | 258 | |
Kojto | 99:dbbf35b96557 | 259 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF) |
Kojto | 99:dbbf35b96557 | 260 | |
Kojto | 99:dbbf35b96557 | 261 | /** |
Kojto | 99:dbbf35b96557 | 262 | * @} |
Kojto | 99:dbbf35b96557 | 263 | */ |
Kojto | 99:dbbf35b96557 | 264 | |
Kojto | 99:dbbf35b96557 | 265 | /* Private define ------------------------------------------------------------*/ |
Kojto | 99:dbbf35b96557 | 266 | /** @defgroup IWDG_Private_Constants IWDG Private Constants |
Kojto | 99:dbbf35b96557 | 267 | * @{ |
Kojto | 99:dbbf35b96557 | 268 | */ |
Kojto | 99:dbbf35b96557 | 269 | |
Kojto | 99:dbbf35b96557 | 270 | /** |
Kojto | 99:dbbf35b96557 | 271 | * @} |
Kojto | 99:dbbf35b96557 | 272 | */ |
Kojto | 99:dbbf35b96557 | 273 | |
Kojto | 99:dbbf35b96557 | 274 | /** |
Kojto | 99:dbbf35b96557 | 275 | * @} |
bogdanm | 92:4fc01daae5a5 | 276 | */ |
bogdanm | 92:4fc01daae5a5 | 277 | |
bogdanm | 92:4fc01daae5a5 | 278 | /** |
bogdanm | 92:4fc01daae5a5 | 279 | * @} |
bogdanm | 92:4fc01daae5a5 | 280 | */ |
bogdanm | 92:4fc01daae5a5 | 281 | |
bogdanm | 92:4fc01daae5a5 | 282 | #ifdef __cplusplus |
bogdanm | 92:4fc01daae5a5 | 283 | } |
bogdanm | 92:4fc01daae5a5 | 284 | #endif |
bogdanm | 92:4fc01daae5a5 | 285 | |
bogdanm | 92:4fc01daae5a5 | 286 | #endif /* __STM32F4xx_HAL_IWDG_H */ |
bogdanm | 92:4fc01daae5a5 | 287 | |
bogdanm | 92:4fc01daae5a5 | 288 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |