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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_sram.h@110:165afa46840b, 2015-11-25 (annotated)

Committer:
Kojto
Date:
Wed Nov 25 13:21:40 2015 +0000
Revision:
110:165afa46840b
Parent:
106:ba1f97679dad 
Release 110  of the mbed library



Changes:

- new platforms - STM32F410R, DISCO_F429ZI, DISCO_F469NI

- Nucleo L476 - gcc and uvision template

- k22,k64f targets - ADC channels A addition

- EFM32 - bugfixes in sleep, serial and spi

- Delta DFCM NNN40 - pinnames update

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_sram.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
bogdanm 92:4fc01daae5a5 7 * @brief Header file of SRAM HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_SRAM_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_SRAM_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
Kojto 110:165afa46840b 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
bogdanm 92:4fc01daae5a5 48 #include "stm32f4xx_ll_fsmc.h"
Kojto 110:165afa46840b 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
bogdanm 92:4fc01daae5a5 50
Kojto 110:165afa46840b 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
Kojto 110:165afa46840b 52 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 92:4fc01daae5a5 53 #include "stm32f4xx_ll_fmc.h"
Kojto 110:165afa46840b 54 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 92:4fc01daae5a5 55
bogdanm 92:4fc01daae5a5 56
bogdanm 92:4fc01daae5a5 57 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 58 * @{
bogdanm 92:4fc01daae5a5 59 */
bogdanm 92:4fc01daae5a5 60
Kojto 99:dbbf35b96557 61 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 99:dbbf35b96557 62 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 63 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
Kojto 110:165afa46840b 64
bogdanm 92:4fc01daae5a5 65 /** @addtogroup SRAM
bogdanm 92:4fc01daae5a5 66 * @{
bogdanm 92:4fc01daae5a5 67 */
bogdanm 92:4fc01daae5a5 68
bogdanm 92:4fc01daae5a5 69 /* Exported typedef ----------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 70
Kojto 99:dbbf35b96557 71 /** @defgroup SRAM_Exported_Types SRAM Exported Types
Kojto 99:dbbf35b96557 72 * @{
Kojto 99:dbbf35b96557 73 */
bogdanm 92:4fc01daae5a5 74 /**
bogdanm 92:4fc01daae5a5 75 * @brief HAL SRAM State structures definition
bogdanm 92:4fc01daae5a5 76 */
bogdanm 92:4fc01daae5a5 77 typedef enum
bogdanm 92:4fc01daae5a5 78 {
bogdanm 92:4fc01daae5a5 79 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 80 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
bogdanm 92:4fc01daae5a5 81 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
bogdanm 92:4fc01daae5a5 82 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
bogdanm 92:4fc01daae5a5 83 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 }HAL_SRAM_StateTypeDef;
bogdanm 92:4fc01daae5a5 86
bogdanm 92:4fc01daae5a5 87 /**
bogdanm 92:4fc01daae5a5 88 * @brief SRAM handle Structure definition
bogdanm 92:4fc01daae5a5 89 */
bogdanm 92:4fc01daae5a5 90 typedef struct
bogdanm 92:4fc01daae5a5 91 {
bogdanm 92:4fc01daae5a5 92 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
bogdanm 92:4fc01daae5a5 93
bogdanm 92:4fc01daae5a5 94 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
bogdanm 92:4fc01daae5a5 95
bogdanm 92:4fc01daae5a5 96 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 HAL_LockTypeDef Lock; /*!< SRAM locking object */
bogdanm 92:4fc01daae5a5 99
bogdanm 92:4fc01daae5a5 100 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
bogdanm 92:4fc01daae5a5 101
bogdanm 92:4fc01daae5a5 102 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
bogdanm 92:4fc01daae5a5 103
bogdanm 92:4fc01daae5a5 104 }SRAM_HandleTypeDef;
bogdanm 92:4fc01daae5a5 105
Kojto 99:dbbf35b96557 106 /**
Kojto 99:dbbf35b96557 107 * @}
Kojto 99:dbbf35b96557 108 */
Kojto 99:dbbf35b96557 109
bogdanm 92:4fc01daae5a5 110 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 111 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 112
Kojto 99:dbbf35b96557 113 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
Kojto 99:dbbf35b96557 114 * @{
Kojto 99:dbbf35b96557 115 */
bogdanm 92:4fc01daae5a5 116 /** @brief Reset SRAM handle state
bogdanm 92:4fc01daae5a5 117 * @param __HANDLE__: SRAM handle
bogdanm 92:4fc01daae5a5 118 * @retval None
bogdanm 92:4fc01daae5a5 119 */
bogdanm 92:4fc01daae5a5 120 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
bogdanm 92:4fc01daae5a5 121
Kojto 99:dbbf35b96557 122 /**
Kojto 99:dbbf35b96557 123 * @}
Kojto 99:dbbf35b96557 124 */
bogdanm 92:4fc01daae5a5 125 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 126
Kojto 99:dbbf35b96557 127 /** @addtogroup SRAM_Exported_Functions
Kojto 99:dbbf35b96557 128 * @{
Kojto 99:dbbf35b96557 129 */
Kojto 99:dbbf35b96557 130
Kojto 99:dbbf35b96557 131 /** @addtogroup SRAM_Exported_Functions_Group1
Kojto 99:dbbf35b96557 132 * @{
Kojto 99:dbbf35b96557 133 */
bogdanm 92:4fc01daae5a5 134 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 135 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
bogdanm 92:4fc01daae5a5 136 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Kojto 99:dbbf35b96557 137 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Kojto 99:dbbf35b96557 138 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
bogdanm 92:4fc01daae5a5 139
Kojto 99:dbbf35b96557 140 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 141 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 142 /**
Kojto 99:dbbf35b96557 143 * @}
Kojto 99:dbbf35b96557 144 */
Kojto 99:dbbf35b96557 145
Kojto 99:dbbf35b96557 146 /** @addtogroup SRAM_Exported_Functions_Group2
Kojto 99:dbbf35b96557 147 * @{
Kojto 99:dbbf35b96557 148 */
bogdanm 92:4fc01daae5a5 149 /* I/O operation functions *****************************************************/
bogdanm 92:4fc01daae5a5 150 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 151 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 152 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 153 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 154 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 155 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 156 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 157 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 99:dbbf35b96557 158 /**
Kojto 99:dbbf35b96557 159 * @}
Kojto 99:dbbf35b96557 160 */
bogdanm 92:4fc01daae5a5 161
Kojto 99:dbbf35b96557 162 /** @addtogroup SRAM_Exported_Functions_Group3
Kojto 99:dbbf35b96557 163 * @{
Kojto 99:dbbf35b96557 164 */
bogdanm 92:4fc01daae5a5 165 /* SRAM Control functions ******************************************************/
bogdanm 92:4fc01daae5a5 166 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
bogdanm 92:4fc01daae5a5 167 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
bogdanm 92:4fc01daae5a5 168 /**
bogdanm 92:4fc01daae5a5 169 * @}
bogdanm 92:4fc01daae5a5 170 */
bogdanm 92:4fc01daae5a5 171
Kojto 99:dbbf35b96557 172 /** @addtogroup SRAM_Exported_Functions_Group4
Kojto 99:dbbf35b96557 173 * @{
Kojto 99:dbbf35b96557 174 */
Kojto 99:dbbf35b96557 175 /* SRAM State functions *********************************************************/
Kojto 99:dbbf35b96557 176 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Kojto 99:dbbf35b96557 177 /**
Kojto 99:dbbf35b96557 178 * @}
Kojto 99:dbbf35b96557 179 */
Kojto 99:dbbf35b96557 180
bogdanm 92:4fc01daae5a5 181 /**
bogdanm 92:4fc01daae5a5 182 * @}
bogdanm 92:4fc01daae5a5 183 */
Kojto 99:dbbf35b96557 184
Kojto 99:dbbf35b96557 185 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 186 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 187 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 188 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 189 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 190 /**
Kojto 99:dbbf35b96557 191 * @}
Kojto 99:dbbf35b96557 192 */
Kojto 99:dbbf35b96557 193
Kojto 110:165afa46840b 194 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
Kojto 110:165afa46840b 195 STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
Kojto 99:dbbf35b96557 196 /**
Kojto 99:dbbf35b96557 197 * @}
Kojto 99:dbbf35b96557 198 */
bogdanm 92:4fc01daae5a5 199 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 200 }
bogdanm 92:4fc01daae5a5 201 #endif
bogdanm 92:4fc01daae5a5 202
bogdanm 92:4fc01daae5a5 203 #endif /* __STM32F4xx_HAL_SRAM_H */
bogdanm 92:4fc01daae5a5 204
bogdanm 92:4fc01daae5a5 205 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/