Ricardo Benitez / mbed

meh

Fork of mbed by mbed official

TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_sram.h@99:dbbf35b96557, 2015-05-13 (annotated)

Committer:
Kojto
Date:
Wed May 13 08:08:21 2015 +0200
Revision:
99:dbbf35b96557
Parent:
92:4fc01daae5a5
Child:
106:ba1f97679dad
Release 99 of the mbed library



Changes:

 - new targets - MAXWSNENV, DISCO_L053C8

 - STM32F4xx - ST Cube driver

 - KSDK mcu - SPI timing fix

 - Nordic - update to softdevice s130

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal_sram.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
Kojto 99:dbbf35b96557 5 * @version V1.3.0
Kojto 99:dbbf35b96557 6 * @date 09-March-2015
bogdanm 92:4fc01daae5a5 7 * @brief Header file of SRAM HAL module.
bogdanm 92:4fc01daae5a5 8 ******************************************************************************
bogdanm 92:4fc01daae5a5 9 * @attention
bogdanm 92:4fc01daae5a5 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 12 *
bogdanm 92:4fc01daae5a5 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 14 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 16 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 19 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 21 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 22 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 23 *
bogdanm 92:4fc01daae5a5 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 34 *
bogdanm 92:4fc01daae5a5 35 ******************************************************************************
bogdanm 92:4fc01daae5a5 36 */
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 39 #ifndef __STM32F4xx_HAL_SRAM_H
bogdanm 92:4fc01daae5a5 40 #define __STM32F4xx_HAL_SRAM_H
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 43 extern "C" {
bogdanm 92:4fc01daae5a5 44 #endif
bogdanm 92:4fc01daae5a5 45
bogdanm 92:4fc01daae5a5 46 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
bogdanm 92:4fc01daae5a5 48 #include "stm32f4xx_ll_fsmc.h"
bogdanm 92:4fc01daae5a5 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
bogdanm 92:4fc01daae5a5 50
Kojto 99:dbbf35b96557 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F446xx)
bogdanm 92:4fc01daae5a5 52 #include "stm32f4xx_ll_fmc.h"
Kojto 99:dbbf35b96557 53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55
bogdanm 92:4fc01daae5a5 56 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 57 * @{
bogdanm 92:4fc01daae5a5 58 */
bogdanm 92:4fc01daae5a5 59
Kojto 99:dbbf35b96557 60 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 99:dbbf35b96557 61 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 99:dbbf35b96557 62 defined(STM32F446xx)
bogdanm 92:4fc01daae5a5 63 /** @addtogroup SRAM
bogdanm 92:4fc01daae5a5 64 * @{
bogdanm 92:4fc01daae5a5 65 */
bogdanm 92:4fc01daae5a5 66
bogdanm 92:4fc01daae5a5 67 /* Exported typedef ----------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 68
Kojto 99:dbbf35b96557 69 /** @defgroup SRAM_Exported_Types SRAM Exported Types
Kojto 99:dbbf35b96557 70 * @{
Kojto 99:dbbf35b96557 71 */
bogdanm 92:4fc01daae5a5 72 /**
bogdanm 92:4fc01daae5a5 73 * @brief HAL SRAM State structures definition
bogdanm 92:4fc01daae5a5 74 */
bogdanm 92:4fc01daae5a5 75 typedef enum
bogdanm 92:4fc01daae5a5 76 {
bogdanm 92:4fc01daae5a5 77 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
bogdanm 92:4fc01daae5a5 78 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
bogdanm 92:4fc01daae5a5 79 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
bogdanm 92:4fc01daae5a5 80 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
bogdanm 92:4fc01daae5a5 81 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
bogdanm 92:4fc01daae5a5 82
bogdanm 92:4fc01daae5a5 83 }HAL_SRAM_StateTypeDef;
bogdanm 92:4fc01daae5a5 84
bogdanm 92:4fc01daae5a5 85 /**
bogdanm 92:4fc01daae5a5 86 * @brief SRAM handle Structure definition
bogdanm 92:4fc01daae5a5 87 */
bogdanm 92:4fc01daae5a5 88 typedef struct
bogdanm 92:4fc01daae5a5 89 {
bogdanm 92:4fc01daae5a5 90 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
bogdanm 92:4fc01daae5a5 91
bogdanm 92:4fc01daae5a5 92 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
bogdanm 92:4fc01daae5a5 93
bogdanm 92:4fc01daae5a5 94 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
bogdanm 92:4fc01daae5a5 95
bogdanm 92:4fc01daae5a5 96 HAL_LockTypeDef Lock; /*!< SRAM locking object */
bogdanm 92:4fc01daae5a5 97
bogdanm 92:4fc01daae5a5 98 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
bogdanm 92:4fc01daae5a5 99
bogdanm 92:4fc01daae5a5 100 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
bogdanm 92:4fc01daae5a5 101
bogdanm 92:4fc01daae5a5 102 }SRAM_HandleTypeDef;
bogdanm 92:4fc01daae5a5 103
Kojto 99:dbbf35b96557 104 /**
Kojto 99:dbbf35b96557 105 * @}
Kojto 99:dbbf35b96557 106 */
Kojto 99:dbbf35b96557 107
bogdanm 92:4fc01daae5a5 108 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 109 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 110
Kojto 99:dbbf35b96557 111 /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
Kojto 99:dbbf35b96557 112 * @{
Kojto 99:dbbf35b96557 113 */
bogdanm 92:4fc01daae5a5 114 /** @brief Reset SRAM handle state
bogdanm 92:4fc01daae5a5 115 * @param __HANDLE__: SRAM handle
bogdanm 92:4fc01daae5a5 116 * @retval None
bogdanm 92:4fc01daae5a5 117 */
bogdanm 92:4fc01daae5a5 118 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
bogdanm 92:4fc01daae5a5 119
Kojto 99:dbbf35b96557 120 /**
Kojto 99:dbbf35b96557 121 * @}
Kojto 99:dbbf35b96557 122 */
bogdanm 92:4fc01daae5a5 123 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 124
Kojto 99:dbbf35b96557 125 /** @addtogroup SRAM_Exported_Functions
Kojto 99:dbbf35b96557 126 * @{
Kojto 99:dbbf35b96557 127 */
Kojto 99:dbbf35b96557 128
Kojto 99:dbbf35b96557 129 /** @addtogroup SRAM_Exported_Functions_Group1
Kojto 99:dbbf35b96557 130 * @{
Kojto 99:dbbf35b96557 131 */
bogdanm 92:4fc01daae5a5 132 /* Initialization/de-initialization functions **********************************/
bogdanm 92:4fc01daae5a5 133 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
bogdanm 92:4fc01daae5a5 134 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Kojto 99:dbbf35b96557 135 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Kojto 99:dbbf35b96557 136 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
bogdanm 92:4fc01daae5a5 137
Kojto 99:dbbf35b96557 138 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 139 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 99:dbbf35b96557 140 /**
Kojto 99:dbbf35b96557 141 * @}
Kojto 99:dbbf35b96557 142 */
Kojto 99:dbbf35b96557 143
Kojto 99:dbbf35b96557 144 /** @addtogroup SRAM_Exported_Functions_Group2
Kojto 99:dbbf35b96557 145 * @{
Kojto 99:dbbf35b96557 146 */
bogdanm 92:4fc01daae5a5 147 /* I/O operation functions *****************************************************/
bogdanm 92:4fc01daae5a5 148 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 149 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 150 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 151 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 152 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 153 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 154 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
bogdanm 92:4fc01daae5a5 155 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 99:dbbf35b96557 156 /**
Kojto 99:dbbf35b96557 157 * @}
Kojto 99:dbbf35b96557 158 */
bogdanm 92:4fc01daae5a5 159
Kojto 99:dbbf35b96557 160 /** @addtogroup SRAM_Exported_Functions_Group3
Kojto 99:dbbf35b96557 161 * @{
Kojto 99:dbbf35b96557 162 */
bogdanm 92:4fc01daae5a5 163 /* SRAM Control functions ******************************************************/
bogdanm 92:4fc01daae5a5 164 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
bogdanm 92:4fc01daae5a5 165 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
bogdanm 92:4fc01daae5a5 166 /**
bogdanm 92:4fc01daae5a5 167 * @}
bogdanm 92:4fc01daae5a5 168 */
bogdanm 92:4fc01daae5a5 169
Kojto 99:dbbf35b96557 170 /** @addtogroup SRAM_Exported_Functions_Group4
Kojto 99:dbbf35b96557 171 * @{
Kojto 99:dbbf35b96557 172 */
Kojto 99:dbbf35b96557 173 /* SRAM State functions *********************************************************/
Kojto 99:dbbf35b96557 174 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Kojto 99:dbbf35b96557 175 /**
Kojto 99:dbbf35b96557 176 * @}
Kojto 99:dbbf35b96557 177 */
Kojto 99:dbbf35b96557 178
bogdanm 92:4fc01daae5a5 179 /**
bogdanm 92:4fc01daae5a5 180 * @}
bogdanm 92:4fc01daae5a5 181 */
Kojto 99:dbbf35b96557 182
Kojto 99:dbbf35b96557 183 /* Private types -------------------------------------------------------------*/
Kojto 99:dbbf35b96557 184 /* Private variables ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 185 /* Private constants ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 186 /* Private macros ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 187 /* Private functions ---------------------------------------------------------*/
Kojto 99:dbbf35b96557 188 /**
Kojto 99:dbbf35b96557 189 * @}
Kojto 99:dbbf35b96557 190 */
Kojto 99:dbbf35b96557 191
Kojto 99:dbbf35b96557 192 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
Kojto 99:dbbf35b96557 193 /**
Kojto 99:dbbf35b96557 194 * @}
Kojto 99:dbbf35b96557 195 */
bogdanm 92:4fc01daae5a5 196 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 197 }
bogdanm 92:4fc01daae5a5 198 #endif
bogdanm 92:4fc01daae5a5 199
bogdanm 92:4fc01daae5a5 200 #endif /* __STM32F4xx_HAL_SRAM_H */
bogdanm 92:4fc01daae5a5 201
bogdanm 92:4fc01daae5a5 202 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/