Renato Grottesi / Mbed 2 deprecated SuspendedPlotterIoT

Suspended plotter for the skaperfest

Dependencies:   mbed HTTPServer EthernetNetIf FatFileSystemCpp

USBHostLite/usbhost_lpc17xx.cpp@0:602ff2b2d41c, 24 months ago (annotated)

Committer:
rengro01
Date:
Mon Aug 22 10:24:23 2022 +0000
Revision:
0:602ff2b2d41c
skaperfest

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rengro01 0:602ff2b2d41c 1 /*
rengro01 0:602ff2b2d41c 2 **************************************************************************************************************
rengro01 0:602ff2b2d41c 3 * NXP USB Host Stack
rengro01 0:602ff2b2d41c 4 *
rengro01 0:602ff2b2d41c 5 * (c) Copyright 2008, NXP SemiConductors
rengro01 0:602ff2b2d41c 6 * (c) Copyright 2008, OnChip Technologies LLC
rengro01 0:602ff2b2d41c 7 * All Rights Reserved
rengro01 0:602ff2b2d41c 8 *
rengro01 0:602ff2b2d41c 9 * www.nxp.com
rengro01 0:602ff2b2d41c 10 * www.onchiptech.com
rengro01 0:602ff2b2d41c 11 *
rengro01 0:602ff2b2d41c 12 * File : usbhost_lpc17xx.c
rengro01 0:602ff2b2d41c 13 * Programmer(s) : Ravikanth.P
rengro01 0:602ff2b2d41c 14 * Version :
rengro01 0:602ff2b2d41c 15 *
rengro01 0:602ff2b2d41c 16 **************************************************************************************************************
rengro01 0:602ff2b2d41c 17 */
rengro01 0:602ff2b2d41c 18
rengro01 0:602ff2b2d41c 19 /*
rengro01 0:602ff2b2d41c 20 **************************************************************************************************************
rengro01 0:602ff2b2d41c 21 * INCLUDE HEADER FILES
rengro01 0:602ff2b2d41c 22 **************************************************************************************************************
rengro01 0:602ff2b2d41c 23 */
rengro01 0:602ff2b2d41c 24
rengro01 0:602ff2b2d41c 25 #include "usbhost_lpc17xx.h"
rengro01 0:602ff2b2d41c 26
rengro01 0:602ff2b2d41c 27 /*
rengro01 0:602ff2b2d41c 28 **************************************************************************************************************
rengro01 0:602ff2b2d41c 29 * GLOBAL VARIABLES
rengro01 0:602ff2b2d41c 30 **************************************************************************************************************
rengro01 0:602ff2b2d41c 31 */
rengro01 0:602ff2b2d41c 32 int gUSBConnected;
rengro01 0:602ff2b2d41c 33
rengro01 0:602ff2b2d41c 34 volatile USB_INT32U HOST_RhscIntr = 0; /* Root Hub Status Change interrupt */
rengro01 0:602ff2b2d41c 35 volatile USB_INT32U HOST_WdhIntr = 0; /* Semaphore to wait until the TD is submitted */
rengro01 0:602ff2b2d41c 36 volatile USB_INT08U HOST_TDControlStatus = 0;
rengro01 0:602ff2b2d41c 37 volatile HCED *EDCtrl; /* Control endpoint descriptor structure */
rengro01 0:602ff2b2d41c 38 volatile HCED *EDBulkIn; /* BulkIn endpoint descriptor structure */
rengro01 0:602ff2b2d41c 39 volatile HCED *EDBulkOut; /* BulkOut endpoint descriptor structure */
rengro01 0:602ff2b2d41c 40 volatile HCTD *TDHead; /* Head transfer descriptor structure */
rengro01 0:602ff2b2d41c 41 volatile HCTD *TDTail; /* Tail transfer descriptor structure */
rengro01 0:602ff2b2d41c 42 volatile HCCA *Hcca; /* Host Controller Communications Area structure */
rengro01 0:602ff2b2d41c 43 USB_INT16U *TDBufNonVol; /* Identical to TDBuffer just to reduce compiler warnings */
rengro01 0:602ff2b2d41c 44 volatile USB_INT08U *TDBuffer; /* Current Buffer Pointer of transfer descriptor */
rengro01 0:602ff2b2d41c 45
rengro01 0:602ff2b2d41c 46 // USB host structures
rengro01 0:602ff2b2d41c 47 // AHB SRAM block 1
rengro01 0:602ff2b2d41c 48 #define HOSTBASEADDR 0x2007C000
rengro01 0:602ff2b2d41c 49 // reserve memory for the linker
rengro01 0:602ff2b2d41c 50 static USB_INT08U HostBuf[0x200] __attribute__((at(HOSTBASEADDR)));
rengro01 0:602ff2b2d41c 51 /*
rengro01 0:602ff2b2d41c 52 **************************************************************************************************************
rengro01 0:602ff2b2d41c 53 * DELAY IN MILLI SECONDS
rengro01 0:602ff2b2d41c 54 *
rengro01 0:602ff2b2d41c 55 * Description: This function provides a delay in milli seconds
rengro01 0:602ff2b2d41c 56 *
rengro01 0:602ff2b2d41c 57 * Arguments : delay The delay required
rengro01 0:602ff2b2d41c 58 *
rengro01 0:602ff2b2d41c 59 * Returns : None
rengro01 0:602ff2b2d41c 60 *
rengro01 0:602ff2b2d41c 61 **************************************************************************************************************
rengro01 0:602ff2b2d41c 62 */
rengro01 0:602ff2b2d41c 63
rengro01 0:602ff2b2d41c 64 void Host_DelayMS (USB_INT32U delay)
rengro01 0:602ff2b2d41c 65 {
rengro01 0:602ff2b2d41c 66 volatile USB_INT32U i;
rengro01 0:602ff2b2d41c 67
rengro01 0:602ff2b2d41c 68
rengro01 0:602ff2b2d41c 69 for (i = 0; i < delay; i++) {
rengro01 0:602ff2b2d41c 70 Host_DelayUS(1000);
rengro01 0:602ff2b2d41c 71 }
rengro01 0:602ff2b2d41c 72 }
rengro01 0:602ff2b2d41c 73
rengro01 0:602ff2b2d41c 74 /*
rengro01 0:602ff2b2d41c 75 **************************************************************************************************************
rengro01 0:602ff2b2d41c 76 * DELAY IN MICRO SECONDS
rengro01 0:602ff2b2d41c 77 *
rengro01 0:602ff2b2d41c 78 * Description: This function provides a delay in micro seconds
rengro01 0:602ff2b2d41c 79 *
rengro01 0:602ff2b2d41c 80 * Arguments : delay The delay required
rengro01 0:602ff2b2d41c 81 *
rengro01 0:602ff2b2d41c 82 * Returns : None
rengro01 0:602ff2b2d41c 83 *
rengro01 0:602ff2b2d41c 84 **************************************************************************************************************
rengro01 0:602ff2b2d41c 85 */
rengro01 0:602ff2b2d41c 86
rengro01 0:602ff2b2d41c 87 void Host_DelayUS (USB_INT32U delay)
rengro01 0:602ff2b2d41c 88 {
rengro01 0:602ff2b2d41c 89 volatile USB_INT32U i;
rengro01 0:602ff2b2d41c 90
rengro01 0:602ff2b2d41c 91
rengro01 0:602ff2b2d41c 92 for (i = 0; i < (4 * delay); i++) { /* This logic was tested. It gives app. 1 micro sec delay */
rengro01 0:602ff2b2d41c 93 ;
rengro01 0:602ff2b2d41c 94 }
rengro01 0:602ff2b2d41c 95 }
rengro01 0:602ff2b2d41c 96
rengro01 0:602ff2b2d41c 97 // bits of the USB/OTG clock control register
rengro01 0:602ff2b2d41c 98 #define HOST_CLK_EN (1<<0)
rengro01 0:602ff2b2d41c 99 #define DEV_CLK_EN (1<<1)
rengro01 0:602ff2b2d41c 100 #define PORTSEL_CLK_EN (1<<3)
rengro01 0:602ff2b2d41c 101 #define AHB_CLK_EN (1<<4)
rengro01 0:602ff2b2d41c 102
rengro01 0:602ff2b2d41c 103 // bits of the USB/OTG clock status register
rengro01 0:602ff2b2d41c 104 #define HOST_CLK_ON (1<<0)
rengro01 0:602ff2b2d41c 105 #define DEV_CLK_ON (1<<1)
rengro01 0:602ff2b2d41c 106 #define PORTSEL_CLK_ON (1<<3)
rengro01 0:602ff2b2d41c 107 #define AHB_CLK_ON (1<<4)
rengro01 0:602ff2b2d41c 108
rengro01 0:602ff2b2d41c 109 // we need host clock, OTG/portsel clock and AHB clock
rengro01 0:602ff2b2d41c 110 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
rengro01 0:602ff2b2d41c 111
rengro01 0:602ff2b2d41c 112 /*
rengro01 0:602ff2b2d41c 113 **************************************************************************************************************
rengro01 0:602ff2b2d41c 114 * INITIALIZE THE HOST CONTROLLER
rengro01 0:602ff2b2d41c 115 *
rengro01 0:602ff2b2d41c 116 * Description: This function initializes lpc17xx host controller
rengro01 0:602ff2b2d41c 117 *
rengro01 0:602ff2b2d41c 118 * Arguments : None
rengro01 0:602ff2b2d41c 119 *
rengro01 0:602ff2b2d41c 120 * Returns :
rengro01 0:602ff2b2d41c 121 *
rengro01 0:602ff2b2d41c 122 **************************************************************************************************************
rengro01 0:602ff2b2d41c 123 */
rengro01 0:602ff2b2d41c 124 void Host_Init (void)
rengro01 0:602ff2b2d41c 125 {
rengro01 0:602ff2b2d41c 126 PRINT_Log("In Host_Init\n");
rengro01 0:602ff2b2d41c 127 NVIC_DisableIRQ(USB_IRQn); /* Disable the USB interrupt source */
rengro01 0:602ff2b2d41c 128
rengro01 0:602ff2b2d41c 129 // turn on power for USB
rengro01 0:602ff2b2d41c 130 LPC_SC->PCONP |= (1UL<<31);
rengro01 0:602ff2b2d41c 131 // Enable USB host clock, port selection and AHB clock
rengro01 0:602ff2b2d41c 132 LPC_USB->USBClkCtrl |= CLOCK_MASK;
rengro01 0:602ff2b2d41c 133 // Wait for clocks to become available
rengro01 0:602ff2b2d41c 134 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK)
rengro01 0:602ff2b2d41c 135 ;
rengro01 0:602ff2b2d41c 136
rengro01 0:602ff2b2d41c 137 // it seems the bits[0:1] mean the following
rengro01 0:602ff2b2d41c 138 // 0: U1=device, U2=host
rengro01 0:602ff2b2d41c 139 // 1: U1=host, U2=host
rengro01 0:602ff2b2d41c 140 // 2: reserved
rengro01 0:602ff2b2d41c 141 // 3: U1=host, U2=device
rengro01 0:602ff2b2d41c 142 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
rengro01 0:602ff2b2d41c 143 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
rengro01 0:602ff2b2d41c 144 LPC_USB->OTGStCtrl |= 1;
rengro01 0:602ff2b2d41c 145
rengro01 0:602ff2b2d41c 146 // now that we've configured the ports, we can turn off the portsel clock
rengro01 0:602ff2b2d41c 147 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
rengro01 0:602ff2b2d41c 148
rengro01 0:602ff2b2d41c 149 // power pins are not connected on mbed, so we can skip them
rengro01 0:602ff2b2d41c 150 /* P1[18] = USB_UP_LED, 01 */
rengro01 0:602ff2b2d41c 151 /* P1[19] = /USB_PPWR, 10 */
rengro01 0:602ff2b2d41c 152 /* P1[22] = USB_PWRD, 10 */
rengro01 0:602ff2b2d41c 153 /* P1[27] = /USB_OVRCR, 10 */
rengro01 0:602ff2b2d41c 154 /*LPC_PINCON->PINSEL3 &= ~((3<<4) | (3<<6) | (3<<12) | (3<<22));
rengro01 0:602ff2b2d41c 155 LPC_PINCON->PINSEL3 |= ((1<<4)|(2<<6) | (2<<12) | (2<<22)); // 0x00802080
rengro01 0:602ff2b2d41c 156 */
rengro01 0:602ff2b2d41c 157
rengro01 0:602ff2b2d41c 158 // configure USB D+/D- pins
rengro01 0:602ff2b2d41c 159 /* P0[29] = USB_D+, 01 */
rengro01 0:602ff2b2d41c 160 /* P0[30] = USB_D-, 01 */
rengro01 0:602ff2b2d41c 161 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
rengro01 0:602ff2b2d41c 162 LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000
rengro01 0:602ff2b2d41c 163
rengro01 0:602ff2b2d41c 164 PRINT_Log("Initializing Host Stack\n");
rengro01 0:602ff2b2d41c 165
rengro01 0:602ff2b2d41c 166 Hcca = (volatile HCCA *)(HostBuf+0x000);
rengro01 0:602ff2b2d41c 167 TDHead = (volatile HCTD *)(HostBuf+0x100);
rengro01 0:602ff2b2d41c 168 TDTail = (volatile HCTD *)(HostBuf+0x110);
rengro01 0:602ff2b2d41c 169 EDCtrl = (volatile HCED *)(HostBuf+0x120);
rengro01 0:602ff2b2d41c 170 EDBulkIn = (volatile HCED *)(HostBuf+0x130);
rengro01 0:602ff2b2d41c 171 EDBulkOut = (volatile HCED *)(HostBuf+0x140);
rengro01 0:602ff2b2d41c 172 TDBuffer = (volatile USB_INT08U *)(HostBuf+0x150);
rengro01 0:602ff2b2d41c 173
rengro01 0:602ff2b2d41c 174 /* Initialize all the TDs, EDs and HCCA to 0 */
rengro01 0:602ff2b2d41c 175 Host_EDInit(EDCtrl);
rengro01 0:602ff2b2d41c 176 Host_EDInit(EDBulkIn);
rengro01 0:602ff2b2d41c 177 Host_EDInit(EDBulkOut);
rengro01 0:602ff2b2d41c 178 Host_TDInit(TDHead);
rengro01 0:602ff2b2d41c 179 Host_TDInit(TDTail);
rengro01 0:602ff2b2d41c 180 Host_HCCAInit(Hcca);
rengro01 0:602ff2b2d41c 181
rengro01 0:602ff2b2d41c 182 Host_DelayMS(50); /* Wait 50 ms before apply reset */
rengro01 0:602ff2b2d41c 183 LPC_USB->HcControl = 0; /* HARDWARE RESET */
rengro01 0:602ff2b2d41c 184 LPC_USB->HcControlHeadED = 0; /* Initialize Control list head to Zero */
rengro01 0:602ff2b2d41c 185 LPC_USB->HcBulkHeadED = 0; /* Initialize Bulk list head to Zero */
rengro01 0:602ff2b2d41c 186
rengro01 0:602ff2b2d41c 187 /* SOFTWARE RESET */
rengro01 0:602ff2b2d41c 188 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
rengro01 0:602ff2b2d41c 189 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; /* Write Fm Interval and Largest Data Packet Counter */
rengro01 0:602ff2b2d41c 190
rengro01 0:602ff2b2d41c 191 /* Put HC in operational state */
rengro01 0:602ff2b2d41c 192 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
rengro01 0:602ff2b2d41c 193 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; /* Set Global Power */
rengro01 0:602ff2b2d41c 194
rengro01 0:602ff2b2d41c 195 LPC_USB->HcHCCA = (USB_INT32U)Hcca;
rengro01 0:602ff2b2d41c 196 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; /* Clear Interrrupt Status */
rengro01 0:602ff2b2d41c 197
rengro01 0:602ff2b2d41c 198
rengro01 0:602ff2b2d41c 199 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE |
rengro01 0:602ff2b2d41c 200 OR_INTR_ENABLE_WDH |
rengro01 0:602ff2b2d41c 201 OR_INTR_ENABLE_RHSC;
rengro01 0:602ff2b2d41c 202
rengro01 0:602ff2b2d41c 203 NVIC_SetPriority(USB_IRQn, 0); /* highest priority */
rengro01 0:602ff2b2d41c 204 /* Enable the USB Interrupt */
rengro01 0:602ff2b2d41c 205 NVIC_EnableIRQ(USB_IRQn);
rengro01 0:602ff2b2d41c 206 PRINT_Log("Host Initialized\n");
rengro01 0:602ff2b2d41c 207 }
rengro01 0:602ff2b2d41c 208
rengro01 0:602ff2b2d41c 209 /*
rengro01 0:602ff2b2d41c 210 **************************************************************************************************************
rengro01 0:602ff2b2d41c 211 * INTERRUPT SERVICE ROUTINE
rengro01 0:602ff2b2d41c 212 *
rengro01 0:602ff2b2d41c 213 * Description: This function services the interrupt caused by host controller
rengro01 0:602ff2b2d41c 214 *
rengro01 0:602ff2b2d41c 215 * Arguments : None
rengro01 0:602ff2b2d41c 216 *
rengro01 0:602ff2b2d41c 217 * Returns : None
rengro01 0:602ff2b2d41c 218 *
rengro01 0:602ff2b2d41c 219 **************************************************************************************************************
rengro01 0:602ff2b2d41c 220 */
rengro01 0:602ff2b2d41c 221
rengro01 0:602ff2b2d41c 222 void USB_IRQHandler (void) __irq
rengro01 0:602ff2b2d41c 223 {
rengro01 0:602ff2b2d41c 224 USB_INT32U int_status;
rengro01 0:602ff2b2d41c 225 USB_INT32U ie_status;
rengro01 0:602ff2b2d41c 226
rengro01 0:602ff2b2d41c 227 int_status = LPC_USB->HcInterruptStatus; /* Read Interrupt Status */
rengro01 0:602ff2b2d41c 228 ie_status = LPC_USB->HcInterruptEnable; /* Read Interrupt enable status */
rengro01 0:602ff2b2d41c 229
rengro01 0:602ff2b2d41c 230 if (!(int_status & ie_status)) {
rengro01 0:602ff2b2d41c 231 return;
rengro01 0:602ff2b2d41c 232 } else {
rengro01 0:602ff2b2d41c 233
rengro01 0:602ff2b2d41c 234 int_status = int_status & ie_status;
rengro01 0:602ff2b2d41c 235 if (int_status & OR_INTR_STATUS_RHSC) { /* Root hub status change interrupt */
rengro01 0:602ff2b2d41c 236 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
rengro01 0:602ff2b2d41c 237 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
rengro01 0:602ff2b2d41c 238 /*
rengro01 0:602ff2b2d41c 239 * When DRWE is on, Connect Status Change
rengro01 0:602ff2b2d41c 240 * means a remote wakeup event.
rengro01 0:602ff2b2d41c 241 */
rengro01 0:602ff2b2d41c 242 HOST_RhscIntr = 1;// JUST SOMETHING FOR A BREAKPOINT
rengro01 0:602ff2b2d41c 243 }
rengro01 0:602ff2b2d41c 244 else {
rengro01 0:602ff2b2d41c 245 /*
rengro01 0:602ff2b2d41c 246 * When DRWE is off, Connect Status Change
rengro01 0:602ff2b2d41c 247 * is NOT a remote wakeup event
rengro01 0:602ff2b2d41c 248 */
rengro01 0:602ff2b2d41c 249 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
rengro01 0:602ff2b2d41c 250 if (!gUSBConnected) {
rengro01 0:602ff2b2d41c 251 HOST_TDControlStatus = 0;
rengro01 0:602ff2b2d41c 252 HOST_WdhIntr = 0;
rengro01 0:602ff2b2d41c 253 HOST_RhscIntr = 1;
rengro01 0:602ff2b2d41c 254 gUSBConnected = 1;
rengro01 0:602ff2b2d41c 255 }
rengro01 0:602ff2b2d41c 256 else
rengro01 0:602ff2b2d41c 257 PRINT_Log("Spurious status change (connected)?\n");
rengro01 0:602ff2b2d41c 258 } else {
rengro01 0:602ff2b2d41c 259 if (gUSBConnected) {
rengro01 0:602ff2b2d41c 260 LPC_USB->HcInterruptEnable = 0; // why do we get multiple disc. rupts???
rengro01 0:602ff2b2d41c 261 HOST_RhscIntr = 0;
rengro01 0:602ff2b2d41c 262 gUSBConnected = 0;
rengro01 0:602ff2b2d41c 263 }
rengro01 0:602ff2b2d41c 264 else
rengro01 0:602ff2b2d41c 265 PRINT_Log("Spurious status change (disconnected)?\n");
rengro01 0:602ff2b2d41c 266 }
rengro01 0:602ff2b2d41c 267 }
rengro01 0:602ff2b2d41c 268 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
rengro01 0:602ff2b2d41c 269 }
rengro01 0:602ff2b2d41c 270 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
rengro01 0:602ff2b2d41c 271 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
rengro01 0:602ff2b2d41c 272 }
rengro01 0:602ff2b2d41c 273 }
rengro01 0:602ff2b2d41c 274 if (int_status & OR_INTR_STATUS_WDH) { /* Writeback Done Head interrupt */
rengro01 0:602ff2b2d41c 275 HOST_WdhIntr = 1;
rengro01 0:602ff2b2d41c 276 HOST_TDControlStatus = (TDHead->Control >> 28) & 0xf;
rengro01 0:602ff2b2d41c 277 }
rengro01 0:602ff2b2d41c 278 LPC_USB->HcInterruptStatus = int_status; /* Clear interrupt status register */
rengro01 0:602ff2b2d41c 279 }
rengro01 0:602ff2b2d41c 280 return;
rengro01 0:602ff2b2d41c 281 }
rengro01 0:602ff2b2d41c 282
rengro01 0:602ff2b2d41c 283 /*
rengro01 0:602ff2b2d41c 284 **************************************************************************************************************
rengro01 0:602ff2b2d41c 285 * PROCESS TRANSFER DESCRIPTOR
rengro01 0:602ff2b2d41c 286 *
rengro01 0:602ff2b2d41c 287 * Description: This function processes the transfer descriptor
rengro01 0:602ff2b2d41c 288 *
rengro01 0:602ff2b2d41c 289 * Arguments : ed Endpoint descriptor that contains this transfer descriptor
rengro01 0:602ff2b2d41c 290 * token SETUP, IN, OUT
rengro01 0:602ff2b2d41c 291 * buffer Current Buffer Pointer of the transfer descriptor
rengro01 0:602ff2b2d41c 292 * buffer_len Length of the buffer
rengro01 0:602ff2b2d41c 293 *
rengro01 0:602ff2b2d41c 294 * Returns : OK if TD submission is successful
rengro01 0:602ff2b2d41c 295 * ERROR if TD submission fails
rengro01 0:602ff2b2d41c 296 *
rengro01 0:602ff2b2d41c 297 **************************************************************************************************************
rengro01 0:602ff2b2d41c 298 */
rengro01 0:602ff2b2d41c 299
rengro01 0:602ff2b2d41c 300 USB_INT32S Host_ProcessTD (volatile HCED *ed,
rengro01 0:602ff2b2d41c 301 volatile USB_INT32U token,
rengro01 0:602ff2b2d41c 302 volatile USB_INT08U *buffer,
rengro01 0:602ff2b2d41c 303 USB_INT32U buffer_len)
rengro01 0:602ff2b2d41c 304 {
rengro01 0:602ff2b2d41c 305 volatile USB_INT32U td_toggle;
rengro01 0:602ff2b2d41c 306
rengro01 0:602ff2b2d41c 307
rengro01 0:602ff2b2d41c 308 if (ed == EDCtrl) {
rengro01 0:602ff2b2d41c 309 if (token == TD_SETUP) {
rengro01 0:602ff2b2d41c 310 td_toggle = TD_TOGGLE_0;
rengro01 0:602ff2b2d41c 311 } else {
rengro01 0:602ff2b2d41c 312 td_toggle = TD_TOGGLE_1;
rengro01 0:602ff2b2d41c 313 }
rengro01 0:602ff2b2d41c 314 } else {
rengro01 0:602ff2b2d41c 315 td_toggle = 0;
rengro01 0:602ff2b2d41c 316 }
rengro01 0:602ff2b2d41c 317 TDHead->Control = (TD_ROUNDING |
rengro01 0:602ff2b2d41c 318 token |
rengro01 0:602ff2b2d41c 319 TD_DELAY_INT(0) |
rengro01 0:602ff2b2d41c 320 td_toggle |
rengro01 0:602ff2b2d41c 321 TD_CC);
rengro01 0:602ff2b2d41c 322 TDTail->Control = 0;
rengro01 0:602ff2b2d41c 323 TDHead->CurrBufPtr = (USB_INT32U) buffer;
rengro01 0:602ff2b2d41c 324 TDTail->CurrBufPtr = 0;
rengro01 0:602ff2b2d41c 325 TDHead->Next = (USB_INT32U) TDTail;
rengro01 0:602ff2b2d41c 326 TDTail->Next = 0;
rengro01 0:602ff2b2d41c 327 TDHead->BufEnd = (USB_INT32U)(buffer + (buffer_len - 1));
rengro01 0:602ff2b2d41c 328 TDTail->BufEnd = 0;
rengro01 0:602ff2b2d41c 329
rengro01 0:602ff2b2d41c 330 ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
rengro01 0:602ff2b2d41c 331 ed->TailTd = (USB_INT32U)TDTail;
rengro01 0:602ff2b2d41c 332 ed->Next = 0;
rengro01 0:602ff2b2d41c 333
rengro01 0:602ff2b2d41c 334 if (ed == EDCtrl) {
rengro01 0:602ff2b2d41c 335 LPC_USB->HcControlHeadED = (USB_INT32U)ed;
rengro01 0:602ff2b2d41c 336 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_CLF;
rengro01 0:602ff2b2d41c 337 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_CLE;
rengro01 0:602ff2b2d41c 338 } else {
rengro01 0:602ff2b2d41c 339 LPC_USB->HcBulkHeadED = (USB_INT32U)ed;
rengro01 0:602ff2b2d41c 340 LPC_USB->HcCommandStatus = LPC_USB->HcCommandStatus | OR_CMD_STATUS_BLF;
rengro01 0:602ff2b2d41c 341 LPC_USB->HcControl = LPC_USB->HcControl | OR_CONTROL_BLE;
rengro01 0:602ff2b2d41c 342 }
rengro01 0:602ff2b2d41c 343
rengro01 0:602ff2b2d41c 344 Host_WDHWait();
rengro01 0:602ff2b2d41c 345
rengro01 0:602ff2b2d41c 346 // if (!(TDHead->Control & 0xF0000000)) {
rengro01 0:602ff2b2d41c 347 if (!HOST_TDControlStatus) {
rengro01 0:602ff2b2d41c 348 return (OK);
rengro01 0:602ff2b2d41c 349 } else {
rengro01 0:602ff2b2d41c 350 return (ERR_TD_FAIL);
rengro01 0:602ff2b2d41c 351 }
rengro01 0:602ff2b2d41c 352 }
rengro01 0:602ff2b2d41c 353
rengro01 0:602ff2b2d41c 354 /*
rengro01 0:602ff2b2d41c 355 **************************************************************************************************************
rengro01 0:602ff2b2d41c 356 * ENUMERATE THE DEVICE
rengro01 0:602ff2b2d41c 357 *
rengro01 0:602ff2b2d41c 358 * Description: This function is used to enumerate the device connected
rengro01 0:602ff2b2d41c 359 *
rengro01 0:602ff2b2d41c 360 * Arguments : None
rengro01 0:602ff2b2d41c 361 *
rengro01 0:602ff2b2d41c 362 * Returns : None
rengro01 0:602ff2b2d41c 363 *
rengro01 0:602ff2b2d41c 364 **************************************************************************************************************
rengro01 0:602ff2b2d41c 365 */
rengro01 0:602ff2b2d41c 366
rengro01 0:602ff2b2d41c 367 USB_INT32S Host_EnumDev (void)
rengro01 0:602ff2b2d41c 368 {
rengro01 0:602ff2b2d41c 369 USB_INT32S rc;
rengro01 0:602ff2b2d41c 370
rengro01 0:602ff2b2d41c 371 PRINT_Log("Connect a Mass Storage device\n");
rengro01 0:602ff2b2d41c 372 while (!HOST_RhscIntr)
rengro01 0:602ff2b2d41c 373 __WFI();
rengro01 0:602ff2b2d41c 374 Host_DelayMS(100); /* USB 2.0 spec says atleast 50ms delay beore port reset */
rengro01 0:602ff2b2d41c 375 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset
rengro01 0:602ff2b2d41c 376 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS)
rengro01 0:602ff2b2d41c 377 __WFI(); // Wait for port reset to complete...
rengro01 0:602ff2b2d41c 378 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal
rengro01 0:602ff2b2d41c 379 Host_DelayMS(200); /* Wait for 100 MS after port reset */
rengro01 0:602ff2b2d41c 380
rengro01 0:602ff2b2d41c 381 EDCtrl->Control = 8 << 16; /* Put max pkt size = 8 */
rengro01 0:602ff2b2d41c 382 /* Read first 8 bytes of device desc */
rengro01 0:602ff2b2d41c 383 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_DEVICE, 0, TDBuffer, 8);
rengro01 0:602ff2b2d41c 384 if (rc != OK) {
rengro01 0:602ff2b2d41c 385 PRINT_Err(rc);
rengro01 0:602ff2b2d41c 386 return (rc);
rengro01 0:602ff2b2d41c 387 }
rengro01 0:602ff2b2d41c 388 EDCtrl->Control = TDBuffer[7] << 16; /* Get max pkt size of endpoint 0 */
rengro01 0:602ff2b2d41c 389 rc = HOST_SET_ADDRESS(1); /* Set the device address to 1 */
rengro01 0:602ff2b2d41c 390 if (rc != OK) {
rengro01 0:602ff2b2d41c 391 PRINT_Err(rc);
rengro01 0:602ff2b2d41c 392 return (rc);
rengro01 0:602ff2b2d41c 393 }
rengro01 0:602ff2b2d41c 394 Host_DelayMS(2);
rengro01 0:602ff2b2d41c 395 EDCtrl->Control = (EDCtrl->Control) | 1; /* Modify control pipe with address 1 */
rengro01 0:602ff2b2d41c 396 /* Get the configuration descriptor */
rengro01 0:602ff2b2d41c 397 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, 9);
rengro01 0:602ff2b2d41c 398 if (rc != OK) {
rengro01 0:602ff2b2d41c 399 PRINT_Err(rc);
rengro01 0:602ff2b2d41c 400 return (rc);
rengro01 0:602ff2b2d41c 401 }
rengro01 0:602ff2b2d41c 402 /* Get the first configuration data */
rengro01 0:602ff2b2d41c 403 rc = HOST_GET_DESCRIPTOR(USB_DESCRIPTOR_TYPE_CONFIGURATION, 0, TDBuffer, ReadLE16U(&TDBuffer[2]));
rengro01 0:602ff2b2d41c 404 if (rc != OK) {
rengro01 0:602ff2b2d41c 405 PRINT_Err(rc);
rengro01 0:602ff2b2d41c 406 return (rc);
rengro01 0:602ff2b2d41c 407 }
rengro01 0:602ff2b2d41c 408 rc = MS_ParseConfiguration(); /* Parse the configuration */
rengro01 0:602ff2b2d41c 409 if (rc != OK) {
rengro01 0:602ff2b2d41c 410 PRINT_Err(rc);
rengro01 0:602ff2b2d41c 411 return (rc);
rengro01 0:602ff2b2d41c 412 }
rengro01 0:602ff2b2d41c 413 rc = USBH_SET_CONFIGURATION(1); /* Select device configuration 1 */
rengro01 0:602ff2b2d41c 414 if (rc != OK) {
rengro01 0:602ff2b2d41c 415 PRINT_Err(rc);
rengro01 0:602ff2b2d41c 416 }
rengro01 0:602ff2b2d41c 417 Host_DelayMS(100); /* Some devices may require this delay */
rengro01 0:602ff2b2d41c 418 return (rc);
rengro01 0:602ff2b2d41c 419 }
rengro01 0:602ff2b2d41c 420
rengro01 0:602ff2b2d41c 421 /*
rengro01 0:602ff2b2d41c 422 **************************************************************************************************************
rengro01 0:602ff2b2d41c 423 * RECEIVE THE CONTROL INFORMATION
rengro01 0:602ff2b2d41c 424 *
rengro01 0:602ff2b2d41c 425 * Description: This function is used to receive the control information
rengro01 0:602ff2b2d41c 426 *
rengro01 0:602ff2b2d41c 427 * Arguments : bm_request_type
rengro01 0:602ff2b2d41c 428 * b_request
rengro01 0:602ff2b2d41c 429 * w_value
rengro01 0:602ff2b2d41c 430 * w_index
rengro01 0:602ff2b2d41c 431 * w_length
rengro01 0:602ff2b2d41c 432 * buffer
rengro01 0:602ff2b2d41c 433 *
rengro01 0:602ff2b2d41c 434 * Returns : OK if Success
rengro01 0:602ff2b2d41c 435 * ERROR if Failed
rengro01 0:602ff2b2d41c 436 *
rengro01 0:602ff2b2d41c 437 **************************************************************************************************************
rengro01 0:602ff2b2d41c 438 */
rengro01 0:602ff2b2d41c 439
rengro01 0:602ff2b2d41c 440 USB_INT32S Host_CtrlRecv ( USB_INT08U bm_request_type,
rengro01 0:602ff2b2d41c 441 USB_INT08U b_request,
rengro01 0:602ff2b2d41c 442 USB_INT16U w_value,
rengro01 0:602ff2b2d41c 443 USB_INT16U w_index,
rengro01 0:602ff2b2d41c 444 USB_INT16U w_length,
rengro01 0:602ff2b2d41c 445 volatile USB_INT08U *buffer)
rengro01 0:602ff2b2d41c 446 {
rengro01 0:602ff2b2d41c 447 USB_INT32S rc;
rengro01 0:602ff2b2d41c 448
rengro01 0:602ff2b2d41c 449
rengro01 0:602ff2b2d41c 450 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
rengro01 0:602ff2b2d41c 451 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
rengro01 0:602ff2b2d41c 452 if (rc == OK) {
rengro01 0:602ff2b2d41c 453 if (w_length) {
rengro01 0:602ff2b2d41c 454 rc = Host_ProcessTD(EDCtrl, TD_IN, TDBuffer, w_length);
rengro01 0:602ff2b2d41c 455 }
rengro01 0:602ff2b2d41c 456 if (rc == OK) {
rengro01 0:602ff2b2d41c 457 rc = Host_ProcessTD(EDCtrl, TD_OUT, NULL, 0);
rengro01 0:602ff2b2d41c 458 }
rengro01 0:602ff2b2d41c 459 }
rengro01 0:602ff2b2d41c 460 return (rc);
rengro01 0:602ff2b2d41c 461 }
rengro01 0:602ff2b2d41c 462
rengro01 0:602ff2b2d41c 463 /*
rengro01 0:602ff2b2d41c 464 **************************************************************************************************************
rengro01 0:602ff2b2d41c 465 * SEND THE CONTROL INFORMATION
rengro01 0:602ff2b2d41c 466 *
rengro01 0:602ff2b2d41c 467 * Description: This function is used to send the control information
rengro01 0:602ff2b2d41c 468 *
rengro01 0:602ff2b2d41c 469 * Arguments : None
rengro01 0:602ff2b2d41c 470 *
rengro01 0:602ff2b2d41c 471 * Returns : OK if Success
rengro01 0:602ff2b2d41c 472 * ERR_INVALID_BOOTSIG if Failed
rengro01 0:602ff2b2d41c 473 *
rengro01 0:602ff2b2d41c 474 **************************************************************************************************************
rengro01 0:602ff2b2d41c 475 */
rengro01 0:602ff2b2d41c 476
rengro01 0:602ff2b2d41c 477 USB_INT32S Host_CtrlSend ( USB_INT08U bm_request_type,
rengro01 0:602ff2b2d41c 478 USB_INT08U b_request,
rengro01 0:602ff2b2d41c 479 USB_INT16U w_value,
rengro01 0:602ff2b2d41c 480 USB_INT16U w_index,
rengro01 0:602ff2b2d41c 481 USB_INT16U w_length,
rengro01 0:602ff2b2d41c 482 volatile USB_INT08U *buffer)
rengro01 0:602ff2b2d41c 483 {
rengro01 0:602ff2b2d41c 484 USB_INT32S rc;
rengro01 0:602ff2b2d41c 485
rengro01 0:602ff2b2d41c 486
rengro01 0:602ff2b2d41c 487 Host_FillSetup(bm_request_type, b_request, w_value, w_index, w_length);
rengro01 0:602ff2b2d41c 488
rengro01 0:602ff2b2d41c 489 rc = Host_ProcessTD(EDCtrl, TD_SETUP, TDBuffer, 8);
rengro01 0:602ff2b2d41c 490 if (rc == OK) {
rengro01 0:602ff2b2d41c 491 if (w_length) {
rengro01 0:602ff2b2d41c 492 rc = Host_ProcessTD(EDCtrl, TD_OUT, TDBuffer, w_length);
rengro01 0:602ff2b2d41c 493 }
rengro01 0:602ff2b2d41c 494 if (rc == OK) {
rengro01 0:602ff2b2d41c 495 rc = Host_ProcessTD(EDCtrl, TD_IN, NULL, 0);
rengro01 0:602ff2b2d41c 496 }
rengro01 0:602ff2b2d41c 497 }
rengro01 0:602ff2b2d41c 498 return (rc);
rengro01 0:602ff2b2d41c 499 }
rengro01 0:602ff2b2d41c 500
rengro01 0:602ff2b2d41c 501 /*
rengro01 0:602ff2b2d41c 502 **************************************************************************************************************
rengro01 0:602ff2b2d41c 503 * FILL SETUP PACKET
rengro01 0:602ff2b2d41c 504 *
rengro01 0:602ff2b2d41c 505 * Description: This function is used to fill the setup packet
rengro01 0:602ff2b2d41c 506 *
rengro01 0:602ff2b2d41c 507 * Arguments : None
rengro01 0:602ff2b2d41c 508 *
rengro01 0:602ff2b2d41c 509 * Returns : OK if Success
rengro01 0:602ff2b2d41c 510 * ERR_INVALID_BOOTSIG if Failed
rengro01 0:602ff2b2d41c 511 *
rengro01 0:602ff2b2d41c 512 **************************************************************************************************************
rengro01 0:602ff2b2d41c 513 */
rengro01 0:602ff2b2d41c 514
rengro01 0:602ff2b2d41c 515 void Host_FillSetup (USB_INT08U bm_request_type,
rengro01 0:602ff2b2d41c 516 USB_INT08U b_request,
rengro01 0:602ff2b2d41c 517 USB_INT16U w_value,
rengro01 0:602ff2b2d41c 518 USB_INT16U w_index,
rengro01 0:602ff2b2d41c 519 USB_INT16U w_length)
rengro01 0:602ff2b2d41c 520 {
rengro01 0:602ff2b2d41c 521 int i;
rengro01 0:602ff2b2d41c 522 for (i=0;i<w_length;i++)
rengro01 0:602ff2b2d41c 523 TDBuffer[i] = 0;
rengro01 0:602ff2b2d41c 524
rengro01 0:602ff2b2d41c 525 TDBuffer[0] = bm_request_type;
rengro01 0:602ff2b2d41c 526 TDBuffer[1] = b_request;
rengro01 0:602ff2b2d41c 527 WriteLE16U(&TDBuffer[2], w_value);
rengro01 0:602ff2b2d41c 528 WriteLE16U(&TDBuffer[4], w_index);
rengro01 0:602ff2b2d41c 529 WriteLE16U(&TDBuffer[6], w_length);
rengro01 0:602ff2b2d41c 530 }
rengro01 0:602ff2b2d41c 531
rengro01 0:602ff2b2d41c 532
rengro01 0:602ff2b2d41c 533
rengro01 0:602ff2b2d41c 534 /*
rengro01 0:602ff2b2d41c 535 **************************************************************************************************************
rengro01 0:602ff2b2d41c 536 * INITIALIZE THE TRANSFER DESCRIPTOR
rengro01 0:602ff2b2d41c 537 *
rengro01 0:602ff2b2d41c 538 * Description: This function initializes transfer descriptor
rengro01 0:602ff2b2d41c 539 *
rengro01 0:602ff2b2d41c 540 * Arguments : Pointer to TD structure
rengro01 0:602ff2b2d41c 541 *
rengro01 0:602ff2b2d41c 542 * Returns : None
rengro01 0:602ff2b2d41c 543 *
rengro01 0:602ff2b2d41c 544 **************************************************************************************************************
rengro01 0:602ff2b2d41c 545 */
rengro01 0:602ff2b2d41c 546
rengro01 0:602ff2b2d41c 547 void Host_TDInit (volatile HCTD *td)
rengro01 0:602ff2b2d41c 548 {
rengro01 0:602ff2b2d41c 549
rengro01 0:602ff2b2d41c 550 td->Control = 0;
rengro01 0:602ff2b2d41c 551 td->CurrBufPtr = 0;
rengro01 0:602ff2b2d41c 552 td->Next = 0;
rengro01 0:602ff2b2d41c 553 td->BufEnd = 0;
rengro01 0:602ff2b2d41c 554 }
rengro01 0:602ff2b2d41c 555
rengro01 0:602ff2b2d41c 556 /*
rengro01 0:602ff2b2d41c 557 **************************************************************************************************************
rengro01 0:602ff2b2d41c 558 * INITIALIZE THE ENDPOINT DESCRIPTOR
rengro01 0:602ff2b2d41c 559 *
rengro01 0:602ff2b2d41c 560 * Description: This function initializes endpoint descriptor
rengro01 0:602ff2b2d41c 561 *
rengro01 0:602ff2b2d41c 562 * Arguments : Pointer to ED strcuture
rengro01 0:602ff2b2d41c 563 *
rengro01 0:602ff2b2d41c 564 * Returns : None
rengro01 0:602ff2b2d41c 565 *
rengro01 0:602ff2b2d41c 566 **************************************************************************************************************
rengro01 0:602ff2b2d41c 567 */
rengro01 0:602ff2b2d41c 568
rengro01 0:602ff2b2d41c 569 void Host_EDInit (volatile HCED *ed)
rengro01 0:602ff2b2d41c 570 {
rengro01 0:602ff2b2d41c 571
rengro01 0:602ff2b2d41c 572 ed->Control = 0;
rengro01 0:602ff2b2d41c 573 ed->TailTd = 0;
rengro01 0:602ff2b2d41c 574 ed->HeadTd = 0;
rengro01 0:602ff2b2d41c 575 ed->Next = 0;
rengro01 0:602ff2b2d41c 576 }
rengro01 0:602ff2b2d41c 577
rengro01 0:602ff2b2d41c 578 /*
rengro01 0:602ff2b2d41c 579 **************************************************************************************************************
rengro01 0:602ff2b2d41c 580 * INITIALIZE HOST CONTROLLER COMMUNICATIONS AREA
rengro01 0:602ff2b2d41c 581 *
rengro01 0:602ff2b2d41c 582 * Description: This function initializes host controller communications area
rengro01 0:602ff2b2d41c 583 *
rengro01 0:602ff2b2d41c 584 * Arguments : Pointer to HCCA
rengro01 0:602ff2b2d41c 585 *
rengro01 0:602ff2b2d41c 586 * Returns :
rengro01 0:602ff2b2d41c 587 *
rengro01 0:602ff2b2d41c 588 **************************************************************************************************************
rengro01 0:602ff2b2d41c 589 */
rengro01 0:602ff2b2d41c 590
rengro01 0:602ff2b2d41c 591 void Host_HCCAInit (volatile HCCA *hcca)
rengro01 0:602ff2b2d41c 592 {
rengro01 0:602ff2b2d41c 593 USB_INT32U i;
rengro01 0:602ff2b2d41c 594
rengro01 0:602ff2b2d41c 595
rengro01 0:602ff2b2d41c 596 for (i = 0; i < 32; i++) {
rengro01 0:602ff2b2d41c 597
rengro01 0:602ff2b2d41c 598 hcca->IntTable[i] = 0;
rengro01 0:602ff2b2d41c 599 hcca->FrameNumber = 0;
rengro01 0:602ff2b2d41c 600 hcca->DoneHead = 0;
rengro01 0:602ff2b2d41c 601 }
rengro01 0:602ff2b2d41c 602
rengro01 0:602ff2b2d41c 603 }
rengro01 0:602ff2b2d41c 604
rengro01 0:602ff2b2d41c 605 /*
rengro01 0:602ff2b2d41c 606 **************************************************************************************************************
rengro01 0:602ff2b2d41c 607 * WAIT FOR WDH INTERRUPT
rengro01 0:602ff2b2d41c 608 *
rengro01 0:602ff2b2d41c 609 * Description: This function is infinite loop which breaks when ever a WDH interrupt rises
rengro01 0:602ff2b2d41c 610 *
rengro01 0:602ff2b2d41c 611 * Arguments : None
rengro01 0:602ff2b2d41c 612 *
rengro01 0:602ff2b2d41c 613 * Returns : None
rengro01 0:602ff2b2d41c 614 *
rengro01 0:602ff2b2d41c 615 **************************************************************************************************************
rengro01 0:602ff2b2d41c 616 */
rengro01 0:602ff2b2d41c 617
rengro01 0:602ff2b2d41c 618 void Host_WDHWait (void)
rengro01 0:602ff2b2d41c 619 {
rengro01 0:602ff2b2d41c 620 while (!HOST_WdhIntr)
rengro01 0:602ff2b2d41c 621 __WFI();
rengro01 0:602ff2b2d41c 622
rengro01 0:602ff2b2d41c 623 HOST_WdhIntr = 0;
rengro01 0:602ff2b2d41c 624 }
rengro01 0:602ff2b2d41c 625
rengro01 0:602ff2b2d41c 626 /*
rengro01 0:602ff2b2d41c 627 **************************************************************************************************************
rengro01 0:602ff2b2d41c 628 * READ LE 32U
rengro01 0:602ff2b2d41c 629 *
rengro01 0:602ff2b2d41c 630 * Description: This function is used to read an unsigned integer from a character buffer in the platform
rengro01 0:602ff2b2d41c 631 * containing little endian processor
rengro01 0:602ff2b2d41c 632 *
rengro01 0:602ff2b2d41c 633 * Arguments : pmem Pointer to the character buffer
rengro01 0:602ff2b2d41c 634 *
rengro01 0:602ff2b2d41c 635 * Returns : val Unsigned integer
rengro01 0:602ff2b2d41c 636 *
rengro01 0:602ff2b2d41c 637 **************************************************************************************************************
rengro01 0:602ff2b2d41c 638 */
rengro01 0:602ff2b2d41c 639
rengro01 0:602ff2b2d41c 640 USB_INT32U ReadLE32U (volatile USB_INT08U *pmem)
rengro01 0:602ff2b2d41c 641 {
rengro01 0:602ff2b2d41c 642 USB_INT32U val = *(USB_INT32U*)pmem;
rengro01 0:602ff2b2d41c 643 #ifdef __BIG_ENDIAN
rengro01 0:602ff2b2d41c 644 return __REV(val);
rengro01 0:602ff2b2d41c 645 #else
rengro01 0:602ff2b2d41c 646 return val;
rengro01 0:602ff2b2d41c 647 #endif
rengro01 0:602ff2b2d41c 648 }
rengro01 0:602ff2b2d41c 649
rengro01 0:602ff2b2d41c 650 /*
rengro01 0:602ff2b2d41c 651 **************************************************************************************************************
rengro01 0:602ff2b2d41c 652 * WRITE LE 32U
rengro01 0:602ff2b2d41c 653 *
rengro01 0:602ff2b2d41c 654 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
rengro01 0:602ff2b2d41c 655 * containing little endian processor.
rengro01 0:602ff2b2d41c 656 *
rengro01 0:602ff2b2d41c 657 * Arguments : pmem Pointer to the charecter buffer
rengro01 0:602ff2b2d41c 658 * val Integer value to be placed in the charecter buffer
rengro01 0:602ff2b2d41c 659 *
rengro01 0:602ff2b2d41c 660 * Returns : None
rengro01 0:602ff2b2d41c 661 *
rengro01 0:602ff2b2d41c 662 **************************************************************************************************************
rengro01 0:602ff2b2d41c 663 */
rengro01 0:602ff2b2d41c 664
rengro01 0:602ff2b2d41c 665 void WriteLE32U (volatile USB_INT08U *pmem,
rengro01 0:602ff2b2d41c 666 USB_INT32U val)
rengro01 0:602ff2b2d41c 667 {
rengro01 0:602ff2b2d41c 668 #ifdef __BIG_ENDIAN
rengro01 0:602ff2b2d41c 669 *(USB_INT32U*)pmem = __REV(val);
rengro01 0:602ff2b2d41c 670 #else
rengro01 0:602ff2b2d41c 671 *(USB_INT32U*)pmem = val;
rengro01 0:602ff2b2d41c 672 #endif
rengro01 0:602ff2b2d41c 673 }
rengro01 0:602ff2b2d41c 674
rengro01 0:602ff2b2d41c 675 /*
rengro01 0:602ff2b2d41c 676 **************************************************************************************************************
rengro01 0:602ff2b2d41c 677 * READ LE 16U
rengro01 0:602ff2b2d41c 678 *
rengro01 0:602ff2b2d41c 679 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
rengro01 0:602ff2b2d41c 680 * containing little endian processor
rengro01 0:602ff2b2d41c 681 *
rengro01 0:602ff2b2d41c 682 * Arguments : pmem Pointer to the charecter buffer
rengro01 0:602ff2b2d41c 683 *
rengro01 0:602ff2b2d41c 684 * Returns : val Unsigned short integer
rengro01 0:602ff2b2d41c 685 *
rengro01 0:602ff2b2d41c 686 **************************************************************************************************************
rengro01 0:602ff2b2d41c 687 */
rengro01 0:602ff2b2d41c 688
rengro01 0:602ff2b2d41c 689 USB_INT16U ReadLE16U (volatile USB_INT08U *pmem)
rengro01 0:602ff2b2d41c 690 {
rengro01 0:602ff2b2d41c 691 USB_INT16U val = *(USB_INT16U*)pmem;
rengro01 0:602ff2b2d41c 692 #ifdef __BIG_ENDIAN
rengro01 0:602ff2b2d41c 693 return __REV16(val);
rengro01 0:602ff2b2d41c 694 #else
rengro01 0:602ff2b2d41c 695 return val;
rengro01 0:602ff2b2d41c 696 #endif
rengro01 0:602ff2b2d41c 697 }
rengro01 0:602ff2b2d41c 698
rengro01 0:602ff2b2d41c 699 /*
rengro01 0:602ff2b2d41c 700 **************************************************************************************************************
rengro01 0:602ff2b2d41c 701 * WRITE LE 16U
rengro01 0:602ff2b2d41c 702 *
rengro01 0:602ff2b2d41c 703 * Description: This function is used to write an unsigned short integer into a charecter buffer in the
rengro01 0:602ff2b2d41c 704 * platform containing little endian processor
rengro01 0:602ff2b2d41c 705 *
rengro01 0:602ff2b2d41c 706 * Arguments : pmem Pointer to the charecter buffer
rengro01 0:602ff2b2d41c 707 * val Value to be placed in the charecter buffer
rengro01 0:602ff2b2d41c 708 *
rengro01 0:602ff2b2d41c 709 * Returns : None
rengro01 0:602ff2b2d41c 710 *
rengro01 0:602ff2b2d41c 711 **************************************************************************************************************
rengro01 0:602ff2b2d41c 712 */
rengro01 0:602ff2b2d41c 713
rengro01 0:602ff2b2d41c 714 void WriteLE16U (volatile USB_INT08U *pmem,
rengro01 0:602ff2b2d41c 715 USB_INT16U val)
rengro01 0:602ff2b2d41c 716 {
rengro01 0:602ff2b2d41c 717 #ifdef __BIG_ENDIAN
rengro01 0:602ff2b2d41c 718 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
rengro01 0:602ff2b2d41c 719 #else
rengro01 0:602ff2b2d41c 720 *(USB_INT16U*)pmem = val;
rengro01 0:602ff2b2d41c 721 #endif
rengro01 0:602ff2b2d41c 722 }
rengro01 0:602ff2b2d41c 723
rengro01 0:602ff2b2d41c 724 /*
rengro01 0:602ff2b2d41c 725 **************************************************************************************************************
rengro01 0:602ff2b2d41c 726 * READ BE 32U
rengro01 0:602ff2b2d41c 727 *
rengro01 0:602ff2b2d41c 728 * Description: This function is used to read an unsigned integer from a charecter buffer in the platform
rengro01 0:602ff2b2d41c 729 * containing big endian processor
rengro01 0:602ff2b2d41c 730 *
rengro01 0:602ff2b2d41c 731 * Arguments : pmem Pointer to the charecter buffer
rengro01 0:602ff2b2d41c 732 *
rengro01 0:602ff2b2d41c 733 * Returns : val Unsigned integer
rengro01 0:602ff2b2d41c 734 *
rengro01 0:602ff2b2d41c 735 **************************************************************************************************************
rengro01 0:602ff2b2d41c 736 */
rengro01 0:602ff2b2d41c 737
rengro01 0:602ff2b2d41c 738 USB_INT32U ReadBE32U (volatile USB_INT08U *pmem)
rengro01 0:602ff2b2d41c 739 {
rengro01 0:602ff2b2d41c 740 USB_INT32U val = *(USB_INT32U*)pmem;
rengro01 0:602ff2b2d41c 741 #ifdef __BIG_ENDIAN
rengro01 0:602ff2b2d41c 742 return val;
rengro01 0:602ff2b2d41c 743 #else
rengro01 0:602ff2b2d41c 744 return __REV(val);
rengro01 0:602ff2b2d41c 745 #endif
rengro01 0:602ff2b2d41c 746 }
rengro01 0:602ff2b2d41c 747
rengro01 0:602ff2b2d41c 748 /*
rengro01 0:602ff2b2d41c 749 **************************************************************************************************************
rengro01 0:602ff2b2d41c 750 * WRITE BE 32U
rengro01 0:602ff2b2d41c 751 *
rengro01 0:602ff2b2d41c 752 * Description: This function is used to write an unsigned integer into a charecter buffer in the platform
rengro01 0:602ff2b2d41c 753 * containing big endian processor
rengro01 0:602ff2b2d41c 754 *
rengro01 0:602ff2b2d41c 755 * Arguments : pmem Pointer to the charecter buffer
rengro01 0:602ff2b2d41c 756 * val Value to be placed in the charecter buffer
rengro01 0:602ff2b2d41c 757 *
rengro01 0:602ff2b2d41c 758 * Returns : None
rengro01 0:602ff2b2d41c 759 *
rengro01 0:602ff2b2d41c 760 **************************************************************************************************************
rengro01 0:602ff2b2d41c 761 */
rengro01 0:602ff2b2d41c 762
rengro01 0:602ff2b2d41c 763 void WriteBE32U (volatile USB_INT08U *pmem,
rengro01 0:602ff2b2d41c 764 USB_INT32U val)
rengro01 0:602ff2b2d41c 765 {
rengro01 0:602ff2b2d41c 766 #ifdef __BIG_ENDIAN
rengro01 0:602ff2b2d41c 767 *(USB_INT32U*)pmem = val;
rengro01 0:602ff2b2d41c 768 #else
rengro01 0:602ff2b2d41c 769 *(USB_INT32U*)pmem = __REV(val);
rengro01 0:602ff2b2d41c 770 #endif
rengro01 0:602ff2b2d41c 771 }
rengro01 0:602ff2b2d41c 772
rengro01 0:602ff2b2d41c 773 /*
rengro01 0:602ff2b2d41c 774 **************************************************************************************************************
rengro01 0:602ff2b2d41c 775 * READ BE 16U
rengro01 0:602ff2b2d41c 776 *
rengro01 0:602ff2b2d41c 777 * Description: This function is used to read an unsigned short integer from a charecter buffer in the platform
rengro01 0:602ff2b2d41c 778 * containing big endian processor
rengro01 0:602ff2b2d41c 779 *
rengro01 0:602ff2b2d41c 780 * Arguments : pmem Pointer to the charecter buffer
rengro01 0:602ff2b2d41c 781 *
rengro01 0:602ff2b2d41c 782 * Returns : val Unsigned short integer
rengro01 0:602ff2b2d41c 783 *
rengro01 0:602ff2b2d41c 784 **************************************************************************************************************
rengro01 0:602ff2b2d41c 785 */
rengro01 0:602ff2b2d41c 786
rengro01 0:602ff2b2d41c 787 USB_INT16U ReadBE16U (volatile USB_INT08U *pmem)
rengro01 0:602ff2b2d41c 788 {
rengro01 0:602ff2b2d41c 789 USB_INT16U val = *(USB_INT16U*)pmem;
rengro01 0:602ff2b2d41c 790 #ifdef __BIG_ENDIAN
rengro01 0:602ff2b2d41c 791 return val;
rengro01 0:602ff2b2d41c 792 #else
rengro01 0:602ff2b2d41c 793 return __REV16(val);
rengro01 0:602ff2b2d41c 794 #endif
rengro01 0:602ff2b2d41c 795 }
rengro01 0:602ff2b2d41c 796
rengro01 0:602ff2b2d41c 797 /*
rengro01 0:602ff2b2d41c 798 **************************************************************************************************************
rengro01 0:602ff2b2d41c 799 * WRITE BE 16U
rengro01 0:602ff2b2d41c 800 *
rengro01 0:602ff2b2d41c 801 * Description: This function is used to write an unsigned short integer into the charecter buffer in the
rengro01 0:602ff2b2d41c 802 * platform containing big endian processor
rengro01 0:602ff2b2d41c 803 *
rengro01 0:602ff2b2d41c 804 * Arguments : pmem Pointer to the charecter buffer
rengro01 0:602ff2b2d41c 805 * val Value to be placed in the charecter buffer
rengro01 0:602ff2b2d41c 806 *
rengro01 0:602ff2b2d41c 807 * Returns : None
rengro01 0:602ff2b2d41c 808 *
rengro01 0:602ff2b2d41c 809 **************************************************************************************************************
rengro01 0:602ff2b2d41c 810 */
rengro01 0:602ff2b2d41c 811
rengro01 0:602ff2b2d41c 812 void WriteBE16U (volatile USB_INT08U *pmem,
rengro01 0:602ff2b2d41c 813 USB_INT16U val)
rengro01 0:602ff2b2d41c 814 {
rengro01 0:602ff2b2d41c 815 #ifdef __BIG_ENDIAN
rengro01 0:602ff2b2d41c 816 *(USB_INT16U*)pmem = val;
rengro01 0:602ff2b2d41c 817 #else
rengro01 0:602ff2b2d41c 818 *(USB_INT16U*)pmem = (__REV16(val) & 0xFFFF);
rengro01 0:602ff2b2d41c 819 #endif
rengro01 0:602ff2b2d41c 820 }