Quentin Roche / USBDEVICE

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Fork of USBDEVICE by ST

USBDevice/USBHAL_LPC11U.cpp@5:3329e56e51d7, 2017-09-03 (annotated)

Committer:
qroche
Date:
Sun Sep 03 23:19:21 2017 +0000
Branch:
master
Revision:
5:3329e56e51d7
Parent:
1:2a3ae13b45ef 
fin;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 2 *
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 4 * and associated documentation files (the "Software"), to deal in the Software without
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 7 * Software is furnished to do so, subject to the following conditions:
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 8 *
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 9 * The above copyright notice and this permission notice shall be included in all copies or
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 10 * substantial portions of the Software.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 11 *
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 17 */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 18
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 19 #if defined(TARGET_LPC11UXX) || defined(TARGET_LPC11U6X) || defined(TARGET_LPC1347) || defined(TARGET_LPC1549)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 20
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 21 #if defined(TARGET_LPC1347) || defined(TARGET_LPC1549)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 22 #define USB_IRQ USB_IRQ_IRQn
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 23 #else
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 24 #define USB_IRQ USB_IRQn
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 25 #endif
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 26
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 27 #include "USBHAL.h"
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 28
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 29 USBHAL * USBHAL::instance;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 30 #if defined(TARGET_LPC1549)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 31 static uint8_t usbmem[2048] __attribute__((aligned(2048)));
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 32 #endif
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 33
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 34 // Valid physical endpoint numbers are 0 to (NUMBER_OF_PHYSICAL_ENDPOINTS-1)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 35 #define LAST_PHYSICAL_ENDPOINT (NUMBER_OF_PHYSICAL_ENDPOINTS-1)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 36
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 37 // Convert physical endpoint number to register bit
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 38 #define EP(endpoint) (1UL<<endpoint)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 39
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 40 // Convert physical to logical
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 41 #define PHY_TO_LOG(endpoint) ((endpoint)>>1)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 42
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 43 // Get endpoint direction
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 44 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 45 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 46
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 47 // USB RAM
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 48 #if defined(TARGET_LPC1549)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 49 #define USB_RAM_START ((uint32_t)usbmem)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 50 #define USB_RAM_SIZE sizeof(usbmem)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 51 #else
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 52 #define USB_RAM_START (0x20004000)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 53 #define USB_RAM_SIZE (0x00000800)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 54 #endif
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 55
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 56 // SYSAHBCLKCTRL
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 57 #if defined(TARGET_LPC1549)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 58 #define CLK_USB (1UL<<23)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 59 #else
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 60 #define CLK_USB (1UL<<14)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 61 #define CLK_USBRAM (1UL<<27)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 62 #endif
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 63
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 64 // USB Information register
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 65 #define FRAME_NR(a) ((a) & 0x7ff) // Frame number
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 66
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 67 // USB Device Command/Status register
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 68 #define DEV_ADDR_MASK (0x7f) // Device address
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 69 #define DEV_ADDR(a) ((a) & DEV_ADDR_MASK)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 70 #define DEV_EN (1UL<<7) // Device enable
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 71 #define SETUP (1UL<<8) // SETUP token received
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 72 #define PLL_ON (1UL<<9) // PLL enabled in suspend
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 73 #define DCON (1UL<<16) // Device status - connect
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 74 #define DSUS (1UL<<17) // Device status - suspend
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 75 #define DCON_C (1UL<<24) // Connect change
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 76 #define DSUS_C (1UL<<25) // Suspend change
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 77 #define DRES_C (1UL<<26) // Reset change
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 78 #define VBUSDEBOUNCED (1UL<<28) // Vbus detected
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 79
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 80 // Endpoint Command/Status list
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 81 #define CMDSTS_A (1UL<<31) // Active
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 82 #define CMDSTS_D (1UL<<30) // Disable
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 83 #define CMDSTS_S (1UL<<29) // Stall
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 84 #define CMDSTS_TR (1UL<<28) // Toggle Reset
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 85 #define CMDSTS_RF (1UL<<27) // Rate Feedback mode
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 86 #define CMDSTS_TV (1UL<<27) // Toggle Value
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 87 #define CMDSTS_T (1UL<<26) // Endpoint Type
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 88 #define CMDSTS_NBYTES(n) (((n)&0x3ff)<<16) // Number of bytes
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 89 #define CMDSTS_ADDRESS_OFFSET(a) (((a)>>6)&0xffff) // Buffer start address
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 90
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 91 #define BYTES_REMAINING(s) (((s)>>16)&0x3ff) // Bytes remaining after transfer
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 92
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 93 // USB Non-endpoint interrupt sources
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 94 #define FRAME_INT (1UL<<30)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 95 #define DEV_INT (1UL<<31)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 96
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 97 static volatile int epComplete = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 98
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 99 // One entry for a double-buffered logical endpoint in the endpoint
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 100 // command/status list. Endpoint 0 is single buffered, out[1] is used
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 101 // for the SETUP packet and in[1] is not used
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 102 typedef struct {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 103 uint32_t out[2];
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 104 uint32_t in[2];
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 105 } PACKED EP_COMMAND_STATUS;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 106
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 107 typedef struct {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 108 uint8_t out[MAX_PACKET_SIZE_EP0];
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 109 uint8_t in[MAX_PACKET_SIZE_EP0];
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 110 uint8_t setup[SETUP_PACKET_SIZE];
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 111 } PACKED CONTROL_TRANSFER;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 112
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 113 typedef struct {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 114 uint32_t maxPacket;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 115 uint32_t buffer[2];
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 116 uint32_t options;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 117 } PACKED EP_STATE;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 118
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 119 static volatile EP_STATE endpointState[NUMBER_OF_PHYSICAL_ENDPOINTS];
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 120
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 121 // Pointer to the endpoint command/status list
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 122 static EP_COMMAND_STATUS *ep = NULL;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 123
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 124 // Pointer to endpoint 0 data (IN/OUT and SETUP)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 125 static CONTROL_TRANSFER *ct = NULL;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 126
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 127 // Shadow DEVCMDSTAT register to avoid accidentally clearing flags or
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 128 // initiating a remote wakeup event.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 129 static volatile uint32_t devCmdStat;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 130
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 131 // Pointers used to allocate USB RAM
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 132 static uint32_t usbRamPtr = USB_RAM_START;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 133 static uint32_t epRamPtr = 0; // Buffers for endpoints > 0 start here
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 134
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 135 #define ROUND_UP_TO_MULTIPLE(x, m) ((((x)+((m)-1))/(m))*(m))
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 136
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 137 void USBMemCopy(uint8_t *dst, uint8_t *src, uint32_t size);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 138 void USBMemCopy(uint8_t *dst, uint8_t *src, uint32_t size) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 139 if (size > 0) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 140 do {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 141 *dst++ = *src++;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 142 } while (--size > 0);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 143 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 144 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 145
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 146
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 147 USBHAL::USBHAL(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 148 NVIC_DisableIRQ(USB_IRQ);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 149
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 150 // fill in callback array
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 151 epCallback[0] = &USBHAL::EP1_OUT_callback;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 152 epCallback[1] = &USBHAL::EP1_IN_callback;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 153 epCallback[2] = &USBHAL::EP2_OUT_callback;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 154 epCallback[3] = &USBHAL::EP2_IN_callback;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 155 epCallback[4] = &USBHAL::EP3_OUT_callback;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 156 epCallback[5] = &USBHAL::EP3_IN_callback;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 157 epCallback[6] = &USBHAL::EP4_OUT_callback;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 158 epCallback[7] = &USBHAL::EP4_IN_callback;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 159
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 160 #if defined(TARGET_LPC1549)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 161 /* Set USB PLL input to system oscillator */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 162 LPC_SYSCON->USBPLLCLKSEL = 0x01;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 163
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 164 /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 165 MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 166 FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 167 FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 168 LPC_SYSCON->USBPLLCTRL = (0x3 | (1UL << 6));
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 169
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 170 /* Powerup USB PLL */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 171 LPC_SYSCON->PDRUNCFG &= ~(CLK_USB);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 172
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 173 /* Wait for PLL to lock */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 174 while(!(LPC_SYSCON->USBPLLSTAT & 0x01));
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 175
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 176 /* enable USB main clock */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 177 LPC_SYSCON->USBCLKSEL = 0x02;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 178 LPC_SYSCON->USBCLKDIV = 1;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 179
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 180 /* Enable AHB clock to the USB block. */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 181 LPC_SYSCON->SYSAHBCLKCTRL1 |= CLK_USB;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 182
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 183 /* power UP USB Phy */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 184 LPC_SYSCON->PDRUNCFG &= ~(1UL << 9);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 185
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 186 /* Reset USB block */
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 187 LPC_SYSCON->PRESETCTRL1 |= (CLK_USB);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 188 LPC_SYSCON->PRESETCTRL1 &= ~(CLK_USB);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 189
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 190 #else
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 191 #if defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 192 // USB_VBUS input with pull-down
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 193 LPC_IOCON->PIO0_3 = 0x00000009;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 194 #endif
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 195
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 196 // nUSB_CONNECT output
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 197 LPC_IOCON->PIO0_6 = 0x00000001;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 198
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 199 // Enable clocks (USB registers, USB RAM)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 200 LPC_SYSCON->SYSAHBCLKCTRL |= CLK_USB | CLK_USBRAM;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 201
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 202 // Ensure device disconnected (DCON not set)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 203 LPC_USB->DEVCMDSTAT = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 204 #endif
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 205 // to ensure that the USB host sees the device as
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 206 // disconnected if the target CPU is reset.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 207 wait(0.3);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 208
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 209 // Reserve space in USB RAM for endpoint command/status list
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 210 // Must be 256 byte aligned
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 211 usbRamPtr = ROUND_UP_TO_MULTIPLE(usbRamPtr, 256);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 212 ep = (EP_COMMAND_STATUS *)usbRamPtr;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 213 usbRamPtr += (sizeof(EP_COMMAND_STATUS) * NUMBER_OF_LOGICAL_ENDPOINTS);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 214 LPC_USB->EPLISTSTART = (uint32_t)(ep) & 0xffffff00;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 215
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 216 // Reserve space in USB RAM for Endpoint 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 217 // Must be 64 byte aligned
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 218 usbRamPtr = ROUND_UP_TO_MULTIPLE(usbRamPtr, 64);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 219 ct = (CONTROL_TRANSFER *)usbRamPtr;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 220 usbRamPtr += sizeof(CONTROL_TRANSFER);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 221 LPC_USB->DATABUFSTART =(uint32_t)(ct) & 0xffc00000;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 222
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 223 // Setup command/status list for EP0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 224 ep[0].out[0] = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 225 ep[0].in[0] = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 226 ep[0].out[1] = CMDSTS_ADDRESS_OFFSET((uint32_t)ct->setup);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 227
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 228 // Route all interrupts to IRQ, some can be routed to
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 229 // USB_FIQ if you wish.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 230 LPC_USB->INTROUTING = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 231
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 232 // Set device address 0, enable USB device, no remote wakeup
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 233 devCmdStat = DEV_ADDR(0) | DEV_EN | DSUS;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 234 LPC_USB->DEVCMDSTAT = devCmdStat;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 235
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 236 // Enable interrupts for device events and EP0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 237 LPC_USB->INTEN = DEV_INT | EP(EP0IN) | EP(EP0OUT) | FRAME_INT;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 238 instance = this;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 239
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 240 //attach IRQ handler and enable interrupts
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 241 NVIC_SetVector(USB_IRQ, (uint32_t)&_usbisr);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 242 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 243
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 244 USBHAL::~USBHAL(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 245 // Ensure device disconnected (DCON not set)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 246 LPC_USB->DEVCMDSTAT = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 247 // Disable USB interrupts
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 248 NVIC_DisableIRQ(USB_IRQ);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 249 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 250
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 251 void USBHAL::connect(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 252 NVIC_EnableIRQ(USB_IRQ);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 253 devCmdStat |= DCON;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 254 LPC_USB->DEVCMDSTAT = devCmdStat;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 255 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 256
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 257 void USBHAL::disconnect(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 258 NVIC_DisableIRQ(USB_IRQ);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 259 devCmdStat &= ~DCON;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 260 LPC_USB->DEVCMDSTAT = devCmdStat;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 261 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 262
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 263 void USBHAL::configureDevice(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 264 // Not required
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 265 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 266
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 267 void USBHAL::unconfigureDevice(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 268 // Not required
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 269 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 270
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 271 void USBHAL::EP0setup(uint8_t *buffer) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 272 // Copy setup packet data
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 273 USBMemCopy(buffer, ct->setup, SETUP_PACKET_SIZE);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 274 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 275
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 276 void USBHAL::EP0read(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 277 // Start an endpoint 0 read
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 278
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 279 // The USB ISR will call USBDevice_EP0out() when a packet has been read,
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 280 // the USBDevice layer then calls USBBusInterface_EP0getReadResult() to
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 281 // read the data.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 282
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 283 ep[0].out[0] = CMDSTS_A |CMDSTS_NBYTES(MAX_PACKET_SIZE_EP0) \
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 284 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->out);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 285 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 286
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 287 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 288 // Complete an endpoint 0 read
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 289 uint32_t bytesRead;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 290
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 291 // Find how many bytes were read
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 292 bytesRead = MAX_PACKET_SIZE_EP0 - BYTES_REMAINING(ep[0].out[0]);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 293
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 294 // Copy data
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 295 USBMemCopy(buffer, ct->out, bytesRead);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 296 return bytesRead;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 297 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 298
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 299
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 300 void USBHAL::EP0readStage(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 301 // Not required
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 302 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 303
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 304 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 305 // Start and endpoint 0 write
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 306
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 307 // The USB ISR will call USBDevice_EP0in() when the data has
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 308 // been written, the USBDevice layer then calls
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 309 // USBBusInterface_EP0getWriteResult() to complete the transaction.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 310
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 311 // Copy data
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 312 USBMemCopy(ct->in, buffer, size);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 313
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 314 // Start transfer
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 315 ep[0].in[0] = CMDSTS_A | CMDSTS_NBYTES(size) \
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 316 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->in);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 317 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 318
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 319
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 320 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 321 uint8_t bf = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 322 uint32_t flags = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 323
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 324 //check which buffer must be filled
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 325 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 326 // Double buffered
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 327 if (LPC_USB->EPINUSE & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 328 bf = 1;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 329 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 330 bf = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 331 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 332 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 333
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 334 // if isochronous endpoint, T = 1
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 335 if(endpointState[endpoint].options & ISOCHRONOUS)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 336 {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 337 flags |= CMDSTS_T;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 338 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 339
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 340 //Active the endpoint for reading
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 341 ep[PHY_TO_LOG(endpoint)].out[bf] = CMDSTS_A | CMDSTS_NBYTES(maximumSize) \
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 342 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->out) | flags;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 343 return EP_PENDING;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 344 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 345
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 346 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *data, uint32_t *bytesRead) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 347
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 348 uint8_t bf = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 349
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 350 if (!(epComplete & EP(endpoint)))
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 351 return EP_PENDING;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 352 else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 353 epComplete &= ~EP(endpoint);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 354
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 355 //check which buffer has been filled
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 356 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 357 // Double buffered (here we read the previous buffer which was used)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 358 if (LPC_USB->EPINUSE & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 359 bf = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 360 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 361 bf = 1;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 362 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 363 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 364
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 365 // Find how many bytes were read
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 366 *bytesRead = (uint32_t) (endpointState[endpoint].maxPacket - BYTES_REMAINING(ep[PHY_TO_LOG(endpoint)].out[bf]));
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 367
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 368 // Copy data
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 369 USBMemCopy(data, ct->out, *bytesRead);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 370 return EP_COMPLETED;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 371 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 372 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 373
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 374 void USBHAL::EP0getWriteResult(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 375 // Not required
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 376 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 377
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 378 void USBHAL::EP0stall(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 379 ep[0].in[0] = CMDSTS_S;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 380 ep[0].out[0] = CMDSTS_S;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 381 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 382
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 383 void USBHAL::setAddress(uint8_t address) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 384 devCmdStat &= ~DEV_ADDR_MASK;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 385 devCmdStat |= DEV_ADDR(address);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 386 LPC_USB->DEVCMDSTAT = devCmdStat;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 387 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 388
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 389 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 390 uint32_t flags = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 391 uint32_t bf;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 392
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 393 // Validate parameters
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 394 if (data == NULL) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 395 return EP_INVALID;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 396 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 397
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 398 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 399 return EP_INVALID;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 400 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 401
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 402 if ((endpoint==EP0IN) || (endpoint==EP0OUT)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 403 return EP_INVALID;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 404 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 405
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 406 if (size > endpointState[endpoint].maxPacket) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 407 return EP_INVALID;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 408 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 409
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 410 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 411 // Double buffered
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 412 if (LPC_USB->EPINUSE & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 413 bf = 1;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 414 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 415 bf = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 416 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 417 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 418 // Single buffered
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 419 bf = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 420 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 421
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 422 // Check if already active
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 423 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_A) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 424 return EP_INVALID;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 425 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 426
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 427 // Check if stalled
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 428 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_S) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 429 return EP_STALLED;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 430 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 431
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 432 // Copy data to USB RAM
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 433 USBMemCopy((uint8_t *)endpointState[endpoint].buffer[bf], data, size);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 434
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 435 // Add options
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 436 if (endpointState[endpoint].options & RATE_FEEDBACK_MODE) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 437 flags |= CMDSTS_RF;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 438 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 439
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 440 if (endpointState[endpoint].options & ISOCHRONOUS) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 441 flags |= CMDSTS_T;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 442 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 443
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 444 // Add transfer
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 445 ep[PHY_TO_LOG(endpoint)].in[bf] = CMDSTS_ADDRESS_OFFSET( \
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 446 endpointState[endpoint].buffer[bf]) \
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 447 | CMDSTS_NBYTES(size) | CMDSTS_A | flags;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 448
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 449 return EP_PENDING;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 450 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 451
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 452 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 453 uint32_t bf;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 454
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 455 // Validate parameters
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 456 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 457 return EP_INVALID;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 458 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 459
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 460 if (OUT_EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 461 return EP_INVALID;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 462 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 463
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 464 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 465 // Double buffered // TODO: FIX THIS
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 466 if (LPC_USB->EPINUSE & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 467 bf = 1;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 468 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 469 bf = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 470 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 471 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 472 // Single buffered
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 473 bf = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 474 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 475
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 476 // Check if endpoint still active
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 477 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_A) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 478 return EP_PENDING;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 479 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 480
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 481 // Check if stalled
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 482 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_S) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 483 return EP_STALLED;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 484 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 485
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 486 return EP_COMPLETED;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 487 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 488
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 489 void USBHAL::stallEndpoint(uint8_t endpoint) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 490
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 491 // FIX: should this clear active bit?
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 492 if (IN_EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 493 ep[PHY_TO_LOG(endpoint)].in[0] |= CMDSTS_S;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 494 ep[PHY_TO_LOG(endpoint)].in[1] |= CMDSTS_S;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 495 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 496 ep[PHY_TO_LOG(endpoint)].out[0] |= CMDSTS_S;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 497 ep[PHY_TO_LOG(endpoint)].out[1] |= CMDSTS_S;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 498 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 499 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 500
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 501 void USBHAL::unstallEndpoint(uint8_t endpoint) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 502 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 503 // Double buffered
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 504 if (IN_EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 505 ep[PHY_TO_LOG(endpoint)].in[0] = 0; // S = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 506 ep[PHY_TO_LOG(endpoint)].in[1] = 0; // S = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 507
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 508 if (LPC_USB->EPINUSE & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 509 ep[PHY_TO_LOG(endpoint)].in[1] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 510 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 511 ep[PHY_TO_LOG(endpoint)].in[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 512 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 513 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 514 ep[PHY_TO_LOG(endpoint)].out[0] = 0; // S = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 515 ep[PHY_TO_LOG(endpoint)].out[1] = 0; // S = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 516
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 517 if (LPC_USB->EPINUSE & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 518 ep[PHY_TO_LOG(endpoint)].out[1] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 519 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 520 ep[PHY_TO_LOG(endpoint)].out[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 521 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 522 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 523 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 524 // Single buffered
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 525 if (IN_EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 526 ep[PHY_TO_LOG(endpoint)].in[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 527 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 528 ep[PHY_TO_LOG(endpoint)].out[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 529 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 530 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 531 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 532
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 533 bool USBHAL::getEndpointStallState(unsigned char endpoint) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 534 if (IN_EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 535 if (LPC_USB->EPINUSE & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 536 if (ep[PHY_TO_LOG(endpoint)].in[1] & CMDSTS_S) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 537 return true;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 538 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 539 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 540 if (ep[PHY_TO_LOG(endpoint)].in[0] & CMDSTS_S) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 541 return true;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 542 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 543 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 544 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 545 if (LPC_USB->EPINUSE & EP(endpoint)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 546 if (ep[PHY_TO_LOG(endpoint)].out[1] & CMDSTS_S) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 547 return true;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 548 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 549 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 550 if (ep[PHY_TO_LOG(endpoint)].out[0] & CMDSTS_S) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 551 return true;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 552 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 553 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 554 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 555
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 556 return false;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 557 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 558
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 559 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 560 uint32_t tmpEpRamPtr;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 561
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 562 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 563 return false;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 564 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 565
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 566 // Not applicable to the control endpoints
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 567 if ((endpoint==EP0IN) || (endpoint==EP0OUT)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 568 return false;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 569 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 570
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 571 // Allocate buffers in USB RAM
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 572 tmpEpRamPtr = epRamPtr;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 573
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 574 // Must be 64 byte aligned
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 575 tmpEpRamPtr = ROUND_UP_TO_MULTIPLE(tmpEpRamPtr, 64);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 576
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 577 if ((tmpEpRamPtr + maxPacket) > (USB_RAM_START + USB_RAM_SIZE)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 578 // Out of memory
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 579 return false;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 580 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 581
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 582 // Allocate first buffer
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 583 endpointState[endpoint].buffer[0] = tmpEpRamPtr;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 584 tmpEpRamPtr += maxPacket;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 585
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 586 if (!(options & SINGLE_BUFFERED)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 587 // Must be 64 byte aligned
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 588 tmpEpRamPtr = ROUND_UP_TO_MULTIPLE(tmpEpRamPtr, 64);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 589
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 590 if ((tmpEpRamPtr + maxPacket) > (USB_RAM_START + USB_RAM_SIZE)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 591 // Out of memory
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 592 return false;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 593 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 594
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 595 // Allocate second buffer
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 596 endpointState[endpoint].buffer[1] = tmpEpRamPtr;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 597 tmpEpRamPtr += maxPacket;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 598 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 599
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 600 // Commit to this USB RAM allocation
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 601 epRamPtr = tmpEpRamPtr;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 602
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 603 // Remaining endpoint state values
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 604 endpointState[endpoint].maxPacket = maxPacket;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 605 endpointState[endpoint].options = options;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 606
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 607 // Enable double buffering if required
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 608 if (options & SINGLE_BUFFERED) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 609 LPC_USB->EPBUFCFG &= ~EP(endpoint);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 610 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 611 // Double buffered
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 612 LPC_USB->EPBUFCFG |= EP(endpoint);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 613 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 614
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 615 // Enable interrupt
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 616 LPC_USB->INTEN |= EP(endpoint);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 617
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 618 // Enable endpoint
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 619 unstallEndpoint(endpoint);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 620 return true;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 621 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 622
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 623 void USBHAL::remoteWakeup(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 624 // Clearing DSUS bit initiates a remote wakeup if the
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 625 // device is currently enabled and suspended - otherwise
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 626 // it has no effect.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 627 LPC_USB->DEVCMDSTAT = devCmdStat & ~DSUS;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 628 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 629
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 630
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 631 static void disableEndpoints(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 632 uint32_t logEp;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 633
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 634 // Ref. Table 158 "When a bus reset is received, software
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 635 // must set the disable bit of all endpoints to 1".
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 636
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 637 for (logEp = 1; logEp < NUMBER_OF_LOGICAL_ENDPOINTS; logEp++) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 638 ep[logEp].out[0] = CMDSTS_D;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 639 ep[logEp].out[1] = CMDSTS_D;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 640 ep[logEp].in[0] = CMDSTS_D;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 641 ep[logEp].in[1] = CMDSTS_D;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 642 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 643
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 644 // Start of USB RAM for endpoints > 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 645 epRamPtr = usbRamPtr;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 646 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 647
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 648
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 649
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 650 void USBHAL::_usbisr(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 651 instance->usbisr();
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 652 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 653
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 654 void USBHAL::usbisr(void) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 655 // Start of frame
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 656 if (LPC_USB->INTSTAT & FRAME_INT) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 657 // Clear SOF interrupt
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 658 LPC_USB->INTSTAT = FRAME_INT;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 659
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 660 // SOF event, read frame number
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 661 SOF(FRAME_NR(LPC_USB->INFO));
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 662 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 663
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 664 // Device state
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 665 if (LPC_USB->INTSTAT & DEV_INT) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 666 LPC_USB->INTSTAT = DEV_INT;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 667
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 668 if (LPC_USB->DEVCMDSTAT & DSUS_C) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 669 // Suspend status changed
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 670 LPC_USB->DEVCMDSTAT = devCmdStat | DSUS_C;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 671 if (LPC_USB->DEVCMDSTAT & DSUS) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 672 suspendStateChanged(1);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 673 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 674 suspendStateChanged(0);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 675 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 676 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 677
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 678 if (LPC_USB->DEVCMDSTAT & DRES_C) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 679 // Bus reset
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 680 LPC_USB->DEVCMDSTAT = devCmdStat | DRES_C;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 681
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 682 // Disable endpoints > 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 683 disableEndpoints();
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 684
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 685 // Bus reset event
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 686 busReset();
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 687 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 688 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 689
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 690 // Endpoint 0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 691 if (LPC_USB->INTSTAT & EP(EP0OUT)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 692 // Clear EP0OUT/SETUP interrupt
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 693 LPC_USB->INTSTAT = EP(EP0OUT);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 694
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 695 // Check if SETUP
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 696 if (LPC_USB->DEVCMDSTAT & SETUP) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 697 // Clear Active and Stall bits for EP0
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 698 // Documentation does not make it clear if we must use the
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 699 // EPSKIP register to achieve this, Fig. 16 and NXP reference
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 700 // code suggests we can just clear the Active bits - check with
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 701 // NXP to be sure.
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 702 ep[0].in[0] = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 703 ep[0].out[0] = 0;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 704
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 705 // Clear EP0IN interrupt
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 706 LPC_USB->INTSTAT = EP(EP0IN);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 707
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 708 // Clear SETUP (and INTONNAK_CI/O) in device status register
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 709 LPC_USB->DEVCMDSTAT = devCmdStat | SETUP;
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 710
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 711 // EP0 SETUP event (SETUP data received)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 712 EP0setupCallback();
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 713 } else {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 714 // EP0OUT ACK event (OUT data received)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 715 EP0out();
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 716 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 717 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 718
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 719 if (LPC_USB->INTSTAT & EP(EP0IN)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 720 // Clear EP0IN interrupt
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 721 LPC_USB->INTSTAT = EP(EP0IN);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 722
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 723 // EP0IN ACK event (IN data sent)
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 724 EP0in();
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 725 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 726
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 727 for (uint8_t num = 2; num < 5*2; num++) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 728 if (LPC_USB->INTSTAT & EP(num)) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 729 LPC_USB->INTSTAT = EP(num);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 730 epComplete |= EP(num);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 731 if ((instance->*(epCallback[num - 2]))()) {
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 732 epComplete &= ~EP(num);
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 733 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 734 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 735 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 736 }
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 737
frq08711@LMECWL0871.LME.ST.COM 1:2a3ae13b45ef 738 #endif