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Diff: RF24.cpp
- Revision:
- 11:5476ceebbb1f
- Parent:
- 3:e94be00fd19e
--- a/RF24.cpp Fri Mar 09 09:57:45 2018 +0000 +++ b/RF24.cpp Tue Jul 10 11:52:17 2018 +0000 @@ -251,7 +251,7 @@ payload_size(32), dynamic_payloads_enabled(false), addr_width(5), spi(mosi, miso, sck) { pipe0_reading_address[0]=0; - spi.frequency(10000000/5); // 2Mbit, 1/5th the maximum transfer rate for the spi bus + spi.frequency(1000000); // 2Mbit, 1/5th the maximum transfer rate for the spi bus spi.format(8,0); // 8-bit, ClockPhase = 0, ClockPolarity = 0 DigitalOut ce_pin(_cepin); /**< "Chip Enable" pin, activates the RX or TX role */