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Diff: RF24.cpp
- Revision:
- 2:3bdf0d9bb71f
- Parent:
- 1:00706a42491e
- Child:
- 3:e94be00fd19e
--- a/RF24.cpp Mon Jul 06 05:16:37 2015 +0000 +++ b/RF24.cpp Thu Nov 05 05:40:23 2015 +0000 @@ -6,47 +6,119 @@ version 2 as published by the Free Software Foundation. */ +#include "nRF24L01.h" +#include "RF24_config.h" #include "RF24.h" /****************************************************************************/ -void RF24::csn(int mode) +void RF24::csn(bool mode) { - // Minimum ideal spi bus speed is 2x data rate - // If we assume 2Mbs data rate and 16Mhz clock, a - // divider of 4 is the minimum we want. - // CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz -//#ifdef ARDUINO -// spi.setBitOrder(MSBFIRST); -// spi.setDataMode(spi_MODE0); -// spi.setClockDivider(spi_CLOCK_DIV4); -//#endif -// digitalWrite(csn_pin,mode); csn_pin = mode; + wait_us(5); + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + } /****************************************************************************/ -void RF24::ce(int level) +void RF24::ce(bool level) { - //digitalWrite(ce_pin,level); ce_pin = level; + } /****************************************************************************/ + inline void RF24::beginTransaction() { + csn_pin=LOW; + + + + } + +/****************************************************************************/ + + inline void RF24::endTransaction() { + csn_pin=HIGH; + + + + } + +/****************************************************************************/ + uint8_t RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len) { uint8_t status; - csn(LOW); + beginTransaction(); status = spi.write( R_REGISTER | ( REGISTER_MASK & reg ) ); while ( len-- ) *buf++ = spi.write(0xff); + endTransaction(); - csn(HIGH); - + + + + + + + + + + + + + + + + + + + + + + return status; } @@ -54,11 +126,29 @@ uint8_t RF24::read_register(uint8_t reg) { - csn(LOW); + uint8_t result; + + beginTransaction(); spi.write( R_REGISTER | ( REGISTER_MASK & reg ) ); - uint8_t result = spi.write(0xff); + result = spi.write(0xff); + endTransaction(); - csn(HIGH); + + + + + + + + + + + + + + + + return result; } @@ -68,13 +158,30 @@ { uint8_t status; - csn(LOW); + beginTransaction(); status = spi.write( W_REGISTER | ( REGISTER_MASK & reg ) ); while ( len-- ) spi.write(*buf++); + endTransaction(); - csn(HIGH); - + + + + + + + + + + + + + + + + + + return status; } @@ -84,60 +191,127 @@ { uint8_t status; -// IF_SERIAL_DEBUG(printf(("write_register(%02x,%02x)\r\n"),reg,value)); + IF_SERIAL_DEBUG(printf(PSTR("write_register(%02x,%02x)\r\n"),reg,value)); - csn(LOW); + + beginTransaction(); status = spi.write( W_REGISTER | ( REGISTER_MASK & reg ) ); spi.write(value); - csn(HIGH); + endTransaction(); + + + + + + + + + + + + + + + return status; +} + +/****************************************************************************/ +uint8_t RF24::write_payload(const void* buf, uint8_t len, const uint8_t writeType) +{ + uint8_t status; + const uint8_t* current = reinterpret_cast<const uint8_t*>(buf); + + uint8_t data_len = rf24_min(data_len, payload_size); + uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len; + + //printf("[Writing %u bytes %u blanks]",data_len,blank_len); + IF_SERIAL_DEBUG( printf("[Writing %u bytes %u blanks]\n",data_len,blank_len); ); + + beginTransaction(); + status = spi.write( W_TX_PAYLOAD ); + while ( data_len-- ) + spi.write(*current++); + while ( blank_len-- ) + spi.write(0); + + endTransaction(); + + + + + + + + + + + + + + + + + + + + + + + return status; } /****************************************************************************/ -uint8_t RF24::write_payload(const void* buf, uint8_t len) -{ - uint8_t status; - - const uint8_t* current = reinterpret_cast<const uint8_t*>(buf); - - uint8_t data_len = min(len,payload_size); - uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len; - - //printf("[Writing %u bytes %u blanks]",data_len,blank_len); - - csn(LOW); - status = spi.write( W_TX_PAYLOAD ); - while ( data_len-- ) - spi.write(*current++); - while ( blank_len-- ) - spi.write(0); - csn(HIGH); - - return status; -} - -/****************************************************************************/ - -uint8_t RF24::read_payload(void* buf, uint8_t len) +uint8_t RF24::read_payload(void* buf, uint8_t data_len) { uint8_t status; uint8_t* current = reinterpret_cast<uint8_t*>(buf); - uint8_t data_len = min(len,payload_size); + if(data_len > payload_size) data_len = payload_size; uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len; //printf("[Reading %u bytes %u blanks]",data_len,blank_len); - - csn(LOW); + + IF_SERIAL_DEBUG( printf("[Reading %u bytes %u blanks]\n",data_len,blank_len); ); + + beginTransaction(); status = spi.write( R_RX_PAYLOAD ); while ( data_len-- ) *current++ = spi.write(0xff); while ( blank_len-- ) spi.write(0xff); - csn(HIGH); + endTransaction(); + + + + + + + + + + + + + + + + + + + + + + + + + + + + return status; } @@ -145,25 +319,33 @@ uint8_t RF24::flush_rx(void) { - uint8_t status; - - csn(LOW); - status = spi.write( FLUSH_RX ); - csn(HIGH); - - return status; + return spiTrans( FLUSH_RX ); } /****************************************************************************/ uint8_t RF24::flush_tx(void) { + return spiTrans( FLUSH_TX ); +} + +/****************************************************************************/ + +uint8_t RF24::spiTrans(uint8_t cmd){ + uint8_t status; - csn(LOW); - status = spi.write( FLUSH_TX ); - csn(HIGH); + beginTransaction(); + status = spi.write( cmd ); + endTransaction(); + + + + + + + return status; } @@ -171,20 +353,14 @@ uint8_t RF24::get_status(void) { - uint8_t status; - - csn(LOW); - status = spi.write( NOP ); - csn(HIGH); - - return status; + return spiTrans(NOP); } /****************************************************************************/ - +#if !defined (MINIMAL) void RF24::print_status(uint8_t status) { - printf(("STATUS\t\t = 0x%02x RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\r\n"), + printf(("STATUS\t\t = 0x%02x RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\r\n"), status, (status & _BV(RX_DR))?1:0, (status & _BV(TX_DS))?1:0, @@ -200,8 +376,8 @@ { printf(("OBSERVE_TX=%02x: POLS_CNT=%x ARC_CNT=%x\r\n"), value, - (value >> PLOS_CNT) & 15, - (value >> ARC_CNT) & 15 + ((value >> PLOS_CNT) & 15), + ((value >> ARC_CNT) & 15) ); } @@ -209,63 +385,83 @@ void RF24::print_byte_register(const char* name, uint8_t reg, uint8_t qty) { -// char extra_tab = strlen(name) < 8 ? '\t' : 0; - printf("%s =",name); +printf("%s =",name); while (qty--) - printf((" 0x%02x"),read_register(reg++)); - printf(("\r\n")); + printf_P(PSTR(" 0x%02x"),read_register(reg++)); + printf_P(PSTR("\r\n")); + + + + + + } /****************************************************************************/ void RF24::print_address_register(const char* name, uint8_t reg, uint8_t qty) { -// char extra_tab = strlen_P(name) < 8 ? '\t' : 0; - printf("%s =",name); - + printf_P(PSTR(PRIPSTR"\t ="),name); + while (qty--) { - uint8_t buffer[5]; + uint8_t buffer[addr_width]; read_register(reg++,buffer,sizeof buffer); - printf((" 0x")); + printf_P(PSTR(" 0x")); uint8_t* bufptr = buffer + sizeof buffer; while( --bufptr >= buffer ) - printf(("%02x"),*bufptr); + printf_P(PSTR("%02x"),*bufptr); } - printf(("\r\n")); + printf_P(PSTR("\r\n")); + + + + +} +#endif +/****************************************************************************/ + +RF24::RF24(PinName mosi, PinName miso, PinName sck, PinName _cepin, PinName _csnpin): + ce_pin(_cepin), csn_pin(_csnpin), p_variant(false), + payload_size(32), dynamic_payloads_enabled(false), addr_width(5), spi(mosi, miso, sck) +{ + pipe0_reading_address[0]=0; + spi.frequency(10000000/5); // 2Mbit, 1/5th the maximum transfer rate for the spi bus + spi.format(8,0); // 8-bit, ClockPhase = 0, ClockPolarity = 0 + + DigitalOut ce_pin(_cepin); /**< "Chip Enable" pin, activates the RX or TX role */ + DigitalOut csn_pin(_csnpin); /**< SPI Chip select */ + + wait_ms(100); + } -/****************************************************************************/ + + -RF24::RF24(PinName mosi, PinName miso, PinName sck, PinName _csnpin, PinName _cepin): - ce_pin(_cepin), csn_pin(_csnpin), wide_band(true), p_variant(false), - payload_size(32), ack_payload_available(false), dynamic_payloads_enabled(false), - pipe0_reading_address(0), spi(mosi, miso, sck) -{ - spi.frequency(10000000/5); // 2Mbit, 1/5th the maximum transfer rate for the spi bus - spi.format(8,0); // 8-bit, ClockPhase = 0, ClockPolarity = 0 - wait_ms(100); -} + + + /****************************************************************************/ void RF24::setChannel(uint8_t channel) { - // TODO: This method could take advantage of the 'wide_band' calculation - // done in setChannel() to require certain channel spacing. - const uint8_t max_channel = 127; - write_register(RF_CH,min(channel,max_channel)); + write_register(RF_CH,rf24_min(channel,max_channel)); } +uint8_t RF24::getChannel() +{ + return read_register(RF_CH); +} /****************************************************************************/ void RF24::setPayloadSize(uint8_t size) { - const uint8_t max_payload_size = 32; - payload_size = min(size,max_payload_size); + payload_size = rf24_min(size,32); } /****************************************************************************/ @@ -277,100 +473,190 @@ /****************************************************************************/ -static const char rf24_datarate_e_str_0[] = "1MBPS"; -static const char rf24_datarate_e_str_1[] = "2MBPS"; -static const char rf24_datarate_e_str_2[] = "250KBPS"; -static const char * const rf24_datarate_e_str_P[] = { +#if !defined (MINIMAL) + +static const char rf24_datarate_e_str_0[] PROGMEM = "1MBPS"; +static const char rf24_datarate_e_str_1[] PROGMEM = "2MBPS"; +static const char rf24_datarate_e_str_2[] PROGMEM = "250KBPS"; +static const char * const rf24_datarate_e_str_P[] PROGMEM = { rf24_datarate_e_str_0, rf24_datarate_e_str_1, rf24_datarate_e_str_2, }; -static const char rf24_model_e_str_0[] = "nRF24L01"; -static const char rf24_model_e_str_1[] = "nRF24L01+"; -static const char * const rf24_model_e_str_P[] = { +static const char rf24_model_e_str_0[] PROGMEM = "nRF24L01"; +static const char rf24_model_e_str_1[] PROGMEM = "nRF24L01+"; +static const char * const rf24_model_e_str_P[] PROGMEM = { rf24_model_e_str_0, rf24_model_e_str_1, }; -static const char rf24_crclength_e_str_0[] = "Disabled"; -static const char rf24_crclength_e_str_1[] = "8 bits"; -static const char rf24_crclength_e_str_2[] = "16 bits" ; -static const char * const rf24_crclength_e_str_P[] = { +static const char rf24_crclength_e_str_0[] PROGMEM = "Disabled"; +static const char rf24_crclength_e_str_1[] PROGMEM = "8 bits"; +static const char rf24_crclength_e_str_2[] PROGMEM = "16 bits" ; +static const char * const rf24_crclength_e_str_P[] PROGMEM = { rf24_crclength_e_str_0, rf24_crclength_e_str_1, rf24_crclength_e_str_2, }; -static const char rf24_pa_dbm_e_str_0[] = "PA_MIN"; -static const char rf24_pa_dbm_e_str_1[] = "PA_LOW"; -static const char rf24_pa_dbm_e_str_2[] = "PA_MED"; -static const char rf24_pa_dbm_e_str_3[] = "PA_HIGH"; -static const char * const rf24_pa_dbm_e_str_P[] = { +static const char rf24_pa_dbm_e_str_0[] PROGMEM = "PA_MIN"; +static const char rf24_pa_dbm_e_str_1[] PROGMEM = "PA_LOW"; +static const char rf24_pa_dbm_e_str_2[] PROGMEM = "PA_HIGH"; +static const char rf24_pa_dbm_e_str_3[] PROGMEM = "PA_MAX"; +static const char * const rf24_pa_dbm_e_str_P[] PROGMEM = { rf24_pa_dbm_e_str_0, rf24_pa_dbm_e_str_1, rf24_pa_dbm_e_str_2, rf24_pa_dbm_e_str_3, }; + + + + + + + + + + + + + void RF24::printDetails(void) { + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + print_status(get_status()); - print_address_register(("RX_ADDR_P0-1"),RX_ADDR_P0,2); - print_byte_register(("RX_ADDR_P2-5"),RX_ADDR_P2,4); - print_address_register(("TX_ADDR"),TX_ADDR); + print_address_register(PSTR("RX_ADDR_P0-1"),RX_ADDR_P0,2); + print_byte_register(PSTR("RX_ADDR_P2-5"),RX_ADDR_P2,4); + print_address_register(PSTR("TX_ADDR\t"),TX_ADDR); - print_byte_register(("RX_PW_P0-6"),RX_PW_P0,6); - print_byte_register(("EN_AA"),EN_AA); - print_byte_register(("EN_RXADDR"),EN_RXADDR); - print_byte_register(("RF_CH"),RF_CH); - print_byte_register(("RF_SETUP"),RF_SETUP); - print_byte_register(("CONFIG"),CONFIG); - print_byte_register(("DYNPD/FEATURE"),DYNPD,2); + print_byte_register(PSTR("RX_PW_P0-6"),RX_PW_P0,6); + print_byte_register(PSTR("EN_AA\t"),EN_AA); + print_byte_register(PSTR("EN_RXADDR"),EN_RXADDR); + print_byte_register(PSTR("RF_CH\t"),RF_CH); + print_byte_register(PSTR("RF_SETUP"),RF_SETUP); + print_byte_register(PSTR("CONFIG\t"),CONFIG); + print_byte_register(PSTR("DYNPD/FEATURE"),DYNPD,2); - printf(("Data Rate\t = %s\r\n"), rf24_datarate_e_str_P[getDataRate()]); - printf(("Model\t\t = %s\r\n"), rf24_model_e_str_P[isPVariant()]); - printf(("CRC Length\t = %s\r\n"),rf24_crclength_e_str_P[getCRCLength()]); - printf(("PA Power\t = %s\r\n"),rf24_pa_dbm_e_str_P[getPALevel()]); + printf_P(PSTR("Data Rate\t = "PRIPSTR"\r\n"),pgm_read_word(&rf24_datarate_e_str_P[getDataRate()])); + printf_P(PSTR("Model\t\t = "PRIPSTR"\r\n"),pgm_read_word(&rf24_model_e_str_P[isPVariant()])); + printf_P(PSTR("CRC Length\t = "PRIPSTR"\r\n"),pgm_read_word(&rf24_crclength_e_str_P[getCRCLength()])); + printf_P(PSTR("PA Power\t = "PRIPSTR"\r\n"), pgm_read_word(&rf24_pa_dbm_e_str_P[getPALevel()])); + } +#endif /****************************************************************************/ -void RF24::begin(void) +bool RF24::begin(void) { - // Initialize pins -// pinMode(ce_pin,OUTPUT); -// pinMode(csn_pin,OUTPUT); + + uint8_t setup=0; + + mainTimer.start(); + + ce_pin=LOW; + csn_pin=HIGH; - // Initialize spi bus - //spi.begin(); - mainTimer.start(); - - ce(LOW); - csn(HIGH); - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + // Must allow the radio time to settle else configuration bits will not necessarily stick. // This is actually only required following power up but some settling time also appears to // be required after resets too. For full coverage, we'll always assume the worst. // Enabling 16b CRC is by far the most obvious case if the wrong timing is used - or skipped. // Technically we require 4.5ms + 14us as a worst case. We'll just call it 5ms for good measure. - // WARNING: wait_ms is based on P-variant whereby non-P *may* require different timing. + // WARNING: Delay is based on P-variant whereby non-P *may* require different timing. wait_ms( 5 ) ; + // Reset CONFIG and enable 16-bit CRC. + write_register( CONFIG, 12 ) ; + // Set 1500uS (minimum for 32B payload in ESB@250KBPS) timeouts, to make testing a little easier // WARNING: If this is ever lowered, either 250KBS mode with AA is broken or maximum packet // sizes must never be used. See documentation for a more complete explanation. - write_register(SETUP_RETR,(4 << ARD) | (15 << ARC)); + setRetries(5,15); - // Restore our default PA level + // Reset value is MAX setPALevel( RF24_PA_MAX ) ; - // Determine if this is a p or non-p RF24 module and then - // reset our data rate back to default value. This works - // because a non-P variant won't allow the data rate to - // be set to 250Kbps. + // check for connected module and if this is a p nRF24l01 variant + // if( setDataRate( RF24_250KBPS ) ) { p_variant = true ; } + /*setup = read_register(RF_SETUP); + if( setup == 0b00001110 ) // register default for nRF24L01P + { + p_variant = true ; + }*/ // Then set the data rate to the slowest (and most reliable) speed supported by all // hardware. @@ -378,157 +664,368 @@ // Initialize CRC and request 2-byte (16bit) CRC setCRCLength( RF24_CRC_16 ) ; - - // Disable dynamic payloads, to match dynamic_payloads_enabled setting + + // Disable dynamic payloads, to match dynamic_payloads_enabled setting - Reset value is 0 + toggle_features(); + write_register(FEATURE,0 ); write_register(DYNPD,0); // Reset current status // Notice reset and flush is the last thing we do - write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) ); + write_register(NRF_STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) ); // Set up default configuration. Callers can always change it later. // This channel should be universally safe and not bleed over into adjacent // spectrum. setChannel(76); - //setChannel(90); // Flush buffers flush_rx(); flush_tx(); - - // set EN_RXADDRR to 0 to fix pipe 0 from receiving - write_register(EN_RXADDR, 0); + + powerUp(); //Power up by default when begin() is called + + // Enable PTX, do not write CE high so radio will remain in standby I mode ( 130us max to transition to RX or TX instead of 1500us from powerUp ) + // PTX should use only 22uA of power + write_register(CONFIG, ( read_register(CONFIG) ) & ~_BV(PRIM_RX) ); + + // if setup is 0 or ff then there was no response from module + return ( setup != 0 && setup != 0xff ); } /****************************************************************************/ void RF24::startListening(void) { - write_register(CONFIG, read_register(CONFIG) | _BV(PWR_UP) | _BV(PRIM_RX)); - write_register(STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) ); + + + write_register(CONFIG, read_register(CONFIG) | _BV(PRIM_RX)); + write_register(NRF_STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) ); + ce(true); // Restore the pipe0 adddress, if exists - if (pipe0_reading_address) - write_register(RX_ADDR_P0, reinterpret_cast<const uint8_t*>(&pipe0_reading_address), 5); + if (pipe0_reading_address[0] > 0){ + write_register(RX_ADDR_P0, pipe0_reading_address, addr_width); + }else{ + closeReadingPipe(0); + } // Flush buffers - flush_rx(); - flush_tx(); + //flush_rx(); + if(read_register(FEATURE) & _BV(EN_ACK_PAY)){ + flush_tx(); + } // Go! - ce(HIGH); - - // wait for the radio to come up (130us actually only needed) -// wait_msMicroseconds(130); - wait_us(130); + //delayMicroseconds(100); } /****************************************************************************/ +static const uint8_t child_pipe_enable[] PROGMEM = +{ + ERX_P0, ERX_P1, ERX_P2, ERX_P3, ERX_P4, ERX_P5 +}; void RF24::stopListening(void) -{ - ce(LOW); - flush_tx(); - flush_rx(); +{ + ce_pin=LOW; + + wait_us(txRxDelay); + + if(read_register(FEATURE) & _BV(EN_ACK_PAY)){ + wait_us(txRxDelay); //200 + flush_tx(); + } + //flush_rx(); + write_register(CONFIG, ( read_register(CONFIG) ) & ~_BV(PRIM_RX) ); + + + + + + + + + write_register(EN_RXADDR,read_register(EN_RXADDR) | _BV(pgm_read_byte(&child_pipe_enable[0]))); // Enable RX on pipe0 + + //delayMicroseconds(100); + } /****************************************************************************/ void RF24::powerDown(void) { + ce(false); // Guarantee CE is low on powerDown write_register(CONFIG,read_register(CONFIG) & ~_BV(PWR_UP)); } /****************************************************************************/ +//Power up now. Radio will not power down unless instructed by MCU for config changes etc. void RF24::powerUp(void) { - write_register(CONFIG,read_register(CONFIG) | _BV(PWR_UP)); + uint8_t cfg = read_register(CONFIG); + + // if not powered up then power up and wait for the radio to initialize + if (!(cfg & _BV(PWR_UP))){ + write_register(CONFIG,read_register(CONFIG) | _BV(PWR_UP)); + + // For nRF24L01+ to go from power down mode to TX or RX mode it must first pass through stand-by mode. + // There must be a delay of Tpd2stby (see Table 16.) after the nRF24L01+ leaves power down mode before + // the CEis set high. - Tpd2stby can be up to 5ms per the 1.0 datasheet + wait_ms(5); + } } /******************************************************************/ - -bool RF24::write( const void* buf, uint8_t len ) -{ - bool result = false; - - // Begin the write - startWrite(buf,len); - - // ------------ - // At this point we could return from a non-blocking write, and then call - // the rest after an interrupt +#if defined (FAILURE_HANDLING) +void RF24::errNotify(){ + #if defined (SERIAL_DEBUG) + printf_P(PSTR("RF24 HARDWARE FAIL: Radio not responding, verify pin connections, wiring, etc.\r\n")); + #endif + #if defined (FAILURE_HANDLING) + failureDetected = 1; + #else + wait_ms(5000); + #endif +} +#endif +/******************************************************************/ - // Instead, we are going to block here until we get TX_DS (transmission completed and ack'd) - // or MAX_RT (maximum retries, transmission failed). Also, we'll timeout in case the radio - // is flaky and we get neither. - - // IN the end, the send should be blocking. It comes back in 60ms worst case, or much faster - // if I tighted up the retry logic. (Default settings will be 1500us. - // Monitor the send - uint8_t observe_tx; - uint8_t status; - uint32_t sent_at = mainTimer.read_ms(); - const uint32_t timeout = 500; //ms to wait for timeout - do - { - status = read_register(OBSERVE_TX,&observe_tx,1); -// IF_SERIAL_DEBUG(Serial.print(observe_tx,HEX)); - } - while( ! ( status & ( _BV(TX_DS) | _BV(MAX_RT) ) ) && ( mainTimer.read_ms() - sent_at < timeout ) ); +//Similar to the previous write, clears the interrupt flags +bool RF24::write( const void* buf, uint8_t len, const bool multicast ) +{ + //Start Writing + startFastWrite(buf,len,multicast); - // The part above is what you could recreate with your own interrupt handler, - // and then call this when you got an interrupt - // ------------ - - // Call this when you get an interrupt - // The status tells us three things - // * The send was successful (TX_DS) - // * The send failed, too many retries (MAX_RT) - // * There is an ack packet waiting (RX_DR) - bool tx_ok, tx_fail; - whatHappened(tx_ok,tx_fail,ack_payload_available); - - //printf("%u%u%u\r\n",tx_ok,tx_fail,ack_payload_available); - - result = tx_ok; -// IF_SERIAL_DEBUG(Serial.print(result?"...OK.":"...Failed")); + //Wait until complete or failed + #if defined (FAILURE_HANDLING) + uint32_t timer = mainTimer.read_ms(); + #endif + + while( ! ( get_status() & ( _BV(TX_DS) | _BV(MAX_RT) ))) { + #if defined (FAILURE_HANDLING) + if(mainTimer.read_ms() - timer > 85){ + errNotify(); + #if defined (FAILURE_HANDLING) + return 0; + #else + wait_ms(100); + #endif + } + #endif + } + + ce_pin=LOW; - // Handle the ack packet - if ( ack_payload_available ) - { - ack_payload_length = getDynamicPayloadSize(); -// IF_SERIAL_DEBUG(Serial.print("[AckPacket]/")); -// IF_SERIAL_DEBUG(Serial.println(ack_payload_length,DEC)); - } + uint8_t status = write_register(NRF_STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) ); - // Yay, we are done. - - // Power down -// powerDown(); + //Max retries exceeded + if( status & _BV(MAX_RT)){ + flush_tx(); //Only going to be 1 packet int the FIFO at a time using this method, so just flush + return 0; + } + //TX OK 1 or 0 + return 1; +} - // Flush buffers (Is this a relic of past experimentation, and not needed anymore? -// flush_tx(); - - return result; +bool RF24::write( const void* buf, uint8_t len ){ + return write(buf,len,0); } /****************************************************************************/ -void RF24::startWrite( const void* buf, uint8_t len ) +//For general use, the interrupt flags are not important to clear +bool RF24::writeBlocking( const void* buf, uint8_t len, uint32_t timeout ) +{ + //Block until the FIFO is NOT full. + //Keep track of the MAX retries and set auto-retry if seeing failures + //This way the FIFO will fill up and allow blocking until packets go through + //The radio will auto-clear everything in the FIFO as long as CE remains high + + uint32_t timer = mainTimer.read_ms(); //Get the time that the payload transmission started + + while( ( get_status() & ( _BV(TX_FULL) ))) { //Blocking only if FIFO is full. This will loop and block until TX is successful or timeout + + if( get_status() & _BV(MAX_RT)){ //If MAX Retries have been reached + reUseTX(); //Set re-transmit and clear the MAX_RT interrupt flag + if(mainTimer.read_ms() - timer > timeout){ return 0; } //If this payload has exceeded the user-defined timeout, exit and return 0 + } + #if defined (FAILURE_HANDLING) + if(mainTimer.read_ms() - timer > (timeout+85) ){ + errNotify(); + #if defined (FAILURE_HANDLING) + return 0; + #endif + } + #endif + + } + + //Start Writing + startFastWrite(buf,len,0); //Write the payload if a buffer is clear + + return 1; //Return 1 to indicate successful transmission +} + +/****************************************************************************/ + +void RF24::reUseTX(){ + write_register(NRF_STATUS,_BV(MAX_RT) ); //Clear max retry flag + spiTrans( REUSE_TX_PL ); + ce_pin=LOW; //Re-Transfer packet + ce_pin=HIGH; +} + +/****************************************************************************/ + +bool RF24::writeFast( const void* buf, uint8_t len, const bool multicast ) { - // Transmitter power-up - write_register(CONFIG, ( read_register(CONFIG) | _BV(PWR_UP) ) & ~_BV(PRIM_RX) ); -// wait_msMicroseconds(150); - wait_us(130); + //Block until the FIFO is NOT full. + //Keep track of the MAX retries and set auto-retry if seeing failures + //Return 0 so the user can control the retrys and set a timer or failure counter if required + //The radio will auto-clear everything in the FIFO as long as CE remains high + + #if defined (FAILURE_HANDLING) + uint32_t timer = mainTimer.read_ms(); + #endif + + while( ( get_status() & ( _BV(TX_FULL) ))) { //Blocking only if FIFO is full. This will loop and block until TX is successful or fail + + if( get_status() & _BV(MAX_RT)){ + //reUseTX(); //Set re-transmit + write_register(NRF_STATUS,_BV(MAX_RT) ); //Clear max retry flag + return 0; //Return 0. The previous payload has been retransmitted + //From the user perspective, if you get a 0, just keep trying to send the same payload + } + #if defined (FAILURE_HANDLING) + if(mainTimer.read_ms() - timer > 85 ){ + errNotify(); + #if defined (FAILURE_HANDLING) + return 0; + #endif + } + #endif + } + //Start Writing + startFastWrite(buf,len,multicast); + + return 1; +} + +bool RF24::writeFast( const void* buf, uint8_t len ){ + return writeFast(buf,len,0); +} + +/****************************************************************************/ + +//Per the documentation, we want to set PTX Mode when not listening. Then all we do is write data and set CE high +//In this mode, if we can keep the FIFO buffers loaded, packets will transmit immediately (no 130us delay) +//Otherwise we enter Standby-II mode, which is still faster than standby mode +//Also, we remove the need to keep writing the config register over and over and delaying for 150 us each time if sending a stream of data + +void RF24::startFastWrite( const void* buf, uint8_t len, const bool multicast, bool startTx){ //TMRh20 + + //write_payload( buf,len); + write_payload( buf, len,multicast ? W_TX_PAYLOAD_NO_ACK : W_TX_PAYLOAD ) ; + if(startTx){ + ce_pin=HIGH; + } + +} + +/****************************************************************************/ + +//Added the original startWrite back in so users can still use interrupts, ack payloads, etc +//Allows the library to pass all tests +void RF24::startWrite( const void* buf, uint8_t len, const bool multicast ){ // Send the payload - write_payload( buf, len ); + + //write_payload( buf, len ); + write_payload( buf, len,multicast? W_TX_PAYLOAD_NO_ACK : W_TX_PAYLOAD ) ; + ce_pin=HIGH; + + wait_us(10); + + ce_pin=LOW; + + +} + +/****************************************************************************/ + +bool RF24::rxFifoFull(){ + return read_register(FIFO_STATUS) & _BV(RX_FULL); +} +/****************************************************************************/ + +bool RF24::txStandBy(){ + + #if defined (FAILURE_HANDLING) + uint32_t timeout = mainTimer.read_ms(); + #endif + while( ! (read_register(FIFO_STATUS) & _BV(TX_EMPTY)) ){ + if( get_status() & _BV(MAX_RT)){ + write_register(NRF_STATUS,_BV(MAX_RT) ); + ce_pin=LOW; + flush_tx(); //Non blocking, flush the data + return 0; + } + #if defined (FAILURE_HANDLING) + if( mainTimer.read_ms() - timeout > 85){ + errNotify(); + #if defined (FAILURE_HANDLING) + return 0; + #endif + } + #endif + } - // Allons! - ce(HIGH); -// wait_msMicroseconds(15); - wait_us(15); - ce(LOW); + ce_pin=LOW; //Set STANDBY-I mode + return 1; +} + +/****************************************************************************/ + +bool RF24::txStandBy(uint32_t timeout, bool startTx){ + + if(startTx){ + stopListening(); + ce_pin=HIGH; + } + uint32_t start = mainTimer.read_ms(); + + while( ! (read_register(FIFO_STATUS) & _BV(TX_EMPTY)) ){ + if( get_status() & _BV(MAX_RT)){ + write_register(NRF_STATUS,_BV(MAX_RT) ); + ce_pin=LOW; //Set re-transmit + ce_pin=HIGH; + if(mainTimer.read_ms() - start >= timeout){ + ce_pin=LOW;; flush_tx(); return 0; + } + } + #if defined (FAILURE_HANDLING) + if( mainTimer.read_ms() - start > (timeout+85)){ + errNotify(); + #if defined (FAILURE_HANDLING) + return 0; + #endif + } + #endif + } + + + ce_pin=LOW; //Set STANDBY-I mode + return 1; + +} + +/****************************************************************************/ + +void RF24::maskIRQ(bool tx, bool fail, bool rx){ + + write_register(CONFIG, ( read_register(CONFIG) ) | fail << MASK_MAX_RT | tx << MASK_TX_DS | rx << MASK_RX_DR ); } /****************************************************************************/ @@ -537,11 +1034,21 @@ { uint8_t result = 0; - csn(LOW); + + + + + + + + + beginTransaction(); spi.write( R_RX_PL_WID ); result = spi.write(0xff); - csn(HIGH); + endTransaction(); + + if(result > 32) { flush_rx(); wait_ms(2); return 0; } return result; } @@ -556,45 +1063,32 @@ bool RF24::available(uint8_t* pipe_num) { - uint8_t status = get_status(); - - // Too noisy, enable if you really want lots o data!! - //IF_SERIAL_DEBUG(print_status(status)); - - bool result = ( status & _BV(RX_DR) ); - - if (result) - { - // If the caller wants the pipe number, include that - if ( pipe_num ) - *pipe_num = ( status >> RX_P_NO ) & 7; + if (!( read_register(FIFO_STATUS) & _BV(RX_EMPTY) )) { - // Clear the status bit - - // ??? Should this REALLY be cleared now? Or wait until we - // actually READ the payload? - - write_register(STATUS,_BV(RX_DR) ); - - // Handle ack payload receipt - if ( status & _BV(TX_DS) ) - { - write_register(STATUS,_BV(TX_DS)); + // If the caller wants the pipe number, include that + if ( pipe_num ) { + uint8_t status = get_status(); + *pipe_num = ( status >> RX_P_NO ) & 7; + } + return 1; } - } - - return result; + + + return 0; + + } /****************************************************************************/ -bool RF24::read( void* buf, uint8_t len ) -{ +void RF24::read( void* buf, uint8_t len ){ + // Fetch the payload read_payload( buf, len ); - // was this the last of the data available? - return read_register(FIFO_STATUS) & _BV(RX_EMPTY); + //Clear the two possible interrupt flags with one command + write_register(NRF_STATUS,_BV(RX_DR) | _BV(MAX_RT) | _BV(TX_DS) ); + } /****************************************************************************/ @@ -603,7 +1097,7 @@ { // Read the status & reset the status in one easy call // Or is that such a good idea? - uint8_t status = write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) ); + uint8_t status = write_register(NRF_STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) ); // Report to the user what happened tx_ok = status & _BV(TX_DS); @@ -618,63 +1112,128 @@ // Note that AVR 8-bit uC's store this LSB first, and the NRF24L01(+) // expects it LSB first too, so we're good. - write_register(RX_ADDR_P0, reinterpret_cast<uint8_t*>(&value), 5); - write_register(TX_ADDR, reinterpret_cast<uint8_t*>(&value), 5); - - const uint8_t max_payload_size = 32; - write_register(RX_PW_P0,min(payload_size,max_payload_size)); + write_register(RX_ADDR_P0, reinterpret_cast<uint8_t*>(&value), addr_width); + write_register(TX_ADDR, reinterpret_cast<uint8_t*>(&value), addr_width); + - flush_tx(); + //const uint8_t max_payload_size = 32; + //write_register(RX_PW_P0,rf24_min(payload_size,max_payload_size)); + write_register(RX_PW_P0,payload_size); } /****************************************************************************/ +void RF24::openWritingPipe(const uint8_t *address) +{ + // Note that AVR 8-bit uC's store this LSB first, and the NRF24L01(+) + // expects it LSB first too, so we're good. -static const uint8_t child_pipe[] = + write_register(RX_ADDR_P0,address, addr_width); + write_register(TX_ADDR, address, addr_width); + + //const uint8_t max_payload_size = 32; + //write_register(RX_PW_P0,rf24_min(payload_size,max_payload_size)); + write_register(RX_PW_P0,payload_size); +} + +/****************************************************************************/ +static const uint8_t child_pipe[] PROGMEM = { RX_ADDR_P0, RX_ADDR_P1, RX_ADDR_P2, RX_ADDR_P3, RX_ADDR_P4, RX_ADDR_P5 }; -static const uint8_t child_payload_size[] = +static const uint8_t child_payload_size[] PROGMEM = { RX_PW_P0, RX_PW_P1, RX_PW_P2, RX_PW_P3, RX_PW_P4, RX_PW_P5 }; -static const uint8_t child_pipe_enable[] = -{ - ERX_P0, ERX_P1, ERX_P2, ERX_P3, ERX_P4, ERX_P5 -}; + void RF24::openReadingPipe(uint8_t child, uint64_t address) { // If this is pipe 0, cache the address. This is needed because // openWritingPipe() will overwrite the pipe 0 address, so // startListening() will have to restore it. - if (child == 0) - pipe0_reading_address = address; + if (child == 0){ + memcpy(pipe0_reading_address,&address,addr_width); + } if (child <= 6) { // For pipes 2-5, only write the LSB if ( child < 2 ) - write_register(child_pipe[child], reinterpret_cast<const uint8_t*>(&address), 5); + write_register(pgm_read_byte(&child_pipe[child]), reinterpret_cast<const uint8_t*>(&address), addr_width); else - write_register(child_pipe[child], reinterpret_cast<const uint8_t*>(&address), 1); + write_register(pgm_read_byte(&child_pipe[child]), reinterpret_cast<const uint8_t*>(&address), 1); - write_register(child_payload_size[child],payload_size); + write_register(pgm_read_byte(&child_payload_size[child]),payload_size); // Note it would be more efficient to set all of the bits for all open // pipes at once. However, I thought it would make the calling code // more simple to do it this way. - write_register(EN_RXADDR,read_register(EN_RXADDR) | _BV(child_pipe_enable[child])); + write_register(EN_RXADDR,read_register(EN_RXADDR) | _BV(pgm_read_byte(&child_pipe_enable[child]))); + } +} + +/****************************************************************************/ +void RF24::setAddressWidth(uint8_t a_width){ + + if(a_width -= 2){ + write_register(SETUP_AW,a_width%4); + addr_width = (a_width%4) + 2; + } + +} + +/****************************************************************************/ + +void RF24::openReadingPipe(uint8_t child, const uint8_t *address) +{ + // If this is pipe 0, cache the address. This is needed because + // openWritingPipe() will overwrite the pipe 0 address, so + // startListening() will have to restore it. + if (child == 0){ + memcpy(pipe0_reading_address,address,addr_width); } + if (child <= 6) + { + // For pipes 2-5, only write the LSB + if ( child < 2 ){ + write_register(pgm_read_byte(&child_pipe[child]), address, addr_width); + }else{ + write_register(pgm_read_byte(&child_pipe[child]), address, 1); + } + write_register(pgm_read_byte(&child_payload_size[child]),payload_size); + + // Note it would be more efficient to set all of the bits for all open + // pipes at once. However, I thought it would make the calling code + // more simple to do it this way. + write_register(EN_RXADDR,read_register(EN_RXADDR) | _BV(pgm_read_byte(&child_pipe_enable[child]))); + + } +} + +/****************************************************************************/ + +void RF24::closeReadingPipe( uint8_t pipe ) +{ + write_register(EN_RXADDR,read_register(EN_RXADDR) & ~_BV(pgm_read_byte(&child_pipe_enable[pipe]))); } /****************************************************************************/ void RF24::toggle_features(void) { - csn(LOW); - spi.write( ACTIVATE ); - spi.write( 0x73 ); - csn(HIGH); + beginTransaction(); + spi.write( ACTIVATE ); + spi.write( 0x73 ); + endTransaction(); + + + + + + + + + } /****************************************************************************/ @@ -682,17 +1241,12 @@ void RF24::enableDynamicPayloads(void) { // Enable dynamic payload throughout the system - write_register(FEATURE,read_register(FEATURE) | _BV(EN_DPL) ); - // If it didn't work, the features are not enabled - if ( ! read_register(FEATURE) ) - { - // So enable them and try again - toggle_features(); + //toggle_features(); write_register(FEATURE,read_register(FEATURE) | _BV(EN_DPL) ); - } + -// IF_SERIAL_DEBUG(printf("FEATURE=%i\r\n",read_register(FEATURE))); + IF_SERIAL_DEBUG(printf("FEATURE=%i\r\n",read_register(FEATURE))); // Enable dynamic payload on all pipes // @@ -711,23 +1265,31 @@ // enable ack payload and dynamic payload features // - write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) ); + //toggle_features(); + write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) ); - // If it didn't work, the features are not enabled - if ( ! read_register(FEATURE) ) - { - // So enable them and try again - toggle_features(); - write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) ); - } - -// IF_SERIAL_DEBUG(printf("FEATURE=%i\r\n",read_register(FEATURE))); + IF_SERIAL_DEBUG(printf("FEATURE=%i\r\n",read_register(FEATURE))); // // Enable dynamic payload on pipes 0 & 1 // write_register(DYNPD,read_register(DYNPD) | _BV(DPL_P1) | _BV(DPL_P0)); + dynamic_payloads_enabled = true; +} + +/****************************************************************************/ + +void RF24::enableDynamicAck(void){ + // + // enable dynamic ack features + // + //toggle_features(); + write_register(FEATURE,read_register(FEATURE) | _BV(EN_DYN_ACK) ); + + IF_SERIAL_DEBUG(printf("FEATURE=%i\r\n",read_register(FEATURE))); + + } /****************************************************************************/ @@ -736,23 +1298,22 @@ { const uint8_t* current = reinterpret_cast<const uint8_t*>(buf); - csn(LOW); - spi.write( W_ACK_PAYLOAD | ( pipe & 7 ) ); - const uint8_t max_payload_size = 32; - uint8_t data_len = min(len,max_payload_size); + uint8_t data_len = rf24_min(len,32); + + beginTransaction(); + spi.write(W_ACK_PAYLOAD | ( pipe & 7 ) ); + while ( data_len-- ) spi.write(*current++); + endTransaction(); - csn(HIGH); } /****************************************************************************/ bool RF24::isAckPayloadAvailable(void) { - bool result = ack_payload_available; - ack_payload_available = false; - return result; + return ! (read_register(FIFO_STATUS) & _BV(RX_EMPTY)); } /****************************************************************************/ @@ -807,63 +1368,27 @@ /****************************************************************************/ -void RF24::setPALevel(rf24_pa_dbm_e level) +void RF24::setPALevel(uint8_t level) { - uint8_t setup = read_register(RF_SETUP) ; - setup &= ~(_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ; + + uint8_t setup = read_register(RF_SETUP) & 248; - // switch uses RAM (evil!) - if ( level == RF24_PA_MAX ) - { - setup |= (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ; - } - else if ( level == RF24_PA_HIGH ) - { - setup |= _BV(RF_PWR_HIGH) ; - } - else if ( level == RF24_PA_LOW ) - { - setup |= _BV(RF_PWR_LOW); - } - else if ( level == RF24_PA_MIN ) - { - // nothing - } - else if ( level == RF24_PA_ERROR ) - { - // On error, go to maximum PA - setup |= (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ; + if(level > 3){ // If invalid level, go to max PA + level = (RF24_PA_MAX << 1) + 1; // +1 to support the SI24R1 chip extra bit + }else{ + level = (level << 1) + 1; // Else set level as requested } - write_register( RF_SETUP, setup ) ; + + write_register( RF_SETUP, setup |= level ) ; // Write it to the chip } /****************************************************************************/ -rf24_pa_dbm_e RF24::getPALevel(void) +uint8_t RF24::getPALevel(void) { - rf24_pa_dbm_e result = RF24_PA_ERROR ; - uint8_t power = read_register(RF_SETUP) & (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ; - // switch uses RAM (evil!) - if ( power == (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ) - { - result = RF24_PA_MAX ; - } - else if ( power == _BV(RF_PWR_HIGH) ) - { - result = RF24_PA_HIGH ; - } - else if ( power == _BV(RF_PWR_LOW) ) - { - result = RF24_PA_LOW ; - } - else - { - result = RF24_PA_MIN ; - } - - return result ; + return (read_register(RF_SETUP) & (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH))) >> 1 ; } /****************************************************************************/ @@ -874,14 +1399,17 @@ uint8_t setup = read_register(RF_SETUP) ; // HIGH and LOW '00' is 1Mbs - our default - wide_band = false ; setup &= ~(_BV(RF_DR_LOW) | _BV(RF_DR_HIGH)) ; + + + txRxDelay=85; + if( speed == RF24_250KBPS ) { // Must set the RF_DR_LOW to 1; RF_DR_HIGH (used to be RF_DR) is already 0 // Making it '10'. - wide_band = false ; setup |= _BV( RF_DR_LOW ) ; + txRxDelay=155; } else { @@ -889,13 +1417,8 @@ // Making it '01' if ( speed == RF24_2MBPS ) { - wide_band = true ; setup |= _BV(RF_DR_HIGH); - } - else - { - // 1Mbs - wide_band = false ; + txRxDelay=65; } } write_register(RF_SETUP,setup); @@ -905,11 +1428,6 @@ { result = true; } - else - { - wide_band = false; - } - return result; } @@ -919,7 +1437,7 @@ { rf24_datarate_e result ; uint8_t dr = read_register(RF_SETUP) & (_BV(RF_DR_LOW) | _BV(RF_DR_HIGH)); - + // switch uses RAM (evil!) // Order matters in our case below if ( dr == _BV(RF_DR_LOW) ) @@ -945,10 +1463,11 @@ void RF24::setCRCLength(rf24_crclength_e length) { uint8_t config = read_register(CONFIG) & ~( _BV(CRCO) | _BV(EN_CRC)) ; - + + // switch uses RAM (evil!) if ( length == RF24_CRC_DISABLED ) { - // Do nothing, we turned it off above. + // Do nothing, we turned it off above. } else if ( length == RF24_CRC_8 ) { @@ -967,9 +1486,11 @@ rf24_crclength_e RF24::getCRCLength(void) { rf24_crclength_e result = RF24_CRC_DISABLED; + uint8_t config = read_register(CONFIG) & ( _BV(CRCO) | _BV(EN_CRC)) ; - - if ( config & _BV(EN_CRC ) ) + uint8_t AA = read_register(EN_AA); + + if ( config & _BV(EN_CRC ) || AA) { if ( config & _BV(CRCO) ) result = RF24_CRC_16; @@ -993,11 +1514,3 @@ { write_register(SETUP_RETR,(delay&0xf)<<ARD | (count&0xf)<<ARC); } - -uint8_t RF24::min(uint8_t a, uint8_t b) -{ - if(a < b) - return a; - else - return b; -}