pieter Berteloot / Mbed 2 deprecated Thesis_Verzender

RF24Network Send example program.

Dependencies:   xtoff RF24Network mbed

Fork of RF24Network_Send by Akash Vibhute

PowerControl/EthernetPowerControl.cpp@8:62b4607c44ca, 2018-03-08 (annotated)

Committer:
pietor
Date:
Thu Mar 08 09:23:05 2018 +0000
Revision:
8:62b4607c44ca
8/03;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pietor 8:62b4607c44ca 1 #include "EthernetPowerControl.h"
pietor 8:62b4607c44ca 2
pietor 8:62b4607c44ca 3 static void write_PHY (unsigned int PhyReg, unsigned short Value) {
pietor 8:62b4607c44ca 4 /* Write a data 'Value' to PHY register 'PhyReg'. */
pietor 8:62b4607c44ca 5 unsigned int tout;
pietor 8:62b4607c44ca 6 /* Hardware MII Management for LPC176x devices. */
pietor 8:62b4607c44ca 7 LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
pietor 8:62b4607c44ca 8 LPC_EMAC->MWTD = Value;
pietor 8:62b4607c44ca 9
pietor 8:62b4607c44ca 10 /* Wait utill operation completed */
pietor 8:62b4607c44ca 11 for (tout = 0; tout < MII_WR_TOUT; tout++) {
pietor 8:62b4607c44ca 12 if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
pietor 8:62b4607c44ca 13 break;
pietor 8:62b4607c44ca 14 }
pietor 8:62b4607c44ca 15 }
pietor 8:62b4607c44ca 16 }
pietor 8:62b4607c44ca 17
pietor 8:62b4607c44ca 18 static unsigned short read_PHY (unsigned int PhyReg) {
pietor 8:62b4607c44ca 19 /* Read a PHY register 'PhyReg'. */
pietor 8:62b4607c44ca 20 unsigned int tout, val;
pietor 8:62b4607c44ca 21
pietor 8:62b4607c44ca 22 LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
pietor 8:62b4607c44ca 23 LPC_EMAC->MCMD = MCMD_READ;
pietor 8:62b4607c44ca 24
pietor 8:62b4607c44ca 25 /* Wait until operation completed */
pietor 8:62b4607c44ca 26 for (tout = 0; tout < MII_RD_TOUT; tout++) {
pietor 8:62b4607c44ca 27 if ((LPC_EMAC->MIND & MIND_BUSY) == 0) {
pietor 8:62b4607c44ca 28 break;
pietor 8:62b4607c44ca 29 }
pietor 8:62b4607c44ca 30 }
pietor 8:62b4607c44ca 31 LPC_EMAC->MCMD = 0;
pietor 8:62b4607c44ca 32 val = LPC_EMAC->MRDD;
pietor 8:62b4607c44ca 33
pietor 8:62b4607c44ca 34 return (val);
pietor 8:62b4607c44ca 35 }
pietor 8:62b4607c44ca 36
pietor 8:62b4607c44ca 37 void EMAC_Init()
pietor 8:62b4607c44ca 38 {
pietor 8:62b4607c44ca 39 unsigned int tout,regv;
pietor 8:62b4607c44ca 40 /* Power Up the EMAC controller. */
pietor 8:62b4607c44ca 41 Peripheral_PowerUp(LPC1768_PCONP_PCENET);
pietor 8:62b4607c44ca 42
pietor 8:62b4607c44ca 43 LPC_PINCON->PINSEL2 = 0x50150105;
pietor 8:62b4607c44ca 44 LPC_PINCON->PINSEL3 &= ~0x0000000F;
pietor 8:62b4607c44ca 45 LPC_PINCON->PINSEL3 |= 0x00000005;
pietor 8:62b4607c44ca 46
pietor 8:62b4607c44ca 47 /* Reset all EMAC internal modules. */
pietor 8:62b4607c44ca 48 LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
pietor 8:62b4607c44ca 49 MAC1_SIM_RES | MAC1_SOFT_RES;
pietor 8:62b4607c44ca 50 LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
pietor 8:62b4607c44ca 51
pietor 8:62b4607c44ca 52 /* A short delay after reset. */
pietor 8:62b4607c44ca 53 for (tout = 100; tout; tout--);
pietor 8:62b4607c44ca 54
pietor 8:62b4607c44ca 55 /* Initialize MAC control registers. */
pietor 8:62b4607c44ca 56 LPC_EMAC->MAC1 = MAC1_PASS_ALL;
pietor 8:62b4607c44ca 57 LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
pietor 8:62b4607c44ca 58 LPC_EMAC->MAXF = ETH_MAX_FLEN;
pietor 8:62b4607c44ca 59 LPC_EMAC->CLRT = CLRT_DEF;
pietor 8:62b4607c44ca 60 LPC_EMAC->IPGR = IPGR_DEF;
pietor 8:62b4607c44ca 61
pietor 8:62b4607c44ca 62 /* Enable Reduced MII interface. */
pietor 8:62b4607c44ca 63 LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;
pietor 8:62b4607c44ca 64
pietor 8:62b4607c44ca 65 /* Reset Reduced MII Logic. */
pietor 8:62b4607c44ca 66 LPC_EMAC->SUPP = SUPP_RES_RMII;
pietor 8:62b4607c44ca 67 for (tout = 100; tout; tout--);
pietor 8:62b4607c44ca 68 LPC_EMAC->SUPP = 0;
pietor 8:62b4607c44ca 69
pietor 8:62b4607c44ca 70 /* Put the DP83848C in reset mode */
pietor 8:62b4607c44ca 71 write_PHY (PHY_REG_BMCR, 0x8000);
pietor 8:62b4607c44ca 72
pietor 8:62b4607c44ca 73 /* Wait for hardware reset to end. */
pietor 8:62b4607c44ca 74 for (tout = 0; tout < 0x100000; tout++) {
pietor 8:62b4607c44ca 75 regv = read_PHY (PHY_REG_BMCR);
pietor 8:62b4607c44ca 76 if (!(regv & 0x8000)) {
pietor 8:62b4607c44ca 77 /* Reset complete */
pietor 8:62b4607c44ca 78 break;
pietor 8:62b4607c44ca 79 }
pietor 8:62b4607c44ca 80 }
pietor 8:62b4607c44ca 81 }
pietor 8:62b4607c44ca 82
pietor 8:62b4607c44ca 83
pietor 8:62b4607c44ca 84 void PHY_PowerDown()
pietor 8:62b4607c44ca 85 {
pietor 8:62b4607c44ca 86 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
pietor 8:62b4607c44ca 87 EMAC_Init(); //init EMAC if it is not already init'd
pietor 8:62b4607c44ca 88
pietor 8:62b4607c44ca 89 unsigned int regv;
pietor 8:62b4607c44ca 90 regv = read_PHY(PHY_REG_BMCR);
pietor 8:62b4607c44ca 91 write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_BMCR_POWERDOWN));
pietor 8:62b4607c44ca 92 regv = read_PHY(PHY_REG_BMCR);
pietor 8:62b4607c44ca 93
pietor 8:62b4607c44ca 94 //shouldn't need the EMAC now.
pietor 8:62b4607c44ca 95 Peripheral_PowerDown(LPC1768_PCONP_PCENET);
pietor 8:62b4607c44ca 96
pietor 8:62b4607c44ca 97 //and turn off the PHY OSC
pietor 8:62b4607c44ca 98 LPC_GPIO1->FIODIR |= 0x8000000;
pietor 8:62b4607c44ca 99 LPC_GPIO1->FIOCLR = 0x8000000;
pietor 8:62b4607c44ca 100 }
pietor 8:62b4607c44ca 101
pietor 8:62b4607c44ca 102 void PHY_PowerUp()
pietor 8:62b4607c44ca 103 {
pietor 8:62b4607c44ca 104 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
pietor 8:62b4607c44ca 105 EMAC_Init(); //init EMAC if it is not already init'd
pietor 8:62b4607c44ca 106
pietor 8:62b4607c44ca 107 LPC_GPIO1->FIODIR |= 0x8000000;
pietor 8:62b4607c44ca 108 LPC_GPIO1->FIOSET = 0x8000000;
pietor 8:62b4607c44ca 109
pietor 8:62b4607c44ca 110 //wait for osc to be stable
pietor 8:62b4607c44ca 111 wait_ms(200);
pietor 8:62b4607c44ca 112
pietor 8:62b4607c44ca 113 unsigned int regv;
pietor 8:62b4607c44ca 114 regv = read_PHY(PHY_REG_BMCR);
pietor 8:62b4607c44ca 115 write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_BMCR_POWERDOWN));
pietor 8:62b4607c44ca 116 regv = read_PHY(PHY_REG_BMCR);
pietor 8:62b4607c44ca 117 }
pietor 8:62b4607c44ca 118
pietor 8:62b4607c44ca 119 void PHY_EnergyDetect_Enable()
pietor 8:62b4607c44ca 120 {
pietor 8:62b4607c44ca 121 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
pietor 8:62b4607c44ca 122 EMAC_Init(); //init EMAC if it is not already init'd
pietor 8:62b4607c44ca 123
pietor 8:62b4607c44ca 124 unsigned int regv;
pietor 8:62b4607c44ca 125 regv = read_PHY(PHY_REG_EDCR);
pietor 8:62b4607c44ca 126 write_PHY(PHY_REG_BMCR, regv | (1 << PHY_REG_EDCR_ENABLE));
pietor 8:62b4607c44ca 127 regv = read_PHY(PHY_REG_EDCR);
pietor 8:62b4607c44ca 128 }
pietor 8:62b4607c44ca 129
pietor 8:62b4607c44ca 130 void PHY_EnergyDetect_Disable()
pietor 8:62b4607c44ca 131 {
pietor 8:62b4607c44ca 132 if (!Peripheral_GetStatus(LPC1768_PCONP_PCENET))
pietor 8:62b4607c44ca 133 EMAC_Init(); //init EMAC if it is not already init'd
pietor 8:62b4607c44ca 134 unsigned int regv;
pietor 8:62b4607c44ca 135 regv = read_PHY(PHY_REG_EDCR);
pietor 8:62b4607c44ca 136 write_PHY(PHY_REG_BMCR, regv & ~(1 << PHY_REG_EDCR_ENABLE));
pietor 8:62b4607c44ca 137 regv = read_PHY(PHY_REG_EDCR);
pietor 8:62b4607c44ca 138 }