Ian Hua
Rearranged original code port/fork to: * Make library compatible with TiltyQuad IMU; * Prevent multiple definition, and added inclusion guard; * Cleaner access to library functions and file structure; and * "Broke out" code to control Sampling Rate and FIFO buffer update rate. By Trung Tin Ian HUA 2014. Credit to Jeff Rowberg for his original code, the best DMP implementation thus far; and szymon gaertig for porting the arduino library to mbed.
Fork of
MPU6050
by 
Shundo Kishi
MPU/inc/MPU6050.h@13:b1b98e5c61df, 2014-05-08 (annotated)
- Committer:
- pHysiX
- Date:
- Thu May 08 09:37:25 2014 +0000
- Revision:
- 13:b1b98e5c61df
- Parent:
- 7:4619a083f289
Added in license from original sources and tidied for release
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| pHysiX | 13:b1b98e5c61df | 1 | //ported from arduino library: https://github.com/jrowberg/i2cdevlib/tree/master/Arduino/MPU6050 |
| pHysiX | 13:b1b98e5c61df | 2 | //written by szymon gaertig (email: szymon@gaertig.com.pl) |
| pHysiX | 13:b1b98e5c61df | 3 | // |
| pHysiX | 13:b1b98e5c61df | 4 | //Changelog: |
| pHysiX | 13:b1b98e5c61df | 5 | //2013-01-08 - first beta release |
| pHysiX | 13:b1b98e5c61df | 6 | |
| pHysiX | 13:b1b98e5c61df | 7 | // I2Cdev library collection - MPU6050 I2C device class |
| pHysiX | 13:b1b98e5c61df | 8 | // Based on InvenSense MPU-6050 register map document rev. 2.0, 5/19/2011 (RM-MPU-6000A-00) |
| pHysiX | 13:b1b98e5c61df | 9 | // 8/24/2011 by Jeff Rowberg <jeff@rowberg.net> |
| pHysiX | 13:b1b98e5c61df | 10 | // Updates should (hopefully) always be available at https://github.com/jrowberg/i2cdevlib |
| pHysiX | 13:b1b98e5c61df | 11 | // |
| pHysiX | 13:b1b98e5c61df | 12 | // Changelog: |
| pHysiX | 13:b1b98e5c61df | 13 | // ... - ongoing debug release |
| pHysiX | 13:b1b98e5c61df | 14 | |
| pHysiX | 13:b1b98e5c61df | 15 | // NOTE: THIS IS ONLY A PARIAL RELEASE. THIS DEVICE CLASS IS CURRENTLY UNDERGOING ACTIVE |
| pHysiX | 13:b1b98e5c61df | 16 | // DEVELOPMENT AND IS STILL MISSING SOME IMPORTANT FEATURES. PLEASE KEEP THIS IN MIND IF |
| pHysiX | 13:b1b98e5c61df | 17 | // YOU DECIDE TO USE THIS PARTICULAR CODE FOR ANYTHING. |
| pHysiX | 13:b1b98e5c61df | 18 | |
| pHysiX | 13:b1b98e5c61df | 19 | /* ============================================ |
| pHysiX | 13:b1b98e5c61df | 20 | I2Cdev device library code is placed under the MIT license |
| pHysiX | 13:b1b98e5c61df | 21 | Copyright (c) 2012 Jeff Rowberg |
| pHysiX | 13:b1b98e5c61df | 22 | |
| pHysiX | 13:b1b98e5c61df | 23 | Permission is hereby granted, free of charge, to any person obtaining a copy |
| pHysiX | 13:b1b98e5c61df | 24 | of this software and associated documentation files (the "Software"), to deal |
| pHysiX | 13:b1b98e5c61df | 25 | in the Software without restriction, including without limitation the rights |
| pHysiX | 13:b1b98e5c61df | 26 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| pHysiX | 13:b1b98e5c61df | 27 | copies of the Software, and to permit persons to whom the Software is |
| pHysiX | 13:b1b98e5c61df | 28 | furnished to do so, subject to the following conditions: |
| pHysiX | 13:b1b98e5c61df | 29 | |
| pHysiX | 13:b1b98e5c61df | 30 | The above copyright notice and this permission notice shall be included in |
| pHysiX | 13:b1b98e5c61df | 31 | all copies or substantial portions of the Software. |
| pHysiX | 13:b1b98e5c61df | 32 | |
| pHysiX | 13:b1b98e5c61df | 33 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| pHysiX | 13:b1b98e5c61df | 34 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| pHysiX | 13:b1b98e5c61df | 35 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| pHysiX | 13:b1b98e5c61df | 36 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| pHysiX | 13:b1b98e5c61df | 37 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| pHysiX | 13:b1b98e5c61df | 38 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| pHysiX | 13:b1b98e5c61df | 39 | THE SOFTWARE. |
| pHysiX | 13:b1b98e5c61df | 40 | =============================================== |
| pHysiX | 13:b1b98e5c61df | 41 | */ |
| pHysiX | 13:b1b98e5c61df | 42 | |
| pHysiX | 6:2dc23167c8d8 | 43 | #ifndef _MPU6050_H_ |
| pHysiX | 6:2dc23167c8d8 | 44 | #define _MPU6050_H_ |
| pHysiX | 6:2dc23167c8d8 | 45 | |
| pHysiX | 6:2dc23167c8d8 | 46 | #include "I2Cdev.h" |
| pHysiX | 6:2dc23167c8d8 | 47 | #include "helper_3dmath.h" |
| pHysiX | 6:2dc23167c8d8 | 48 | |
| pHysiX | 6:2dc23167c8d8 | 49 | #define MPU6050_ADDRESS_AD0_LOW 0x68 // address pin low (GND), default for InvenSense evaluation board |
| pHysiX | 6:2dc23167c8d8 | 50 | #define MPU6050_ADDRESS_AD0_HIGH 0x69 // address pin high (VCC) |
| pHysiX | 6:2dc23167c8d8 | 51 | #define MPU6050_DEFAULT_ADDRESS MPU6050_ADDRESS_AD0_LOW |
| pHysiX | 6:2dc23167c8d8 | 52 | |
| pHysiX | 6:2dc23167c8d8 | 53 | #define MPU6050_INCLUDE_DMP_MOTIONAPPS20 |
| pHysiX | 6:2dc23167c8d8 | 54 | |
| pHysiX | 6:2dc23167c8d8 | 55 | #define MPU6050_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD |
| pHysiX | 6:2dc23167c8d8 | 56 | #define MPU6050_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD |
| pHysiX | 6:2dc23167c8d8 | 57 | #define MPU6050_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD |
| pHysiX | 6:2dc23167c8d8 | 58 | #define MPU6050_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN |
| pHysiX | 6:2dc23167c8d8 | 59 | #define MPU6050_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN |
| pHysiX | 6:2dc23167c8d8 | 60 | #define MPU6050_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN |
| pHysiX | 6:2dc23167c8d8 | 61 | #define MPU6050_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS |
| pHysiX | 6:2dc23167c8d8 | 62 | #define MPU6050_RA_XA_OFFS_L_TC 0x07 |
| pHysiX | 6:2dc23167c8d8 | 63 | #define MPU6050_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS |
| pHysiX | 6:2dc23167c8d8 | 64 | #define MPU6050_RA_YA_OFFS_L_TC 0x09 |
| pHysiX | 6:2dc23167c8d8 | 65 | #define MPU6050_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS |
| pHysiX | 6:2dc23167c8d8 | 66 | #define MPU6050_RA_ZA_OFFS_L_TC 0x0B |
| pHysiX | 6:2dc23167c8d8 | 67 | #define MPU6050_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR |
| pHysiX | 6:2dc23167c8d8 | 68 | #define MPU6050_RA_XG_OFFS_USRL 0x14 |
| pHysiX | 6:2dc23167c8d8 | 69 | #define MPU6050_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR |
| pHysiX | 6:2dc23167c8d8 | 70 | #define MPU6050_RA_YG_OFFS_USRL 0x16 |
| pHysiX | 6:2dc23167c8d8 | 71 | #define MPU6050_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR |
| pHysiX | 6:2dc23167c8d8 | 72 | #define MPU6050_RA_ZG_OFFS_USRL 0x18 |
| pHysiX | 6:2dc23167c8d8 | 73 | #define MPU6050_RA_SMPLRT_DIV 0x19 |
| pHysiX | 6:2dc23167c8d8 | 74 | #define MPU6050_RA_CONFIG 0x1A |
| pHysiX | 6:2dc23167c8d8 | 75 | #define MPU6050_RA_GYRO_CONFIG 0x1B |
| pHysiX | 6:2dc23167c8d8 | 76 | #define MPU6050_RA_ACCEL_CONFIG 0x1C |
| pHysiX | 6:2dc23167c8d8 | 77 | #define MPU6050_RA_FF_THR 0x1D |
| pHysiX | 6:2dc23167c8d8 | 78 | #define MPU6050_RA_FF_DUR 0x1E |
| pHysiX | 6:2dc23167c8d8 | 79 | #define MPU6050_RA_MOT_THR 0x1F |
| pHysiX | 6:2dc23167c8d8 | 80 | #define MPU6050_RA_MOT_DUR 0x20 |
| pHysiX | 6:2dc23167c8d8 | 81 | #define MPU6050_RA_ZRMOT_THR 0x21 |
| pHysiX | 6:2dc23167c8d8 | 82 | #define MPU6050_RA_ZRMOT_DUR 0x22 |
| pHysiX | 6:2dc23167c8d8 | 83 | #define MPU6050_RA_FIFO_EN 0x23 |
| pHysiX | 6:2dc23167c8d8 | 84 | #define MPU6050_RA_I2C_MST_CTRL 0x24 |
| pHysiX | 6:2dc23167c8d8 | 85 | #define MPU6050_RA_I2C_SLV0_ADDR 0x25 |
| pHysiX | 6:2dc23167c8d8 | 86 | #define MPU6050_RA_I2C_SLV0_REG 0x26 |
| pHysiX | 6:2dc23167c8d8 | 87 | #define MPU6050_RA_I2C_SLV0_CTRL 0x27 |
| pHysiX | 6:2dc23167c8d8 | 88 | #define MPU6050_RA_I2C_SLV1_ADDR 0x28 |
| pHysiX | 6:2dc23167c8d8 | 89 | #define MPU6050_RA_I2C_SLV1_REG 0x29 |
| pHysiX | 6:2dc23167c8d8 | 90 | #define MPU6050_RA_I2C_SLV1_CTRL 0x2A |
| pHysiX | 6:2dc23167c8d8 | 91 | #define MPU6050_RA_I2C_SLV2_ADDR 0x2B |
| pHysiX | 6:2dc23167c8d8 | 92 | #define MPU6050_RA_I2C_SLV2_REG 0x2C |
| pHysiX | 6:2dc23167c8d8 | 93 | #define MPU6050_RA_I2C_SLV2_CTRL 0x2D |
| pHysiX | 6:2dc23167c8d8 | 94 | #define MPU6050_RA_I2C_SLV3_ADDR 0x2E |
| pHysiX | 6:2dc23167c8d8 | 95 | #define MPU6050_RA_I2C_SLV3_REG 0x2F |
| pHysiX | 6:2dc23167c8d8 | 96 | #define MPU6050_RA_I2C_SLV3_CTRL 0x30 |
| pHysiX | 6:2dc23167c8d8 | 97 | #define MPU6050_RA_I2C_SLV4_ADDR 0x31 |
| pHysiX | 6:2dc23167c8d8 | 98 | #define MPU6050_RA_I2C_SLV4_REG 0x32 |
| pHysiX | 6:2dc23167c8d8 | 99 | #define MPU6050_RA_I2C_SLV4_DO 0x33 |
| pHysiX | 6:2dc23167c8d8 | 100 | #define MPU6050_RA_I2C_SLV4_CTRL 0x34 |
| pHysiX | 6:2dc23167c8d8 | 101 | #define MPU6050_RA_I2C_SLV4_DI 0x35 |
| pHysiX | 6:2dc23167c8d8 | 102 | #define MPU6050_RA_I2C_MST_STATUS 0x36 |
| pHysiX | 6:2dc23167c8d8 | 103 | #define MPU6050_RA_INT_PIN_CFG 0x37 |
| pHysiX | 6:2dc23167c8d8 | 104 | #define MPU6050_RA_INT_ENABLE 0x38 |
| pHysiX | 6:2dc23167c8d8 | 105 | #define MPU6050_RA_DMP_INT_STATUS 0x39 |
| pHysiX | 6:2dc23167c8d8 | 106 | #define MPU6050_RA_INT_STATUS 0x3A |
| pHysiX | 6:2dc23167c8d8 | 107 | |
| pHysiX | 6:2dc23167c8d8 | 108 | #define MPU6050_RA_ACCEL_XOUT_H 0x3B |
| pHysiX | 6:2dc23167c8d8 | 109 | #define MPU6050_RA_ACCEL_XOUT_L 0x3C |
| pHysiX | 6:2dc23167c8d8 | 110 | #define MPU6050_RA_ACCEL_YOUT_H 0x3D |
| pHysiX | 6:2dc23167c8d8 | 111 | #define MPU6050_RA_ACCEL_YOUT_L 0x3E |
| pHysiX | 6:2dc23167c8d8 | 112 | #define MPU6050_RA_ACCEL_ZOUT_H 0x3F |
| pHysiX | 6:2dc23167c8d8 | 113 | #define MPU6050_RA_ACCEL_ZOUT_L 0x40 |
| pHysiX | 6:2dc23167c8d8 | 114 | |
| pHysiX | 6:2dc23167c8d8 | 115 | #define MPU6050_RA_TEMP_OUT_H 0x41 |
| pHysiX | 6:2dc23167c8d8 | 116 | #define MPU6050_RA_TEMP_OUT_L 0x42 |
| pHysiX | 6:2dc23167c8d8 | 117 | |
| pHysiX | 6:2dc23167c8d8 | 118 | #define MPU6050_RA_GYRO_XOUT_H 0x43 |
| pHysiX | 6:2dc23167c8d8 | 119 | #define MPU6050_RA_GYRO_XOUT_L 0x44 |
| pHysiX | 6:2dc23167c8d8 | 120 | #define MPU6050_RA_GYRO_YOUT_H 0x45 |
| pHysiX | 6:2dc23167c8d8 | 121 | #define MPU6050_RA_GYRO_YOUT_L 0x46 |
| pHysiX | 6:2dc23167c8d8 | 122 | #define MPU6050_RA_GYRO_ZOUT_H 0x47 |
| pHysiX | 6:2dc23167c8d8 | 123 | #define MPU6050_RA_GYRO_ZOUT_L 0x48 |
| pHysiX | 6:2dc23167c8d8 | 124 | |
| pHysiX | 6:2dc23167c8d8 | 125 | #define MPU9150_RA_MAG_ADDRESS 0x0C |
| pHysiX | 6:2dc23167c8d8 | 126 | #define MPU9150_RA_MAG_XOUT_L 0x03 |
| pHysiX | 6:2dc23167c8d8 | 127 | #define MPU9150_RA_MAG_XOUT_H 0x04 |
| pHysiX | 6:2dc23167c8d8 | 128 | #define MPU9150_RA_MAG_YOUT_L 0x05 |
| pHysiX | 6:2dc23167c8d8 | 129 | #define MPU9150_RA_MAG_YOUT_H 0x06 |
| pHysiX | 6:2dc23167c8d8 | 130 | #define MPU9150_RA_MAG_ZOUT_L 0x07 |
| pHysiX | 6:2dc23167c8d8 | 131 | #define MPU9150_RA_MAG_ZOUT_H 0x08 |
| pHysiX | 6:2dc23167c8d8 | 132 | |
| pHysiX | 6:2dc23167c8d8 | 133 | #define MPU6050_RA_EXT_SENS_DATA_00 0x49 |
| pHysiX | 6:2dc23167c8d8 | 134 | #define MPU6050_RA_EXT_SENS_DATA_01 0x4A |
| pHysiX | 6:2dc23167c8d8 | 135 | #define MPU6050_RA_EXT_SENS_DATA_02 0x4B |
| pHysiX | 6:2dc23167c8d8 | 136 | #define MPU6050_RA_EXT_SENS_DATA_03 0x4C |
| pHysiX | 6:2dc23167c8d8 | 137 | #define MPU6050_RA_EXT_SENS_DATA_04 0x4D |
| pHysiX | 6:2dc23167c8d8 | 138 | #define MPU6050_RA_EXT_SENS_DATA_05 0x4E |
| pHysiX | 6:2dc23167c8d8 | 139 | #define MPU6050_RA_EXT_SENS_DATA_06 0x4F |
| pHysiX | 6:2dc23167c8d8 | 140 | #define MPU6050_RA_EXT_SENS_DATA_07 0x50 |
| pHysiX | 6:2dc23167c8d8 | 141 | #define MPU6050_RA_EXT_SENS_DATA_08 0x51 |
| pHysiX | 6:2dc23167c8d8 | 142 | #define MPU6050_RA_EXT_SENS_DATA_09 0x52 |
| pHysiX | 6:2dc23167c8d8 | 143 | #define MPU6050_RA_EXT_SENS_DATA_10 0x53 |
| pHysiX | 6:2dc23167c8d8 | 144 | #define MPU6050_RA_EXT_SENS_DATA_11 0x54 |
| pHysiX | 6:2dc23167c8d8 | 145 | #define MPU6050_RA_EXT_SENS_DATA_12 0x55 |
| pHysiX | 6:2dc23167c8d8 | 146 | #define MPU6050_RA_EXT_SENS_DATA_13 0x56 |
| pHysiX | 6:2dc23167c8d8 | 147 | #define MPU6050_RA_EXT_SENS_DATA_14 0x57 |
| pHysiX | 6:2dc23167c8d8 | 148 | #define MPU6050_RA_EXT_SENS_DATA_15 0x58 |
| pHysiX | 6:2dc23167c8d8 | 149 | #define MPU6050_RA_EXT_SENS_DATA_16 0x59 |
| pHysiX | 6:2dc23167c8d8 | 150 | #define MPU6050_RA_EXT_SENS_DATA_17 0x5A |
| pHysiX | 6:2dc23167c8d8 | 151 | #define MPU6050_RA_EXT_SENS_DATA_18 0x5B |
| pHysiX | 6:2dc23167c8d8 | 152 | #define MPU6050_RA_EXT_SENS_DATA_19 0x5C |
| pHysiX | 6:2dc23167c8d8 | 153 | #define MPU6050_RA_EXT_SENS_DATA_20 0x5D |
| pHysiX | 6:2dc23167c8d8 | 154 | #define MPU6050_RA_EXT_SENS_DATA_21 0x5E |
| pHysiX | 6:2dc23167c8d8 | 155 | #define MPU6050_RA_EXT_SENS_DATA_22 0x5F |
| pHysiX | 6:2dc23167c8d8 | 156 | #define MPU6050_RA_EXT_SENS_DATA_23 0x60 |
| pHysiX | 6:2dc23167c8d8 | 157 | #define MPU6050_RA_MOT_DETECT_STATUS 0x61 |
| pHysiX | 6:2dc23167c8d8 | 158 | #define MPU6050_RA_I2C_SLV0_DO 0x63 |
| pHysiX | 6:2dc23167c8d8 | 159 | #define MPU6050_RA_I2C_SLV1_DO 0x64 |
| pHysiX | 6:2dc23167c8d8 | 160 | #define MPU6050_RA_I2C_SLV2_DO 0x65 |
| pHysiX | 6:2dc23167c8d8 | 161 | #define MPU6050_RA_I2C_SLV3_DO 0x66 |
| pHysiX | 6:2dc23167c8d8 | 162 | #define MPU6050_RA_I2C_MST_DELAY_CTRL 0x67 |
| pHysiX | 6:2dc23167c8d8 | 163 | #define MPU6050_RA_SIGNAL_PATH_RESET 0x68 |
| pHysiX | 6:2dc23167c8d8 | 164 | #define MPU6050_RA_MOT_DETECT_CTRL 0x69 |
| pHysiX | 6:2dc23167c8d8 | 165 | #define MPU6050_RA_USER_CTRL 0x6A |
| pHysiX | 6:2dc23167c8d8 | 166 | #define MPU6050_RA_PWR_MGMT_1 0x6B |
| pHysiX | 6:2dc23167c8d8 | 167 | #define MPU6050_RA_PWR_MGMT_2 0x6C |
| pHysiX | 6:2dc23167c8d8 | 168 | #define MPU6050_RA_BANK_SEL 0x6D |
| pHysiX | 6:2dc23167c8d8 | 169 | #define MPU6050_RA_MEM_START_ADDR 0x6E |
| pHysiX | 6:2dc23167c8d8 | 170 | #define MPU6050_RA_MEM_R_W 0x6F |
| pHysiX | 6:2dc23167c8d8 | 171 | #define MPU6050_RA_DMP_CFG_1 0x70 |
| pHysiX | 6:2dc23167c8d8 | 172 | #define MPU6050_RA_DMP_CFG_2 0x71 |
| pHysiX | 6:2dc23167c8d8 | 173 | #define MPU6050_RA_FIFO_COUNTH 0x72 |
| pHysiX | 6:2dc23167c8d8 | 174 | #define MPU6050_RA_FIFO_COUNTL 0x73 |
| pHysiX | 6:2dc23167c8d8 | 175 | #define MPU6050_RA_FIFO_R_W 0x74 |
| pHysiX | 6:2dc23167c8d8 | 176 | #define MPU6050_RA_WHO_AM_I 0x75 |
| pHysiX | 6:2dc23167c8d8 | 177 | |
| pHysiX | 6:2dc23167c8d8 | 178 | #define MPU6050_TC_PWR_MODE_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 179 | #define MPU6050_TC_OFFSET_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 180 | #define MPU6050_TC_OFFSET_LENGTH 6 |
| pHysiX | 6:2dc23167c8d8 | 181 | #define MPU6050_TC_OTP_BNK_VLD_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 182 | |
| pHysiX | 6:2dc23167c8d8 | 183 | #define MPU6050_VDDIO_LEVEL_VLOGIC 0 |
| pHysiX | 6:2dc23167c8d8 | 184 | #define MPU6050_VDDIO_LEVEL_VDD 1 |
| pHysiX | 6:2dc23167c8d8 | 185 | |
| pHysiX | 6:2dc23167c8d8 | 186 | #define MPU6050_CFG_EXT_SYNC_SET_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 187 | #define MPU6050_CFG_EXT_SYNC_SET_LENGTH 3 |
| pHysiX | 6:2dc23167c8d8 | 188 | #define MPU6050_CFG_DLPF_CFG_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 189 | #define MPU6050_CFG_DLPF_CFG_LENGTH 3 |
| pHysiX | 6:2dc23167c8d8 | 190 | |
| pHysiX | 6:2dc23167c8d8 | 191 | #define MPU6050_EXT_SYNC_DISABLED 0x0 |
| pHysiX | 6:2dc23167c8d8 | 192 | #define MPU6050_EXT_SYNC_TEMP_OUT_L 0x1 |
| pHysiX | 6:2dc23167c8d8 | 193 | #define MPU6050_EXT_SYNC_GYRO_XOUT_L 0x2 |
| pHysiX | 6:2dc23167c8d8 | 194 | #define MPU6050_EXT_SYNC_GYRO_YOUT_L 0x3 |
| pHysiX | 6:2dc23167c8d8 | 195 | #define MPU6050_EXT_SYNC_GYRO_ZOUT_L 0x4 |
| pHysiX | 6:2dc23167c8d8 | 196 | #define MPU6050_EXT_SYNC_ACCEL_XOUT_L 0x5 |
| pHysiX | 6:2dc23167c8d8 | 197 | #define MPU6050_EXT_SYNC_ACCEL_YOUT_L 0x6 |
| pHysiX | 6:2dc23167c8d8 | 198 | #define MPU6050_EXT_SYNC_ACCEL_ZOUT_L 0x7 |
| pHysiX | 6:2dc23167c8d8 | 199 | |
| pHysiX | 6:2dc23167c8d8 | 200 | #define MPU6050_DLPF_BW_256 0x00 |
| pHysiX | 6:2dc23167c8d8 | 201 | #define MPU6050_DLPF_BW_188 0x01 |
| pHysiX | 6:2dc23167c8d8 | 202 | #define MPU6050_DLPF_BW_98 0x02 |
| pHysiX | 6:2dc23167c8d8 | 203 | #define MPU6050_DLPF_BW_42 0x03 |
| pHysiX | 6:2dc23167c8d8 | 204 | #define MPU6050_DLPF_BW_20 0x04 |
| pHysiX | 6:2dc23167c8d8 | 205 | #define MPU6050_DLPF_BW_10 0x05 |
| pHysiX | 6:2dc23167c8d8 | 206 | #define MPU6050_DLPF_BW_5 0x06 |
| pHysiX | 6:2dc23167c8d8 | 207 | |
| pHysiX | 6:2dc23167c8d8 | 208 | #define MPU6050_GCONFIG_FS_SEL_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 209 | #define MPU6050_GCONFIG_FS_SEL_LENGTH 2 |
| pHysiX | 6:2dc23167c8d8 | 210 | |
| pHysiX | 6:2dc23167c8d8 | 211 | #define MPU6050_GYRO_FS_250 0x00 |
| pHysiX | 6:2dc23167c8d8 | 212 | #define MPU6050_GYRO_FS_500 0x01 |
| pHysiX | 6:2dc23167c8d8 | 213 | #define MPU6050_GYRO_FS_1000 0x02 |
| pHysiX | 6:2dc23167c8d8 | 214 | #define MPU6050_GYRO_FS_2000 0x03 |
| pHysiX | 6:2dc23167c8d8 | 215 | |
| pHysiX | 6:2dc23167c8d8 | 216 | #define MPU6050_ACONFIG_XA_ST_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 217 | #define MPU6050_ACONFIG_YA_ST_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 218 | #define MPU6050_ACONFIG_ZA_ST_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 219 | #define MPU6050_ACONFIG_AFS_SEL_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 220 | #define MPU6050_ACONFIG_AFS_SEL_LENGTH 2 |
| pHysiX | 6:2dc23167c8d8 | 221 | #define MPU6050_ACONFIG_ACCEL_HPF_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 222 | #define MPU6050_ACONFIG_ACCEL_HPF_LENGTH 3 |
| pHysiX | 6:2dc23167c8d8 | 223 | |
| pHysiX | 6:2dc23167c8d8 | 224 | #define MPU6050_ACCEL_FS_2 0x00 |
| pHysiX | 6:2dc23167c8d8 | 225 | #define MPU6050_ACCEL_FS_4 0x01 |
| pHysiX | 6:2dc23167c8d8 | 226 | #define MPU6050_ACCEL_FS_8 0x02 |
| pHysiX | 6:2dc23167c8d8 | 227 | #define MPU6050_ACCEL_FS_16 0x03 |
| pHysiX | 6:2dc23167c8d8 | 228 | |
| pHysiX | 6:2dc23167c8d8 | 229 | #define MPU6050_DHPF_RESET 0x00 |
| pHysiX | 6:2dc23167c8d8 | 230 | #define MPU6050_DHPF_5 0x01 |
| pHysiX | 6:2dc23167c8d8 | 231 | #define MPU6050_DHPF_2P5 0x02 |
| pHysiX | 6:2dc23167c8d8 | 232 | #define MPU6050_DHPF_1P25 0x03 |
| pHysiX | 6:2dc23167c8d8 | 233 | #define MPU6050_DHPF_0P63 0x04 |
| pHysiX | 6:2dc23167c8d8 | 234 | #define MPU6050_DHPF_HOLD 0x07 |
| pHysiX | 6:2dc23167c8d8 | 235 | |
| pHysiX | 6:2dc23167c8d8 | 236 | #define MPU6050_TEMP_FIFO_EN_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 237 | #define MPU6050_XG_FIFO_EN_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 238 | #define MPU6050_YG_FIFO_EN_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 239 | #define MPU6050_ZG_FIFO_EN_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 240 | #define MPU6050_ACCEL_FIFO_EN_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 241 | #define MPU6050_SLV2_FIFO_EN_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 242 | #define MPU6050_SLV1_FIFO_EN_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 243 | #define MPU6050_SLV0_FIFO_EN_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 244 | |
| pHysiX | 6:2dc23167c8d8 | 245 | #define MPU6050_MULT_MST_EN_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 246 | #define MPU6050_WAIT_FOR_ES_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 247 | #define MPU6050_SLV_3_FIFO_EN_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 248 | #define MPU6050_I2C_MST_P_NSR_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 249 | #define MPU6050_I2C_MST_CLK_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 250 | #define MPU6050_I2C_MST_CLK_LENGTH 4 |
| pHysiX | 6:2dc23167c8d8 | 251 | |
| pHysiX | 6:2dc23167c8d8 | 252 | #define MPU6050_CLOCK_DIV_348 0x0 |
| pHysiX | 6:2dc23167c8d8 | 253 | #define MPU6050_CLOCK_DIV_333 0x1 |
| pHysiX | 6:2dc23167c8d8 | 254 | #define MPU6050_CLOCK_DIV_320 0x2 |
| pHysiX | 6:2dc23167c8d8 | 255 | #define MPU6050_CLOCK_DIV_308 0x3 |
| pHysiX | 6:2dc23167c8d8 | 256 | #define MPU6050_CLOCK_DIV_296 0x4 |
| pHysiX | 6:2dc23167c8d8 | 257 | #define MPU6050_CLOCK_DIV_286 0x5 |
| pHysiX | 6:2dc23167c8d8 | 258 | #define MPU6050_CLOCK_DIV_276 0x6 |
| pHysiX | 6:2dc23167c8d8 | 259 | #define MPU6050_CLOCK_DIV_267 0x7 |
| pHysiX | 6:2dc23167c8d8 | 260 | #define MPU6050_CLOCK_DIV_258 0x8 |
| pHysiX | 6:2dc23167c8d8 | 261 | #define MPU6050_CLOCK_DIV_500 0x9 |
| pHysiX | 6:2dc23167c8d8 | 262 | #define MPU6050_CLOCK_DIV_471 0xA |
| pHysiX | 6:2dc23167c8d8 | 263 | #define MPU6050_CLOCK_DIV_444 0xB |
| pHysiX | 6:2dc23167c8d8 | 264 | #define MPU6050_CLOCK_DIV_421 0xC |
| pHysiX | 6:2dc23167c8d8 | 265 | #define MPU6050_CLOCK_DIV_400 0xD |
| pHysiX | 6:2dc23167c8d8 | 266 | #define MPU6050_CLOCK_DIV_381 0xE |
| pHysiX | 6:2dc23167c8d8 | 267 | #define MPU6050_CLOCK_DIV_364 0xF |
| pHysiX | 6:2dc23167c8d8 | 268 | |
| pHysiX | 6:2dc23167c8d8 | 269 | #define MPU6050_I2C_SLV_RW_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 270 | #define MPU6050_I2C_SLV_ADDR_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 271 | #define MPU6050_I2C_SLV_ADDR_LENGTH 7 |
| pHysiX | 6:2dc23167c8d8 | 272 | #define MPU6050_I2C_SLV_EN_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 273 | #define MPU6050_I2C_SLV_BYTE_SW_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 274 | #define MPU6050_I2C_SLV_REG_DIS_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 275 | #define MPU6050_I2C_SLV_GRP_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 276 | #define MPU6050_I2C_SLV_LEN_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 277 | #define MPU6050_I2C_SLV_LEN_LENGTH 4 |
| pHysiX | 6:2dc23167c8d8 | 278 | |
| pHysiX | 6:2dc23167c8d8 | 279 | #define MPU6050_I2C_SLV4_RW_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 280 | #define MPU6050_I2C_SLV4_ADDR_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 281 | #define MPU6050_I2C_SLV4_ADDR_LENGTH 7 |
| pHysiX | 6:2dc23167c8d8 | 282 | #define MPU6050_I2C_SLV4_EN_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 283 | #define MPU6050_I2C_SLV4_INT_EN_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 284 | #define MPU6050_I2C_SLV4_REG_DIS_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 285 | #define MPU6050_I2C_SLV4_MST_DLY_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 286 | #define MPU6050_I2C_SLV4_MST_DLY_LENGTH 5 |
| pHysiX | 6:2dc23167c8d8 | 287 | |
| pHysiX | 6:2dc23167c8d8 | 288 | #define MPU6050_MST_PASS_THROUGH_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 289 | #define MPU6050_MST_I2C_SLV4_DONE_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 290 | #define MPU6050_MST_I2C_LOST_ARB_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 291 | #define MPU6050_MST_I2C_SLV4_NACK_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 292 | #define MPU6050_MST_I2C_SLV3_NACK_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 293 | #define MPU6050_MST_I2C_SLV2_NACK_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 294 | #define MPU6050_MST_I2C_SLV1_NACK_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 295 | #define MPU6050_MST_I2C_SLV0_NACK_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 296 | |
| pHysiX | 6:2dc23167c8d8 | 297 | #define MPU6050_INTCFG_INT_LEVEL_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 298 | #define MPU6050_INTCFG_INT_OPEN_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 299 | #define MPU6050_INTCFG_LATCH_INT_EN_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 300 | #define MPU6050_INTCFG_INT_RD_CLEAR_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 301 | #define MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 302 | #define MPU6050_INTCFG_FSYNC_INT_EN_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 303 | #define MPU6050_INTCFG_I2C_BYPASS_EN_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 304 | #define MPU6050_INTCFG_CLKOUT_EN_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 305 | |
| pHysiX | 6:2dc23167c8d8 | 306 | #define MPU6050_INTMODE_ACTIVEHIGH 0x00 |
| pHysiX | 6:2dc23167c8d8 | 307 | #define MPU6050_INTMODE_ACTIVELOW 0x01 |
| pHysiX | 6:2dc23167c8d8 | 308 | |
| pHysiX | 6:2dc23167c8d8 | 309 | #define MPU6050_INTDRV_PUSHPULL 0x00 |
| pHysiX | 6:2dc23167c8d8 | 310 | #define MPU6050_INTDRV_OPENDRAIN 0x01 |
| pHysiX | 6:2dc23167c8d8 | 311 | |
| pHysiX | 6:2dc23167c8d8 | 312 | #define MPU6050_INTLATCH_50USPULSE 0x00 |
| pHysiX | 6:2dc23167c8d8 | 313 | #define MPU6050_INTLATCH_WAITCLEAR 0x01 |
| pHysiX | 6:2dc23167c8d8 | 314 | |
| pHysiX | 6:2dc23167c8d8 | 315 | #define MPU6050_INTCLEAR_STATUSREAD 0x00 |
| pHysiX | 6:2dc23167c8d8 | 316 | #define MPU6050_INTCLEAR_ANYREAD 0x01 |
| pHysiX | 6:2dc23167c8d8 | 317 | |
| pHysiX | 6:2dc23167c8d8 | 318 | #define MPU6050_INTERRUPT_FF_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 319 | #define MPU6050_INTERRUPT_MOT_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 320 | #define MPU6050_INTERRUPT_ZMOT_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 321 | #define MPU6050_INTERRUPT_FIFO_OFLOW_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 322 | #define MPU6050_INTERRUPT_I2C_MST_INT_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 323 | #define MPU6050_INTERRUPT_PLL_RDY_INT_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 324 | #define MPU6050_INTERRUPT_DMP_INT_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 325 | #define MPU6050_INTERRUPT_DATA_RDY_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 326 | |
| pHysiX | 6:2dc23167c8d8 | 327 | // TODO: figure out what these actually do |
| pHysiX | 6:2dc23167c8d8 | 328 | // UMPL source code is not very obivous |
| pHysiX | 6:2dc23167c8d8 | 329 | #define MPU6050_DMPINT_5_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 330 | #define MPU6050_DMPINT_4_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 331 | #define MPU6050_DMPINT_3_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 332 | #define MPU6050_DMPINT_2_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 333 | #define MPU6050_DMPINT_1_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 334 | #define MPU6050_DMPINT_0_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 335 | |
| pHysiX | 6:2dc23167c8d8 | 336 | #define MPU6050_MOTION_MOT_XNEG_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 337 | #define MPU6050_MOTION_MOT_XPOS_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 338 | #define MPU6050_MOTION_MOT_YNEG_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 339 | #define MPU6050_MOTION_MOT_YPOS_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 340 | #define MPU6050_MOTION_MOT_ZNEG_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 341 | #define MPU6050_MOTION_MOT_ZPOS_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 342 | #define MPU6050_MOTION_MOT_ZRMOT_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 343 | |
| pHysiX | 6:2dc23167c8d8 | 344 | #define MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 345 | #define MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 346 | #define MPU6050_DELAYCTRL_I2C_SLV3_DLY_EN_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 347 | #define MPU6050_DELAYCTRL_I2C_SLV2_DLY_EN_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 348 | #define MPU6050_DELAYCTRL_I2C_SLV1_DLY_EN_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 349 | #define MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 350 | |
| pHysiX | 6:2dc23167c8d8 | 351 | #define MPU6050_PATHRESET_GYRO_RESET_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 352 | #define MPU6050_PATHRESET_ACCEL_RESET_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 353 | #define MPU6050_PATHRESET_TEMP_RESET_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 354 | |
| pHysiX | 6:2dc23167c8d8 | 355 | #define MPU6050_DETECT_ACCEL_ON_DELAY_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 356 | #define MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH 2 |
| pHysiX | 6:2dc23167c8d8 | 357 | #define MPU6050_DETECT_FF_COUNT_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 358 | #define MPU6050_DETECT_FF_COUNT_LENGTH 2 |
| pHysiX | 6:2dc23167c8d8 | 359 | #define MPU6050_DETECT_MOT_COUNT_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 360 | #define MPU6050_DETECT_MOT_COUNT_LENGTH 2 |
| pHysiX | 6:2dc23167c8d8 | 361 | |
| pHysiX | 6:2dc23167c8d8 | 362 | #define MPU6050_DETECT_DECREMENT_RESET 0x0 |
| pHysiX | 6:2dc23167c8d8 | 363 | #define MPU6050_DETECT_DECREMENT_1 0x1 |
| pHysiX | 6:2dc23167c8d8 | 364 | #define MPU6050_DETECT_DECREMENT_2 0x2 |
| pHysiX | 6:2dc23167c8d8 | 365 | #define MPU6050_DETECT_DECREMENT_4 0x3 |
| pHysiX | 6:2dc23167c8d8 | 366 | |
| pHysiX | 6:2dc23167c8d8 | 367 | #define MPU6050_USERCTRL_DMP_EN_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 368 | #define MPU6050_USERCTRL_FIFO_EN_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 369 | #define MPU6050_USERCTRL_I2C_MST_EN_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 370 | #define MPU6050_USERCTRL_I2C_IF_DIS_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 371 | #define MPU6050_USERCTRL_DMP_RESET_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 372 | #define MPU6050_USERCTRL_FIFO_RESET_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 373 | #define MPU6050_USERCTRL_I2C_MST_RESET_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 374 | #define MPU6050_USERCTRL_SIG_COND_RESET_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 375 | |
| pHysiX | 6:2dc23167c8d8 | 376 | #define MPU6050_PWR1_DEVICE_RESET_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 377 | #define MPU6050_PWR1_SLEEP_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 378 | #define MPU6050_PWR1_CYCLE_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 379 | #define MPU6050_PWR1_TEMP_DIS_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 380 | #define MPU6050_PWR1_CLKSEL_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 381 | #define MPU6050_PWR1_CLKSEL_LENGTH 3 |
| pHysiX | 6:2dc23167c8d8 | 382 | |
| pHysiX | 6:2dc23167c8d8 | 383 | #define MPU6050_CLOCK_INTERNAL 0x00 |
| pHysiX | 6:2dc23167c8d8 | 384 | #define MPU6050_CLOCK_PLL_XGYRO 0x01 |
| pHysiX | 6:2dc23167c8d8 | 385 | #define MPU6050_CLOCK_PLL_YGYRO 0x02 |
| pHysiX | 6:2dc23167c8d8 | 386 | #define MPU6050_CLOCK_PLL_ZGYRO 0x03 |
| pHysiX | 6:2dc23167c8d8 | 387 | #define MPU6050_CLOCK_PLL_EXT32K 0x04 |
| pHysiX | 6:2dc23167c8d8 | 388 | #define MPU6050_CLOCK_PLL_EXT19M 0x05 |
| pHysiX | 6:2dc23167c8d8 | 389 | #define MPU6050_CLOCK_KEEP_RESET 0x07 |
| pHysiX | 6:2dc23167c8d8 | 390 | |
| pHysiX | 6:2dc23167c8d8 | 391 | #define MPU6050_PWR2_LP_WAKE_CTRL_BIT 7 |
| pHysiX | 6:2dc23167c8d8 | 392 | #define MPU6050_PWR2_LP_WAKE_CTRL_LENGTH 2 |
| pHysiX | 6:2dc23167c8d8 | 393 | #define MPU6050_PWR2_STBY_XA_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 394 | #define MPU6050_PWR2_STBY_YA_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 395 | #define MPU6050_PWR2_STBY_ZA_BIT 3 |
| pHysiX | 6:2dc23167c8d8 | 396 | #define MPU6050_PWR2_STBY_XG_BIT 2 |
| pHysiX | 6:2dc23167c8d8 | 397 | #define MPU6050_PWR2_STBY_YG_BIT 1 |
| pHysiX | 6:2dc23167c8d8 | 398 | #define MPU6050_PWR2_STBY_ZG_BIT 0 |
| pHysiX | 6:2dc23167c8d8 | 399 | |
| pHysiX | 6:2dc23167c8d8 | 400 | #define MPU6050_WAKE_FREQ_1P25 0x0 |
| pHysiX | 6:2dc23167c8d8 | 401 | #define MPU6050_WAKE_FREQ_2P5 0x1 |
| pHysiX | 6:2dc23167c8d8 | 402 | #define MPU6050_WAKE_FREQ_5 0x2 |
| pHysiX | 6:2dc23167c8d8 | 403 | #define MPU6050_WAKE_FREQ_10 0x3 |
| pHysiX | 6:2dc23167c8d8 | 404 | |
| pHysiX | 6:2dc23167c8d8 | 405 | #define MPU6050_BANKSEL_PRFTCH_EN_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 406 | #define MPU6050_BANKSEL_CFG_USER_BANK_BIT 5 |
| pHysiX | 6:2dc23167c8d8 | 407 | #define MPU6050_BANKSEL_MEM_SEL_BIT 4 |
| pHysiX | 6:2dc23167c8d8 | 408 | #define MPU6050_BANKSEL_MEM_SEL_LENGTH 5 |
| pHysiX | 6:2dc23167c8d8 | 409 | |
| pHysiX | 6:2dc23167c8d8 | 410 | #define MPU6050_WHO_AM_I_BIT 6 |
| pHysiX | 6:2dc23167c8d8 | 411 | #define MPU6050_WHO_AM_I_LENGTH 6 |
| pHysiX | 6:2dc23167c8d8 | 412 | |
| pHysiX | 6:2dc23167c8d8 | 413 | #define MPU6050_DMP_MEMORY_BANKS 8 |
| pHysiX | 6:2dc23167c8d8 | 414 | #define MPU6050_DMP_MEMORY_BANK_SIZE 256 |
| pHysiX | 6:2dc23167c8d8 | 415 | #define MPU6050_DMP_MEMORY_CHUNK_SIZE 16 |
| pHysiX | 6:2dc23167c8d8 | 416 | |
| pHysiX | 6:2dc23167c8d8 | 417 | // note: DMP code memory blocks defined at end of header file |
| pHysiX | 6:2dc23167c8d8 | 418 | |
| pHysiX | 6:2dc23167c8d8 | 419 | class MPU6050 |
| pHysiX | 6:2dc23167c8d8 | 420 | { |
| pHysiX | 6:2dc23167c8d8 | 421 | private: |
| pHysiX | 6:2dc23167c8d8 | 422 | I2Cdev i2Cdev; |
| pHysiX | 6:2dc23167c8d8 | 423 | |
| pHysiX | 6:2dc23167c8d8 | 424 | public: |
| pHysiX | 6:2dc23167c8d8 | 425 | Serial debugSerial; |
| pHysiX | 6:2dc23167c8d8 | 426 | MPU6050(); |
| pHysiX | 6:2dc23167c8d8 | 427 | MPU6050(uint8_t address); |
| pHysiX | 6:2dc23167c8d8 | 428 | MPU6050(PinName i2cSDA, PinName i2cSCL); |
| pHysiX | 6:2dc23167c8d8 | 429 | |
| pHysiX | 6:2dc23167c8d8 | 430 | void initialize(); |
| pHysiX | 6:2dc23167c8d8 | 431 | bool testConnection(); |
| pHysiX | 6:2dc23167c8d8 | 432 | |
| pHysiX | 6:2dc23167c8d8 | 433 | // AUX_VDDIO register |
| pHysiX | 6:2dc23167c8d8 | 434 | uint8_t getAuxVDDIOLevel(); |
| pHysiX | 6:2dc23167c8d8 | 435 | void setAuxVDDIOLevel(uint8_t level); |
| pHysiX | 6:2dc23167c8d8 | 436 | |
| pHysiX | 6:2dc23167c8d8 | 437 | // SMPLRT_DIV register |
| pHysiX | 6:2dc23167c8d8 | 438 | uint8_t getRate(); |
| pHysiX | 6:2dc23167c8d8 | 439 | void setRate(uint8_t rate); |
| pHysiX | 6:2dc23167c8d8 | 440 | |
| pHysiX | 6:2dc23167c8d8 | 441 | // CONFIG register |
| pHysiX | 6:2dc23167c8d8 | 442 | uint8_t getExternalFrameSync(); |
| pHysiX | 6:2dc23167c8d8 | 443 | void setExternalFrameSync(uint8_t sync); |
| pHysiX | 6:2dc23167c8d8 | 444 | uint8_t getDLPFMode(); |
| pHysiX | 6:2dc23167c8d8 | 445 | void setDLPFMode(uint8_t bandwidth); |
| pHysiX | 6:2dc23167c8d8 | 446 | |
| pHysiX | 6:2dc23167c8d8 | 447 | // GYRO_CONFIG register |
| pHysiX | 6:2dc23167c8d8 | 448 | uint8_t getFullScaleGyroRange(); |
| pHysiX | 6:2dc23167c8d8 | 449 | void setFullScaleGyroRange(uint8_t range); |
| pHysiX | 6:2dc23167c8d8 | 450 | |
| pHysiX | 6:2dc23167c8d8 | 451 | // ACCEL_CONFIG register |
| pHysiX | 6:2dc23167c8d8 | 452 | bool getAccelXSelfTest(); |
| pHysiX | 6:2dc23167c8d8 | 453 | void setAccelXSelfTest(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 454 | bool getAccelYSelfTest(); |
| pHysiX | 6:2dc23167c8d8 | 455 | void setAccelYSelfTest(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 456 | bool getAccelZSelfTest(); |
| pHysiX | 6:2dc23167c8d8 | 457 | void setAccelZSelfTest(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 458 | uint8_t getFullScaleAccelRange(); |
| pHysiX | 6:2dc23167c8d8 | 459 | void setFullScaleAccelRange(uint8_t range); |
| pHysiX | 6:2dc23167c8d8 | 460 | uint8_t getDHPFMode(); |
| pHysiX | 6:2dc23167c8d8 | 461 | void setDHPFMode(uint8_t mode); |
| pHysiX | 6:2dc23167c8d8 | 462 | |
| pHysiX | 6:2dc23167c8d8 | 463 | // FF_THR register |
| pHysiX | 6:2dc23167c8d8 | 464 | uint8_t getFreefallDetectionThreshold(); |
| pHysiX | 6:2dc23167c8d8 | 465 | void setFreefallDetectionThreshold(uint8_t threshold); |
| pHysiX | 6:2dc23167c8d8 | 466 | |
| pHysiX | 6:2dc23167c8d8 | 467 | // FF_DUR register |
| pHysiX | 6:2dc23167c8d8 | 468 | uint8_t getFreefallDetectionDuration(); |
| pHysiX | 6:2dc23167c8d8 | 469 | void setFreefallDetectionDuration(uint8_t duration); |
| pHysiX | 6:2dc23167c8d8 | 470 | |
| pHysiX | 6:2dc23167c8d8 | 471 | // MOT_THR register |
| pHysiX | 6:2dc23167c8d8 | 472 | uint8_t getMotionDetectionThreshold(); |
| pHysiX | 6:2dc23167c8d8 | 473 | void setMotionDetectionThreshold(uint8_t threshold); |
| pHysiX | 6:2dc23167c8d8 | 474 | |
| pHysiX | 6:2dc23167c8d8 | 475 | // MOT_DUR register |
| pHysiX | 6:2dc23167c8d8 | 476 | uint8_t getMotionDetectionDuration(); |
| pHysiX | 6:2dc23167c8d8 | 477 | void setMotionDetectionDuration(uint8_t duration); |
| pHysiX | 6:2dc23167c8d8 | 478 | |
| pHysiX | 6:2dc23167c8d8 | 479 | // ZRMOT_THR register |
| pHysiX | 6:2dc23167c8d8 | 480 | uint8_t getZeroMotionDetectionThreshold(); |
| pHysiX | 6:2dc23167c8d8 | 481 | void setZeroMotionDetectionThreshold(uint8_t threshold); |
| pHysiX | 6:2dc23167c8d8 | 482 | |
| pHysiX | 6:2dc23167c8d8 | 483 | // ZRMOT_DUR register |
| pHysiX | 6:2dc23167c8d8 | 484 | uint8_t getZeroMotionDetectionDuration(); |
| pHysiX | 6:2dc23167c8d8 | 485 | void setZeroMotionDetectionDuration(uint8_t duration); |
| pHysiX | 6:2dc23167c8d8 | 486 | |
| pHysiX | 6:2dc23167c8d8 | 487 | // FIFO_EN register |
| pHysiX | 6:2dc23167c8d8 | 488 | bool getTempFIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 489 | void setTempFIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 490 | bool getXGyroFIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 491 | void setXGyroFIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 492 | bool getYGyroFIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 493 | void setYGyroFIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 494 | bool getZGyroFIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 495 | void setZGyroFIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 496 | bool getAccelFIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 497 | void setAccelFIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 498 | bool getSlave2FIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 499 | void setSlave2FIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 500 | bool getSlave1FIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 501 | void setSlave1FIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 502 | bool getSlave0FIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 503 | void setSlave0FIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 504 | |
| pHysiX | 6:2dc23167c8d8 | 505 | // I2C_MST_CTRL register |
| pHysiX | 6:2dc23167c8d8 | 506 | bool getMultiMasterEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 507 | void setMultiMasterEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 508 | bool getWaitForExternalSensorEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 509 | void setWaitForExternalSensorEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 510 | bool getSlave3FIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 511 | void setSlave3FIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 512 | bool getSlaveReadWriteTransitionEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 513 | void setSlaveReadWriteTransitionEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 514 | uint8_t getMasterClockSpeed(); |
| pHysiX | 6:2dc23167c8d8 | 515 | void setMasterClockSpeed(uint8_t speed); |
| pHysiX | 6:2dc23167c8d8 | 516 | |
| pHysiX | 6:2dc23167c8d8 | 517 | // I2C_SLV* registers (Slave 0-3) |
| pHysiX | 6:2dc23167c8d8 | 518 | uint8_t getSlaveAddress(uint8_t num); |
| pHysiX | 6:2dc23167c8d8 | 519 | void setSlaveAddress(uint8_t num, uint8_t address); |
| pHysiX | 6:2dc23167c8d8 | 520 | uint8_t getSlaveRegister(uint8_t num); |
| pHysiX | 6:2dc23167c8d8 | 521 | void setSlaveRegister(uint8_t num, uint8_t reg); |
| pHysiX | 6:2dc23167c8d8 | 522 | bool getSlaveEnabled(uint8_t num); |
| pHysiX | 6:2dc23167c8d8 | 523 | void setSlaveEnabled(uint8_t num, bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 524 | bool getSlaveWordByteSwap(uint8_t num); |
| pHysiX | 6:2dc23167c8d8 | 525 | void setSlaveWordByteSwap(uint8_t num, bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 526 | bool getSlaveWriteMode(uint8_t num); |
| pHysiX | 6:2dc23167c8d8 | 527 | void setSlaveWriteMode(uint8_t num, bool mode); |
| pHysiX | 6:2dc23167c8d8 | 528 | bool getSlaveWordGroupOffset(uint8_t num); |
| pHysiX | 6:2dc23167c8d8 | 529 | void setSlaveWordGroupOffset(uint8_t num, bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 530 | uint8_t getSlaveDataLength(uint8_t num); |
| pHysiX | 6:2dc23167c8d8 | 531 | void setSlaveDataLength(uint8_t num, uint8_t length); |
| pHysiX | 6:2dc23167c8d8 | 532 | |
| pHysiX | 6:2dc23167c8d8 | 533 | // I2C_SLV* registers (Slave 4) |
| pHysiX | 6:2dc23167c8d8 | 534 | uint8_t getSlave4Address(); |
| pHysiX | 6:2dc23167c8d8 | 535 | void setSlave4Address(uint8_t address); |
| pHysiX | 6:2dc23167c8d8 | 536 | uint8_t getSlave4Register(); |
| pHysiX | 6:2dc23167c8d8 | 537 | void setSlave4Register(uint8_t reg); |
| pHysiX | 6:2dc23167c8d8 | 538 | void setSlave4OutputByte(uint8_t data); |
| pHysiX | 6:2dc23167c8d8 | 539 | bool getSlave4Enabled(); |
| pHysiX | 6:2dc23167c8d8 | 540 | void setSlave4Enabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 541 | bool getSlave4InterruptEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 542 | void setSlave4InterruptEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 543 | bool getSlave4WriteMode(); |
| pHysiX | 6:2dc23167c8d8 | 544 | void setSlave4WriteMode(bool mode); |
| pHysiX | 6:2dc23167c8d8 | 545 | uint8_t getSlave4MasterDelay(); |
| pHysiX | 6:2dc23167c8d8 | 546 | void setSlave4MasterDelay(uint8_t delay); |
| pHysiX | 6:2dc23167c8d8 | 547 | uint8_t getSlate4InputByte(); |
| pHysiX | 6:2dc23167c8d8 | 548 | |
| pHysiX | 6:2dc23167c8d8 | 549 | // I2C_MST_STATUS register |
| pHysiX | 6:2dc23167c8d8 | 550 | bool getPassthroughStatus(); |
| pHysiX | 6:2dc23167c8d8 | 551 | bool getSlave4IsDone(); |
| pHysiX | 6:2dc23167c8d8 | 552 | bool getLostArbitration(); |
| pHysiX | 6:2dc23167c8d8 | 553 | bool getSlave4Nack(); |
| pHysiX | 6:2dc23167c8d8 | 554 | bool getSlave3Nack(); |
| pHysiX | 6:2dc23167c8d8 | 555 | bool getSlave2Nack(); |
| pHysiX | 6:2dc23167c8d8 | 556 | bool getSlave1Nack(); |
| pHysiX | 6:2dc23167c8d8 | 557 | bool getSlave0Nack(); |
| pHysiX | 6:2dc23167c8d8 | 558 | |
| pHysiX | 6:2dc23167c8d8 | 559 | // INT_PIN_CFG register |
| pHysiX | 6:2dc23167c8d8 | 560 | bool getInterruptMode(); |
| pHysiX | 6:2dc23167c8d8 | 561 | void setInterruptMode(bool mode); |
| pHysiX | 6:2dc23167c8d8 | 562 | bool getInterruptDrive(); |
| pHysiX | 6:2dc23167c8d8 | 563 | void setInterruptDrive(bool drive); |
| pHysiX | 6:2dc23167c8d8 | 564 | bool getInterruptLatch(); |
| pHysiX | 6:2dc23167c8d8 | 565 | void setInterruptLatch(bool latch); |
| pHysiX | 6:2dc23167c8d8 | 566 | bool getInterruptLatchClear(); |
| pHysiX | 6:2dc23167c8d8 | 567 | void setInterruptLatchClear(bool clear); |
| pHysiX | 6:2dc23167c8d8 | 568 | bool getFSyncInterruptLevel(); |
| pHysiX | 6:2dc23167c8d8 | 569 | void setFSyncInterruptLevel(bool level); |
| pHysiX | 6:2dc23167c8d8 | 570 | bool getFSyncInterruptEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 571 | void setFSyncInterruptEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 572 | bool getI2CBypassEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 573 | void setI2CBypassEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 574 | bool getClockOutputEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 575 | void setClockOutputEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 576 | |
| pHysiX | 6:2dc23167c8d8 | 577 | // INT_ENABLE register |
| pHysiX | 6:2dc23167c8d8 | 578 | uint8_t getIntEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 579 | void setIntEnabled(uint8_t enabled); |
| pHysiX | 6:2dc23167c8d8 | 580 | bool getIntFreefallEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 581 | void setIntFreefallEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 582 | bool getIntMotionEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 583 | void setIntMotionEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 584 | bool getIntZeroMotionEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 585 | void setIntZeroMotionEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 586 | bool getIntFIFOBufferOverflowEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 587 | void setIntFIFOBufferOverflowEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 588 | bool getIntI2CMasterEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 589 | void setIntI2CMasterEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 590 | bool getIntDataReadyEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 591 | void setIntDataReadyEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 592 | |
| pHysiX | 6:2dc23167c8d8 | 593 | // INT_STATUS register |
| pHysiX | 6:2dc23167c8d8 | 594 | uint8_t getIntStatus(); |
| pHysiX | 6:2dc23167c8d8 | 595 | bool getIntFreefallStatus(); |
| pHysiX | 6:2dc23167c8d8 | 596 | bool getIntMotionStatus(); |
| pHysiX | 6:2dc23167c8d8 | 597 | bool getIntZeroMotionStatus(); |
| pHysiX | 6:2dc23167c8d8 | 598 | bool getIntFIFOBufferOverflowStatus(); |
| pHysiX | 6:2dc23167c8d8 | 599 | bool getIntI2CMasterStatus(); |
| pHysiX | 6:2dc23167c8d8 | 600 | bool getIntDataReadyStatus(); |
| pHysiX | 6:2dc23167c8d8 | 601 | |
| pHysiX | 6:2dc23167c8d8 | 602 | // ACCEL_*OUT_* registers |
| pHysiX | 6:2dc23167c8d8 | 603 | void getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz); |
| pHysiX | 6:2dc23167c8d8 | 604 | void getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz); |
| pHysiX | 6:2dc23167c8d8 | 605 | void getAcceleration(int16_t* x, int16_t* y, int16_t* z); |
| pHysiX | 6:2dc23167c8d8 | 606 | int16_t getAccelerationX(); |
| pHysiX | 6:2dc23167c8d8 | 607 | int16_t getAccelerationY(); |
| pHysiX | 6:2dc23167c8d8 | 608 | int16_t getAccelerationZ(); |
| pHysiX | 6:2dc23167c8d8 | 609 | |
| pHysiX | 6:2dc23167c8d8 | 610 | // TEMP_OUT_* registers |
| pHysiX | 6:2dc23167c8d8 | 611 | int16_t getTemperature(); |
| pHysiX | 6:2dc23167c8d8 | 612 | |
| pHysiX | 6:2dc23167c8d8 | 613 | // GYRO_*OUT_* registers |
| pHysiX | 6:2dc23167c8d8 | 614 | void getRotation(int16_t* x, int16_t* y, int16_t* z); |
| pHysiX | 6:2dc23167c8d8 | 615 | int16_t getRotationX(); |
| pHysiX | 6:2dc23167c8d8 | 616 | int16_t getRotationY(); |
| pHysiX | 6:2dc23167c8d8 | 617 | int16_t getRotationZ(); |
| pHysiX | 6:2dc23167c8d8 | 618 | |
| pHysiX | 6:2dc23167c8d8 | 619 | // EXT_SENS_DATA_* registers |
| pHysiX | 6:2dc23167c8d8 | 620 | uint8_t getExternalSensorByte(int position); |
| pHysiX | 6:2dc23167c8d8 | 621 | uint16_t getExternalSensorWord(int position); |
| pHysiX | 6:2dc23167c8d8 | 622 | uint32_t getExternalSensorDWord(int position); |
| pHysiX | 6:2dc23167c8d8 | 623 | |
| pHysiX | 6:2dc23167c8d8 | 624 | // MOT_DETECT_STATUS register |
| pHysiX | 6:2dc23167c8d8 | 625 | bool getXNegMotionDetected(); |
| pHysiX | 6:2dc23167c8d8 | 626 | bool getXPosMotionDetected(); |
| pHysiX | 6:2dc23167c8d8 | 627 | bool getYNegMotionDetected(); |
| pHysiX | 6:2dc23167c8d8 | 628 | bool getYPosMotionDetected(); |
| pHysiX | 6:2dc23167c8d8 | 629 | bool getZNegMotionDetected(); |
| pHysiX | 6:2dc23167c8d8 | 630 | bool getZPosMotionDetected(); |
| pHysiX | 6:2dc23167c8d8 | 631 | bool getZeroMotionDetected(); |
| pHysiX | 6:2dc23167c8d8 | 632 | |
| pHysiX | 6:2dc23167c8d8 | 633 | // I2C_SLV*_DO register |
| pHysiX | 6:2dc23167c8d8 | 634 | void setSlaveOutputByte(uint8_t num, uint8_t data); |
| pHysiX | 6:2dc23167c8d8 | 635 | |
| pHysiX | 6:2dc23167c8d8 | 636 | // I2C_MST_DELAY_CTRL register |
| pHysiX | 6:2dc23167c8d8 | 637 | bool getExternalShadowDelayEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 638 | void setExternalShadowDelayEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 639 | bool getSlaveDelayEnabled(uint8_t num); |
| pHysiX | 6:2dc23167c8d8 | 640 | void setSlaveDelayEnabled(uint8_t num, bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 641 | |
| pHysiX | 6:2dc23167c8d8 | 642 | // SIGNAL_PATH_RESET register |
| pHysiX | 6:2dc23167c8d8 | 643 | void resetGyroscopePath(); |
| pHysiX | 6:2dc23167c8d8 | 644 | void resetAccelerometerPath(); |
| pHysiX | 6:2dc23167c8d8 | 645 | void resetTemperaturePath(); |
| pHysiX | 6:2dc23167c8d8 | 646 | |
| pHysiX | 6:2dc23167c8d8 | 647 | // MOT_DETECT_CTRL register |
| pHysiX | 6:2dc23167c8d8 | 648 | uint8_t getAccelerometerPowerOnDelay(); |
| pHysiX | 6:2dc23167c8d8 | 649 | void setAccelerometerPowerOnDelay(uint8_t delay); |
| pHysiX | 6:2dc23167c8d8 | 650 | uint8_t getFreefallDetectionCounterDecrement(); |
| pHysiX | 6:2dc23167c8d8 | 651 | void setFreefallDetectionCounterDecrement(uint8_t decrement); |
| pHysiX | 6:2dc23167c8d8 | 652 | uint8_t getMotionDetectionCounterDecrement(); |
| pHysiX | 6:2dc23167c8d8 | 653 | void setMotionDetectionCounterDecrement(uint8_t decrement); |
| pHysiX | 6:2dc23167c8d8 | 654 | |
| pHysiX | 6:2dc23167c8d8 | 655 | // USER_CTRL register |
| pHysiX | 6:2dc23167c8d8 | 656 | bool getFIFOEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 657 | void setFIFOEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 658 | bool getI2CMasterModeEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 659 | void setI2CMasterModeEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 660 | void switchSPIEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 661 | void resetFIFO(); |
| pHysiX | 6:2dc23167c8d8 | 662 | void resetI2CMaster(); |
| pHysiX | 6:2dc23167c8d8 | 663 | void resetSensors(); |
| pHysiX | 6:2dc23167c8d8 | 664 | |
| pHysiX | 6:2dc23167c8d8 | 665 | // PWR_MGMT_1 register |
| pHysiX | 6:2dc23167c8d8 | 666 | void reset(); |
| pHysiX | 6:2dc23167c8d8 | 667 | bool getSleepEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 668 | void setSleepEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 669 | bool getWakeCycleEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 670 | void setWakeCycleEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 671 | bool getTempSensorEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 672 | void setTempSensorEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 673 | uint8_t getClockSource(); |
| pHysiX | 6:2dc23167c8d8 | 674 | void setClockSource(uint8_t source); |
| pHysiX | 6:2dc23167c8d8 | 675 | |
| pHysiX | 6:2dc23167c8d8 | 676 | // PWR_MGMT_2 register |
| pHysiX | 6:2dc23167c8d8 | 677 | uint8_t getWakeFrequency(); |
| pHysiX | 6:2dc23167c8d8 | 678 | void setWakeFrequency(uint8_t frequency); |
| pHysiX | 6:2dc23167c8d8 | 679 | bool getStandbyXAccelEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 680 | void setStandbyXAccelEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 681 | bool getStandbyYAccelEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 682 | void setStandbyYAccelEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 683 | bool getStandbyZAccelEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 684 | void setStandbyZAccelEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 685 | bool getStandbyXGyroEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 686 | void setStandbyXGyroEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 687 | bool getStandbyYGyroEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 688 | void setStandbyYGyroEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 689 | bool getStandbyZGyroEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 690 | void setStandbyZGyroEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 691 | |
| pHysiX | 6:2dc23167c8d8 | 692 | // FIFO_COUNT_* registers |
| pHysiX | 6:2dc23167c8d8 | 693 | uint16_t getFIFOCount(); |
| pHysiX | 6:2dc23167c8d8 | 694 | |
| pHysiX | 6:2dc23167c8d8 | 695 | // FIFO_R_W register |
| pHysiX | 6:2dc23167c8d8 | 696 | uint8_t getFIFOByte(); |
| pHysiX | 6:2dc23167c8d8 | 697 | void setFIFOByte(uint8_t data); |
| pHysiX | 6:2dc23167c8d8 | 698 | void getFIFOBytes(uint8_t *data, uint8_t length); |
| pHysiX | 6:2dc23167c8d8 | 699 | |
| pHysiX | 6:2dc23167c8d8 | 700 | // WHO_AM_I register |
| pHysiX | 6:2dc23167c8d8 | 701 | uint8_t getDeviceID(); |
| pHysiX | 6:2dc23167c8d8 | 702 | void setDeviceID(uint8_t id); |
| pHysiX | 6:2dc23167c8d8 | 703 | |
| pHysiX | 6:2dc23167c8d8 | 704 | // ======== UNDOCUMENTED/DMP REGISTERS/METHODS ======== |
| pHysiX | 6:2dc23167c8d8 | 705 | |
| pHysiX | 6:2dc23167c8d8 | 706 | // XG_OFFS_TC register |
| pHysiX | 6:2dc23167c8d8 | 707 | uint8_t getOTPBankValid(); |
| pHysiX | 6:2dc23167c8d8 | 708 | void setOTPBankValid(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 709 | int8_t getXGyroOffset(); |
| pHysiX | 6:2dc23167c8d8 | 710 | void setXGyroOffset(int8_t offset); |
| pHysiX | 6:2dc23167c8d8 | 711 | |
| pHysiX | 6:2dc23167c8d8 | 712 | // YG_OFFS_TC register |
| pHysiX | 6:2dc23167c8d8 | 713 | int8_t getYGyroOffset(); |
| pHysiX | 6:2dc23167c8d8 | 714 | void setYGyroOffset(int8_t offset); |
| pHysiX | 6:2dc23167c8d8 | 715 | |
| pHysiX | 6:2dc23167c8d8 | 716 | // ZG_OFFS_TC register |
| pHysiX | 6:2dc23167c8d8 | 717 | int8_t getZGyroOffset(); |
| pHysiX | 6:2dc23167c8d8 | 718 | void setZGyroOffset(int8_t offset); |
| pHysiX | 6:2dc23167c8d8 | 719 | |
| pHysiX | 6:2dc23167c8d8 | 720 | // X_FINE_GAIN register |
| pHysiX | 6:2dc23167c8d8 | 721 | int8_t getXFineGain(); |
| pHysiX | 6:2dc23167c8d8 | 722 | void setXFineGain(int8_t gain); |
| pHysiX | 6:2dc23167c8d8 | 723 | |
| pHysiX | 6:2dc23167c8d8 | 724 | // Y_FINE_GAIN register |
| pHysiX | 6:2dc23167c8d8 | 725 | int8_t getYFineGain(); |
| pHysiX | 6:2dc23167c8d8 | 726 | void setYFineGain(int8_t gain); |
| pHysiX | 6:2dc23167c8d8 | 727 | |
| pHysiX | 6:2dc23167c8d8 | 728 | // Z_FINE_GAIN register |
| pHysiX | 6:2dc23167c8d8 | 729 | int8_t getZFineGain(); |
| pHysiX | 6:2dc23167c8d8 | 730 | void setZFineGain(int8_t gain); |
| pHysiX | 6:2dc23167c8d8 | 731 | |
| pHysiX | 6:2dc23167c8d8 | 732 | // XA_OFFS_* registers |
| pHysiX | 6:2dc23167c8d8 | 733 | int16_t getXAccelOffset(); |
| pHysiX | 6:2dc23167c8d8 | 734 | void setXAccelOffset(int16_t offset); |
| pHysiX | 6:2dc23167c8d8 | 735 | |
| pHysiX | 6:2dc23167c8d8 | 736 | // YA_OFFS_* register |
| pHysiX | 6:2dc23167c8d8 | 737 | int16_t getYAccelOffset(); |
| pHysiX | 6:2dc23167c8d8 | 738 | void setYAccelOffset(int16_t offset); |
| pHysiX | 6:2dc23167c8d8 | 739 | |
| pHysiX | 6:2dc23167c8d8 | 740 | // ZA_OFFS_* register |
| pHysiX | 6:2dc23167c8d8 | 741 | int16_t getZAccelOffset(); |
| pHysiX | 6:2dc23167c8d8 | 742 | void setZAccelOffset(int16_t offset); |
| pHysiX | 6:2dc23167c8d8 | 743 | |
| pHysiX | 6:2dc23167c8d8 | 744 | // XG_OFFS_USR* registers |
| pHysiX | 6:2dc23167c8d8 | 745 | int16_t getXGyroOffsetUser(); |
| pHysiX | 6:2dc23167c8d8 | 746 | void setXGyroOffsetUser(int16_t offset); |
| pHysiX | 6:2dc23167c8d8 | 747 | |
| pHysiX | 6:2dc23167c8d8 | 748 | // YG_OFFS_USR* register |
| pHysiX | 6:2dc23167c8d8 | 749 | int16_t getYGyroOffsetUser(); |
| pHysiX | 6:2dc23167c8d8 | 750 | void setYGyroOffsetUser(int16_t offset); |
| pHysiX | 6:2dc23167c8d8 | 751 | |
| pHysiX | 6:2dc23167c8d8 | 752 | // ZG_OFFS_USR* register |
| pHysiX | 6:2dc23167c8d8 | 753 | int16_t getZGyroOffsetUser(); |
| pHysiX | 6:2dc23167c8d8 | 754 | void setZGyroOffsetUser(int16_t offset); |
| pHysiX | 6:2dc23167c8d8 | 755 | |
| pHysiX | 6:2dc23167c8d8 | 756 | // INT_ENABLE register (DMP functions) |
| pHysiX | 6:2dc23167c8d8 | 757 | bool getIntPLLReadyEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 758 | void setIntPLLReadyEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 759 | bool getIntDMPEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 760 | void setIntDMPEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 761 | |
| pHysiX | 6:2dc23167c8d8 | 762 | // DMP_INT_STATUS |
| pHysiX | 6:2dc23167c8d8 | 763 | bool getDMPInt5Status(); |
| pHysiX | 6:2dc23167c8d8 | 764 | bool getDMPInt4Status(); |
| pHysiX | 6:2dc23167c8d8 | 765 | bool getDMPInt3Status(); |
| pHysiX | 6:2dc23167c8d8 | 766 | bool getDMPInt2Status(); |
| pHysiX | 6:2dc23167c8d8 | 767 | bool getDMPInt1Status(); |
| pHysiX | 6:2dc23167c8d8 | 768 | bool getDMPInt0Status(); |
| pHysiX | 6:2dc23167c8d8 | 769 | |
| pHysiX | 6:2dc23167c8d8 | 770 | // INT_STATUS register (DMP functions) |
| pHysiX | 6:2dc23167c8d8 | 771 | bool getIntPLLReadyStatus(); |
| pHysiX | 6:2dc23167c8d8 | 772 | bool getIntDMPStatus(); |
| pHysiX | 6:2dc23167c8d8 | 773 | |
| pHysiX | 6:2dc23167c8d8 | 774 | // USER_CTRL register (DMP functions) |
| pHysiX | 6:2dc23167c8d8 | 775 | bool getDMPEnabled(); |
| pHysiX | 6:2dc23167c8d8 | 776 | void setDMPEnabled(bool enabled); |
| pHysiX | 6:2dc23167c8d8 | 777 | void resetDMP(); |
| pHysiX | 6:2dc23167c8d8 | 778 | |
| pHysiX | 6:2dc23167c8d8 | 779 | // BANK_SEL register |
| pHysiX | 6:2dc23167c8d8 | 780 | void setMemoryBank(uint8_t bank, bool prefetchEnabled=false, bool userBank=false); |
| pHysiX | 6:2dc23167c8d8 | 781 | |
| pHysiX | 6:2dc23167c8d8 | 782 | // MEM_START_ADDR register |
| pHysiX | 6:2dc23167c8d8 | 783 | void setMemoryStartAddress(uint8_t address); |
| pHysiX | 6:2dc23167c8d8 | 784 | |
| pHysiX | 6:2dc23167c8d8 | 785 | // MEM_R_W register |
| pHysiX | 6:2dc23167c8d8 | 786 | uint8_t readMemoryByte(); |
| pHysiX | 6:2dc23167c8d8 | 787 | void writeMemoryByte(uint8_t data); |
| pHysiX | 6:2dc23167c8d8 | 788 | void readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank=0, uint8_t address=0); |
| pHysiX | 6:2dc23167c8d8 | 789 | bool writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank=0, uint8_t address=0, bool verify=true, bool useProgMem=false); |
| pHysiX | 6:2dc23167c8d8 | 790 | bool writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank=0, uint8_t address=0, bool verify=true); |
| pHysiX | 6:2dc23167c8d8 | 791 | |
| pHysiX | 6:2dc23167c8d8 | 792 | bool writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem=false); |
| pHysiX | 6:2dc23167c8d8 | 793 | bool writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize); |
| pHysiX | 6:2dc23167c8d8 | 794 | |
| pHysiX | 6:2dc23167c8d8 | 795 | // DMP_CFG_1 register |
| pHysiX | 6:2dc23167c8d8 | 796 | uint8_t getDMPConfig1(); |
| pHysiX | 6:2dc23167c8d8 | 797 | void setDMPConfig1(uint8_t config); |
| pHysiX | 6:2dc23167c8d8 | 798 | |
| pHysiX | 6:2dc23167c8d8 | 799 | // DMP_CFG_2 register |
| pHysiX | 6:2dc23167c8d8 | 800 | uint8_t getDMPConfig2(); |
| pHysiX | 6:2dc23167c8d8 | 801 | void setDMPConfig2(uint8_t config); |
| pHysiX | 6:2dc23167c8d8 | 802 | |
| pHysiX | 6:2dc23167c8d8 | 803 | // special methods for MotionApps 2.0 implementation |
| pHysiX | 6:2dc23167c8d8 | 804 | #ifdef MPU6050_INCLUDE_DMP_MOTIONAPPS20 |
| pHysiX | 6:2dc23167c8d8 | 805 | /* From MotionApps header: */ |
| pHysiX | 6:2dc23167c8d8 | 806 | uint8_t dmpInitialize(); |
| pHysiX | 6:2dc23167c8d8 | 807 | bool dmpPacketAvailable(); |
| pHysiX | 6:2dc23167c8d8 | 808 | |
| pHysiX | 6:2dc23167c8d8 | 809 | uint8_t dmpGetAccel(int32_t *data, const uint8_t* packet); |
| pHysiX | 6:2dc23167c8d8 | 810 | uint8_t dmpGetAccel(int16_t *data, const uint8_t* packet); |
| pHysiX | 6:2dc23167c8d8 | 811 | uint8_t dmpGetAccel(VectorInt16 *v, const uint8_t* packet); |
| pHysiX | 6:2dc23167c8d8 | 812 | uint8_t dmpGetQuaternion(int32_t *data, const uint8_t* packet); |
| pHysiX | 6:2dc23167c8d8 | 813 | uint8_t dmpGetQuaternion(int16_t *data, const uint8_t* packet); |
| pHysiX | 6:2dc23167c8d8 | 814 | uint8_t dmpGetQuaternion(Quaternion *q, const uint8_t* packet); |
| pHysiX | 6:2dc23167c8d8 | 815 | |
| pHysiX | 6:2dc23167c8d8 | 816 | uint8_t dmpGetGyro(int32_t *data, const uint8_t* packet); |
| pHysiX | 6:2dc23167c8d8 | 817 | uint8_t dmpGetGyro(int16_t *data, const uint8_t* packet); |
| pHysiX | 6:2dc23167c8d8 | 818 | |
| pHysiX | 6:2dc23167c8d8 | 819 | uint8_t dmpGetLinearAccel(VectorInt16 *v, VectorInt16 *vRaw, VectorFloat *gravity); |
| pHysiX | 6:2dc23167c8d8 | 820 | |
| pHysiX | 6:2dc23167c8d8 | 821 | uint8_t dmpGetLinearAccelInWorld(VectorInt16 *v, VectorInt16 *vReal, Quaternion *q); |
| pHysiX | 6:2dc23167c8d8 | 822 | |
| pHysiX | 6:2dc23167c8d8 | 823 | uint8_t dmpGetGravity(VectorFloat *v, Quaternion *q); |
| pHysiX | 6:2dc23167c8d8 | 824 | |
| pHysiX | 6:2dc23167c8d8 | 825 | uint8_t dmpGetEuler(float *data, Quaternion *q); |
| pHysiX | 6:2dc23167c8d8 | 826 | uint8_t dmpGetYawPitchRoll(float *data, Quaternion *q, VectorFloat *gravity); |
| pHysiX | 6:2dc23167c8d8 | 827 | |
| pHysiX | 6:2dc23167c8d8 | 828 | uint8_t dmpProcessFIFOPacket(const unsigned char *dmpData); |
| pHysiX | 6:2dc23167c8d8 | 829 | uint8_t dmpReadAndProcessFIFOPacket(uint8_t numPackets, uint8_t *processed); |
| pHysiX | 6:2dc23167c8d8 | 830 | |
| pHysiX | 6:2dc23167c8d8 | 831 | uint16_t dmpGetFIFOPacketSize(); |
| pHysiX | 6:2dc23167c8d8 | 832 | /* End from MotionApps header */ |
| pHysiX | 6:2dc23167c8d8 | 833 | |
| pHysiX | 6:2dc23167c8d8 | 834 | uint8_t *dmpPacketBuffer; |
| pHysiX | 6:2dc23167c8d8 | 835 | uint16_t dmpPacketSize; |
| pHysiX | 6:2dc23167c8d8 | 836 | |
| pHysiX | 6:2dc23167c8d8 | 837 | uint8_t dmpSetFIFORate(uint8_t fifoRate); |
| pHysiX | 6:2dc23167c8d8 | 838 | uint8_t dmpGetFIFORate(); |
| pHysiX | 6:2dc23167c8d8 | 839 | uint8_t dmpGetSampleStepSizeMS(); |
| pHysiX | 6:2dc23167c8d8 | 840 | uint8_t dmpGetSampleFrequency(); |
| pHysiX | 6:2dc23167c8d8 | 841 | int32_t dmpDecodeTemperature(int8_t tempReg); |
| pHysiX | 6:2dc23167c8d8 | 842 | |
| pHysiX | 6:2dc23167c8d8 | 843 | // Register callbacks after a packet of FIFO data is processed |
| pHysiX | 6:2dc23167c8d8 | 844 | //uint8_t dmpRegisterFIFORateProcess(inv_obj_func func, int16_t priority); |
| pHysiX | 6:2dc23167c8d8 | 845 | //uint8_t dmpUnregisterFIFORateProcess(inv_obj_func func); |
| pHysiX | 6:2dc23167c8d8 | 846 | uint8_t dmpRunFIFORateProcesses(); |
| pHysiX | 6:2dc23167c8d8 | 847 | |
| pHysiX | 6:2dc23167c8d8 | 848 | // Setup FIFO for various output |
| pHysiX | 6:2dc23167c8d8 | 849 | uint8_t dmpSendQuaternion(uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 850 | uint8_t dmpSendGyro(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 851 | uint8_t dmpSendAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 852 | uint8_t dmpSendLinearAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 853 | uint8_t dmpSendLinearAccelInWorld(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 854 | uint8_t dmpSendControlData(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 855 | uint8_t dmpSendSensorData(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 856 | uint8_t dmpSendExternalSensorData(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 857 | uint8_t dmpSendGravity(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 858 | uint8_t dmpSendPacketNumber(uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 859 | uint8_t dmpSendQuantizedAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 860 | uint8_t dmpSendEIS(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 861 | |
| pHysiX | 6:2dc23167c8d8 | 862 | // Get Fixed Point data from FIFO |
| pHysiX | 6:2dc23167c8d8 | 863 | uint8_t dmpGet6AxisQuaternion(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 864 | uint8_t dmpGet6AxisQuaternion(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 865 | uint8_t dmpGet6AxisQuaternion(Quaternion *q, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 866 | uint8_t dmpGetRelativeQuaternion(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 867 | uint8_t dmpGetRelativeQuaternion(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 868 | uint8_t dmpGetRelativeQuaternion(Quaternion *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 869 | uint8_t dmpGetGyro(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 870 | uint8_t dmpSetLinearAccelFilterCoefficient(float coef); |
| pHysiX | 6:2dc23167c8d8 | 871 | uint8_t dmpGetLinearAccel(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 872 | uint8_t dmpGetLinearAccel(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 873 | uint8_t dmpGetLinearAccel(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 874 | uint8_t dmpGetLinearAccelInWorld(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 875 | uint8_t dmpGetLinearAccelInWorld(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 876 | uint8_t dmpGetLinearAccelInWorld(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 877 | uint8_t dmpGetGyroAndAccelSensor(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 878 | uint8_t dmpGetGyroAndAccelSensor(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 879 | uint8_t dmpGetGyroAndAccelSensor(VectorInt16 *g, VectorInt16 *a, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 880 | uint8_t dmpGetGyroSensor(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 881 | uint8_t dmpGetGyroSensor(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 882 | uint8_t dmpGetGyroSensor(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 883 | uint8_t dmpGetControlData(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 884 | uint8_t dmpGetTemperature(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 885 | uint8_t dmpGetGravity(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 886 | uint8_t dmpGetGravity(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 887 | uint8_t dmpGetGravity(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 888 | uint8_t dmpGetUnquantizedAccel(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 889 | uint8_t dmpGetUnquantizedAccel(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 890 | uint8_t dmpGetUnquantizedAccel(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 891 | uint8_t dmpGetQuantizedAccel(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 892 | uint8_t dmpGetQuantizedAccel(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 893 | uint8_t dmpGetQuantizedAccel(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 894 | uint8_t dmpGetExternalSensorData(int32_t *data, uint16_t size, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 895 | uint8_t dmpGetEIS(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 896 | |
| pHysiX | 6:2dc23167c8d8 | 897 | // Get Floating Point data from FIFO |
| pHysiX | 6:2dc23167c8d8 | 898 | uint8_t dmpGetAccelFloat(float *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 899 | uint8_t dmpGetQuaternionFloat(float *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 900 | |
| pHysiX | 6:2dc23167c8d8 | 901 | uint8_t dmpSetFIFOProcessedCallback(void (*func) (void)); |
| pHysiX | 6:2dc23167c8d8 | 902 | |
| pHysiX | 6:2dc23167c8d8 | 903 | uint8_t dmpInitFIFOParam(); |
| pHysiX | 6:2dc23167c8d8 | 904 | uint8_t dmpCloseFIFO(); |
| pHysiX | 6:2dc23167c8d8 | 905 | uint8_t dmpSetGyroDataSource(uint8_t source); |
| pHysiX | 6:2dc23167c8d8 | 906 | uint8_t dmpDecodeQuantizedAccel(); |
| pHysiX | 6:2dc23167c8d8 | 907 | uint32_t dmpGetGyroSumOfSquare(); |
| pHysiX | 6:2dc23167c8d8 | 908 | uint32_t dmpGetAccelSumOfSquare(); |
| pHysiX | 6:2dc23167c8d8 | 909 | void dmpOverrideQuaternion(long *q); |
| pHysiX | 6:2dc23167c8d8 | 910 | #endif |
| pHysiX | 6:2dc23167c8d8 | 911 | |
| pHysiX | 6:2dc23167c8d8 | 912 | // special methods for MotionApps 4.1 implementation |
| pHysiX | 6:2dc23167c8d8 | 913 | #ifdef MPU6050_INCLUDE_DMP_MOTIONAPPS41 |
| pHysiX | 6:2dc23167c8d8 | 914 | uint8_t *dmpPacketBuffer; |
| pHysiX | 6:2dc23167c8d8 | 915 | uint16_t dmpPacketSize; |
| pHysiX | 6:2dc23167c8d8 | 916 | |
| pHysiX | 6:2dc23167c8d8 | 917 | uint8_t dmpInitialize(); |
| pHysiX | 6:2dc23167c8d8 | 918 | bool dmpPacketAvailable(); |
| pHysiX | 6:2dc23167c8d8 | 919 | |
| pHysiX | 6:2dc23167c8d8 | 920 | uint8_t dmpSetFIFORate(uint8_t fifoRate); |
| pHysiX | 6:2dc23167c8d8 | 921 | uint8_t dmpGetFIFORate(); |
| pHysiX | 6:2dc23167c8d8 | 922 | uint8_t dmpGetSampleStepSizeMS(); |
| pHysiX | 6:2dc23167c8d8 | 923 | uint8_t dmpGetSampleFrequency(); |
| pHysiX | 6:2dc23167c8d8 | 924 | int32_t dmpDecodeTemperature(int8_t tempReg); |
| pHysiX | 6:2dc23167c8d8 | 925 | |
| pHysiX | 6:2dc23167c8d8 | 926 | // Register callbacks after a packet of FIFO data is processed |
| pHysiX | 6:2dc23167c8d8 | 927 | //uint8_t dmpRegisterFIFORateProcess(inv_obj_func func, int16_t priority); |
| pHysiX | 6:2dc23167c8d8 | 928 | //uint8_t dmpUnregisterFIFORateProcess(inv_obj_func func); |
| pHysiX | 6:2dc23167c8d8 | 929 | uint8_t dmpRunFIFORateProcesses(); |
| pHysiX | 6:2dc23167c8d8 | 930 | |
| pHysiX | 6:2dc23167c8d8 | 931 | // Setup FIFO for various output |
| pHysiX | 6:2dc23167c8d8 | 932 | uint8_t dmpSendQuaternion(uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 933 | uint8_t dmpSendGyro(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 934 | uint8_t dmpSendAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 935 | uint8_t dmpSendLinearAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 936 | uint8_t dmpSendLinearAccelInWorld(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 937 | uint8_t dmpSendControlData(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 938 | uint8_t dmpSendSensorData(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 939 | uint8_t dmpSendExternalSensorData(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 940 | uint8_t dmpSendGravity(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 941 | uint8_t dmpSendPacketNumber(uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 942 | uint8_t dmpSendQuantizedAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 943 | uint8_t dmpSendEIS(uint_fast16_t elements, uint_fast16_t accuracy); |
| pHysiX | 6:2dc23167c8d8 | 944 | |
| pHysiX | 6:2dc23167c8d8 | 945 | // Get Fixed Point data from FIFO |
| pHysiX | 6:2dc23167c8d8 | 946 | uint8_t dmpGetAccel(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 947 | uint8_t dmpGetAccel(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 948 | uint8_t dmpGetAccel(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 949 | uint8_t dmpGetQuaternion(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 950 | uint8_t dmpGetQuaternion(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 951 | uint8_t dmpGetQuaternion(Quaternion *q, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 952 | uint8_t dmpGet6AxisQuaternion(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 953 | uint8_t dmpGet6AxisQuaternion(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 954 | uint8_t dmpGet6AxisQuaternion(Quaternion *q, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 955 | uint8_t dmpGetRelativeQuaternion(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 956 | uint8_t dmpGetRelativeQuaternion(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 957 | uint8_t dmpGetRelativeQuaternion(Quaternion *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 958 | uint8_t dmpGetGyro(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 959 | uint8_t dmpGetGyro(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 960 | uint8_t dmpGetGyro(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 961 | uint8_t dmpGetMag(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 962 | uint8_t dmpSetLinearAccelFilterCoefficient(float coef); |
| pHysiX | 6:2dc23167c8d8 | 963 | uint8_t dmpGetLinearAccel(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 964 | uint8_t dmpGetLinearAccel(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 965 | uint8_t dmpGetLinearAccel(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 966 | uint8_t dmpGetLinearAccel(VectorInt16 *v, VectorInt16 *vRaw, VectorFloat *gravity); |
| pHysiX | 6:2dc23167c8d8 | 967 | uint8_t dmpGetLinearAccelInWorld(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 968 | uint8_t dmpGetLinearAccelInWorld(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 969 | uint8_t dmpGetLinearAccelInWorld(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 970 | uint8_t dmpGetLinearAccelInWorld(VectorInt16 *v, VectorInt16 *vReal, Quaternion *q); |
| pHysiX | 6:2dc23167c8d8 | 971 | uint8_t dmpGetGyroAndAccelSensor(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 972 | uint8_t dmpGetGyroAndAccelSensor(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 973 | uint8_t dmpGetGyroAndAccelSensor(VectorInt16 *g, VectorInt16 *a, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 974 | uint8_t dmpGetGyroSensor(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 975 | uint8_t dmpGetGyroSensor(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 976 | uint8_t dmpGetGyroSensor(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 977 | uint8_t dmpGetControlData(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 978 | uint8_t dmpGetTemperature(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 979 | uint8_t dmpGetGravity(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 980 | uint8_t dmpGetGravity(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 981 | uint8_t dmpGetGravity(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 982 | uint8_t dmpGetGravity(VectorFloat *v, Quaternion *q); |
| pHysiX | 6:2dc23167c8d8 | 983 | uint8_t dmpGetUnquantizedAccel(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 984 | uint8_t dmpGetUnquantizedAccel(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 985 | uint8_t dmpGetUnquantizedAccel(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 986 | uint8_t dmpGetQuantizedAccel(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 987 | uint8_t dmpGetQuantizedAccel(int16_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 988 | uint8_t dmpGetQuantizedAccel(VectorInt16 *v, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 989 | uint8_t dmpGetExternalSensorData(int32_t *data, uint16_t size, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 990 | uint8_t dmpGetEIS(int32_t *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 991 | |
| pHysiX | 6:2dc23167c8d8 | 992 | uint8_t dmpGetEuler(float *data, Quaternion *q); |
| pHysiX | 6:2dc23167c8d8 | 993 | uint8_t dmpGetYawPitchRoll(float *data, Quaternion *q, VectorFloat *gravity); |
| pHysiX | 6:2dc23167c8d8 | 994 | |
| pHysiX | 6:2dc23167c8d8 | 995 | // Get Floating Point data from FIFO |
| pHysiX | 6:2dc23167c8d8 | 996 | uint8_t dmpGetAccelFloat(float *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 997 | uint8_t dmpGetQuaternionFloat(float *data, const uint8_t* packet=0); |
| pHysiX | 6:2dc23167c8d8 | 998 | |
| pHysiX | 6:2dc23167c8d8 | 999 | uint8_t dmpProcessFIFOPacket(const unsigned char *dmpData); |
| pHysiX | 6:2dc23167c8d8 | 1000 | uint8_t dmpReadAndProcessFIFOPacket(uint8_t numPackets, uint8_t *processed=NULL); |
| pHysiX | 6:2dc23167c8d8 | 1001 | |
| pHysiX | 6:2dc23167c8d8 | 1002 | uint8_t dmpSetFIFOProcessedCallback(void (*func) (void)); |
| pHysiX | 6:2dc23167c8d8 | 1003 | |
| pHysiX | 6:2dc23167c8d8 | 1004 | uint8_t dmpInitFIFOParam(); |
| pHysiX | 6:2dc23167c8d8 | 1005 | uint8_t dmpCloseFIFO(); |
| pHysiX | 6:2dc23167c8d8 | 1006 | uint8_t dmpSetGyroDataSource(uint8_t source); |
| pHysiX | 6:2dc23167c8d8 | 1007 | uint8_t dmpDecodeQuantizedAccel(); |
| pHysiX | 6:2dc23167c8d8 | 1008 | uint32_t dmpGetGyroSumOfSquare(); |
| pHysiX | 6:2dc23167c8d8 | 1009 | uint32_t dmpGetAccelSumOfSquare(); |
| pHysiX | 6:2dc23167c8d8 | 1010 | void dmpOverrideQuaternion(long *q); |
| pHysiX | 6:2dc23167c8d8 | 1011 | uint16_t dmpGetFIFOPacketSize(); |
| pHysiX | 6:2dc23167c8d8 | 1012 | #endif |
| pHysiX | 6:2dc23167c8d8 | 1013 | |
| pHysiX | 6:2dc23167c8d8 | 1014 | private: |
| pHysiX | 6:2dc23167c8d8 | 1015 | uint8_t devAddr; |
| pHysiX | 6:2dc23167c8d8 | 1016 | uint8_t buffer[14]; |
| pHysiX | 6:2dc23167c8d8 | 1017 | }; |
| pHysiX | 6:2dc23167c8d8 | 1018 | |
| pHysiX | 6:2dc23167c8d8 | 1019 | #endif /* _MPU6050_H_ */ |