A PWM/duty cycle measurement library using Timer2
Dependents: PWMAverage_test pwm_duty_measurement
PWMAverage.cpp@0:5da51898a166, 2012-08-29 (annotated)
- Committer:
- p07gbar
- Date:
- Wed Aug 29 11:25:55 2012 +0000
- Revision:
- 0:5da51898a166
- Child:
- 1:34a9269390d9
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
p07gbar | 0:5da51898a166 | 1 | #include "PWMAverage.h" |
p07gbar | 0:5da51898a166 | 2 | |
p07gbar | 0:5da51898a166 | 3 | #define PWMA_PCLK 96000000 |
p07gbar | 0:5da51898a166 | 4 | |
p07gbar | 0:5da51898a166 | 5 | |
p07gbar | 0:5da51898a166 | 6 | PWMAverage * PWMAverage::instance; |
p07gbar | 0:5da51898a166 | 7 | |
p07gbar | 0:5da51898a166 | 8 | |
p07gbar | 0:5da51898a166 | 9 | void PWMAverage::_tisr() |
p07gbar | 0:5da51898a166 | 10 | { |
p07gbar | 0:5da51898a166 | 11 | //printf("."); |
p07gbar | 0:5da51898a166 | 12 | int cr0 = LPC_TIM2->CR0; |
p07gbar | 0:5da51898a166 | 13 | int cr1 = LPC_TIM2->CR1; |
p07gbar | 0:5da51898a166 | 14 | |
p07gbar | 0:5da51898a166 | 15 | LPC_TIM2->IR = 0x3F; |
p07gbar | 0:5da51898a166 | 16 | |
p07gbar | 0:5da51898a166 | 17 | LPC_TIM2->TCR = 3; |
p07gbar | 0:5da51898a166 | 18 | LPC_TIM2->TCR = 1; |
p07gbar | 0:5da51898a166 | 19 | |
p07gbar | 0:5da51898a166 | 20 | //LPC_NVIC->ICPR0 |= (1<<3) |
p07gbar | 0:5da51898a166 | 21 | |
p07gbar | 0:5da51898a166 | 22 | if(!instance->starting) |
p07gbar | 0:5da51898a166 | 23 | { |
p07gbar | 0:5da51898a166 | 24 | instance->total += cr1 + 82; |
p07gbar | 0:5da51898a166 | 25 | instance->totalup += cr0 + 82; |
p07gbar | 0:5da51898a166 | 26 | instance->count_++; |
p07gbar | 0:5da51898a166 | 27 | } |
p07gbar | 0:5da51898a166 | 28 | else instance->starting = false; |
p07gbar | 0:5da51898a166 | 29 | |
p07gbar | 0:5da51898a166 | 30 | } |
p07gbar | 0:5da51898a166 | 31 | |
p07gbar | 0:5da51898a166 | 32 | PWMAverage::PWMAverage(PinName cap0, PinName cap1) |
p07gbar | 0:5da51898a166 | 33 | { |
p07gbar | 0:5da51898a166 | 34 | printf("\n\rPWMAverage\n\r"); |
p07gbar | 0:5da51898a166 | 35 | prescaler_point = 0x0; |
p07gbar | 0:5da51898a166 | 36 | configure(); |
p07gbar | 0:5da51898a166 | 37 | stop(); |
p07gbar | 0:5da51898a166 | 38 | |
p07gbar | 0:5da51898a166 | 39 | printf("Done config\n\r"); |
p07gbar | 0:5da51898a166 | 40 | |
p07gbar | 0:5da51898a166 | 41 | timeMult = (1/PWMA_PCLK)*(prescaler_point+1); |
p07gbar | 0:5da51898a166 | 42 | timeDiv = PWMA_PCLK/(prescaler_point+1); |
p07gbar | 0:5da51898a166 | 43 | instance = this; |
p07gbar | 0:5da51898a166 | 44 | } |
p07gbar | 0:5da51898a166 | 45 | |
p07gbar | 0:5da51898a166 | 46 | void PWMAverage::reset() |
p07gbar | 0:5da51898a166 | 47 | { |
p07gbar | 0:5da51898a166 | 48 | count_ = 0; |
p07gbar | 0:5da51898a166 | 49 | total = 0; |
p07gbar | 0:5da51898a166 | 50 | totalup = 0; |
p07gbar | 0:5da51898a166 | 51 | LPC_TIM2->TCR = 2; |
p07gbar | 0:5da51898a166 | 52 | LPC_TIM2->TCR = 0; |
p07gbar | 0:5da51898a166 | 53 | } |
p07gbar | 0:5da51898a166 | 54 | |
p07gbar | 0:5da51898a166 | 55 | void PWMAverage::start() |
p07gbar | 0:5da51898a166 | 56 | { |
p07gbar | 0:5da51898a166 | 57 | //reset(); |
p07gbar | 0:5da51898a166 | 58 | starting = true; |
p07gbar | 0:5da51898a166 | 59 | enable(true); |
p07gbar | 0:5da51898a166 | 60 | NVIC_EnableIRQ(TIMER2_IRQn); |
p07gbar | 0:5da51898a166 | 61 | } |
p07gbar | 0:5da51898a166 | 62 | |
p07gbar | 0:5da51898a166 | 63 | void PWMAverage::stop() |
p07gbar | 0:5da51898a166 | 64 | { |
p07gbar | 0:5da51898a166 | 65 | enable(false); |
p07gbar | 0:5da51898a166 | 66 | NVIC_DisableIRQ(TIMER2_IRQn); |
p07gbar | 0:5da51898a166 | 67 | } |
p07gbar | 0:5da51898a166 | 68 | |
p07gbar | 0:5da51898a166 | 69 | float PWMAverage::read() |
p07gbar | 0:5da51898a166 | 70 | { |
p07gbar | 0:5da51898a166 | 71 | if(period() != 0) return float(avg_up()/period()); |
p07gbar | 0:5da51898a166 | 72 | else return 0; |
p07gbar | 0:5da51898a166 | 73 | } |
p07gbar | 0:5da51898a166 | 74 | |
p07gbar | 0:5da51898a166 | 75 | double PWMAverage::avg_up() |
p07gbar | 0:5da51898a166 | 76 | { |
p07gbar | 0:5da51898a166 | 77 | if(count_!= 0) return (double(totalup)/timeDiv)/double(count_); |
p07gbar | 0:5da51898a166 | 78 | else return 0; |
p07gbar | 0:5da51898a166 | 79 | |
p07gbar | 0:5da51898a166 | 80 | } |
p07gbar | 0:5da51898a166 | 81 | |
p07gbar | 0:5da51898a166 | 82 | float PWMAverage::avg_UP() |
p07gbar | 0:5da51898a166 | 83 | { |
p07gbar | 0:5da51898a166 | 84 | if(count_!= 0) return float((double(totalup)/timeDiv)/double(count_)); |
p07gbar | 0:5da51898a166 | 85 | else return 0; |
p07gbar | 0:5da51898a166 | 86 | } |
p07gbar | 0:5da51898a166 | 87 | |
p07gbar | 0:5da51898a166 | 88 | double PWMAverage::avg_down() |
p07gbar | 0:5da51898a166 | 89 | { |
p07gbar | 0:5da51898a166 | 90 | if(count_!= 0) return (double(total-totalup)/timeDiv)/double(count_); |
p07gbar | 0:5da51898a166 | 91 | else return 0; |
p07gbar | 0:5da51898a166 | 92 | } |
p07gbar | 0:5da51898a166 | 93 | |
p07gbar | 0:5da51898a166 | 94 | double PWMAverage::period() |
p07gbar | 0:5da51898a166 | 95 | { |
p07gbar | 0:5da51898a166 | 96 | if(count_!= 0) return (double(total)/timeDiv)/double(count_); |
p07gbar | 0:5da51898a166 | 97 | else return 0; |
p07gbar | 0:5da51898a166 | 98 | } |
p07gbar | 0:5da51898a166 | 99 | |
p07gbar | 0:5da51898a166 | 100 | int PWMAverage::count() |
p07gbar | 0:5da51898a166 | 101 | { |
p07gbar | 0:5da51898a166 | 102 | return count_; |
p07gbar | 0:5da51898a166 | 103 | } |
p07gbar | 0:5da51898a166 | 104 | |
p07gbar | 0:5da51898a166 | 105 | void PWMAverage::enable(bool yn) |
p07gbar | 0:5da51898a166 | 106 | { |
p07gbar | 0:5da51898a166 | 107 | LPC_TIM2->TCR = yn; |
p07gbar | 0:5da51898a166 | 108 | } |
p07gbar | 0:5da51898a166 | 109 | |
p07gbar | 0:5da51898a166 | 110 | void PWMAverage::configure() |
p07gbar | 0:5da51898a166 | 111 | { |
p07gbar | 0:5da51898a166 | 112 | //Power Periferal |
p07gbar | 0:5da51898a166 | 113 | |
p07gbar | 0:5da51898a166 | 114 | LPC_SC->PCONP |= (1<<22); |
p07gbar | 0:5da51898a166 | 115 | |
p07gbar | 0:5da51898a166 | 116 | //Setup Pins |
p07gbar | 0:5da51898a166 | 117 | |
p07gbar | 0:5da51898a166 | 118 | LPC_PINCON->PINSEL0 |= (0x3<<8); |
p07gbar | 0:5da51898a166 | 119 | LPC_PINCON->PINSEL0 |= (0x3<<10); |
p07gbar | 0:5da51898a166 | 120 | |
p07gbar | 0:5da51898a166 | 121 | //Setup clock source |
p07gbar | 0:5da51898a166 | 122 | |
p07gbar | 0:5da51898a166 | 123 | LPC_SC->PCLKSEL1 |= (0x1<<12); |
p07gbar | 0:5da51898a166 | 124 | |
p07gbar | 0:5da51898a166 | 125 | //Setup PC |
p07gbar | 0:5da51898a166 | 126 | |
p07gbar | 0:5da51898a166 | 127 | LPC_TIM2->PR = prescaler_point; |
p07gbar | 0:5da51898a166 | 128 | |
p07gbar | 0:5da51898a166 | 129 | //Setup CAP0 - Store on fall |
p07gbar | 0:5da51898a166 | 130 | |
p07gbar | 0:5da51898a166 | 131 | LPC_TIM2->CCR |= 0x2; |
p07gbar | 0:5da51898a166 | 132 | |
p07gbar | 0:5da51898a166 | 133 | //Setup CAP1 - Store on rise, interrupt |
p07gbar | 0:5da51898a166 | 134 | |
p07gbar | 0:5da51898a166 | 135 | LPC_TIM2->CCR |= 0x5<<3; |
p07gbar | 0:5da51898a166 | 136 | |
p07gbar | 0:5da51898a166 | 137 | //Setup IRQs |
p07gbar | 0:5da51898a166 | 138 | NVIC_DisableIRQ(TIMER2_IRQn); |
p07gbar | 0:5da51898a166 | 139 | NVIC_SetVector(TIMER2_IRQn, (uint32_t)&_tisr); |
p07gbar | 0:5da51898a166 | 140 | NVIC_EnableIRQ(TIMER2_IRQn); |
p07gbar | 0:5da51898a166 | 141 | // |
p07gbar | 0:5da51898a166 | 142 | } |