File content as of revision 5:b93b28e126fe:

enum command_reg {
    MODE1   = 0x00,
    MODE2,
    LEDOUT0,
    LEDOUT1,
    LEDOUT2,
    LEDOUT3,
    GRPPWM  = 0x06,
    GRPFREQ,
    PWM0    = 0x08,
    PWM1,
    PWM2,
    PWM3,
    PWM4,
    PWM5,
    PWM6,
    PWM7,
    PWM8,
    PWM9,
    PWM10,
    PWM11,
    PWM12,
    PWM13,
    PWM14,
    PWM15,
    IREF0   = 0x18,
    IREF1,
    IREF2,
    IREF3,
    IREF4,
    IREF5,
    IREF6,
    IREF7,
    IREF8,
    IREF9,
    IREF10,
    IREF11,
    IREF12,
    IREF13,
    IREF14,
    IREF15,
    RAMP_RATE_GRP0  = 0x28,
    STEP_TIME_GRP0,
    HOLD_CNTL_GRP0,
    IREF_GRP0,
    RAMP_RATE_GRP1,
    STEP_TIME_GRP1,
    HOLD_CNTL_GRP1,
    IREF_GRP1,
    RAMP_RATE_GRP2,
    STEP_TIME_GRP2,
    HOLD_CNTL_GRP2,
    IREF_GRP2,
    RAMP_RATE_GRP3,
    STEP_TIME_GRP3,
    HOLD_CNTL_GRP3,
    IREF_GRP3,
    GRAD_MODE_SEL0  = 0x38,
    GRAD_MODE_SEL1,
    GRAD_GRP_SEL0,
    GRAD_GRP_SEL1,
    GRAD_GRP_SEL2,
    GRAD_GRP_SEL3,
    GRAD_CNTL,
    OFFSET  = 0x3F,
    SUBADR1,
    SUBADR2,
    SUBADR3,
    ALLCALLADR,
    PWMALL,
    IREFALL,
    EFLAG0,
    EFLAG1,

    REGISTER_START          = MODE1,
    LEDOUT_REGISTER_START   = LEDOUT0,
    PWM_REGISTER_START      = PWM0,
    IREF_REGISTER_START     = IREF0,
};