NXP PCA9544A device driver: 4-channel I2C-bus multiplexer with interrupt logic

Revision:
0:905d325977dc
Child:
1:4d19097c0571
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/pca9544a.h	Tue Sep 12 17:16:49 2017 +0000
@@ -0,0 +1,52 @@
+// NXP PCA9544A: 8-channel I2C switch with reset
+
+#define PCA9544A_BASE_ADDR_7BIT     0x70
+#define MAX_CHANNELS                4
+
+class PCA9544A
+{
+public:
+    /**
+    * Constructor
+    *
+    * @param i2c I2C class servicing the multiplexer
+    * @param addr_3bit address of the multiplexer (A0-A2 pin strapping)
+    *          Valid values are 0-7
+    */
+    PCA9544A(I2C * i2c, uint8_t addr_3bit) : _i2c(i2c) {
+        _addr_8bit = ((addr_3bit & 0x7) + PCA9544A_BASE_ADDR_7BIT) << 1;
+    }
+
+    /**
+    * Reset the multiplexer.  All devices connected to the downstream side of
+    * the multiplexer are removed from the I2C bus.  Reset is accomplished by
+    * deselecting all channels through soft configuration.
+    *
+    * @returns true if successful
+    */
+    bool reset(void) {
+        const char channel = 0;
+        return _i2c->write(_addr_8bit, &channel, 1) == 0;
+    }
+
+    /**
+    * Enable access to one of the eight devices on the downstream side of
+    * the multiplexer.
+    *
+    * @param channel channel to activate.  Valid values are 0-7.
+    *
+    * @returns true if successful
+    */
+    bool select_channel(const uint8_t channel) {
+        if (channel < MAX_CHANNELS) {
+            char channel_mask = 0x4 | channel;
+            return _i2c->write(_addr_8bit, (const char *)&channel_mask, 1) == 0;
+        } else {
+            return false;
+        }
+    }
+
+protected:
+    int             _addr_8bit;
+    I2C *           _i2c;
+};