Steve Martin / libdev_pca9544a

NXP PCA9544A device driver: 4-channel I2C-bus multiplexer with interrupt logic

pca9544a.h@0:905d325977dc, 2017-09-12 (annotated)

Committer:
ninensei
Date:
Tue Sep 12 17:16:49 2017 +0000
Revision:
0:905d325977dc
Child:
1:4d19097c0571
Initial driver release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ninensei 0:905d325977dc 1 // NXP PCA9544A: 8-channel I2C switch with reset
ninensei 0:905d325977dc 2
ninensei 0:905d325977dc 3 #define PCA9544A_BASE_ADDR_7BIT 0x70
ninensei 0:905d325977dc 4 #define MAX_CHANNELS 4
ninensei 0:905d325977dc 5
ninensei 0:905d325977dc 6 class PCA9544A
ninensei 0:905d325977dc 7 {
ninensei 0:905d325977dc 8 public:
ninensei 0:905d325977dc 9 /**
ninensei 0:905d325977dc 10 * Constructor
ninensei 0:905d325977dc 11 *
ninensei 0:905d325977dc 12 * @param i2c I2C class servicing the multiplexer
ninensei 0:905d325977dc 13 * @param addr_3bit address of the multiplexer (A0-A2 pin strapping)
ninensei 0:905d325977dc 14 * Valid values are 0-7
ninensei 0:905d325977dc 15 */
ninensei 0:905d325977dc 16 PCA9544A(I2C * i2c, uint8_t addr_3bit) : _i2c(i2c) {
ninensei 0:905d325977dc 17 _addr_8bit = ((addr_3bit & 0x7) + PCA9544A_BASE_ADDR_7BIT) << 1;
ninensei 0:905d325977dc 18 }
ninensei 0:905d325977dc 19
ninensei 0:905d325977dc 20 /**
ninensei 0:905d325977dc 21 * Reset the multiplexer. All devices connected to the downstream side of
ninensei 0:905d325977dc 22 * the multiplexer are removed from the I2C bus. Reset is accomplished by
ninensei 0:905d325977dc 23 * deselecting all channels through soft configuration.
ninensei 0:905d325977dc 24 *
ninensei 0:905d325977dc 25 * @returns true if successful
ninensei 0:905d325977dc 26 */
ninensei 0:905d325977dc 27 bool reset(void) {
ninensei 0:905d325977dc 28 const char channel = 0;
ninensei 0:905d325977dc 29 return _i2c->write(_addr_8bit, &channel, 1) == 0;
ninensei 0:905d325977dc 30 }
ninensei 0:905d325977dc 31
ninensei 0:905d325977dc 32 /**
ninensei 0:905d325977dc 33 * Enable access to one of the eight devices on the downstream side of
ninensei 0:905d325977dc 34 * the multiplexer.
ninensei 0:905d325977dc 35 *
ninensei 0:905d325977dc 36 * @param channel channel to activate. Valid values are 0-7.
ninensei 0:905d325977dc 37 *
ninensei 0:905d325977dc 38 * @returns true if successful
ninensei 0:905d325977dc 39 */
ninensei 0:905d325977dc 40 bool select_channel(const uint8_t channel) {
ninensei 0:905d325977dc 41 if (channel < MAX_CHANNELS) {
ninensei 0:905d325977dc 42 char channel_mask = 0x4 | channel;
ninensei 0:905d325977dc 43 return _i2c->write(_addr_8bit, (const char *)&channel_mask, 1) == 0;
ninensei 0:905d325977dc 44 } else {
ninensei 0:905d325977dc 45 return false;
ninensei 0:905d325977dc 46 }
ninensei 0:905d325977dc 47 }
ninensei 0:905d325977dc 48
ninensei 0:905d325977dc 49 protected:
ninensei 0:905d325977dc 50 int _addr_8bit;
ninensei 0:905d325977dc 51 I2C * _i2c;
ninensei 0:905d325977dc 52 };