Fixed algorithm to read 3 bytes of accelerometer data registers

Fork of COG4050_adxl355_adxl357 by valeria toffoli

Revision:
10:e054891b3598
Parent:
8:9e6ead2ee8d7
diff -r 6c803986dbde -r e054891b3598 ADXL35x/ADXL355.h
--- a/ADXL35x/ADXL355.h	Mon Sep 03 10:39:56 2018 +0000
+++ b/ADXL35x/ADXL355.h	Mon Sep 10 10:01:49 2018 +0000
@@ -4,15 +4,15 @@
 
 class ADXL355
 {
-public: 
+public:
     // -------------------------- //
-    // CONST AND VARIABLES        // 
-    const static float t_sens = -9.05;    
-    const static float t_bias = 1852;    
+    // CONST AND VARIABLES        //
+    const static float t_sens = -9.05;
+    const static float t_bias = 1852;
     float axis355_sens;
-    float axis357_sens;     
+    float axis357_sens; //scale factor in ug per LSB
     // -------------------------- //
-    // REGISTERS                  // 
+    // REGISTERS                  //
     // -------------------------- //
     typedef enum {
         DEVID_AD = 0x00,
@@ -55,20 +55,20 @@
     // -------------------------- //
     // REGISTERS - DEFAULT VALUES //
     // -------------------------- //
-    // Modes - POWER_CTL  
+    // Modes - POWER_CTL
     typedef enum {
         DRDY_OFF = 0x04,
         TEMP_OFF = 0x02,
         STANDBY = 0x01,
         MEASUREMENT = 0x00
-    } ADXL355_modes_t;    
-    // Activate Threshold - ACT_EN  
+    } ADXL355_modes_t;
+    // Activate Threshold - ACT_EN
     typedef enum {
         ACT_Z = 0x04,
         ACT_Y = 0x02,
         ACT_X = 0x01
     } ADXL355_act_ctl_t;
-    // High-Pass and Low-Pass Filter - FILTER 
+    // High-Pass and Low-Pass Filter - FILTER
     typedef enum {
         HPFOFF = 0x00,
         HPF247 = 0x10,
@@ -89,20 +89,20 @@
         ODR7Hz = 0x09,
         ODR3HZ = 0x0A
     } ADXL355_filter_ctl_t;
-    // External timing register - INT_MAP 
+    // External timing register - INT_MAP
     typedef enum {
         OVR_EN = 0x04,
         FULL_EN = 0x02,
         RDY_EN = 0x01
     } ADXL355_intmap_ctl_t;
-    // External timing register - SYNC 
+    // External timing register - SYNC
     typedef enum {
         EXT_CLK = 0x04,
         INT_SYNC = 0x00,
         EXT_SYNC_NO_INT = 0x01,
         EXT_SYNC_INT = 0x02
-    } ADXL355_sync_ctl_t; 
-    // polarity and range - RANGE 
+    } ADXL355_sync_ctl_t;
+    // polarity and range - RANGE
     typedef enum {
         RANGE2G = 0x01,
         RANGE4G = 0x02,
@@ -111,41 +111,41 @@
         RANGE20 = 0x02,
         RANGE40 = 0x03
     } ADXL355_range_ctl_t;
-    // self test interrupt - INT 
+    // self test interrupt - INT
     typedef enum {
         ST2 = 0x02,
         ST1 = 0x01
     } ADXL355_int_ctl_t;
     // -------------------------- //
-    // FUNCTIONS                  //  
+    // FUNCTIONS                  //
     // -------------------------- //
-    // SPI configuration & constructor 
+    // SPI configuration & constructor
     ADXL355(PinName cs_pin , PinName MOSI , PinName MISO , PinName SCK );
     void frequency(int hz);
-    // Low level SPI bus comm methods 
+    // Low level SPI bus comm methods
     void reset(void);
     void write_reg(ADXL355_register_t reg, uint8_t data);
     void write_reg_u16(ADXL355_register_t reg, uint16_t data);
     uint8_t read_reg(ADXL355_register_t reg);
     uint16_t read_reg_u16(ADXL355_register_t reg);
     uint32_t read_reg_u20(ADXL355_register_t reg);
-    // ADXL general register R/W methods 
+    // ADXL general register R/W methods
     void set_power_ctl_reg(uint8_t data);
     void set_filter_ctl_reg(ADXL355_filter_ctl_t hpf, ADXL355_filter_ctl_t odr);
     void set_clk(ADXL355_sync_ctl_t data);
     void set_device(ADXL355_range_ctl_t range);
     uint8_t read_status();
-    // ADXL X/Y/Z/T scanning methods   
+    // ADXL X/Y/Z/T scanning methods
     uint32_t scanx();
     uint32_t scany();
     uint32_t scanz();
     uint16_t scant();
-    // ADXL activity methods 
+    // ADXL activity methods
     void set_activity_axis(ADXL355_act_ctl_t axis);
     void set_activity_cnt(uint8_t count);
     void set_activity_threshold(uint8_t data_h, uint8_t data_l);
     void set_inactivity();
-    // ADXL interrupt methods 
+    // ADXL interrupt methods
     void set_interrupt1_pin(PinName in, ADXL355_intmap_ctl_t mode);
     void set_interrupt2_pin(PinName in, ADXL355_intmap_ctl_t mode);
     void enable_interrupt1();
@@ -156,24 +156,25 @@
     void set_polling_interrupt2_pin(uint8_t data);
     bool get_int1();
     bool get_int2();
-    // ADXL FIFO methods 
+    // ADXL FIFO methods
     uint8_t fifo_read_nr_of_entries();
     void fifo_setup(uint8_t nr_of_entries);
     uint32_t fifo_read_u32();
     uint64_t fifo_scan();
     // ADXL conversion
     float convert(uint32_t data);
-    
+
 private:
     // SPI adxl355;                 ///< SPI instance of the ADXL
-    SPI adxl355; DigitalOut cs;
-    const static uint8_t _DEVICE_AD = 0xAD;     // contect of DEVID_AD (only-read) register 
-    const static uint8_t _RESET = 0x52;         // reset code 
+    SPI adxl355;
+    DigitalOut cs;
+    const static uint8_t _DEVICE_AD = 0xAD;     // contect of DEVID_AD (only-read) register
+    const static uint8_t _RESET = 0x52;         // reset code
     const static uint8_t _DUMMY_BYTE = 0xAA;    // 10101010
     const static uint8_t _WRITE_REG_CMD = 0x00; // write register
     const static uint8_t _READ_REG_CMD = 0x01;  // read register
     const static uint8_t _READ_FIFO_CMD = 0x23; // read FIFO
     const static uint8_t _SPI_MODE = 0;         // timing scheme
 };
- 
+
 #endif
\ No newline at end of file