fix LPC812 PWM
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targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_cortex.c@113:b3775bf36a83, 2016-04-19 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Apr 19 11:15:15 2016 +0100
- Revision:
- 113:b3775bf36a83
- Parent:
- 0:9b334a45a8ff
Synchronized with git revision 896981126b34b6d9441e3eea77881c67a1ae3dbd
Full URL: https://github.com/mbedmicro/mbed/commit/896981126b34b6d9441e3eea77881c67a1ae3dbd/
Exporter tool addition for e2 studio
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l0xx_hal_cortex.c |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
mbed_official | 113:b3775bf36a83 | 5 | * @version V1.5.0 |
mbed_official | 113:b3775bf36a83 | 6 | * @date 8-January-2016 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief CORTEX HAL module driver. |
bogdanm | 0:9b334a45a8ff | 8 | * This file provides firmware functions to manage the following |
bogdanm | 0:9b334a45a8ff | 9 | * functionalities of the CORTEX: |
bogdanm | 0:9b334a45a8ff | 10 | * + Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 11 | * + Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 12 | * |
bogdanm | 0:9b334a45a8ff | 13 | @verbatim |
bogdanm | 0:9b334a45a8ff | 14 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 15 | ##### How to use this driver ##### |
bogdanm | 0:9b334a45a8ff | 16 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 17 | |
bogdanm | 0:9b334a45a8ff | 18 | [..] |
bogdanm | 0:9b334a45a8ff | 19 | *** How to configure Interrupts using CORTEX HAL driver *** |
bogdanm | 0:9b334a45a8ff | 20 | =========================================================== |
bogdanm | 0:9b334a45a8ff | 21 | [..] |
bogdanm | 0:9b334a45a8ff | 22 | This section provide functions allowing to configure the NVIC interrupts (IRQ). |
bogdanm | 0:9b334a45a8ff | 23 | The Cortex-M0+ exceptions are managed by CMSIS functions. |
bogdanm | 0:9b334a45a8ff | 24 | (#) Enable and Configure the priority of the selected IRQ Channels. |
bogdanm | 0:9b334a45a8ff | 25 | The priority can be 0..3. |
bogdanm | 0:9b334a45a8ff | 26 | |
bogdanm | 0:9b334a45a8ff | 27 | -@- Lower priority values gives higher priority. |
bogdanm | 0:9b334a45a8ff | 28 | -@- Priority Order: |
bogdanm | 0:9b334a45a8ff | 29 | (#@) Lowest priority. |
bogdanm | 0:9b334a45a8ff | 30 | (#@) Lowest hardware priority (IRQn position). |
bogdanm | 0:9b334a45a8ff | 31 | |
bogdanm | 0:9b334a45a8ff | 32 | (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() |
bogdanm | 0:9b334a45a8ff | 33 | |
bogdanm | 0:9b334a45a8ff | 34 | (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() |
bogdanm | 0:9b334a45a8ff | 35 | |
bogdanm | 0:9b334a45a8ff | 36 | [..] |
bogdanm | 0:9b334a45a8ff | 37 | *** How to configure Systick using CORTEX HAL driver *** |
bogdanm | 0:9b334a45a8ff | 38 | ======================================================== |
bogdanm | 0:9b334a45a8ff | 39 | [..] |
bogdanm | 0:9b334a45a8ff | 40 | Setup SysTick Timer for time base |
bogdanm | 0:9b334a45a8ff | 41 | |
bogdanm | 0:9b334a45a8ff | 42 | (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which |
bogdanm | 0:9b334a45a8ff | 43 | is a CMSIS function that: |
bogdanm | 0:9b334a45a8ff | 44 | (++) Configures the SysTick Reload register with value passed as function parameter. |
bogdanm | 0:9b334a45a8ff | 45 | (++) Configures the SysTick IRQ priority to the lowest value (0x03). |
bogdanm | 0:9b334a45a8ff | 46 | (++) Resets the SysTick Counter register. |
bogdanm | 0:9b334a45a8ff | 47 | (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). |
bogdanm | 0:9b334a45a8ff | 48 | (++) Enables the SysTick Interrupt. |
bogdanm | 0:9b334a45a8ff | 49 | (++) Starts the SysTick Counter. |
bogdanm | 0:9b334a45a8ff | 50 | |
mbed_official | 113:b3775bf36a83 | 51 | (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the function |
mbed_official | 113:b3775bf36a83 | 52 | HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the |
mbed_official | 113:b3775bf36a83 | 53 | HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() function is defined |
mbed_official | 113:b3775bf36a83 | 54 | inside the stm32l0xx_hal_cortex.c file. |
bogdanm | 0:9b334a45a8ff | 55 | |
bogdanm | 0:9b334a45a8ff | 56 | (+) You can change the SysTick IRQ priority by calling the |
bogdanm | 0:9b334a45a8ff | 57 | HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function |
bogdanm | 0:9b334a45a8ff | 58 | call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function. |
bogdanm | 0:9b334a45a8ff | 59 | |
bogdanm | 0:9b334a45a8ff | 60 | (+) To adjust the SysTick time base, use the following formula: |
bogdanm | 0:9b334a45a8ff | 61 | |
bogdanm | 0:9b334a45a8ff | 62 | Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) |
bogdanm | 0:9b334a45a8ff | 63 | (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function |
bogdanm | 0:9b334a45a8ff | 64 | (++) Reload Value should not exceed 0xFFFFFF |
bogdanm | 0:9b334a45a8ff | 65 | |
bogdanm | 0:9b334a45a8ff | 66 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 67 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 68 | * @attention |
bogdanm | 0:9b334a45a8ff | 69 | * |
mbed_official | 113:b3775bf36a83 | 70 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 71 | * |
bogdanm | 0:9b334a45a8ff | 72 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 73 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 74 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 75 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 76 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 77 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 78 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 79 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 80 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 81 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 82 | * |
bogdanm | 0:9b334a45a8ff | 83 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 84 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 85 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 86 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 87 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 88 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 89 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 90 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 91 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 92 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 93 | * |
bogdanm | 0:9b334a45a8ff | 94 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 95 | */ |
bogdanm | 0:9b334a45a8ff | 96 | |
bogdanm | 0:9b334a45a8ff | 97 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 98 | #include "stm32l0xx_hal.h" |
bogdanm | 0:9b334a45a8ff | 99 | |
bogdanm | 0:9b334a45a8ff | 100 | /** @addtogroup STM32L0xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 101 | * @{ |
bogdanm | 0:9b334a45a8ff | 102 | */ |
bogdanm | 0:9b334a45a8ff | 103 | |
mbed_official | 113:b3775bf36a83 | 104 | #ifdef HAL_CORTEX_MODULE_ENABLED |
mbed_official | 113:b3775bf36a83 | 105 | |
bogdanm | 0:9b334a45a8ff | 106 | /** @addtogroup CORTEX |
bogdanm | 0:9b334a45a8ff | 107 | * @brief CORTEX HAL module driver |
bogdanm | 0:9b334a45a8ff | 108 | * @{ |
bogdanm | 0:9b334a45a8ff | 109 | */ |
bogdanm | 0:9b334a45a8ff | 110 | |
bogdanm | 0:9b334a45a8ff | 111 | /* Private types -------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 112 | /* Private variables ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 113 | /* Private constants ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 114 | /* Private macros ------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 115 | /* Private functions ---------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 116 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 117 | |
bogdanm | 0:9b334a45a8ff | 118 | /** @addtogroup CORTEX_Exported_Functions |
bogdanm | 0:9b334a45a8ff | 119 | * @{ |
bogdanm | 0:9b334a45a8ff | 120 | */ |
bogdanm | 0:9b334a45a8ff | 121 | |
bogdanm | 0:9b334a45a8ff | 122 | |
bogdanm | 0:9b334a45a8ff | 123 | /** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 124 | * @brief Initialization and Configuration functions |
bogdanm | 0:9b334a45a8ff | 125 | * |
bogdanm | 0:9b334a45a8ff | 126 | @verbatim |
bogdanm | 0:9b334a45a8ff | 127 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 128 | ##### Initialization and de-initialization functions ##### |
bogdanm | 0:9b334a45a8ff | 129 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 130 | [..] |
bogdanm | 0:9b334a45a8ff | 131 | This section provides the CORTEX HAL driver functions allowing to configure Interrupts |
bogdanm | 0:9b334a45a8ff | 132 | Systick functionalities |
bogdanm | 0:9b334a45a8ff | 133 | |
bogdanm | 0:9b334a45a8ff | 134 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 135 | * @{ |
bogdanm | 0:9b334a45a8ff | 136 | */ |
bogdanm | 0:9b334a45a8ff | 137 | |
bogdanm | 0:9b334a45a8ff | 138 | /** |
bogdanm | 0:9b334a45a8ff | 139 | * @brief Sets the priority of an interrupt. |
bogdanm | 0:9b334a45a8ff | 140 | * @param IRQn: External interrupt number . |
bogdanm | 0:9b334a45a8ff | 141 | * This parameter can be an enumerator of IRQn_Type enumeration |
bogdanm | 0:9b334a45a8ff | 142 | * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) |
bogdanm | 0:9b334a45a8ff | 143 | * @param PreemptPriority: The pre-emption priority for the IRQn channel. |
bogdanm | 0:9b334a45a8ff | 144 | * This parameter can be a value between 0 and 3. |
bogdanm | 0:9b334a45a8ff | 145 | * A lower priority value indicates a higher priority |
bogdanm | 0:9b334a45a8ff | 146 | * @param SubPriority: The subpriority level for the IRQ channel. |
bogdanm | 0:9b334a45a8ff | 147 | * with stm32l0xx devices, this parameter is a dummy value and it is ignored, because |
bogdanm | 0:9b334a45a8ff | 148 | * no subpriority supported in Cortex M0+ based products. |
bogdanm | 0:9b334a45a8ff | 149 | * @retval None |
bogdanm | 0:9b334a45a8ff | 150 | */ |
bogdanm | 0:9b334a45a8ff | 151 | void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) |
bogdanm | 0:9b334a45a8ff | 152 | { |
bogdanm | 0:9b334a45a8ff | 153 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 154 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); |
bogdanm | 0:9b334a45a8ff | 155 | NVIC_SetPriority(IRQn,PreemptPriority); |
bogdanm | 0:9b334a45a8ff | 156 | } |
bogdanm | 0:9b334a45a8ff | 157 | |
bogdanm | 0:9b334a45a8ff | 158 | /** |
bogdanm | 0:9b334a45a8ff | 159 | * @brief Enables a device specific interrupt in the NVIC interrupt controller. |
bogdanm | 0:9b334a45a8ff | 160 | * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() |
bogdanm | 0:9b334a45a8ff | 161 | * function should be called before. |
bogdanm | 0:9b334a45a8ff | 162 | * @param IRQn External interrupt number . |
bogdanm | 0:9b334a45a8ff | 163 | * This parameter can be an enumerator of IRQn_Type enumeration |
bogdanm | 0:9b334a45a8ff | 164 | * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) |
bogdanm | 0:9b334a45a8ff | 165 | * @retval None |
bogdanm | 0:9b334a45a8ff | 166 | */ |
bogdanm | 0:9b334a45a8ff | 167 | void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) |
bogdanm | 0:9b334a45a8ff | 168 | { |
bogdanm | 0:9b334a45a8ff | 169 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 170 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); |
bogdanm | 0:9b334a45a8ff | 171 | |
bogdanm | 0:9b334a45a8ff | 172 | /* Enable interrupt */ |
bogdanm | 0:9b334a45a8ff | 173 | NVIC_EnableIRQ(IRQn); |
bogdanm | 0:9b334a45a8ff | 174 | } |
bogdanm | 0:9b334a45a8ff | 175 | |
bogdanm | 0:9b334a45a8ff | 176 | /** |
bogdanm | 0:9b334a45a8ff | 177 | * @brief Disables a device specific interrupt in the NVIC interrupt controller. |
bogdanm | 0:9b334a45a8ff | 178 | * @param IRQn External interrupt number . |
bogdanm | 0:9b334a45a8ff | 179 | * This parameter can be an enumerator of IRQn_Type enumeration |
bogdanm | 0:9b334a45a8ff | 180 | * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) |
bogdanm | 0:9b334a45a8ff | 181 | * @retval None |
bogdanm | 0:9b334a45a8ff | 182 | */ |
bogdanm | 0:9b334a45a8ff | 183 | void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) |
bogdanm | 0:9b334a45a8ff | 184 | { |
bogdanm | 0:9b334a45a8ff | 185 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 186 | assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); |
bogdanm | 0:9b334a45a8ff | 187 | |
bogdanm | 0:9b334a45a8ff | 188 | /* Disable interrupt */ |
bogdanm | 0:9b334a45a8ff | 189 | NVIC_DisableIRQ(IRQn); |
bogdanm | 0:9b334a45a8ff | 190 | } |
bogdanm | 0:9b334a45a8ff | 191 | |
bogdanm | 0:9b334a45a8ff | 192 | /** |
bogdanm | 0:9b334a45a8ff | 193 | * @brief Initiates a system reset request to reset the MCU. |
bogdanm | 0:9b334a45a8ff | 194 | * @retval None |
bogdanm | 0:9b334a45a8ff | 195 | */ |
bogdanm | 0:9b334a45a8ff | 196 | void HAL_NVIC_SystemReset(void) |
bogdanm | 0:9b334a45a8ff | 197 | { |
bogdanm | 0:9b334a45a8ff | 198 | /* System Reset */ |
bogdanm | 0:9b334a45a8ff | 199 | NVIC_SystemReset(); |
bogdanm | 0:9b334a45a8ff | 200 | } |
bogdanm | 0:9b334a45a8ff | 201 | |
bogdanm | 0:9b334a45a8ff | 202 | /** |
bogdanm | 0:9b334a45a8ff | 203 | * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. |
bogdanm | 0:9b334a45a8ff | 204 | * Counter is in free running mode to generate periodic interrupts. |
bogdanm | 0:9b334a45a8ff | 205 | * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. |
bogdanm | 0:9b334a45a8ff | 206 | * @retval status: - 0 Function succeeded. |
bogdanm | 0:9b334a45a8ff | 207 | * - 1 Function failed. |
bogdanm | 0:9b334a45a8ff | 208 | */ |
bogdanm | 0:9b334a45a8ff | 209 | uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) |
bogdanm | 0:9b334a45a8ff | 210 | { |
bogdanm | 0:9b334a45a8ff | 211 | return SysTick_Config(TicksNumb); |
bogdanm | 0:9b334a45a8ff | 212 | } |
bogdanm | 0:9b334a45a8ff | 213 | /** |
bogdanm | 0:9b334a45a8ff | 214 | * @} |
bogdanm | 0:9b334a45a8ff | 215 | */ |
bogdanm | 0:9b334a45a8ff | 216 | |
bogdanm | 0:9b334a45a8ff | 217 | /** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 218 | * @brief Cortex control functions |
bogdanm | 0:9b334a45a8ff | 219 | * |
bogdanm | 0:9b334a45a8ff | 220 | @verbatim |
bogdanm | 0:9b334a45a8ff | 221 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 222 | ##### Peripheral Control functions ##### |
bogdanm | 0:9b334a45a8ff | 223 | ============================================================================== |
bogdanm | 0:9b334a45a8ff | 224 | [..] |
bogdanm | 0:9b334a45a8ff | 225 | This subsection provides a set of functions allowing to control the CORTEX |
bogdanm | 0:9b334a45a8ff | 226 | (NVIC, SYSTICK) functionalities. |
bogdanm | 0:9b334a45a8ff | 227 | |
bogdanm | 0:9b334a45a8ff | 228 | |
bogdanm | 0:9b334a45a8ff | 229 | @endverbatim |
bogdanm | 0:9b334a45a8ff | 230 | * @{ |
bogdanm | 0:9b334a45a8ff | 231 | */ |
bogdanm | 0:9b334a45a8ff | 232 | |
bogdanm | 0:9b334a45a8ff | 233 | |
mbed_official | 113:b3775bf36a83 | 234 | /** |
mbed_official | 113:b3775bf36a83 | 235 | * @brief Gets the priority of an interrupt. |
mbed_official | 113:b3775bf36a83 | 236 | * @param IRQn: External interrupt number. |
mbed_official | 113:b3775bf36a83 | 237 | * This parameter can be an enumerator of IRQn_Type enumeration |
mbed_official | 113:b3775bf36a83 | 238 | * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l0xxxx.h)) |
mbed_official | 113:b3775bf36a83 | 239 | * @retval None |
mbed_official | 113:b3775bf36a83 | 240 | */ |
mbed_official | 113:b3775bf36a83 | 241 | uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn) |
mbed_official | 113:b3775bf36a83 | 242 | { |
mbed_official | 113:b3775bf36a83 | 243 | /* Get priority for Cortex-M system or device specific interrupts */ |
mbed_official | 113:b3775bf36a83 | 244 | return NVIC_GetPriority(IRQn); |
mbed_official | 113:b3775bf36a83 | 245 | } |
bogdanm | 0:9b334a45a8ff | 246 | |
bogdanm | 0:9b334a45a8ff | 247 | /** |
bogdanm | 0:9b334a45a8ff | 248 | * @brief Sets Pending bit of an external interrupt. |
mbed_official | 113:b3775bf36a83 | 249 | * @param IRQn: External interrupt number |
mbed_official | 113:b3775bf36a83 | 250 | * This parameter can be an enumerator of IRQn_Type enumeration |
bogdanm | 0:9b334a45a8ff | 251 | * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) |
bogdanm | 0:9b334a45a8ff | 252 | * @retval None |
bogdanm | 0:9b334a45a8ff | 253 | */ |
bogdanm | 0:9b334a45a8ff | 254 | void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) |
bogdanm | 0:9b334a45a8ff | 255 | { |
bogdanm | 0:9b334a45a8ff | 256 | /* Set interrupt pending */ |
bogdanm | 0:9b334a45a8ff | 257 | NVIC_SetPendingIRQ(IRQn); |
bogdanm | 0:9b334a45a8ff | 258 | } |
bogdanm | 0:9b334a45a8ff | 259 | |
bogdanm | 0:9b334a45a8ff | 260 | /** |
bogdanm | 0:9b334a45a8ff | 261 | * @brief Gets Pending Interrupt (reads the pending register in the NVIC |
bogdanm | 0:9b334a45a8ff | 262 | * and returns the pending bit for the specified interrupt). |
mbed_official | 113:b3775bf36a83 | 263 | * @param IRQn: External interrupt number . |
bogdanm | 0:9b334a45a8ff | 264 | * This parameter can be an enumerator of IRQn_Type enumeration |
bogdanm | 0:9b334a45a8ff | 265 | * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) |
bogdanm | 0:9b334a45a8ff | 266 | * @retval status: - 0 Interrupt status is not pending. |
bogdanm | 0:9b334a45a8ff | 267 | * - 1 Interrupt status is pending. |
bogdanm | 0:9b334a45a8ff | 268 | */ |
bogdanm | 0:9b334a45a8ff | 269 | uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) |
bogdanm | 0:9b334a45a8ff | 270 | { |
bogdanm | 0:9b334a45a8ff | 271 | /* Return 1 if pending else 0 */ |
bogdanm | 0:9b334a45a8ff | 272 | return NVIC_GetPendingIRQ(IRQn); |
bogdanm | 0:9b334a45a8ff | 273 | } |
bogdanm | 0:9b334a45a8ff | 274 | |
bogdanm | 0:9b334a45a8ff | 275 | /** |
bogdanm | 0:9b334a45a8ff | 276 | * @brief Clears the pending bit of an external interrupt. |
mbed_official | 113:b3775bf36a83 | 277 | * @param IRQn: External interrupt number . |
mbed_official | 113:b3775bf36a83 | 278 | * This parameter can be an enumerator of IRQn_Type enumeration |
bogdanm | 0:9b334a45a8ff | 279 | * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) |
bogdanm | 0:9b334a45a8ff | 280 | * @retval None |
bogdanm | 0:9b334a45a8ff | 281 | */ |
bogdanm | 0:9b334a45a8ff | 282 | void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) |
bogdanm | 0:9b334a45a8ff | 283 | { |
bogdanm | 0:9b334a45a8ff | 284 | /* Clear pending interrupt */ |
bogdanm | 0:9b334a45a8ff | 285 | NVIC_ClearPendingIRQ(IRQn); |
bogdanm | 0:9b334a45a8ff | 286 | } |
bogdanm | 0:9b334a45a8ff | 287 | |
bogdanm | 0:9b334a45a8ff | 288 | |
bogdanm | 0:9b334a45a8ff | 289 | /** |
bogdanm | 0:9b334a45a8ff | 290 | * @brief Configures the SysTick clock source. |
bogdanm | 0:9b334a45a8ff | 291 | * @param CLKSource: specifies the SysTick clock source. |
bogdanm | 0:9b334a45a8ff | 292 | * This parameter can be one of the following values: |
bogdanm | 0:9b334a45a8ff | 293 | * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source. |
bogdanm | 0:9b334a45a8ff | 294 | * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. |
bogdanm | 0:9b334a45a8ff | 295 | * @retval None |
bogdanm | 0:9b334a45a8ff | 296 | */ |
bogdanm | 0:9b334a45a8ff | 297 | void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) |
bogdanm | 0:9b334a45a8ff | 298 | { |
bogdanm | 0:9b334a45a8ff | 299 | /* Check the parameters */ |
bogdanm | 0:9b334a45a8ff | 300 | assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); |
bogdanm | 0:9b334a45a8ff | 301 | if (CLKSource == SYSTICK_CLKSOURCE_HCLK) |
bogdanm | 0:9b334a45a8ff | 302 | { |
bogdanm | 0:9b334a45a8ff | 303 | SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; |
bogdanm | 0:9b334a45a8ff | 304 | } |
bogdanm | 0:9b334a45a8ff | 305 | else |
bogdanm | 0:9b334a45a8ff | 306 | { |
bogdanm | 0:9b334a45a8ff | 307 | SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; |
bogdanm | 0:9b334a45a8ff | 308 | } |
bogdanm | 0:9b334a45a8ff | 309 | } |
bogdanm | 0:9b334a45a8ff | 310 | |
bogdanm | 0:9b334a45a8ff | 311 | /** |
bogdanm | 0:9b334a45a8ff | 312 | * @brief This function handles SYSTICK interrupt request. |
bogdanm | 0:9b334a45a8ff | 313 | * @retval None |
bogdanm | 0:9b334a45a8ff | 314 | */ |
bogdanm | 0:9b334a45a8ff | 315 | void HAL_SYSTICK_IRQHandler(void) |
bogdanm | 0:9b334a45a8ff | 316 | { |
bogdanm | 0:9b334a45a8ff | 317 | HAL_SYSTICK_Callback(); |
bogdanm | 0:9b334a45a8ff | 318 | } |
bogdanm | 0:9b334a45a8ff | 319 | |
bogdanm | 0:9b334a45a8ff | 320 | /** |
bogdanm | 0:9b334a45a8ff | 321 | * @brief SYSTICK callback. |
bogdanm | 0:9b334a45a8ff | 322 | * @retval None |
bogdanm | 0:9b334a45a8ff | 323 | */ |
bogdanm | 0:9b334a45a8ff | 324 | __weak void HAL_SYSTICK_Callback(void) |
bogdanm | 0:9b334a45a8ff | 325 | { |
bogdanm | 0:9b334a45a8ff | 326 | /* NOTE : This function Should not be modified, when the callback is needed, |
bogdanm | 0:9b334a45a8ff | 327 | the HAL_SYSTICK_Callback could be implemented in the user file |
bogdanm | 0:9b334a45a8ff | 328 | */ |
bogdanm | 0:9b334a45a8ff | 329 | } |
bogdanm | 0:9b334a45a8ff | 330 | |
mbed_official | 113:b3775bf36a83 | 331 | #if (__MPU_PRESENT == 1) |
mbed_official | 113:b3775bf36a83 | 332 | /** |
mbed_official | 113:b3775bf36a83 | 333 | * @brief Initialize and configure the Region and the memory to be protected. |
mbed_official | 113:b3775bf36a83 | 334 | * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains |
mbed_official | 113:b3775bf36a83 | 335 | * the initialization and configuration information. |
mbed_official | 113:b3775bf36a83 | 336 | * @retval None |
mbed_official | 113:b3775bf36a83 | 337 | */ |
mbed_official | 113:b3775bf36a83 | 338 | void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) |
mbed_official | 113:b3775bf36a83 | 339 | { |
mbed_official | 113:b3775bf36a83 | 340 | /* Check the parameters */ |
mbed_official | 113:b3775bf36a83 | 341 | assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); |
mbed_official | 113:b3775bf36a83 | 342 | assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); |
mbed_official | 113:b3775bf36a83 | 343 | |
mbed_official | 113:b3775bf36a83 | 344 | /* Set the Region number */ |
mbed_official | 113:b3775bf36a83 | 345 | MPU->RNR = MPU_Init->Number; |
mbed_official | 113:b3775bf36a83 | 346 | |
mbed_official | 113:b3775bf36a83 | 347 | if ((MPU_Init->Enable) == MPU_REGION_ENABLE) |
mbed_official | 113:b3775bf36a83 | 348 | { |
mbed_official | 113:b3775bf36a83 | 349 | /* Check the parameters */ |
mbed_official | 113:b3775bf36a83 | 350 | assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec)); |
mbed_official | 113:b3775bf36a83 | 351 | assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); |
mbed_official | 113:b3775bf36a83 | 352 | assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable)); |
mbed_official | 113:b3775bf36a83 | 353 | assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); |
mbed_official | 113:b3775bf36a83 | 354 | assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); |
mbed_official | 113:b3775bf36a83 | 355 | assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); |
mbed_official | 113:b3775bf36a83 | 356 | assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); |
mbed_official | 113:b3775bf36a83 | 357 | |
mbed_official | 113:b3775bf36a83 | 358 | /* Set the base adsress and set the 4 LSB to 0 */ |
mbed_official | 113:b3775bf36a83 | 359 | MPU->RBAR = (MPU_Init->BaseAddress) & 0xfffffff0; |
mbed_official | 113:b3775bf36a83 | 360 | |
mbed_official | 113:b3775bf36a83 | 361 | /* Fill the field RASR */ |
mbed_official | 113:b3775bf36a83 | 362 | MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | |
mbed_official | 113:b3775bf36a83 | 363 | ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | |
mbed_official | 113:b3775bf36a83 | 364 | ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | |
mbed_official | 113:b3775bf36a83 | 365 | ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | |
mbed_official | 113:b3775bf36a83 | 366 | ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | |
mbed_official | 113:b3775bf36a83 | 367 | ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | |
mbed_official | 113:b3775bf36a83 | 368 | ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | |
mbed_official | 113:b3775bf36a83 | 369 | ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); |
mbed_official | 113:b3775bf36a83 | 370 | } |
mbed_official | 113:b3775bf36a83 | 371 | else |
mbed_official | 113:b3775bf36a83 | 372 | { |
mbed_official | 113:b3775bf36a83 | 373 | MPU->RBAR = 0x00; |
mbed_official | 113:b3775bf36a83 | 374 | MPU->RASR = 0x00; |
mbed_official | 113:b3775bf36a83 | 375 | } |
mbed_official | 113:b3775bf36a83 | 376 | } |
mbed_official | 113:b3775bf36a83 | 377 | #endif /* __MPU_PRESENT */ |
mbed_official | 113:b3775bf36a83 | 378 | |
mbed_official | 113:b3775bf36a83 | 379 | |
mbed_official | 113:b3775bf36a83 | 380 | /** |
mbed_official | 113:b3775bf36a83 | 381 | * @} |
mbed_official | 113:b3775bf36a83 | 382 | */ |
mbed_official | 113:b3775bf36a83 | 383 | |
bogdanm | 0:9b334a45a8ff | 384 | /** |
bogdanm | 0:9b334a45a8ff | 385 | * @} |
bogdanm | 0:9b334a45a8ff | 386 | */ |
bogdanm | 0:9b334a45a8ff | 387 | |
bogdanm | 0:9b334a45a8ff | 388 | /** |
bogdanm | 0:9b334a45a8ff | 389 | * @} |
bogdanm | 0:9b334a45a8ff | 390 | */ |
bogdanm | 0:9b334a45a8ff | 391 | |
bogdanm | 0:9b334a45a8ff | 392 | #endif /* HAL_CORTEX_MODULE_ENABLED */ |
bogdanm | 0:9b334a45a8ff | 393 | /** |
bogdanm | 0:9b334a45a8ff | 394 | * @} |
bogdanm | 0:9b334a45a8ff | 395 | */ |
bogdanm | 0:9b334a45a8ff | 396 | |
bogdanm | 0:9b334a45a8ff | 397 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
bogdanm | 0:9b334a45a8ff | 398 |