fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
113:b3775bf36a83
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l0xx_hal_cortex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.2.0
bogdanm 0:9b334a45a8ff 6 * @date 06-February-2015
bogdanm 0:9b334a45a8ff 7 * @brief CORTEX HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the CORTEX:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 12 *
bogdanm 0:9b334a45a8ff 13 @verbatim
bogdanm 0:9b334a45a8ff 14 ==============================================================================
bogdanm 0:9b334a45a8ff 15 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17
bogdanm 0:9b334a45a8ff 18 [..]
bogdanm 0:9b334a45a8ff 19 *** How to configure Interrupts using CORTEX HAL driver ***
bogdanm 0:9b334a45a8ff 20 ===========================================================
bogdanm 0:9b334a45a8ff 21 [..]
bogdanm 0:9b334a45a8ff 22 This section provide functions allowing to configure the NVIC interrupts (IRQ).
bogdanm 0:9b334a45a8ff 23 The Cortex-M0+ exceptions are managed by CMSIS functions.
bogdanm 0:9b334a45a8ff 24 (#) Enable and Configure the priority of the selected IRQ Channels.
bogdanm 0:9b334a45a8ff 25 The priority can be 0..3.
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 -@- Lower priority values gives higher priority.
bogdanm 0:9b334a45a8ff 28 -@- Priority Order:
bogdanm 0:9b334a45a8ff 29 (#@) Lowest priority.
bogdanm 0:9b334a45a8ff 30 (#@) Lowest hardware priority (IRQn position).
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority()
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ()
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 [..]
bogdanm 0:9b334a45a8ff 37 *** How to configure Systick using CORTEX HAL driver ***
bogdanm 0:9b334a45a8ff 38 ========================================================
bogdanm 0:9b334a45a8ff 39 [..]
bogdanm 0:9b334a45a8ff 40 Setup SysTick Timer for time base
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42 (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which
bogdanm 0:9b334a45a8ff 43 is a CMSIS function that:
bogdanm 0:9b334a45a8ff 44 (++) Configures the SysTick Reload register with value passed as function parameter.
bogdanm 0:9b334a45a8ff 45 (++) Configures the SysTick IRQ priority to the lowest value (0x03).
bogdanm 0:9b334a45a8ff 46 (++) Resets the SysTick Counter register.
bogdanm 0:9b334a45a8ff 47 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
bogdanm 0:9b334a45a8ff 48 (++) Enables the SysTick Interrupt.
bogdanm 0:9b334a45a8ff 49 (++) Starts the SysTick Counter.
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
bogdanm 0:9b334a45a8ff 52 __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
bogdanm 0:9b334a45a8ff 53 HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
bogdanm 0:9b334a45a8ff 54 inside the stm32l0xx_hal_cortex.h file.
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 (+) You can change the SysTick IRQ priority by calling the
bogdanm 0:9b334a45a8ff 57 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
bogdanm 0:9b334a45a8ff 58 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 (+) To adjust the SysTick time base, use the following formula:
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
bogdanm 0:9b334a45a8ff 63 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
bogdanm 0:9b334a45a8ff 64 (++) Reload Value should not exceed 0xFFFFFF
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 @endverbatim
bogdanm 0:9b334a45a8ff 67 ******************************************************************************
bogdanm 0:9b334a45a8ff 68 * @attention
bogdanm 0:9b334a45a8ff 69 *
bogdanm 0:9b334a45a8ff 70 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 71 *
bogdanm 0:9b334a45a8ff 72 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 73 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 74 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 75 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 76 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 77 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 78 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 79 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 80 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 81 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 82 *
bogdanm 0:9b334a45a8ff 83 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 84 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 85 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 86 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 87 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 88 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 89 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 90 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 91 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 92 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 93 *
bogdanm 0:9b334a45a8ff 94 ******************************************************************************
bogdanm 0:9b334a45a8ff 95 */
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 98 #include "stm32l0xx_hal.h"
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 101 * @{
bogdanm 0:9b334a45a8ff 102 */
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 /** @addtogroup CORTEX
bogdanm 0:9b334a45a8ff 105 * @brief CORTEX HAL module driver
bogdanm 0:9b334a45a8ff 106 * @{
bogdanm 0:9b334a45a8ff 107 */
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 #ifdef HAL_CORTEX_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 /* Private types -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 112 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 113 /* Private constants ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 114 /* Private macros ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 115 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 116 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 /** @addtogroup CORTEX_Exported_Functions
bogdanm 0:9b334a45a8ff 119 * @{
bogdanm 0:9b334a45a8ff 120 */
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 /** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 124 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 125 *
bogdanm 0:9b334a45a8ff 126 @verbatim
bogdanm 0:9b334a45a8ff 127 ==============================================================================
bogdanm 0:9b334a45a8ff 128 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 129 ==============================================================================
bogdanm 0:9b334a45a8ff 130 [..]
bogdanm 0:9b334a45a8ff 131 This section provides the CORTEX HAL driver functions allowing to configure Interrupts
bogdanm 0:9b334a45a8ff 132 Systick functionalities
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 @endverbatim
bogdanm 0:9b334a45a8ff 135 * @{
bogdanm 0:9b334a45a8ff 136 */
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 /**
bogdanm 0:9b334a45a8ff 139 * @brief Sets the priority of an interrupt.
bogdanm 0:9b334a45a8ff 140 * @param IRQn: External interrupt number .
bogdanm 0:9b334a45a8ff 141 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 142 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
bogdanm 0:9b334a45a8ff 143 * @param PreemptPriority: The pre-emption priority for the IRQn channel.
bogdanm 0:9b334a45a8ff 144 * This parameter can be a value between 0 and 3.
bogdanm 0:9b334a45a8ff 145 * A lower priority value indicates a higher priority
bogdanm 0:9b334a45a8ff 146 * @param SubPriority: The subpriority level for the IRQ channel.
bogdanm 0:9b334a45a8ff 147 * with stm32l0xx devices, this parameter is a dummy value and it is ignored, because
bogdanm 0:9b334a45a8ff 148 * no subpriority supported in Cortex M0+ based products.
bogdanm 0:9b334a45a8ff 149 * @retval None
bogdanm 0:9b334a45a8ff 150 */
bogdanm 0:9b334a45a8ff 151 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
bogdanm 0:9b334a45a8ff 152 {
bogdanm 0:9b334a45a8ff 153 /* Check the parameters */
bogdanm 0:9b334a45a8ff 154 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
bogdanm 0:9b334a45a8ff 155 NVIC_SetPriority(IRQn,PreemptPriority);
bogdanm 0:9b334a45a8ff 156 }
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 /**
bogdanm 0:9b334a45a8ff 159 * @brief Enables a device specific interrupt in the NVIC interrupt controller.
bogdanm 0:9b334a45a8ff 160 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
bogdanm 0:9b334a45a8ff 161 * function should be called before.
bogdanm 0:9b334a45a8ff 162 * @param IRQn External interrupt number .
bogdanm 0:9b334a45a8ff 163 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 164 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
bogdanm 0:9b334a45a8ff 165 * @retval None
bogdanm 0:9b334a45a8ff 166 */
bogdanm 0:9b334a45a8ff 167 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 168 {
bogdanm 0:9b334a45a8ff 169 /* Check the parameters */
bogdanm 0:9b334a45a8ff 170 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 /* Enable interrupt */
bogdanm 0:9b334a45a8ff 173 NVIC_EnableIRQ(IRQn);
bogdanm 0:9b334a45a8ff 174 }
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /**
bogdanm 0:9b334a45a8ff 177 * @brief Disables a device specific interrupt in the NVIC interrupt controller.
bogdanm 0:9b334a45a8ff 178 * @param IRQn External interrupt number .
bogdanm 0:9b334a45a8ff 179 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 180 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
bogdanm 0:9b334a45a8ff 181 * @retval None
bogdanm 0:9b334a45a8ff 182 */
bogdanm 0:9b334a45a8ff 183 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 184 {
bogdanm 0:9b334a45a8ff 185 /* Check the parameters */
bogdanm 0:9b334a45a8ff 186 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /* Disable interrupt */
bogdanm 0:9b334a45a8ff 189 NVIC_DisableIRQ(IRQn);
bogdanm 0:9b334a45a8ff 190 }
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 /**
bogdanm 0:9b334a45a8ff 193 * @brief Initiates a system reset request to reset the MCU.
bogdanm 0:9b334a45a8ff 194 * @param None
bogdanm 0:9b334a45a8ff 195 * @retval None
bogdanm 0:9b334a45a8ff 196 */
bogdanm 0:9b334a45a8ff 197 void HAL_NVIC_SystemReset(void)
bogdanm 0:9b334a45a8ff 198 {
bogdanm 0:9b334a45a8ff 199 /* System Reset */
bogdanm 0:9b334a45a8ff 200 NVIC_SystemReset();
bogdanm 0:9b334a45a8ff 201 }
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 /**
bogdanm 0:9b334a45a8ff 204 * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
bogdanm 0:9b334a45a8ff 205 * Counter is in free running mode to generate periodic interrupts.
bogdanm 0:9b334a45a8ff 206 * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
bogdanm 0:9b334a45a8ff 207 * @retval status: - 0 Function succeeded.
bogdanm 0:9b334a45a8ff 208 * - 1 Function failed.
bogdanm 0:9b334a45a8ff 209 */
bogdanm 0:9b334a45a8ff 210 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
bogdanm 0:9b334a45a8ff 211 {
bogdanm 0:9b334a45a8ff 212 return SysTick_Config(TicksNumb);
bogdanm 0:9b334a45a8ff 213 }
bogdanm 0:9b334a45a8ff 214 /**
bogdanm 0:9b334a45a8ff 215 * @}
bogdanm 0:9b334a45a8ff 216 */
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218 /** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
bogdanm 0:9b334a45a8ff 219 * @brief Cortex control functions
bogdanm 0:9b334a45a8ff 220 *
bogdanm 0:9b334a45a8ff 221 @verbatim
bogdanm 0:9b334a45a8ff 222 ==============================================================================
bogdanm 0:9b334a45a8ff 223 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 224 ==============================================================================
bogdanm 0:9b334a45a8ff 225 [..]
bogdanm 0:9b334a45a8ff 226 This subsection provides a set of functions allowing to control the CORTEX
bogdanm 0:9b334a45a8ff 227 (NVIC, SYSTICK) functionalities.
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 @endverbatim
bogdanm 0:9b334a45a8ff 231 * @{
bogdanm 0:9b334a45a8ff 232 */
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 /**
bogdanm 0:9b334a45a8ff 237 * @brief Sets Pending bit of an external interrupt.
bogdanm 0:9b334a45a8ff 238 * @param IRQn External interrupt number
bogdanm 0:9b334a45a8ff 239 * This parameter can be an enumerator of @ref IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 240 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
bogdanm 0:9b334a45a8ff 241 * @retval None
bogdanm 0:9b334a45a8ff 242 */
bogdanm 0:9b334a45a8ff 243 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 244 {
bogdanm 0:9b334a45a8ff 245 /* Set interrupt pending */
bogdanm 0:9b334a45a8ff 246 NVIC_SetPendingIRQ(IRQn);
bogdanm 0:9b334a45a8ff 247 }
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 /**
bogdanm 0:9b334a45a8ff 250 * @brief Gets Pending Interrupt (reads the pending register in the NVIC
bogdanm 0:9b334a45a8ff 251 * and returns the pending bit for the specified interrupt).
bogdanm 0:9b334a45a8ff 252 * @param IRQn External interrupt number .
bogdanm 0:9b334a45a8ff 253 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 254 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
bogdanm 0:9b334a45a8ff 255 * @retval status: - 0 Interrupt status is not pending.
bogdanm 0:9b334a45a8ff 256 * - 1 Interrupt status is pending.
bogdanm 0:9b334a45a8ff 257 */
bogdanm 0:9b334a45a8ff 258 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 259 {
bogdanm 0:9b334a45a8ff 260 /* Return 1 if pending else 0 */
bogdanm 0:9b334a45a8ff 261 return NVIC_GetPendingIRQ(IRQn);
bogdanm 0:9b334a45a8ff 262 }
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 /**
bogdanm 0:9b334a45a8ff 265 * @brief Clears the pending bit of an external interrupt.
bogdanm 0:9b334a45a8ff 266 * @param IRQn External interrupt number .
bogdanm 0:9b334a45a8ff 267 * This parameter can be an enumerator of IRQn_Type enumeration
bogdanm 0:9b334a45a8ff 268 * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)
bogdanm 0:9b334a45a8ff 269 * @retval None
bogdanm 0:9b334a45a8ff 270 */
bogdanm 0:9b334a45a8ff 271 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
bogdanm 0:9b334a45a8ff 272 {
bogdanm 0:9b334a45a8ff 273 /* Clear pending interrupt */
bogdanm 0:9b334a45a8ff 274 NVIC_ClearPendingIRQ(IRQn);
bogdanm 0:9b334a45a8ff 275 }
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 /**
bogdanm 0:9b334a45a8ff 279 * @brief Configures the SysTick clock source.
bogdanm 0:9b334a45a8ff 280 * @param CLKSource: specifies the SysTick clock source.
bogdanm 0:9b334a45a8ff 281 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 282 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
bogdanm 0:9b334a45a8ff 283 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
bogdanm 0:9b334a45a8ff 284 * @retval None
bogdanm 0:9b334a45a8ff 285 */
bogdanm 0:9b334a45a8ff 286 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
bogdanm 0:9b334a45a8ff 287 {
bogdanm 0:9b334a45a8ff 288 /* Check the parameters */
bogdanm 0:9b334a45a8ff 289 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
bogdanm 0:9b334a45a8ff 290 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
bogdanm 0:9b334a45a8ff 291 {
bogdanm 0:9b334a45a8ff 292 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
bogdanm 0:9b334a45a8ff 293 }
bogdanm 0:9b334a45a8ff 294 else
bogdanm 0:9b334a45a8ff 295 {
bogdanm 0:9b334a45a8ff 296 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
bogdanm 0:9b334a45a8ff 297 }
bogdanm 0:9b334a45a8ff 298 }
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 /**
bogdanm 0:9b334a45a8ff 301 * @brief This function handles SYSTICK interrupt request.
bogdanm 0:9b334a45a8ff 302 * @param None
bogdanm 0:9b334a45a8ff 303 * @retval None
bogdanm 0:9b334a45a8ff 304 */
bogdanm 0:9b334a45a8ff 305 void HAL_SYSTICK_IRQHandler(void)
bogdanm 0:9b334a45a8ff 306 {
bogdanm 0:9b334a45a8ff 307 HAL_SYSTICK_Callback();
bogdanm 0:9b334a45a8ff 308 }
bogdanm 0:9b334a45a8ff 309
bogdanm 0:9b334a45a8ff 310 /**
bogdanm 0:9b334a45a8ff 311 * @brief SYSTICK callback.
bogdanm 0:9b334a45a8ff 312 * @param None
bogdanm 0:9b334a45a8ff 313 * @retval None
bogdanm 0:9b334a45a8ff 314 */
bogdanm 0:9b334a45a8ff 315 __weak void HAL_SYSTICK_Callback(void)
bogdanm 0:9b334a45a8ff 316 {
bogdanm 0:9b334a45a8ff 317 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 318 the HAL_SYSTICK_Callback could be implemented in the user file
bogdanm 0:9b334a45a8ff 319 */
bogdanm 0:9b334a45a8ff 320 }
bogdanm 0:9b334a45a8ff 321
bogdanm 0:9b334a45a8ff 322 /**
bogdanm 0:9b334a45a8ff 323 * @}
bogdanm 0:9b334a45a8ff 324 */
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 /**
bogdanm 0:9b334a45a8ff 327 * @}
bogdanm 0:9b334a45a8ff 328 */
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330 #endif /* HAL_CORTEX_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 331 /**
bogdanm 0:9b334a45a8ff 332 * @}
bogdanm 0:9b334a45a8ff 333 */
bogdanm 0:9b334a45a8ff 334
bogdanm 0:9b334a45a8ff 335 /**
bogdanm 0:9b334a45a8ff 336 * @}
bogdanm 0:9b334a45a8ff 337 */
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 340