fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 113:b3775bf36a83
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l0xx_hal.h |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
bogdanm | 0:9b334a45a8ff | 5 | * @version V1.2.0 |
bogdanm | 0:9b334a45a8ff | 6 | * @date 06-February-2015 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief This file contains all the functions prototypes for the HAL |
bogdanm | 0:9b334a45a8ff | 8 | * module driver. |
bogdanm | 0:9b334a45a8ff | 9 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 10 | * @attention |
bogdanm | 0:9b334a45a8ff | 11 | * |
bogdanm | 0:9b334a45a8ff | 12 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 13 | * |
bogdanm | 0:9b334a45a8ff | 14 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 15 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 17 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 19 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 20 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 22 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 23 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 24 | * |
bogdanm | 0:9b334a45a8ff | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 35 | * |
bogdanm | 0:9b334a45a8ff | 36 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 37 | */ |
bogdanm | 0:9b334a45a8ff | 38 | |
bogdanm | 0:9b334a45a8ff | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 40 | #ifndef __STM32L0xx_HAL_H |
bogdanm | 0:9b334a45a8ff | 41 | #define __STM32L0xx_HAL_H |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 44 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 45 | #endif |
bogdanm | 0:9b334a45a8ff | 46 | |
bogdanm | 0:9b334a45a8ff | 47 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 48 | #include "stm32l0xx_hal_conf.h" |
bogdanm | 0:9b334a45a8ff | 49 | |
bogdanm | 0:9b334a45a8ff | 50 | /** @addtogroup STM32L0xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 51 | * @{ |
bogdanm | 0:9b334a45a8ff | 52 | */ |
bogdanm | 0:9b334a45a8ff | 53 | |
bogdanm | 0:9b334a45a8ff | 54 | /** @defgroup HAL HAL |
bogdanm | 0:9b334a45a8ff | 55 | * @{ |
bogdanm | 0:9b334a45a8ff | 56 | */ |
bogdanm | 0:9b334a45a8ff | 57 | /** @defgroup HAL_Exported_Constants HAL Exported constants |
bogdanm | 0:9b334a45a8ff | 58 | * @{ |
bogdanm | 0:9b334a45a8ff | 59 | */ |
bogdanm | 0:9b334a45a8ff | 60 | |
bogdanm | 0:9b334a45a8ff | 61 | /** @defgroup SYSCFG_BootMode Boot Mode |
bogdanm | 0:9b334a45a8ff | 62 | * @{ |
bogdanm | 0:9b334a45a8ff | 63 | */ |
bogdanm | 0:9b334a45a8ff | 64 | #define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000) |
bogdanm | 0:9b334a45a8ff | 65 | #define SYSCFG_BOOT_SYSTEMFLASH ((uint32_t)SYSCFG_CFGR1_MEM_MODE_0) |
bogdanm | 0:9b334a45a8ff | 66 | #define SYSCFG_BOOT_SRAM ((uint32_t)SYSCFG_CFGR1_BOOT_MODE) |
bogdanm | 0:9b334a45a8ff | 67 | |
bogdanm | 0:9b334a45a8ff | 68 | /** |
bogdanm | 0:9b334a45a8ff | 69 | * @} |
bogdanm | 0:9b334a45a8ff | 70 | */ |
bogdanm | 0:9b334a45a8ff | 71 | |
bogdanm | 0:9b334a45a8ff | 72 | /** @defgroup DBGMCU_Low_Power_Config |
bogdanm | 0:9b334a45a8ff | 73 | * @{ |
bogdanm | 0:9b334a45a8ff | 74 | */ |
bogdanm | 0:9b334a45a8ff | 75 | #define DBGMCU_SLEEP DBGMCU_CR_DBG_SLEEP |
bogdanm | 0:9b334a45a8ff | 76 | #define DBGMCU_STOP DBGMCU_CR_DBG_STOP |
bogdanm | 0:9b334a45a8ff | 77 | #define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY |
bogdanm | 0:9b334a45a8ff | 78 | #define IS_DBGMCU_PERIPH(__PERIPH__) ((((__PERIPH__) & (~(DBGMCU_CR_DBG))) == 0x00) && ((__PERIPH__) != 0x00)) |
bogdanm | 0:9b334a45a8ff | 79 | |
bogdanm | 0:9b334a45a8ff | 80 | |
bogdanm | 0:9b334a45a8ff | 81 | /** |
bogdanm | 0:9b334a45a8ff | 82 | * @} |
bogdanm | 0:9b334a45a8ff | 83 | */ |
bogdanm | 0:9b334a45a8ff | 84 | |
bogdanm | 0:9b334a45a8ff | 85 | /** @defgroup HAL_SYSCFG_LCD_EXT_CAPA |
bogdanm | 0:9b334a45a8ff | 86 | * @{ |
bogdanm | 0:9b334a45a8ff | 87 | */ |
bogdanm | 0:9b334a45a8ff | 88 | #define SYSCFG_LCD_EXT_CAPA SYSCFG_CFGR2_CAPA /*!< Connection of internal Vlcd rail to external capacitors */ |
bogdanm | 0:9b334a45a8ff | 89 | #define SYSCFG_VLCD_PB2_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_0 /*!< Connection on PB2 */ |
bogdanm | 0:9b334a45a8ff | 90 | #define SYSCFG_VLCD_PB12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_1 /*!< Connection on PB12 */ |
bogdanm | 0:9b334a45a8ff | 91 | #define SYSCFG_VLCD_PE11_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_2 /*!< Connection on PB0 */ |
bogdanm | 0:9b334a45a8ff | 92 | #if defined (SYSCFG_CFGR2_CAPA_3) |
bogdanm | 0:9b334a45a8ff | 93 | #define SYSCFG_VLCD_PB0_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_3 /*!< Connection on PE11 */ |
bogdanm | 0:9b334a45a8ff | 94 | #endif |
bogdanm | 0:9b334a45a8ff | 95 | #if defined (SYSCFG_CFGR2_CAPA_4) |
bogdanm | 0:9b334a45a8ff | 96 | #define SYSCFG_VLCD_PE12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_4 /*!< Connection on PE12 */ |
bogdanm | 0:9b334a45a8ff | 97 | #endif |
bogdanm | 0:9b334a45a8ff | 98 | |
bogdanm | 0:9b334a45a8ff | 99 | /** |
bogdanm | 0:9b334a45a8ff | 100 | * @} |
bogdanm | 0:9b334a45a8ff | 101 | */ |
bogdanm | 0:9b334a45a8ff | 102 | |
bogdanm | 0:9b334a45a8ff | 103 | /** @defgroup HAL_SYSCFG_VREFINT_OUT_SELECT |
bogdanm | 0:9b334a45a8ff | 104 | * @{ |
bogdanm | 0:9b334a45a8ff | 105 | */ |
bogdanm | 0:9b334a45a8ff | 106 | #define SYSCFG_VREFINT_OUT_NONE ((uint32_t)0x00000000) /* no pad connected */ |
bogdanm | 0:9b334a45a8ff | 107 | #define SYSCFG_VREFINT_OUT_PB0 SYSCFG_CFGR3_VREF_OUT_0 /* Selects PBO as output for the Vrefint */ |
bogdanm | 0:9b334a45a8ff | 108 | #define SYSCFG_VREFINT_OUT_PB1 SYSCFG_CFGR3_VREF_OUT_1 /* Selects PB1 as output for the Vrefint */ |
bogdanm | 0:9b334a45a8ff | 109 | #define SYSCFG_VREFINT_OUT_PB0_PB1 SYSCFG_CFGR3_VREF_OUT /* Selects PBO and PB1 as output for the Vrefint */ |
bogdanm | 0:9b334a45a8ff | 110 | |
bogdanm | 0:9b334a45a8ff | 111 | #define IS_SYSCFG_VREFINT_OUT_SELECT(OUTPUT) (((OUTPUT) == SYSCFG_VREFINT_OUT_NONE) || \ |
bogdanm | 0:9b334a45a8ff | 112 | ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0) || \ |
bogdanm | 0:9b334a45a8ff | 113 | ((OUTPUT) == SYSCFG_VREFINT_OUT_PB1) || \ |
bogdanm | 0:9b334a45a8ff | 114 | ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0_PB1)) |
bogdanm | 0:9b334a45a8ff | 115 | /** |
bogdanm | 0:9b334a45a8ff | 116 | * @} |
bogdanm | 0:9b334a45a8ff | 117 | */ |
bogdanm | 0:9b334a45a8ff | 118 | |
bogdanm | 0:9b334a45a8ff | 119 | /** @defgroup HAL_SYSCFG_flags_definition |
bogdanm | 0:9b334a45a8ff | 120 | * @{ |
bogdanm | 0:9b334a45a8ff | 121 | */ |
bogdanm | 0:9b334a45a8ff | 122 | #define SYSCFG_FLAG_VREFINT_READY SYSCFG_CFGR3_VREFINT_RDYF |
bogdanm | 0:9b334a45a8ff | 123 | |
bogdanm | 0:9b334a45a8ff | 124 | #define IS_SYSCFG_FLAG(FLAG) ((FLAG) == SYSCFG_FLAG_VREFINT_READY)) |
bogdanm | 0:9b334a45a8ff | 125 | |
bogdanm | 0:9b334a45a8ff | 126 | /** |
bogdanm | 0:9b334a45a8ff | 127 | * @} |
bogdanm | 0:9b334a45a8ff | 128 | */ |
bogdanm | 0:9b334a45a8ff | 129 | /** |
bogdanm | 0:9b334a45a8ff | 130 | * @} |
bogdanm | 0:9b334a45a8ff | 131 | */ |
bogdanm | 0:9b334a45a8ff | 132 | |
bogdanm | 0:9b334a45a8ff | 133 | /** @defgroup HAL_Exported_Macros HAL Exported Macros |
bogdanm | 0:9b334a45a8ff | 134 | * @{ |
bogdanm | 0:9b334a45a8ff | 135 | */ |
bogdanm | 0:9b334a45a8ff | 136 | |
bogdanm | 0:9b334a45a8ff | 137 | /** @brief Freeze/Unfreeze Peripherals in Debug mode |
bogdanm | 0:9b334a45a8ff | 138 | */ |
bogdanm | 0:9b334a45a8ff | 139 | #if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP) |
bogdanm | 0:9b334a45a8ff | 140 | /** |
bogdanm | 0:9b334a45a8ff | 141 | * @brief TIM2 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 142 | */ |
bogdanm | 0:9b334a45a8ff | 143 | #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP) |
bogdanm | 0:9b334a45a8ff | 144 | #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP) |
bogdanm | 0:9b334a45a8ff | 145 | #endif |
bogdanm | 0:9b334a45a8ff | 146 | |
bogdanm | 0:9b334a45a8ff | 147 | #if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP) |
bogdanm | 0:9b334a45a8ff | 148 | /** |
bogdanm | 0:9b334a45a8ff | 149 | * @brief TIM3 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 150 | */ |
bogdanm | 0:9b334a45a8ff | 151 | #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP) |
bogdanm | 0:9b334a45a8ff | 152 | #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP) |
bogdanm | 0:9b334a45a8ff | 153 | #endif |
bogdanm | 0:9b334a45a8ff | 154 | |
bogdanm | 0:9b334a45a8ff | 155 | #if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 156 | /** |
bogdanm | 0:9b334a45a8ff | 157 | * @brief TIM6 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 158 | */ |
bogdanm | 0:9b334a45a8ff | 159 | #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 160 | #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 161 | #endif |
bogdanm | 0:9b334a45a8ff | 162 | |
bogdanm | 0:9b334a45a8ff | 163 | #if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 164 | /** |
bogdanm | 0:9b334a45a8ff | 165 | * @brief TIM7 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 166 | */ |
bogdanm | 0:9b334a45a8ff | 167 | #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 168 | #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 169 | #endif |
bogdanm | 0:9b334a45a8ff | 170 | |
bogdanm | 0:9b334a45a8ff | 171 | #if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP) |
bogdanm | 0:9b334a45a8ff | 172 | /** |
bogdanm | 0:9b334a45a8ff | 173 | * @brief RTC Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 174 | */ |
bogdanm | 0:9b334a45a8ff | 175 | #define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP) |
bogdanm | 0:9b334a45a8ff | 176 | #define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP) |
bogdanm | 0:9b334a45a8ff | 177 | #endif |
bogdanm | 0:9b334a45a8ff | 178 | |
bogdanm | 0:9b334a45a8ff | 179 | #if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 180 | /** |
bogdanm | 0:9b334a45a8ff | 181 | * @brief WWDG Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 182 | */ |
bogdanm | 0:9b334a45a8ff | 183 | #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 184 | #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 185 | #endif |
bogdanm | 0:9b334a45a8ff | 186 | |
bogdanm | 0:9b334a45a8ff | 187 | #if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 188 | /** |
bogdanm | 0:9b334a45a8ff | 189 | * @brief IWDG Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 190 | */ |
bogdanm | 0:9b334a45a8ff | 191 | #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 192 | #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 193 | #endif |
bogdanm | 0:9b334a45a8ff | 194 | |
bogdanm | 0:9b334a45a8ff | 195 | #if defined (DBGMCU_APB1_FZ_DBG_I2C1_STOP) |
bogdanm | 0:9b334a45a8ff | 196 | /** |
bogdanm | 0:9b334a45a8ff | 197 | * @brief I2C1 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 198 | */ |
bogdanm | 0:9b334a45a8ff | 199 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP) |
bogdanm | 0:9b334a45a8ff | 200 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP) |
bogdanm | 0:9b334a45a8ff | 201 | #endif |
bogdanm | 0:9b334a45a8ff | 202 | |
bogdanm | 0:9b334a45a8ff | 203 | #if defined (DBGMCU_APB1_FZ_DBG_I2C2_STOP) |
bogdanm | 0:9b334a45a8ff | 204 | /** |
bogdanm | 0:9b334a45a8ff | 205 | * @brief I2C2 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 206 | */ |
bogdanm | 0:9b334a45a8ff | 207 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP) |
bogdanm | 0:9b334a45a8ff | 208 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP) |
bogdanm | 0:9b334a45a8ff | 209 | #endif |
bogdanm | 0:9b334a45a8ff | 210 | |
bogdanm | 0:9b334a45a8ff | 211 | #if defined (DBGMCU_APB1_FZ_DBG_I2C3_STOP) |
bogdanm | 0:9b334a45a8ff | 212 | /** |
bogdanm | 0:9b334a45a8ff | 213 | * @brief I2C3 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 214 | */ |
bogdanm | 0:9b334a45a8ff | 215 | #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP) |
bogdanm | 0:9b334a45a8ff | 216 | #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP) |
bogdanm | 0:9b334a45a8ff | 217 | #endif |
bogdanm | 0:9b334a45a8ff | 218 | |
bogdanm | 0:9b334a45a8ff | 219 | #if defined (DBGMCU_APB1_FZ_DBG_LPTIMER_STOP) |
bogdanm | 0:9b334a45a8ff | 220 | /** |
bogdanm | 0:9b334a45a8ff | 221 | * @brief LPTIMER Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 222 | */ |
bogdanm | 0:9b334a45a8ff | 223 | #define __HAL_DBGMCU_FREEZE_LPTIMER() SET_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP) |
bogdanm | 0:9b334a45a8ff | 224 | #define __HAL_DBGMCU_UNFREEZE_LPTIMER() CLEAR_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP) |
bogdanm | 0:9b334a45a8ff | 225 | #endif |
bogdanm | 0:9b334a45a8ff | 226 | |
bogdanm | 0:9b334a45a8ff | 227 | #if defined (DBGMCU_APB2_FZ_DBG_TIM22_STOP) |
bogdanm | 0:9b334a45a8ff | 228 | /** |
bogdanm | 0:9b334a45a8ff | 229 | * @brief TIM22 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 230 | */ |
bogdanm | 0:9b334a45a8ff | 231 | #define __HAL_DBGMCU_FREEZE_TIM22() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP) |
bogdanm | 0:9b334a45a8ff | 232 | #define __HAL_DBGMCU_UNFREEZE_TIM22() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP) |
bogdanm | 0:9b334a45a8ff | 233 | #endif |
bogdanm | 0:9b334a45a8ff | 234 | |
bogdanm | 0:9b334a45a8ff | 235 | #if defined (DBGMCU_APB2_FZ_DBG_TIM21_STOP) |
bogdanm | 0:9b334a45a8ff | 236 | /** |
bogdanm | 0:9b334a45a8ff | 237 | * @brief TIM21 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 238 | */ |
bogdanm | 0:9b334a45a8ff | 239 | #define __HAL_DBGMCU_FREEZE_TIM21() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP) |
bogdanm | 0:9b334a45a8ff | 240 | #define __HAL_DBGMCU_UNFREEZE_TIM21() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP) |
bogdanm | 0:9b334a45a8ff | 241 | #endif |
bogdanm | 0:9b334a45a8ff | 242 | |
bogdanm | 0:9b334a45a8ff | 243 | /** @brief Main Flash memory mapped at 0x00000000 |
bogdanm | 0:9b334a45a8ff | 244 | */ |
bogdanm | 0:9b334a45a8ff | 245 | #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE) |
bogdanm | 0:9b334a45a8ff | 246 | |
bogdanm | 0:9b334a45a8ff | 247 | /** @brief System Flash memory mapped at 0x00000000 |
bogdanm | 0:9b334a45a8ff | 248 | */ |
bogdanm | 0:9b334a45a8ff | 249 | #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0) |
bogdanm | 0:9b334a45a8ff | 250 | |
bogdanm | 0:9b334a45a8ff | 251 | |
bogdanm | 0:9b334a45a8ff | 252 | /** @brief Embedded SRAM mapped at 0x00000000 |
bogdanm | 0:9b334a45a8ff | 253 | */ |
bogdanm | 0:9b334a45a8ff | 254 | #define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1) |
bogdanm | 0:9b334a45a8ff | 255 | |
bogdanm | 0:9b334a45a8ff | 256 | /** @brief Configuration of the DBG Low Power mode. |
bogdanm | 0:9b334a45a8ff | 257 | * @param __DBGLPMODE__: bit field to indicate in wich Low Power mode DBG is still active. |
bogdanm | 0:9b334a45a8ff | 258 | * This parameter can be a value of @ref HAL_DBGMCU_Low_Power_Config |
bogdanm | 0:9b334a45a8ff | 259 | */ |
bogdanm | 0:9b334a45a8ff | 260 | #define __HAL_SYSCFG_DBG_LP_CONFIG(__DBGLPMODE__) do {assert_param(IS_DBGMCU_PERIPH(__DBGLPMODE__)); \ |
bogdanm | 0:9b334a45a8ff | 261 | MODIFY_REG(DBGMCU->CR, DBGMCU_CR_DBG, (__DBGLPMODE__)); \ |
bogdanm | 0:9b334a45a8ff | 262 | } while (0) |
bogdanm | 0:9b334a45a8ff | 263 | /** |
bogdanm | 0:9b334a45a8ff | 264 | * @brief Returns the boot mode as configured by user. |
bogdanm | 0:9b334a45a8ff | 265 | * @retval The boot mode as configured by user. The returned can be a value of @ref HAL_SYSCFG_BootMode |
bogdanm | 0:9b334a45a8ff | 266 | */ |
bogdanm | 0:9b334a45a8ff | 267 | #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE) |
bogdanm | 0:9b334a45a8ff | 268 | |
bogdanm | 0:9b334a45a8ff | 269 | |
bogdanm | 0:9b334a45a8ff | 270 | /** @brief Check whether the specified SYSCFG flag is set or not. |
bogdanm | 0:9b334a45a8ff | 271 | * @param __FLAG__: specifies the flag to check. |
bogdanm | 0:9b334a45a8ff | 272 | * This parameter can a value of @ref HAL_SYSCFG_flags_definition |
bogdanm | 0:9b334a45a8ff | 273 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
bogdanm | 0:9b334a45a8ff | 274 | */ |
bogdanm | 0:9b334a45a8ff | 275 | #define __HAL_SYSCFG_GET_FLAG(__FLAG__) (((SYSCFG->CFGR3) & (__FLAG__)) == (__FLAG__)) |
bogdanm | 0:9b334a45a8ff | 276 | |
bogdanm | 0:9b334a45a8ff | 277 | /** |
bogdanm | 0:9b334a45a8ff | 278 | * @} |
bogdanm | 0:9b334a45a8ff | 279 | */ |
bogdanm | 0:9b334a45a8ff | 280 | |
bogdanm | 0:9b334a45a8ff | 281 | /** @defgroup HAL_Exported_Functions HAL Exported Functions |
bogdanm | 0:9b334a45a8ff | 282 | * @{ |
bogdanm | 0:9b334a45a8ff | 283 | */ |
bogdanm | 0:9b334a45a8ff | 284 | /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 285 | * @brief Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 286 | * @{ |
bogdanm | 0:9b334a45a8ff | 287 | */ |
bogdanm | 0:9b334a45a8ff | 288 | HAL_StatusTypeDef HAL_Init(void); |
bogdanm | 0:9b334a45a8ff | 289 | HAL_StatusTypeDef HAL_DeInit(void); |
bogdanm | 0:9b334a45a8ff | 290 | void HAL_MspInit(void); |
bogdanm | 0:9b334a45a8ff | 291 | void HAL_MspDeInit(void); |
bogdanm | 0:9b334a45a8ff | 292 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); |
bogdanm | 0:9b334a45a8ff | 293 | |
bogdanm | 0:9b334a45a8ff | 294 | /** |
bogdanm | 0:9b334a45a8ff | 295 | * @} |
bogdanm | 0:9b334a45a8ff | 296 | */ |
bogdanm | 0:9b334a45a8ff | 297 | |
bogdanm | 0:9b334a45a8ff | 298 | /** @defgroup HAL_Exported_Functions_Group2 Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 299 | * @brief Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 300 | * @{ |
bogdanm | 0:9b334a45a8ff | 301 | */ |
bogdanm | 0:9b334a45a8ff | 302 | void HAL_IncTick(void); |
bogdanm | 0:9b334a45a8ff | 303 | void HAL_Delay(__IO uint32_t Delay); |
bogdanm | 0:9b334a45a8ff | 304 | uint32_t HAL_GetTick(void); |
bogdanm | 0:9b334a45a8ff | 305 | void HAL_SuspendTick(void); |
bogdanm | 0:9b334a45a8ff | 306 | void HAL_ResumeTick(void); |
bogdanm | 0:9b334a45a8ff | 307 | uint32_t HAL_GetHalVersion(void); |
bogdanm | 0:9b334a45a8ff | 308 | uint32_t HAL_GetREVID(void); |
bogdanm | 0:9b334a45a8ff | 309 | uint32_t HAL_GetDEVID(void); |
bogdanm | 0:9b334a45a8ff | 310 | void HAL_DBGMCU_EnableDBGSleepMode(void); |
bogdanm | 0:9b334a45a8ff | 311 | void HAL_DBGMCU_DisableDBGSleepMode(void); |
bogdanm | 0:9b334a45a8ff | 312 | void HAL_DBGMCU_EnableDBGStopMode(void); |
bogdanm | 0:9b334a45a8ff | 313 | void HAL_DBGMCU_DisableDBGStopMode(void); |
bogdanm | 0:9b334a45a8ff | 314 | void HAL_DBGMCU_EnableDBGStandbyMode(void); |
bogdanm | 0:9b334a45a8ff | 315 | void HAL_DBGMCU_DisableDBGStandbyMode(void); |
bogdanm | 0:9b334a45a8ff | 316 | void HAL_DBGMCU_DBG_EnableLowPowerConfig(uint32_t Periph); |
bogdanm | 0:9b334a45a8ff | 317 | void HAL_DBGMCU_DBG_DisableLowPowerConfig(uint32_t Periph); |
bogdanm | 0:9b334a45a8ff | 318 | uint32_t HAL_SYSCFG_GetBootMode(void); |
bogdanm | 0:9b334a45a8ff | 319 | void HAL_SYSCFG_EnableVREFINT(void); |
bogdanm | 0:9b334a45a8ff | 320 | void HAL_SYSCFG_DisableVREFINT(void); |
bogdanm | 0:9b334a45a8ff | 321 | void HAL_SYSCFG_Enable_Lock_VREFINT(void); |
bogdanm | 0:9b334a45a8ff | 322 | void HAL_SYSCFG_Disable_Lock_VREFINT(void); |
bogdanm | 0:9b334a45a8ff | 323 | void HAL_SYSCFG_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT); |
bogdanm | 0:9b334a45a8ff | 324 | |
bogdanm | 0:9b334a45a8ff | 325 | /** |
bogdanm | 0:9b334a45a8ff | 326 | * @} |
bogdanm | 0:9b334a45a8ff | 327 | */ |
bogdanm | 0:9b334a45a8ff | 328 | /** |
bogdanm | 0:9b334a45a8ff | 329 | * @} |
bogdanm | 0:9b334a45a8ff | 330 | */ |
bogdanm | 0:9b334a45a8ff | 331 | |
bogdanm | 0:9b334a45a8ff | 332 | /** |
bogdanm | 0:9b334a45a8ff | 333 | * @} |
bogdanm | 0:9b334a45a8ff | 334 | */ |
bogdanm | 0:9b334a45a8ff | 335 | |
bogdanm | 0:9b334a45a8ff | 336 | /** |
bogdanm | 0:9b334a45a8ff | 337 | * @} |
bogdanm | 0:9b334a45a8ff | 338 | */ |
bogdanm | 0:9b334a45a8ff | 339 | |
bogdanm | 0:9b334a45a8ff | 340 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 341 | } |
bogdanm | 0:9b334a45a8ff | 342 | #endif |
bogdanm | 0:9b334a45a8ff | 343 | |
bogdanm | 0:9b334a45a8ff | 344 | #endif /* __STM32L0xx_HAL_H */ |
bogdanm | 0:9b334a45a8ff | 345 | |
bogdanm | 0:9b334a45a8ff | 346 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
bogdanm | 0:9b334a45a8ff | 347 |