fix LPC812 PWM
Fork of mbed-dev by
targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal.h@113:b3775bf36a83, 2016-04-19 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Apr 19 11:15:15 2016 +0100
- Revision:
- 113:b3775bf36a83
- Parent:
- 0:9b334a45a8ff
Synchronized with git revision 896981126b34b6d9441e3eea77881c67a1ae3dbd
Full URL: https://github.com/mbedmicro/mbed/commit/896981126b34b6d9441e3eea77881c67a1ae3dbd/
Exporter tool addition for e2 studio
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 0:9b334a45a8ff | 1 | /** |
bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 3 | * @file stm32l0xx_hal.h |
bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
mbed_official | 113:b3775bf36a83 | 5 | * @version V1.5.0 |
mbed_official | 113:b3775bf36a83 | 6 | * @date 8-January-2016 |
bogdanm | 0:9b334a45a8ff | 7 | * @brief This file contains all the functions prototypes for the HAL |
bogdanm | 0:9b334a45a8ff | 8 | * module driver. |
bogdanm | 0:9b334a45a8ff | 9 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 10 | * @attention |
bogdanm | 0:9b334a45a8ff | 11 | * |
mbed_official | 113:b3775bf36a83 | 12 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
bogdanm | 0:9b334a45a8ff | 13 | * |
bogdanm | 0:9b334a45a8ff | 14 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 0:9b334a45a8ff | 15 | * are permitted provided that the following conditions are met: |
bogdanm | 0:9b334a45a8ff | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 17 | * this list of conditions and the following disclaimer. |
bogdanm | 0:9b334a45a8ff | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 0:9b334a45a8ff | 19 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 0:9b334a45a8ff | 20 | * and/or other materials provided with the distribution. |
bogdanm | 0:9b334a45a8ff | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 0:9b334a45a8ff | 22 | * may be used to endorse or promote products derived from this software |
bogdanm | 0:9b334a45a8ff | 23 | * without specific prior written permission. |
bogdanm | 0:9b334a45a8ff | 24 | * |
bogdanm | 0:9b334a45a8ff | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 0:9b334a45a8ff | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 0:9b334a45a8ff | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 0:9b334a45a8ff | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 0:9b334a45a8ff | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 0:9b334a45a8ff | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 0:9b334a45a8ff | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 0:9b334a45a8ff | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 0:9b334a45a8ff | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 0:9b334a45a8ff | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 0:9b334a45a8ff | 35 | * |
bogdanm | 0:9b334a45a8ff | 36 | ****************************************************************************** |
bogdanm | 0:9b334a45a8ff | 37 | */ |
bogdanm | 0:9b334a45a8ff | 38 | |
bogdanm | 0:9b334a45a8ff | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 40 | #ifndef __STM32L0xx_HAL_H |
bogdanm | 0:9b334a45a8ff | 41 | #define __STM32L0xx_HAL_H |
bogdanm | 0:9b334a45a8ff | 42 | |
bogdanm | 0:9b334a45a8ff | 43 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 44 | extern "C" { |
bogdanm | 0:9b334a45a8ff | 45 | #endif |
bogdanm | 0:9b334a45a8ff | 46 | |
bogdanm | 0:9b334a45a8ff | 47 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 0:9b334a45a8ff | 48 | #include "stm32l0xx_hal_conf.h" |
bogdanm | 0:9b334a45a8ff | 49 | |
bogdanm | 0:9b334a45a8ff | 50 | /** @addtogroup STM32L0xx_HAL_Driver |
bogdanm | 0:9b334a45a8ff | 51 | * @{ |
bogdanm | 0:9b334a45a8ff | 52 | */ |
bogdanm | 0:9b334a45a8ff | 53 | |
bogdanm | 0:9b334a45a8ff | 54 | /** @defgroup HAL HAL |
bogdanm | 0:9b334a45a8ff | 55 | * @{ |
bogdanm | 0:9b334a45a8ff | 56 | */ |
mbed_official | 113:b3775bf36a83 | 57 | /** @defgroup HAL_Exported_Constants HAL Exported Constants |
bogdanm | 0:9b334a45a8ff | 58 | * @{ |
bogdanm | 0:9b334a45a8ff | 59 | */ |
bogdanm | 0:9b334a45a8ff | 60 | |
bogdanm | 0:9b334a45a8ff | 61 | /** @defgroup SYSCFG_BootMode Boot Mode |
bogdanm | 0:9b334a45a8ff | 62 | * @{ |
bogdanm | 0:9b334a45a8ff | 63 | */ |
bogdanm | 0:9b334a45a8ff | 64 | #define SYSCFG_BOOT_MAINFLASH ((uint32_t)0x00000000) |
mbed_official | 113:b3775bf36a83 | 65 | #define SYSCFG_BOOT_SYSTEMFLASH ((uint32_t)SYSCFG_CFGR1_BOOT_MODE_0) |
bogdanm | 0:9b334a45a8ff | 66 | #define SYSCFG_BOOT_SRAM ((uint32_t)SYSCFG_CFGR1_BOOT_MODE) |
bogdanm | 0:9b334a45a8ff | 67 | |
bogdanm | 0:9b334a45a8ff | 68 | /** |
bogdanm | 0:9b334a45a8ff | 69 | * @} |
bogdanm | 0:9b334a45a8ff | 70 | */ |
bogdanm | 0:9b334a45a8ff | 71 | |
mbed_official | 113:b3775bf36a83 | 72 | /** @defgroup DBGMCU_Low_Power_Config DBGMCU Low Power Configuration |
bogdanm | 0:9b334a45a8ff | 73 | * @{ |
bogdanm | 0:9b334a45a8ff | 74 | */ |
bogdanm | 0:9b334a45a8ff | 75 | #define DBGMCU_SLEEP DBGMCU_CR_DBG_SLEEP |
bogdanm | 0:9b334a45a8ff | 76 | #define DBGMCU_STOP DBGMCU_CR_DBG_STOP |
bogdanm | 0:9b334a45a8ff | 77 | #define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY |
bogdanm | 0:9b334a45a8ff | 78 | #define IS_DBGMCU_PERIPH(__PERIPH__) ((((__PERIPH__) & (~(DBGMCU_CR_DBG))) == 0x00) && ((__PERIPH__) != 0x00)) |
bogdanm | 0:9b334a45a8ff | 79 | |
bogdanm | 0:9b334a45a8ff | 80 | |
bogdanm | 0:9b334a45a8ff | 81 | /** |
bogdanm | 0:9b334a45a8ff | 82 | * @} |
bogdanm | 0:9b334a45a8ff | 83 | */ |
bogdanm | 0:9b334a45a8ff | 84 | |
mbed_official | 113:b3775bf36a83 | 85 | #if defined (LCD_BASE) /* STM32L0x3xx only */ |
mbed_official | 113:b3775bf36a83 | 86 | /** @defgroup SYSCFG_LCD_EXT_CAPA SYSCFG LCD External Capacitors |
bogdanm | 0:9b334a45a8ff | 87 | * @{ |
bogdanm | 0:9b334a45a8ff | 88 | */ |
bogdanm | 0:9b334a45a8ff | 89 | #define SYSCFG_LCD_EXT_CAPA SYSCFG_CFGR2_CAPA /*!< Connection of internal Vlcd rail to external capacitors */ |
bogdanm | 0:9b334a45a8ff | 90 | #define SYSCFG_VLCD_PB2_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_0 /*!< Connection on PB2 */ |
bogdanm | 0:9b334a45a8ff | 91 | #define SYSCFG_VLCD_PB12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_1 /*!< Connection on PB12 */ |
bogdanm | 0:9b334a45a8ff | 92 | #define SYSCFG_VLCD_PE11_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_2 /*!< Connection on PB0 */ |
bogdanm | 0:9b334a45a8ff | 93 | #if defined (SYSCFG_CFGR2_CAPA_3) |
bogdanm | 0:9b334a45a8ff | 94 | #define SYSCFG_VLCD_PB0_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_3 /*!< Connection on PE11 */ |
bogdanm | 0:9b334a45a8ff | 95 | #endif |
bogdanm | 0:9b334a45a8ff | 96 | #if defined (SYSCFG_CFGR2_CAPA_4) |
bogdanm | 0:9b334a45a8ff | 97 | #define SYSCFG_VLCD_PE12_EXT_CAPA_ON SYSCFG_CFGR2_CAPA_4 /*!< Connection on PE12 */ |
bogdanm | 0:9b334a45a8ff | 98 | #endif |
bogdanm | 0:9b334a45a8ff | 99 | |
bogdanm | 0:9b334a45a8ff | 100 | /** |
bogdanm | 0:9b334a45a8ff | 101 | * @} |
bogdanm | 0:9b334a45a8ff | 102 | */ |
mbed_official | 113:b3775bf36a83 | 103 | #endif |
bogdanm | 0:9b334a45a8ff | 104 | |
mbed_official | 113:b3775bf36a83 | 105 | /** @defgroup SYSCFG_VREFINT_OUT_SELECT SYSCFG VREFINT Out Selection |
bogdanm | 0:9b334a45a8ff | 106 | * @{ |
bogdanm | 0:9b334a45a8ff | 107 | */ |
bogdanm | 0:9b334a45a8ff | 108 | #define SYSCFG_VREFINT_OUT_NONE ((uint32_t)0x00000000) /* no pad connected */ |
bogdanm | 0:9b334a45a8ff | 109 | #define SYSCFG_VREFINT_OUT_PB0 SYSCFG_CFGR3_VREF_OUT_0 /* Selects PBO as output for the Vrefint */ |
bogdanm | 0:9b334a45a8ff | 110 | #define SYSCFG_VREFINT_OUT_PB1 SYSCFG_CFGR3_VREF_OUT_1 /* Selects PB1 as output for the Vrefint */ |
bogdanm | 0:9b334a45a8ff | 111 | #define SYSCFG_VREFINT_OUT_PB0_PB1 SYSCFG_CFGR3_VREF_OUT /* Selects PBO and PB1 as output for the Vrefint */ |
bogdanm | 0:9b334a45a8ff | 112 | |
bogdanm | 0:9b334a45a8ff | 113 | #define IS_SYSCFG_VREFINT_OUT_SELECT(OUTPUT) (((OUTPUT) == SYSCFG_VREFINT_OUT_NONE) || \ |
bogdanm | 0:9b334a45a8ff | 114 | ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0) || \ |
bogdanm | 0:9b334a45a8ff | 115 | ((OUTPUT) == SYSCFG_VREFINT_OUT_PB1) || \ |
bogdanm | 0:9b334a45a8ff | 116 | ((OUTPUT) == SYSCFG_VREFINT_OUT_PB0_PB1)) |
bogdanm | 0:9b334a45a8ff | 117 | /** |
bogdanm | 0:9b334a45a8ff | 118 | * @} |
bogdanm | 0:9b334a45a8ff | 119 | */ |
bogdanm | 0:9b334a45a8ff | 120 | |
mbed_official | 113:b3775bf36a83 | 121 | /** @defgroup SYSCFG_flags_definition SYSCFG Flags Definition |
bogdanm | 0:9b334a45a8ff | 122 | * @{ |
bogdanm | 0:9b334a45a8ff | 123 | */ |
bogdanm | 0:9b334a45a8ff | 124 | #define SYSCFG_FLAG_VREFINT_READY SYSCFG_CFGR3_VREFINT_RDYF |
bogdanm | 0:9b334a45a8ff | 125 | |
bogdanm | 0:9b334a45a8ff | 126 | #define IS_SYSCFG_FLAG(FLAG) ((FLAG) == SYSCFG_FLAG_VREFINT_READY)) |
bogdanm | 0:9b334a45a8ff | 127 | |
bogdanm | 0:9b334a45a8ff | 128 | /** |
bogdanm | 0:9b334a45a8ff | 129 | * @} |
bogdanm | 0:9b334a45a8ff | 130 | */ |
mbed_official | 113:b3775bf36a83 | 131 | |
mbed_official | 113:b3775bf36a83 | 132 | /** @defgroup SYSCFG_FastModePlus_GPIO Fast Mode Plus on GPIO |
mbed_official | 113:b3775bf36a83 | 133 | * @{ |
mbed_official | 113:b3775bf36a83 | 134 | */ |
mbed_official | 113:b3775bf36a83 | 135 | /** @brief Fast mode Plus driving capability on a specific GPIO |
mbed_official | 113:b3775bf36a83 | 136 | */ |
mbed_official | 113:b3775bf36a83 | 137 | #if defined (SYSCFG_CFGR2_I2C_PB6_FMP) |
mbed_official | 113:b3775bf36a83 | 138 | #define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_CFGR2_I2C_PB6_FMP /* Enable Fast Mode Plus on PB6 */ |
mbed_official | 113:b3775bf36a83 | 139 | #endif |
mbed_official | 113:b3775bf36a83 | 140 | #if defined (SYSCFG_CFGR2_I2C_PB7_FMP) |
mbed_official | 113:b3775bf36a83 | 141 | #define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_CFGR2_I2C_PB7_FMP /* Enable Fast Mode Plus on PB7 */ |
mbed_official | 113:b3775bf36a83 | 142 | #endif |
mbed_official | 113:b3775bf36a83 | 143 | #if defined (SYSCFG_CFGR2_I2C_PB8_FMP) |
mbed_official | 113:b3775bf36a83 | 144 | #define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_CFGR2_I2C_PB8_FMP /* Enable Fast Mode Plus on PB8 */ |
mbed_official | 113:b3775bf36a83 | 145 | #endif |
mbed_official | 113:b3775bf36a83 | 146 | #if defined (SYSCFG_CFGR2_I2C_PB9_FMP) |
mbed_official | 113:b3775bf36a83 | 147 | #define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_CFGR2_I2C_PB9_FMP /* Enable Fast Mode Plus on PB9 */ |
mbed_official | 113:b3775bf36a83 | 148 | #endif |
mbed_official | 113:b3775bf36a83 | 149 | |
mbed_official | 113:b3775bf36a83 | 150 | #define IS_SYSCFG_FASTMODEPLUS(PIN) ((((PIN) & (SYSCFG_FASTMODEPLUS_PB6)) == SYSCFG_FASTMODEPLUS_PB6) || \ |
mbed_official | 113:b3775bf36a83 | 151 | (((PIN) & (SYSCFG_FASTMODEPLUS_PB7)) == SYSCFG_FASTMODEPLUS_PB7) || \ |
mbed_official | 113:b3775bf36a83 | 152 | (((PIN) & (SYSCFG_FASTMODEPLUS_PB8)) == SYSCFG_FASTMODEPLUS_PB8) || \ |
mbed_official | 113:b3775bf36a83 | 153 | (((PIN) & (SYSCFG_FASTMODEPLUS_PB9)) == SYSCFG_FASTMODEPLUS_PB9) ) |
mbed_official | 113:b3775bf36a83 | 154 | /** |
mbed_official | 113:b3775bf36a83 | 155 | * @} |
mbed_official | 113:b3775bf36a83 | 156 | */ |
bogdanm | 0:9b334a45a8ff | 157 | /** |
bogdanm | 0:9b334a45a8ff | 158 | * @} |
bogdanm | 0:9b334a45a8ff | 159 | */ |
bogdanm | 0:9b334a45a8ff | 160 | |
bogdanm | 0:9b334a45a8ff | 161 | /** @defgroup HAL_Exported_Macros HAL Exported Macros |
bogdanm | 0:9b334a45a8ff | 162 | * @{ |
bogdanm | 0:9b334a45a8ff | 163 | */ |
bogdanm | 0:9b334a45a8ff | 164 | |
bogdanm | 0:9b334a45a8ff | 165 | /** @brief Freeze/Unfreeze Peripherals in Debug mode |
bogdanm | 0:9b334a45a8ff | 166 | */ |
bogdanm | 0:9b334a45a8ff | 167 | #if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP) |
bogdanm | 0:9b334a45a8ff | 168 | /** |
bogdanm | 0:9b334a45a8ff | 169 | * @brief TIM2 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 170 | */ |
bogdanm | 0:9b334a45a8ff | 171 | #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP) |
bogdanm | 0:9b334a45a8ff | 172 | #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM2_STOP) |
bogdanm | 0:9b334a45a8ff | 173 | #endif |
bogdanm | 0:9b334a45a8ff | 174 | |
bogdanm | 0:9b334a45a8ff | 175 | #if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP) |
bogdanm | 0:9b334a45a8ff | 176 | /** |
bogdanm | 0:9b334a45a8ff | 177 | * @brief TIM3 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 178 | */ |
bogdanm | 0:9b334a45a8ff | 179 | #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP) |
bogdanm | 0:9b334a45a8ff | 180 | #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZ,DBGMCU_APB1_FZ_DBG_TIM3_STOP) |
bogdanm | 0:9b334a45a8ff | 181 | #endif |
bogdanm | 0:9b334a45a8ff | 182 | |
bogdanm | 0:9b334a45a8ff | 183 | #if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 184 | /** |
bogdanm | 0:9b334a45a8ff | 185 | * @brief TIM6 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 186 | */ |
bogdanm | 0:9b334a45a8ff | 187 | #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 188 | #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP) |
bogdanm | 0:9b334a45a8ff | 189 | #endif |
bogdanm | 0:9b334a45a8ff | 190 | |
bogdanm | 0:9b334a45a8ff | 191 | #if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 192 | /** |
bogdanm | 0:9b334a45a8ff | 193 | * @brief TIM7 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 194 | */ |
bogdanm | 0:9b334a45a8ff | 195 | #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 196 | #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP) |
bogdanm | 0:9b334a45a8ff | 197 | #endif |
bogdanm | 0:9b334a45a8ff | 198 | |
bogdanm | 0:9b334a45a8ff | 199 | #if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP) |
bogdanm | 0:9b334a45a8ff | 200 | /** |
bogdanm | 0:9b334a45a8ff | 201 | * @brief RTC Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 202 | */ |
bogdanm | 0:9b334a45a8ff | 203 | #define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP) |
bogdanm | 0:9b334a45a8ff | 204 | #define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP) |
bogdanm | 0:9b334a45a8ff | 205 | #endif |
bogdanm | 0:9b334a45a8ff | 206 | |
bogdanm | 0:9b334a45a8ff | 207 | #if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 208 | /** |
bogdanm | 0:9b334a45a8ff | 209 | * @brief WWDG Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 210 | */ |
bogdanm | 0:9b334a45a8ff | 211 | #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 212 | #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 213 | #endif |
bogdanm | 0:9b334a45a8ff | 214 | |
bogdanm | 0:9b334a45a8ff | 215 | #if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 216 | /** |
bogdanm | 0:9b334a45a8ff | 217 | * @brief IWDG Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 218 | */ |
bogdanm | 0:9b334a45a8ff | 219 | #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 220 | #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP) |
bogdanm | 0:9b334a45a8ff | 221 | #endif |
bogdanm | 0:9b334a45a8ff | 222 | |
bogdanm | 0:9b334a45a8ff | 223 | #if defined (DBGMCU_APB1_FZ_DBG_I2C1_STOP) |
bogdanm | 0:9b334a45a8ff | 224 | /** |
bogdanm | 0:9b334a45a8ff | 225 | * @brief I2C1 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 226 | */ |
bogdanm | 0:9b334a45a8ff | 227 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP) |
bogdanm | 0:9b334a45a8ff | 228 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_STOP) |
bogdanm | 0:9b334a45a8ff | 229 | #endif |
bogdanm | 0:9b334a45a8ff | 230 | |
bogdanm | 0:9b334a45a8ff | 231 | #if defined (DBGMCU_APB1_FZ_DBG_I2C2_STOP) |
bogdanm | 0:9b334a45a8ff | 232 | /** |
bogdanm | 0:9b334a45a8ff | 233 | * @brief I2C2 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 234 | */ |
bogdanm | 0:9b334a45a8ff | 235 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT_DBGMCU() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP) |
bogdanm | 0:9b334a45a8ff | 236 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT_DBGMCU() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_STOP) |
bogdanm | 0:9b334a45a8ff | 237 | #endif |
bogdanm | 0:9b334a45a8ff | 238 | |
bogdanm | 0:9b334a45a8ff | 239 | #if defined (DBGMCU_APB1_FZ_DBG_I2C3_STOP) |
bogdanm | 0:9b334a45a8ff | 240 | /** |
bogdanm | 0:9b334a45a8ff | 241 | * @brief I2C3 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 242 | */ |
bogdanm | 0:9b334a45a8ff | 243 | #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP) |
bogdanm | 0:9b334a45a8ff | 244 | #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C3_STOP) |
bogdanm | 0:9b334a45a8ff | 245 | #endif |
bogdanm | 0:9b334a45a8ff | 246 | |
bogdanm | 0:9b334a45a8ff | 247 | #if defined (DBGMCU_APB1_FZ_DBG_LPTIMER_STOP) |
bogdanm | 0:9b334a45a8ff | 248 | /** |
bogdanm | 0:9b334a45a8ff | 249 | * @brief LPTIMER Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 250 | */ |
bogdanm | 0:9b334a45a8ff | 251 | #define __HAL_DBGMCU_FREEZE_LPTIMER() SET_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP) |
bogdanm | 0:9b334a45a8ff | 252 | #define __HAL_DBGMCU_UNFREEZE_LPTIMER() CLEAR_BIT(DBGMCU->APB1FZ ,DBGMCU_APB1_FZ_DBG_LPTIMER_STOP) |
bogdanm | 0:9b334a45a8ff | 253 | #endif |
bogdanm | 0:9b334a45a8ff | 254 | |
bogdanm | 0:9b334a45a8ff | 255 | #if defined (DBGMCU_APB2_FZ_DBG_TIM22_STOP) |
bogdanm | 0:9b334a45a8ff | 256 | /** |
bogdanm | 0:9b334a45a8ff | 257 | * @brief TIM22 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 258 | */ |
bogdanm | 0:9b334a45a8ff | 259 | #define __HAL_DBGMCU_FREEZE_TIM22() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP) |
bogdanm | 0:9b334a45a8ff | 260 | #define __HAL_DBGMCU_UNFREEZE_TIM22() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM22_STOP) |
bogdanm | 0:9b334a45a8ff | 261 | #endif |
bogdanm | 0:9b334a45a8ff | 262 | |
bogdanm | 0:9b334a45a8ff | 263 | #if defined (DBGMCU_APB2_FZ_DBG_TIM21_STOP) |
bogdanm | 0:9b334a45a8ff | 264 | /** |
bogdanm | 0:9b334a45a8ff | 265 | * @brief TIM21 Peripherals Debug mode |
bogdanm | 0:9b334a45a8ff | 266 | */ |
bogdanm | 0:9b334a45a8ff | 267 | #define __HAL_DBGMCU_FREEZE_TIM21() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP) |
bogdanm | 0:9b334a45a8ff | 268 | #define __HAL_DBGMCU_UNFREEZE_TIM21() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM21_STOP) |
bogdanm | 0:9b334a45a8ff | 269 | #endif |
bogdanm | 0:9b334a45a8ff | 270 | |
bogdanm | 0:9b334a45a8ff | 271 | /** @brief Main Flash memory mapped at 0x00000000 |
bogdanm | 0:9b334a45a8ff | 272 | */ |
bogdanm | 0:9b334a45a8ff | 273 | #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE) |
bogdanm | 0:9b334a45a8ff | 274 | |
bogdanm | 0:9b334a45a8ff | 275 | /** @brief System Flash memory mapped at 0x00000000 |
bogdanm | 0:9b334a45a8ff | 276 | */ |
bogdanm | 0:9b334a45a8ff | 277 | #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0) |
bogdanm | 0:9b334a45a8ff | 278 | |
bogdanm | 0:9b334a45a8ff | 279 | |
bogdanm | 0:9b334a45a8ff | 280 | /** @brief Embedded SRAM mapped at 0x00000000 |
bogdanm | 0:9b334a45a8ff | 281 | */ |
bogdanm | 0:9b334a45a8ff | 282 | #define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1) |
bogdanm | 0:9b334a45a8ff | 283 | |
bogdanm | 0:9b334a45a8ff | 284 | /** @brief Configuration of the DBG Low Power mode. |
bogdanm | 0:9b334a45a8ff | 285 | * @param __DBGLPMODE__: bit field to indicate in wich Low Power mode DBG is still active. |
mbed_official | 113:b3775bf36a83 | 286 | * This parameter can be a value of |
mbed_official | 113:b3775bf36a83 | 287 | * - DBGMCU_SLEEP |
mbed_official | 113:b3775bf36a83 | 288 | * - DBGMCU_STOP |
mbed_official | 113:b3775bf36a83 | 289 | * - DBGMCU_STANDBY |
bogdanm | 0:9b334a45a8ff | 290 | */ |
bogdanm | 0:9b334a45a8ff | 291 | #define __HAL_SYSCFG_DBG_LP_CONFIG(__DBGLPMODE__) do {assert_param(IS_DBGMCU_PERIPH(__DBGLPMODE__)); \ |
bogdanm | 0:9b334a45a8ff | 292 | MODIFY_REG(DBGMCU->CR, DBGMCU_CR_DBG, (__DBGLPMODE__)); \ |
bogdanm | 0:9b334a45a8ff | 293 | } while (0) |
bogdanm | 0:9b334a45a8ff | 294 | /** |
bogdanm | 0:9b334a45a8ff | 295 | * @brief Returns the boot mode as configured by user. |
mbed_official | 113:b3775bf36a83 | 296 | * @retval The boot mode as configured by user. The returned can be a value of : |
mbed_official | 113:b3775bf36a83 | 297 | * - SYSCFG_BOOT_MAINFLASH |
mbed_official | 113:b3775bf36a83 | 298 | * - SYSCFG_BOOT_SYSTEMFLASH |
mbed_official | 113:b3775bf36a83 | 299 | * - SYSCFG_BOOT_SRAM |
bogdanm | 0:9b334a45a8ff | 300 | */ |
bogdanm | 0:9b334a45a8ff | 301 | #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE) |
bogdanm | 0:9b334a45a8ff | 302 | |
bogdanm | 0:9b334a45a8ff | 303 | |
bogdanm | 0:9b334a45a8ff | 304 | /** @brief Check whether the specified SYSCFG flag is set or not. |
bogdanm | 0:9b334a45a8ff | 305 | * @param __FLAG__: specifies the flag to check. |
mbed_official | 113:b3775bf36a83 | 306 | * The only parameter supported is SYSCFG_FLAG_VREFINT_READY |
bogdanm | 0:9b334a45a8ff | 307 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
bogdanm | 0:9b334a45a8ff | 308 | */ |
bogdanm | 0:9b334a45a8ff | 309 | #define __HAL_SYSCFG_GET_FLAG(__FLAG__) (((SYSCFG->CFGR3) & (__FLAG__)) == (__FLAG__)) |
bogdanm | 0:9b334a45a8ff | 310 | |
mbed_official | 113:b3775bf36a83 | 311 | /** @brief Fast mode Plus driving capability enable macro |
mbed_official | 113:b3775bf36a83 | 312 | * @param __FASTMODEPLUS__: This parameter can be a value of : |
mbed_official | 113:b3775bf36a83 | 313 | * @arg SYSCFG_FASTMODEPLUS_PB6 |
mbed_official | 113:b3775bf36a83 | 314 | * @arg SYSCFG_FASTMODEPLUS_PB7 |
mbed_official | 113:b3775bf36a83 | 315 | * @arg SYSCFG_FASTMODEPLUS_PB8 |
mbed_official | 113:b3775bf36a83 | 316 | * @arg SYSCFG_FASTMODEPLUS_PB9 |
mbed_official | 113:b3775bf36a83 | 317 | */ |
mbed_official | 113:b3775bf36a83 | 318 | #define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__))); \ |
mbed_official | 113:b3775bf36a83 | 319 | SET_BIT(SYSCFG->CFGR2, __FASTMODEPLUS__); \ |
mbed_official | 113:b3775bf36a83 | 320 | }while(0) |
mbed_official | 113:b3775bf36a83 | 321 | /** @brief Fast mode Plus driving capability disable macro |
mbed_official | 113:b3775bf36a83 | 322 | * @param __FASTMODEPLUS__: This parameter can be a value of : |
mbed_official | 113:b3775bf36a83 | 323 | * @arg SYSCFG_FASTMODEPLUS_PB6 |
mbed_official | 113:b3775bf36a83 | 324 | * @arg SYSCFG_FASTMODEPLUS_PB7 |
mbed_official | 113:b3775bf36a83 | 325 | * @arg SYSCFG_FASTMODEPLUS_PB8 |
mbed_official | 113:b3775bf36a83 | 326 | * @arg SYSCFG_FASTMODEPLUS_PB9 |
mbed_official | 113:b3775bf36a83 | 327 | */ |
mbed_official | 113:b3775bf36a83 | 328 | #define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__))); \ |
mbed_official | 113:b3775bf36a83 | 329 | CLEAR_BIT(SYSCFG->CFGR2, __FASTMODEPLUS__); \ |
mbed_official | 113:b3775bf36a83 | 330 | }while(0) |
mbed_official | 113:b3775bf36a83 | 331 | |
mbed_official | 113:b3775bf36a83 | 332 | |
bogdanm | 0:9b334a45a8ff | 333 | /** |
bogdanm | 0:9b334a45a8ff | 334 | * @} |
bogdanm | 0:9b334a45a8ff | 335 | */ |
bogdanm | 0:9b334a45a8ff | 336 | |
bogdanm | 0:9b334a45a8ff | 337 | /** @defgroup HAL_Exported_Functions HAL Exported Functions |
bogdanm | 0:9b334a45a8ff | 338 | * @{ |
bogdanm | 0:9b334a45a8ff | 339 | */ |
bogdanm | 0:9b334a45a8ff | 340 | /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 341 | * @brief Initialization and de-initialization functions |
bogdanm | 0:9b334a45a8ff | 342 | * @{ |
bogdanm | 0:9b334a45a8ff | 343 | */ |
bogdanm | 0:9b334a45a8ff | 344 | HAL_StatusTypeDef HAL_Init(void); |
bogdanm | 0:9b334a45a8ff | 345 | HAL_StatusTypeDef HAL_DeInit(void); |
bogdanm | 0:9b334a45a8ff | 346 | void HAL_MspInit(void); |
bogdanm | 0:9b334a45a8ff | 347 | void HAL_MspDeInit(void); |
bogdanm | 0:9b334a45a8ff | 348 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); |
bogdanm | 0:9b334a45a8ff | 349 | |
bogdanm | 0:9b334a45a8ff | 350 | /** |
bogdanm | 0:9b334a45a8ff | 351 | * @} |
bogdanm | 0:9b334a45a8ff | 352 | */ |
bogdanm | 0:9b334a45a8ff | 353 | |
bogdanm | 0:9b334a45a8ff | 354 | /** @defgroup HAL_Exported_Functions_Group2 Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 355 | * @brief Peripheral Control functions |
bogdanm | 0:9b334a45a8ff | 356 | * @{ |
bogdanm | 0:9b334a45a8ff | 357 | */ |
bogdanm | 0:9b334a45a8ff | 358 | void HAL_IncTick(void); |
bogdanm | 0:9b334a45a8ff | 359 | void HAL_Delay(__IO uint32_t Delay); |
bogdanm | 0:9b334a45a8ff | 360 | uint32_t HAL_GetTick(void); |
bogdanm | 0:9b334a45a8ff | 361 | void HAL_SuspendTick(void); |
bogdanm | 0:9b334a45a8ff | 362 | void HAL_ResumeTick(void); |
bogdanm | 0:9b334a45a8ff | 363 | uint32_t HAL_GetHalVersion(void); |
bogdanm | 0:9b334a45a8ff | 364 | uint32_t HAL_GetREVID(void); |
bogdanm | 0:9b334a45a8ff | 365 | uint32_t HAL_GetDEVID(void); |
bogdanm | 0:9b334a45a8ff | 366 | void HAL_DBGMCU_EnableDBGSleepMode(void); |
bogdanm | 0:9b334a45a8ff | 367 | void HAL_DBGMCU_DisableDBGSleepMode(void); |
bogdanm | 0:9b334a45a8ff | 368 | void HAL_DBGMCU_EnableDBGStopMode(void); |
bogdanm | 0:9b334a45a8ff | 369 | void HAL_DBGMCU_DisableDBGStopMode(void); |
bogdanm | 0:9b334a45a8ff | 370 | void HAL_DBGMCU_EnableDBGStandbyMode(void); |
bogdanm | 0:9b334a45a8ff | 371 | void HAL_DBGMCU_DisableDBGStandbyMode(void); |
bogdanm | 0:9b334a45a8ff | 372 | void HAL_DBGMCU_DBG_EnableLowPowerConfig(uint32_t Periph); |
bogdanm | 0:9b334a45a8ff | 373 | void HAL_DBGMCU_DBG_DisableLowPowerConfig(uint32_t Periph); |
bogdanm | 0:9b334a45a8ff | 374 | uint32_t HAL_SYSCFG_GetBootMode(void); |
bogdanm | 0:9b334a45a8ff | 375 | void HAL_SYSCFG_EnableVREFINT(void); |
bogdanm | 0:9b334a45a8ff | 376 | void HAL_SYSCFG_DisableVREFINT(void); |
bogdanm | 0:9b334a45a8ff | 377 | void HAL_SYSCFG_Enable_Lock_VREFINT(void); |
bogdanm | 0:9b334a45a8ff | 378 | void HAL_SYSCFG_Disable_Lock_VREFINT(void); |
bogdanm | 0:9b334a45a8ff | 379 | void HAL_SYSCFG_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT); |
bogdanm | 0:9b334a45a8ff | 380 | |
bogdanm | 0:9b334a45a8ff | 381 | /** |
bogdanm | 0:9b334a45a8ff | 382 | * @} |
bogdanm | 0:9b334a45a8ff | 383 | */ |
bogdanm | 0:9b334a45a8ff | 384 | /** |
bogdanm | 0:9b334a45a8ff | 385 | * @} |
bogdanm | 0:9b334a45a8ff | 386 | */ |
bogdanm | 0:9b334a45a8ff | 387 | |
mbed_official | 113:b3775bf36a83 | 388 | /* Define the private group ***********************************/ |
mbed_official | 113:b3775bf36a83 | 389 | /**************************************************************/ |
mbed_official | 113:b3775bf36a83 | 390 | /** @defgroup HAL_Private HAL Private |
mbed_official | 113:b3775bf36a83 | 391 | * @{ |
mbed_official | 113:b3775bf36a83 | 392 | */ |
mbed_official | 113:b3775bf36a83 | 393 | /** |
mbed_official | 113:b3775bf36a83 | 394 | * @} |
mbed_official | 113:b3775bf36a83 | 395 | */ |
mbed_official | 113:b3775bf36a83 | 396 | /**************************************************************/ |
mbed_official | 113:b3775bf36a83 | 397 | |
mbed_official | 113:b3775bf36a83 | 398 | |
bogdanm | 0:9b334a45a8ff | 399 | /** |
bogdanm | 0:9b334a45a8ff | 400 | * @} |
bogdanm | 0:9b334a45a8ff | 401 | */ |
bogdanm | 0:9b334a45a8ff | 402 | |
bogdanm | 0:9b334a45a8ff | 403 | /** |
bogdanm | 0:9b334a45a8ff | 404 | * @} |
bogdanm | 0:9b334a45a8ff | 405 | */ |
bogdanm | 0:9b334a45a8ff | 406 | |
bogdanm | 0:9b334a45a8ff | 407 | #ifdef __cplusplus |
bogdanm | 0:9b334a45a8ff | 408 | } |
bogdanm | 0:9b334a45a8ff | 409 | #endif |
bogdanm | 0:9b334a45a8ff | 410 | |
bogdanm | 0:9b334a45a8ff | 411 | #endif /* __STM32L0xx_HAL_H */ |
bogdanm | 0:9b334a45a8ff | 412 | |
bogdanm | 0:9b334a45a8ff | 413 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
bogdanm | 0:9b334a45a8ff | 414 |