en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lptim.c@113:b3775bf36a83, 2016-04-19 (annotated)

Committer:
mbed_official
Date:
Tue Apr 19 11:15:15 2016 +0100
Revision:
113:b3775bf36a83
Parent:
0:9b334a45a8ff 
Synchronized with git revision 896981126b34b6d9441e3eea77881c67a1ae3dbd



Full URL: https://github.com/mbedmicro/mbed/commit/896981126b34b6d9441e3eea77881c67a1ae3dbd/



Exporter tool addition for e2 studio

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l0xx_hal_lptim.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 113:b3775bf36a83 5 * @version V1.5.0
mbed_official 113:b3775bf36a83 6 * @date 8-January-2016
bogdanm 0:9b334a45a8ff 7 * @brief LPTIM HAL module driver.
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 10 * functionalities of the Low Power Timer (LPTIM) peripheral:
bogdanm 0:9b334a45a8ff 11 * + Initialization and de-initialization functions.
bogdanm 0:9b334a45a8ff 12 * + Start/Stop operation functions in polling mode.
bogdanm 0:9b334a45a8ff 13 * + Start/Stop operation functions in interrupt mode.
bogdanm 0:9b334a45a8ff 14 * + Reading operation functions.
bogdanm 0:9b334a45a8ff 15 * + Peripheral State functions.
bogdanm 0:9b334a45a8ff 16 *
bogdanm 0:9b334a45a8ff 17 @verbatim
bogdanm 0:9b334a45a8ff 18 ==============================================================================
bogdanm 0:9b334a45a8ff 19 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 20 ==============================================================================
bogdanm 0:9b334a45a8ff 21 [..]
bogdanm 0:9b334a45a8ff 22 The LPTIM HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 (#)Initialize the LPTIM low level resources by implementing the
bogdanm 0:9b334a45a8ff 25 HAL_LPTIM_MspInit():
bogdanm 0:9b334a45a8ff 26 (##) Enable the LPTIM interface clock using __HAL_RCC_LPTIM1_CLK_ENABLE().
bogdanm 0:9b334a45a8ff 27 (##) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
bogdanm 0:9b334a45a8ff 28 (+) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
bogdanm 0:9b334a45a8ff 29 (+) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
bogdanm 0:9b334a45a8ff 30 (+) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
bogdanm 0:9b334a45a8ff 33 configures mainly:
bogdanm 0:9b334a45a8ff 34 (##) The instance: Only LPTIM1 is present in STM32L053xx.
bogdanm 0:9b334a45a8ff 35 (##) Clock: the counter clock.
bogdanm 0:9b334a45a8ff 36 - Source : it can be either the ULPTIM input (IN1) or one of
bogdanm 0:9b334a45a8ff 37 the internal clock; (APB, LSE, LSI or MSI).
bogdanm 0:9b334a45a8ff 38 - Prescaler: select the clock divider.
bogdanm 0:9b334a45a8ff 39 (##) UltraLowPowerClock : To be used only if the ULPTIM is selected
bogdanm 0:9b334a45a8ff 40 as counter clock source.
bogdanm 0:9b334a45a8ff 41 - Polarity: polarity of the active edge for the counter unit
bogdanm 0:9b334a45a8ff 42 if the ULPTIM input is selected.
bogdanm 0:9b334a45a8ff 43 - SampleTime: clock sampling time to configure the clock glitch
bogdanm 0:9b334a45a8ff 44 filter.
bogdanm 0:9b334a45a8ff 45 (##) Trigger: How the counter start.
bogdanm 0:9b334a45a8ff 46 - Source: trigger can be software or one of the hardware triggers.
bogdanm 0:9b334a45a8ff 47 - ActiveEdge : only for hardware trigger.
bogdanm 0:9b334a45a8ff 48 - SampleTime : trigger sampling time to configure the trigger
bogdanm 0:9b334a45a8ff 49 glitch filter.
bogdanm 0:9b334a45a8ff 50 (##) OutputPolarity : 2 opposite polarities are possibles.
bogdanm 0:9b334a45a8ff 51 (##) UpdateMode: specifies whether the update of the autoreload and
bogdanm 0:9b334a45a8ff 52 the compare values is done immediately or after the end of current
bogdanm 0:9b334a45a8ff 53 period.
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 (#)Six modes are available:
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 (##) PWM Mode: To generate a PWM signal with specified period and pulse,
bogdanm 0:9b334a45a8ff 58 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
bogdanm 0:9b334a45a8ff 59 mode.
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 (##) One Pulse Mode: To generate pulse with specified width in response
bogdanm 0:9b334a45a8ff 62 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
bogdanm 0:9b334a45a8ff 63 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 (##) Set once Mode: In this mode, the output changes the level (from
bogdanm 0:9b334a45a8ff 66 low level to high level if the output polarity is configured high, else
bogdanm 0:9b334a45a8ff 67 the opposite) when a compare match occurs. To start this mode, call
bogdanm 0:9b334a45a8ff 68 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
bogdanm 0:9b334a45a8ff 69 interruption mode.
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 (##) Encoder Mode: To use the encoder interface call
bogdanm 0:9b334a45a8ff 72 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
bogdanm 0:9b334a45a8ff 73 interruption mode.
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 (##) Time out Mode: an active edge on one selected trigger input rests
bogdanm 0:9b334a45a8ff 76 the counter. The first trigger event will start the timer, any
bogdanm 0:9b334a45a8ff 77 successive trigger event will reset the counter and the timer will
bogdanm 0:9b334a45a8ff 78 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
bogdanm 0:9b334a45a8ff 79 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 (##) Counter Mode: counter can be used to count external events on
bogdanm 0:9b334a45a8ff 82 the LPTIM Input1 or it can be used to count internal clock cycles.
bogdanm 0:9b334a45a8ff 83 To start this mode, call HAL_LPTIM_Counter_Start() or
bogdanm 0:9b334a45a8ff 84 HAL_LPTIM_Counter_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 (#) User can stop any process by calling the corresponding API:
bogdanm 0:9b334a45a8ff 88 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
bogdanm 0:9b334a45a8ff 89 already started in interruption mode.
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 (#)Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 @endverbatim
bogdanm 0:9b334a45a8ff 94 ******************************************************************************
bogdanm 0:9b334a45a8ff 95 * @attention
bogdanm 0:9b334a45a8ff 96 *
mbed_official 113:b3775bf36a83 97 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 98 *
bogdanm 0:9b334a45a8ff 99 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 100 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 101 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 102 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 103 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 104 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 105 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 106 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 107 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 108 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 109 *
bogdanm 0:9b334a45a8ff 110 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 111 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 112 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 113 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 114 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 115 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 116 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 117 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 118 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 119 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 120 *
bogdanm 0:9b334a45a8ff 121 ******************************************************************************
bogdanm 0:9b334a45a8ff 122 */
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 125 #include "stm32l0xx_hal.h"
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 128 * @{
bogdanm 0:9b334a45a8ff 129 */
bogdanm 0:9b334a45a8ff 130
mbed_official 113:b3775bf36a83 131 #ifdef HAL_LPTIM_MODULE_ENABLED
mbed_official 113:b3775bf36a83 132
bogdanm 0:9b334a45a8ff 133 /** @addtogroup LPTIM
bogdanm 0:9b334a45a8ff 134 * @brief LPTIM HAL module driver.
bogdanm 0:9b334a45a8ff 135 * @{
bogdanm 0:9b334a45a8ff 136 */
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 /** @addtogroup LPTIM_Exported_Functions
bogdanm 0:9b334a45a8ff 139 * @{
bogdanm 0:9b334a45a8ff 140 */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /** @addtogroup LPTIM_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 143 * @brief Initialization and Configuration functions.
bogdanm 0:9b334a45a8ff 144 *
bogdanm 0:9b334a45a8ff 145 @verbatim
bogdanm 0:9b334a45a8ff 146 ==============================================================================
bogdanm 0:9b334a45a8ff 147 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 148 ==============================================================================
bogdanm 0:9b334a45a8ff 149 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 150 (+) Initialize the LPTIM according to the specified parameters in the
bogdanm 0:9b334a45a8ff 151 LPTIM_InitTypeDef and creates the associated handle.
bogdanm 0:9b334a45a8ff 152 (+) DeInitialize the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 153 (+) Initialize the LPTIM MSP.
bogdanm 0:9b334a45a8ff 154 (+) DeInitialize LPTIM MSP.
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 @endverbatim
bogdanm 0:9b334a45a8ff 157 * @{
bogdanm 0:9b334a45a8ff 158 */
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /**
bogdanm 0:9b334a45a8ff 161 * @brief Initializes the LPTIM according to the specified parameters in the
bogdanm 0:9b334a45a8ff 162 * LPTIM_InitTypeDef and creates the associated handle.
bogdanm 0:9b334a45a8ff 163 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 164 * @retval HAL status
bogdanm 0:9b334a45a8ff 165 */
bogdanm 0:9b334a45a8ff 166 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 167 {
bogdanm 0:9b334a45a8ff 168 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 /* Check the LPTIM handle allocation */
bogdanm 0:9b334a45a8ff 171 if(hlptim == NULL)
bogdanm 0:9b334a45a8ff 172 {
bogdanm 0:9b334a45a8ff 173 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 174 }
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /* Check the parameters */
bogdanm 0:9b334a45a8ff 177 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
bogdanm 0:9b334a45a8ff 180 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 181 if((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 182 {
bogdanm 0:9b334a45a8ff 183 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 184 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
bogdanm 0:9b334a45a8ff 185 }
bogdanm 0:9b334a45a8ff 186 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
bogdanm 0:9b334a45a8ff 187 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 188 {
bogdanm 0:9b334a45a8ff 189 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
bogdanm 0:9b334a45a8ff 190 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
bogdanm 0:9b334a45a8ff 191 }
bogdanm 0:9b334a45a8ff 192 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
bogdanm 0:9b334a45a8ff 193 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
bogdanm 0:9b334a45a8ff 194 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 if(hlptim->State == HAL_LPTIM_STATE_RESET)
bogdanm 0:9b334a45a8ff 197 {
mbed_official 113:b3775bf36a83 198 /* Allocate lock resource and initialize it */
mbed_official 113:b3775bf36a83 199 hlptim->Lock = HAL_UNLOCKED;
mbed_official 113:b3775bf36a83 200
bogdanm 0:9b334a45a8ff 201 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 202 HAL_LPTIM_MspInit(hlptim);
bogdanm 0:9b334a45a8ff 203 }
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 206 hlptim->State = HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 209 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 210
bogdanm 0:9b334a45a8ff 211 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 212 {
bogdanm 0:9b334a45a8ff 213 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
bogdanm 0:9b334a45a8ff 214 }
bogdanm 0:9b334a45a8ff 215 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 216 {
bogdanm 0:9b334a45a8ff 217 tmpcfgr &= (uint32_t)(~ (LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
bogdanm 0:9b334a45a8ff 218 }
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
bogdanm 0:9b334a45a8ff 221 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
bogdanm 0:9b334a45a8ff 222 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE ));
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 /* Set initialization parameters */
bogdanm 0:9b334a45a8ff 225 tmpcfgr |= (hlptim->Init.Clock.Source |
bogdanm 0:9b334a45a8ff 226 hlptim->Init.Clock.Prescaler |
bogdanm 0:9b334a45a8ff 227 hlptim->Init.OutputPolarity |
bogdanm 0:9b334a45a8ff 228 hlptim->Init.UpdateMode |
bogdanm 0:9b334a45a8ff 229 hlptim->Init.CounterSource);
bogdanm 0:9b334a45a8ff 230
bogdanm 0:9b334a45a8ff 231 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 232 {
bogdanm 0:9b334a45a8ff 233 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
bogdanm 0:9b334a45a8ff 234 hlptim->Init.UltraLowPowerClock.SampleTime);
bogdanm 0:9b334a45a8ff 235 }
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 238 {
bogdanm 0:9b334a45a8ff 239 /* Enable External trigger and set the trigger source */
bogdanm 0:9b334a45a8ff 240 tmpcfgr |= (hlptim->Init.Trigger.Source |
bogdanm 0:9b334a45a8ff 241 hlptim->Init.Trigger.ActiveEdge |
bogdanm 0:9b334a45a8ff 242 hlptim->Init.Trigger.SampleTime);
bogdanm 0:9b334a45a8ff 243 }
bogdanm 0:9b334a45a8ff 244
bogdanm 0:9b334a45a8ff 245 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 246 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 249 hlptim->State = HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /* Return function status */
bogdanm 0:9b334a45a8ff 252 return HAL_OK;
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 /**
bogdanm 0:9b334a45a8ff 256 * @brief DeInitializes the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 257 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 258 * @retval HAL status
bogdanm 0:9b334a45a8ff 259 */
bogdanm 0:9b334a45a8ff 260 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 261 {
bogdanm 0:9b334a45a8ff 262 /* Check the LPTIM handle allocation */
bogdanm 0:9b334a45a8ff 263 if(hlptim == NULL)
bogdanm 0:9b334a45a8ff 264 {
bogdanm 0:9b334a45a8ff 265 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 266 }
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 269 hlptim->State = HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /* Disable the LPTIM Peripheral Clock */
bogdanm 0:9b334a45a8ff 272 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 /* DeInit the low level hardware: CLOCK, NVIC.*/
bogdanm 0:9b334a45a8ff 275 HAL_LPTIM_MspDeInit(hlptim);
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 278 hlptim->State = HAL_LPTIM_STATE_RESET;
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 /* Release Lock */
bogdanm 0:9b334a45a8ff 281 __HAL_UNLOCK(hlptim);
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 /* Return function status */
bogdanm 0:9b334a45a8ff 284 return HAL_OK;
bogdanm 0:9b334a45a8ff 285 }
bogdanm 0:9b334a45a8ff 286
bogdanm 0:9b334a45a8ff 287 /**
bogdanm 0:9b334a45a8ff 288 * @brief Initializes the LPTIM MSP.
bogdanm 0:9b334a45a8ff 289 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 290 * @retval None
bogdanm 0:9b334a45a8ff 291 */
bogdanm 0:9b334a45a8ff 292 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 293 {
mbed_official 113:b3775bf36a83 294 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 295 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 296
bogdanm 0:9b334a45a8ff 297 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 298 the HAL_LPTIM_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 299 */
bogdanm 0:9b334a45a8ff 300 }
bogdanm 0:9b334a45a8ff 301
bogdanm 0:9b334a45a8ff 302 /**
bogdanm 0:9b334a45a8ff 303 * @brief DeInitializes LPTIM MSP.
bogdanm 0:9b334a45a8ff 304 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 305 * @retval None
bogdanm 0:9b334a45a8ff 306 */
bogdanm 0:9b334a45a8ff 307 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 308 {
mbed_official 113:b3775bf36a83 309 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 310 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 311
bogdanm 0:9b334a45a8ff 312 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 313 the HAL_LPTIM_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 314 */
bogdanm 0:9b334a45a8ff 315 }
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 /**
bogdanm 0:9b334a45a8ff 318 * @}
bogdanm 0:9b334a45a8ff 319 */
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 /** @addtogroup LPTIM_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 322 * @brief Start-Stop operation functions.
bogdanm 0:9b334a45a8ff 323 *
bogdanm 0:9b334a45a8ff 324 @verbatim
bogdanm 0:9b334a45a8ff 325 ==============================================================================
bogdanm 0:9b334a45a8ff 326 ##### LPTIM Start Stop operation functions #####
bogdanm 0:9b334a45a8ff 327 ==============================================================================
bogdanm 0:9b334a45a8ff 328 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 329 (+) Start the PWM mode.
bogdanm 0:9b334a45a8ff 330 (+) Stop the PWM mode.
bogdanm 0:9b334a45a8ff 331 (+) Start the One pulse mode.
bogdanm 0:9b334a45a8ff 332 (+) Stop the One pulse mode.
bogdanm 0:9b334a45a8ff 333 (+) Start the Set once mode.
bogdanm 0:9b334a45a8ff 334 (+) Stop the Set once mode.
bogdanm 0:9b334a45a8ff 335 (+) Start the Encoder mode.
bogdanm 0:9b334a45a8ff 336 (+) Stop the Encoder mode.
bogdanm 0:9b334a45a8ff 337 (+) Start the Timeout mode.
bogdanm 0:9b334a45a8ff 338 (+) Stop the Timeout mode.
bogdanm 0:9b334a45a8ff 339 (+) Start the Counter mode.
bogdanm 0:9b334a45a8ff 340 (+) Stop the Counter mode.
bogdanm 0:9b334a45a8ff 341
bogdanm 0:9b334a45a8ff 342
bogdanm 0:9b334a45a8ff 343 @endverbatim
bogdanm 0:9b334a45a8ff 344 * @{
bogdanm 0:9b334a45a8ff 345 */
bogdanm 0:9b334a45a8ff 346
bogdanm 0:9b334a45a8ff 347 /**
bogdanm 0:9b334a45a8ff 348 * @brief Starts the LPTIM PWM generation.
bogdanm 0:9b334a45a8ff 349 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 350 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 351 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 352 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 353 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 354 * @retval HAL status
bogdanm 0:9b334a45a8ff 355 */
bogdanm 0:9b334a45a8ff 356 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 357 {
bogdanm 0:9b334a45a8ff 358 /* Check the parameters */
bogdanm 0:9b334a45a8ff 359 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 360 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 361 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 364 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 /* Reset WAVE bit to set PWM mode */
bogdanm 0:9b334a45a8ff 367 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 370 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 373 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 376 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 377
bogdanm 0:9b334a45a8ff 378 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 379 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 380
bogdanm 0:9b334a45a8ff 381 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 382 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 383
bogdanm 0:9b334a45a8ff 384 /* Return function status */
bogdanm 0:9b334a45a8ff 385 return HAL_OK;
bogdanm 0:9b334a45a8ff 386 }
bogdanm 0:9b334a45a8ff 387
bogdanm 0:9b334a45a8ff 388 /**
bogdanm 0:9b334a45a8ff 389 * @brief Stops the LPTIM PWM generation.
bogdanm 0:9b334a45a8ff 390 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 391 * @retval HAL status
bogdanm 0:9b334a45a8ff 392 */
bogdanm 0:9b334a45a8ff 393 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 394 {
bogdanm 0:9b334a45a8ff 395 /* Check the parameters */
bogdanm 0:9b334a45a8ff 396 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 399 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 402 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 405 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 /* Return function status */
bogdanm 0:9b334a45a8ff 408 return HAL_OK;
bogdanm 0:9b334a45a8ff 409 }
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /**
bogdanm 0:9b334a45a8ff 412 * @brief Starts the LPTIM PWM generation in interrupt mode.
bogdanm 0:9b334a45a8ff 413 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 414 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 415 * This parameter must be a value between 0x0000 and 0xFFFF
bogdanm 0:9b334a45a8ff 416 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 417 * This parameter must be a value between 0x0000 and 0xFFFF
bogdanm 0:9b334a45a8ff 418 * @retval HAL status
bogdanm 0:9b334a45a8ff 419 */
bogdanm 0:9b334a45a8ff 420 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 421 {
bogdanm 0:9b334a45a8ff 422 /* Check the parameters */
bogdanm 0:9b334a45a8ff 423 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 424 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 425 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 426
bogdanm 0:9b334a45a8ff 427 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 428 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 429
bogdanm 0:9b334a45a8ff 430 /* Reset WAVE bit to set PWM mode */
bogdanm 0:9b334a45a8ff 431 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 434 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 437 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 440 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 441
bogdanm 0:9b334a45a8ff 442 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 443 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 444
bogdanm 0:9b334a45a8ff 445 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 446 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 447 {
bogdanm 0:9b334a45a8ff 448 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 449 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 450 }
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 453 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 456 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 457
bogdanm 0:9b334a45a8ff 458 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 459 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 460
bogdanm 0:9b334a45a8ff 461 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 462 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 463
bogdanm 0:9b334a45a8ff 464 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 465 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 466
bogdanm 0:9b334a45a8ff 467 /* Return function status */
bogdanm 0:9b334a45a8ff 468 return HAL_OK;
bogdanm 0:9b334a45a8ff 469 }
bogdanm 0:9b334a45a8ff 470
bogdanm 0:9b334a45a8ff 471 /**
bogdanm 0:9b334a45a8ff 472 * @brief Stops the LPTIM PWM generation in interrupt mode.
bogdanm 0:9b334a45a8ff 473 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 474 * @retval HAL status
bogdanm 0:9b334a45a8ff 475 */
bogdanm 0:9b334a45a8ff 476 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 477 {
bogdanm 0:9b334a45a8ff 478 /* Check the parameters */
bogdanm 0:9b334a45a8ff 479 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 480
bogdanm 0:9b334a45a8ff 481 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 482 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 485 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 488 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 489
bogdanm 0:9b334a45a8ff 490 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 491 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 492
bogdanm 0:9b334a45a8ff 493 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 494 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 495
bogdanm 0:9b334a45a8ff 496 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 497 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 498
bogdanm 0:9b334a45a8ff 499 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 500 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 501 {
bogdanm 0:9b334a45a8ff 502 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 503 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 504 }
bogdanm 0:9b334a45a8ff 505
bogdanm 0:9b334a45a8ff 506 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 507 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 508
bogdanm 0:9b334a45a8ff 509 /* Return function status */
bogdanm 0:9b334a45a8ff 510 return HAL_OK;
bogdanm 0:9b334a45a8ff 511 }
bogdanm 0:9b334a45a8ff 512
bogdanm 0:9b334a45a8ff 513 /**
bogdanm 0:9b334a45a8ff 514 * @brief Starts the LPTIM One pulse generation.
bogdanm 0:9b334a45a8ff 515 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 516 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 517 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 518 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 519 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 520 * @retval HAL status
bogdanm 0:9b334a45a8ff 521 */
bogdanm 0:9b334a45a8ff 522 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 523 {
bogdanm 0:9b334a45a8ff 524 /* Check the parameters */
bogdanm 0:9b334a45a8ff 525 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 526 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 527 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 528
bogdanm 0:9b334a45a8ff 529 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 530 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 /* Reset WAVE bit to set one pulse mode */
bogdanm 0:9b334a45a8ff 533 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 534
bogdanm 0:9b334a45a8ff 535 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 536 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 537
bogdanm 0:9b334a45a8ff 538 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 539 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 540
bogdanm 0:9b334a45a8ff 541 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 542 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544 /* Start timer in single mode */
bogdanm 0:9b334a45a8ff 545 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 546
bogdanm 0:9b334a45a8ff 547 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 548 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 549
bogdanm 0:9b334a45a8ff 550 /* Return function status */
bogdanm 0:9b334a45a8ff 551 return HAL_OK;
bogdanm 0:9b334a45a8ff 552 }
bogdanm 0:9b334a45a8ff 553
bogdanm 0:9b334a45a8ff 554 /**
bogdanm 0:9b334a45a8ff 555 * @brief Stops the LPTIM One pulse generation.
bogdanm 0:9b334a45a8ff 556 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 557 * @retval HAL status
bogdanm 0:9b334a45a8ff 558 */
bogdanm 0:9b334a45a8ff 559 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 560 {
bogdanm 0:9b334a45a8ff 561 /* Check the parameters */
bogdanm 0:9b334a45a8ff 562 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 563
bogdanm 0:9b334a45a8ff 564 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 565 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 566
bogdanm 0:9b334a45a8ff 567 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 568 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 569
bogdanm 0:9b334a45a8ff 570 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 571 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 572
bogdanm 0:9b334a45a8ff 573 /* Return function status */
bogdanm 0:9b334a45a8ff 574 return HAL_OK;
bogdanm 0:9b334a45a8ff 575 }
bogdanm 0:9b334a45a8ff 576
bogdanm 0:9b334a45a8ff 577 /**
bogdanm 0:9b334a45a8ff 578 * @brief Starts the LPTIM One pulse generation in interrupt mode.
bogdanm 0:9b334a45a8ff 579 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 580 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 581 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 582 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 583 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 584 * @retval HAL status
bogdanm 0:9b334a45a8ff 585 */
bogdanm 0:9b334a45a8ff 586 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 587 {
bogdanm 0:9b334a45a8ff 588 /* Check the parameters */
bogdanm 0:9b334a45a8ff 589 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 590 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 591 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 594 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 /* Reset WAVE bit to set one pulse mode */
bogdanm 0:9b334a45a8ff 597 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 598
bogdanm 0:9b334a45a8ff 599 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 600 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 603 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 604
bogdanm 0:9b334a45a8ff 605 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 606 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 607
bogdanm 0:9b334a45a8ff 608 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 609 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 610
bogdanm 0:9b334a45a8ff 611 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 612 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 613 {
bogdanm 0:9b334a45a8ff 614 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 615 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 616 }
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 619 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 620
bogdanm 0:9b334a45a8ff 621 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 622 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 623
bogdanm 0:9b334a45a8ff 624 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 625 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 626
bogdanm 0:9b334a45a8ff 627 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 628 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 629
bogdanm 0:9b334a45a8ff 630 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 631 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 632
bogdanm 0:9b334a45a8ff 633 /* Return function status */
bogdanm 0:9b334a45a8ff 634 return HAL_OK;
bogdanm 0:9b334a45a8ff 635 }
bogdanm 0:9b334a45a8ff 636
bogdanm 0:9b334a45a8ff 637 /**
bogdanm 0:9b334a45a8ff 638 * @brief Stops the LPTIM One pulse generation in interrupt mode.
bogdanm 0:9b334a45a8ff 639 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 640 * @retval HAL status
bogdanm 0:9b334a45a8ff 641 */
bogdanm 0:9b334a45a8ff 642 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 643 {
bogdanm 0:9b334a45a8ff 644 /* Check the parameters */
bogdanm 0:9b334a45a8ff 645 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 646
bogdanm 0:9b334a45a8ff 647 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 648 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 649
bogdanm 0:9b334a45a8ff 650 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 651 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 652
bogdanm 0:9b334a45a8ff 653 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 654 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 655
bogdanm 0:9b334a45a8ff 656 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 657 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 658
bogdanm 0:9b334a45a8ff 659 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 660 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 661
bogdanm 0:9b334a45a8ff 662 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 663 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 664
bogdanm 0:9b334a45a8ff 665 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 666 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 667 {
bogdanm 0:9b334a45a8ff 668 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 669 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 670 }
bogdanm 0:9b334a45a8ff 671
bogdanm 0:9b334a45a8ff 672 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 673 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 674
bogdanm 0:9b334a45a8ff 675 /* Return function status */
bogdanm 0:9b334a45a8ff 676 return HAL_OK;
bogdanm 0:9b334a45a8ff 677 }
bogdanm 0:9b334a45a8ff 678
bogdanm 0:9b334a45a8ff 679 /**
bogdanm 0:9b334a45a8ff 680 * @brief Starts the LPTIM in Set once mode.
bogdanm 0:9b334a45a8ff 681 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 682 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 683 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 684 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 685 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 686 * @retval HAL status
bogdanm 0:9b334a45a8ff 687 */
bogdanm 0:9b334a45a8ff 688 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 689 {
bogdanm 0:9b334a45a8ff 690 /* Check the parameters */
bogdanm 0:9b334a45a8ff 691 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 692 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 693 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 694
bogdanm 0:9b334a45a8ff 695 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 696 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 697
bogdanm 0:9b334a45a8ff 698 /* Set WAVE bit to enable the set once mode */
bogdanm 0:9b334a45a8ff 699 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 700
bogdanm 0:9b334a45a8ff 701 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 702 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 703
bogdanm 0:9b334a45a8ff 704 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 705 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 706
bogdanm 0:9b334a45a8ff 707 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 708 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 709
bogdanm 0:9b334a45a8ff 710 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 711 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 712
bogdanm 0:9b334a45a8ff 713 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 714 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 715
bogdanm 0:9b334a45a8ff 716 /* Return function status */
bogdanm 0:9b334a45a8ff 717 return HAL_OK;
bogdanm 0:9b334a45a8ff 718 }
bogdanm 0:9b334a45a8ff 719
bogdanm 0:9b334a45a8ff 720 /**
bogdanm 0:9b334a45a8ff 721 * @brief Stops the LPTIM Set once mode.
bogdanm 0:9b334a45a8ff 722 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 723 * @retval HAL status
bogdanm 0:9b334a45a8ff 724 */
bogdanm 0:9b334a45a8ff 725 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 726 {
bogdanm 0:9b334a45a8ff 727 /* Check the parameters */
bogdanm 0:9b334a45a8ff 728 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 729
bogdanm 0:9b334a45a8ff 730 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 731 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 732
bogdanm 0:9b334a45a8ff 733 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 734 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 735
bogdanm 0:9b334a45a8ff 736 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 737 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 738
bogdanm 0:9b334a45a8ff 739 /* Return function status */
bogdanm 0:9b334a45a8ff 740 return HAL_OK;
bogdanm 0:9b334a45a8ff 741 }
bogdanm 0:9b334a45a8ff 742
bogdanm 0:9b334a45a8ff 743 /**
bogdanm 0:9b334a45a8ff 744 * @brief Starts the LPTIM Set once mode in interrupt mode.
bogdanm 0:9b334a45a8ff 745 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 746 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 747 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 748 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 749 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 750 * @retval HAL status
bogdanm 0:9b334a45a8ff 751 */
bogdanm 0:9b334a45a8ff 752 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 753 {
bogdanm 0:9b334a45a8ff 754 /* Check the parameters */
bogdanm 0:9b334a45a8ff 755 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 756 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 757 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 758
bogdanm 0:9b334a45a8ff 759 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 760 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 761
bogdanm 0:9b334a45a8ff 762 /* Set WAVE bit to enable the set once mode */
bogdanm 0:9b334a45a8ff 763 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 764
bogdanm 0:9b334a45a8ff 765 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 766 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 767
bogdanm 0:9b334a45a8ff 768 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 769 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 770
bogdanm 0:9b334a45a8ff 771 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 772 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 773
bogdanm 0:9b334a45a8ff 774 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 775 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 776
bogdanm 0:9b334a45a8ff 777 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 778 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 779 {
bogdanm 0:9b334a45a8ff 780 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 781 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 782 }
bogdanm 0:9b334a45a8ff 783
bogdanm 0:9b334a45a8ff 784 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 785 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 786
bogdanm 0:9b334a45a8ff 787 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 788 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 789
bogdanm 0:9b334a45a8ff 790 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 791 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 792
bogdanm 0:9b334a45a8ff 793 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 794 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 795
bogdanm 0:9b334a45a8ff 796 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 797 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 798
bogdanm 0:9b334a45a8ff 799 /* Return function status */
bogdanm 0:9b334a45a8ff 800 return HAL_OK;
bogdanm 0:9b334a45a8ff 801 }
bogdanm 0:9b334a45a8ff 802
bogdanm 0:9b334a45a8ff 803 /**
bogdanm 0:9b334a45a8ff 804 * @brief Stops the LPTIM Set once mode in interrupt mode.
bogdanm 0:9b334a45a8ff 805 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 806 * @retval HAL status
bogdanm 0:9b334a45a8ff 807 */
bogdanm 0:9b334a45a8ff 808 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 809 {
bogdanm 0:9b334a45a8ff 810 /* Check the parameters */
bogdanm 0:9b334a45a8ff 811 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 812
bogdanm 0:9b334a45a8ff 813 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 814 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 815
bogdanm 0:9b334a45a8ff 816 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 817 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 818
bogdanm 0:9b334a45a8ff 819 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 820 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 821
bogdanm 0:9b334a45a8ff 822 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 823 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 824
bogdanm 0:9b334a45a8ff 825 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 826 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 827
bogdanm 0:9b334a45a8ff 828 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 829 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 830
bogdanm 0:9b334a45a8ff 831 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 832 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 833 {
bogdanm 0:9b334a45a8ff 834 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 835 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 836 }
bogdanm 0:9b334a45a8ff 837
bogdanm 0:9b334a45a8ff 838 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 839 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 840
bogdanm 0:9b334a45a8ff 841 /* Return function status */
bogdanm 0:9b334a45a8ff 842 return HAL_OK;
bogdanm 0:9b334a45a8ff 843 }
bogdanm 0:9b334a45a8ff 844
bogdanm 0:9b334a45a8ff 845 /**
bogdanm 0:9b334a45a8ff 846 * @brief Starts the Encoder interface.
bogdanm 0:9b334a45a8ff 847 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 848 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 849 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 850 * @retval HAL status
bogdanm 0:9b334a45a8ff 851 */
bogdanm 0:9b334a45a8ff 852 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 853 {
bogdanm 0:9b334a45a8ff 854 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 855
bogdanm 0:9b334a45a8ff 856 /* Check the parameters */
bogdanm 0:9b334a45a8ff 857 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 858 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 859 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
bogdanm 0:9b334a45a8ff 860 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
bogdanm 0:9b334a45a8ff 861 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 862
bogdanm 0:9b334a45a8ff 863 /* Configure edge sensitivity for encoder mode */
bogdanm 0:9b334a45a8ff 864 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 865 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 866
bogdanm 0:9b334a45a8ff 867 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 868 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 869
bogdanm 0:9b334a45a8ff 870 /* Clear CKPOL bits */
bogdanm 0:9b334a45a8ff 871 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
bogdanm 0:9b334a45a8ff 872
bogdanm 0:9b334a45a8ff 873 /* Set Input polarity */
bogdanm 0:9b334a45a8ff 874 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
bogdanm 0:9b334a45a8ff 875
bogdanm 0:9b334a45a8ff 876 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 877 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 878
bogdanm 0:9b334a45a8ff 879 /* Set ENC bit to enable the encoder interface */
bogdanm 0:9b334a45a8ff 880 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 881
bogdanm 0:9b334a45a8ff 882 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 883 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 884
bogdanm 0:9b334a45a8ff 885 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 886 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 887
bogdanm 0:9b334a45a8ff 888 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 889 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 890
bogdanm 0:9b334a45a8ff 891 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 892 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 893
bogdanm 0:9b334a45a8ff 894 /* Return function status */
bogdanm 0:9b334a45a8ff 895 return HAL_OK;
bogdanm 0:9b334a45a8ff 896 }
bogdanm 0:9b334a45a8ff 897
bogdanm 0:9b334a45a8ff 898 /**
bogdanm 0:9b334a45a8ff 899 * @brief Stops the Encoder interface.
bogdanm 0:9b334a45a8ff 900 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 901 * @retval HAL status
bogdanm 0:9b334a45a8ff 902 */
bogdanm 0:9b334a45a8ff 903 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 904 {
bogdanm 0:9b334a45a8ff 905 /* Check the parameters */
bogdanm 0:9b334a45a8ff 906 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 907
bogdanm 0:9b334a45a8ff 908 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 909 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 910
bogdanm 0:9b334a45a8ff 911 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 912 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 913
bogdanm 0:9b334a45a8ff 914 /* Reset ENC bit to disable the encoder interface */
bogdanm 0:9b334a45a8ff 915 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 916
bogdanm 0:9b334a45a8ff 917 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 918 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 919
bogdanm 0:9b334a45a8ff 920 /* Return function status */
bogdanm 0:9b334a45a8ff 921 return HAL_OK;
bogdanm 0:9b334a45a8ff 922 }
bogdanm 0:9b334a45a8ff 923
bogdanm 0:9b334a45a8ff 924 /**
bogdanm 0:9b334a45a8ff 925 * @brief Starts the Encoder interface in interrupt mode.
bogdanm 0:9b334a45a8ff 926 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 927 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 928 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 929 * @retval HAL status
bogdanm 0:9b334a45a8ff 930 */
bogdanm 0:9b334a45a8ff 931 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 932 {
bogdanm 0:9b334a45a8ff 933 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 934
bogdanm 0:9b334a45a8ff 935 /* Check the parameters */
bogdanm 0:9b334a45a8ff 936 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 937 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 938 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
bogdanm 0:9b334a45a8ff 939 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
bogdanm 0:9b334a45a8ff 940 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 941
bogdanm 0:9b334a45a8ff 942 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 943 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 944
bogdanm 0:9b334a45a8ff 945 /* Configure edge sensitivity for encoder mode */
bogdanm 0:9b334a45a8ff 946 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 947 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 948
bogdanm 0:9b334a45a8ff 949 /* Clear CKPOL bits */
bogdanm 0:9b334a45a8ff 950 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
bogdanm 0:9b334a45a8ff 951
bogdanm 0:9b334a45a8ff 952 /* Set Input polarity */
bogdanm 0:9b334a45a8ff 953 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
bogdanm 0:9b334a45a8ff 954
bogdanm 0:9b334a45a8ff 955 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 956 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 957
bogdanm 0:9b334a45a8ff 958 /* Set ENC bit to enable the encoder interface */
bogdanm 0:9b334a45a8ff 959 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 960
bogdanm 0:9b334a45a8ff 961 /* Enable "switch to down direction" interrupt */
bogdanm 0:9b334a45a8ff 962 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
bogdanm 0:9b334a45a8ff 963
bogdanm 0:9b334a45a8ff 964 /* Enable "switch to up direction" interrupt */
bogdanm 0:9b334a45a8ff 965 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
bogdanm 0:9b334a45a8ff 966
bogdanm 0:9b334a45a8ff 967 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 968 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 969
bogdanm 0:9b334a45a8ff 970 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 971 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 972
bogdanm 0:9b334a45a8ff 973 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 974 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 975
bogdanm 0:9b334a45a8ff 976 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 977 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 978
bogdanm 0:9b334a45a8ff 979 /* Return function status */
bogdanm 0:9b334a45a8ff 980 return HAL_OK;
bogdanm 0:9b334a45a8ff 981 }
bogdanm 0:9b334a45a8ff 982
bogdanm 0:9b334a45a8ff 983 /**
bogdanm 0:9b334a45a8ff 984 * @brief Stops the Encoder interface in nterrupt mode.
bogdanm 0:9b334a45a8ff 985 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 986 * @retval HAL status
bogdanm 0:9b334a45a8ff 987 */
bogdanm 0:9b334a45a8ff 988 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 989 {
bogdanm 0:9b334a45a8ff 990 /* Check the parameters */
bogdanm 0:9b334a45a8ff 991 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 992
bogdanm 0:9b334a45a8ff 993 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 994 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 995
bogdanm 0:9b334a45a8ff 996 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 997 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 998
bogdanm 0:9b334a45a8ff 999 /* Reset ENC bit to disable the encoder interface */
bogdanm 0:9b334a45a8ff 1000 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 1001
bogdanm 0:9b334a45a8ff 1002 /* Disable "switch to down direction" interrupt */
bogdanm 0:9b334a45a8ff 1003 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
bogdanm 0:9b334a45a8ff 1004
bogdanm 0:9b334a45a8ff 1005 /* Disable "switch to up direction" interrupt */
bogdanm 0:9b334a45a8ff 1006 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
bogdanm 0:9b334a45a8ff 1007
bogdanm 0:9b334a45a8ff 1008 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1009 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1010
bogdanm 0:9b334a45a8ff 1011 /* Return function status */
bogdanm 0:9b334a45a8ff 1012 return HAL_OK;
bogdanm 0:9b334a45a8ff 1013 }
bogdanm 0:9b334a45a8ff 1014
bogdanm 0:9b334a45a8ff 1015 /**
bogdanm 0:9b334a45a8ff 1016 * @brief Starts the Timeout function. The first trigger event will start the
bogdanm 0:9b334a45a8ff 1017 * timer, any successive trigger event will reset the counter and
bogdanm 0:9b334a45a8ff 1018 * the timer restarts.
bogdanm 0:9b334a45a8ff 1019 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1020 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1021 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1022 * @param Timeout : Specifies the TimeOut value to rest the counter.
bogdanm 0:9b334a45a8ff 1023 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1024 * @retval HAL status
bogdanm 0:9b334a45a8ff 1025 */
bogdanm 0:9b334a45a8ff 1026 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1027 {
bogdanm 0:9b334a45a8ff 1028 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1029 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1030 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1031 assert_param(IS_LPTIM_PULSE(Timeout));
bogdanm 0:9b334a45a8ff 1032
bogdanm 0:9b334a45a8ff 1033 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1034 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1035
bogdanm 0:9b334a45a8ff 1036 /* Set TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1037 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1038
bogdanm 0:9b334a45a8ff 1039 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1040 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1041
bogdanm 0:9b334a45a8ff 1042 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1043 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1044
bogdanm 0:9b334a45a8ff 1045 /* Load the Timeout value in the compare register */
bogdanm 0:9b334a45a8ff 1046 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
bogdanm 0:9b334a45a8ff 1047
bogdanm 0:9b334a45a8ff 1048 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1049 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1050
bogdanm 0:9b334a45a8ff 1051 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1052 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1053
bogdanm 0:9b334a45a8ff 1054 /* Return function status */
bogdanm 0:9b334a45a8ff 1055 return HAL_OK;
bogdanm 0:9b334a45a8ff 1056 }
bogdanm 0:9b334a45a8ff 1057
bogdanm 0:9b334a45a8ff 1058 /**
bogdanm 0:9b334a45a8ff 1059 * @brief Stops the Timeout function.
bogdanm 0:9b334a45a8ff 1060 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1061 * @retval HAL status
bogdanm 0:9b334a45a8ff 1062 */
bogdanm 0:9b334a45a8ff 1063 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1064 {
bogdanm 0:9b334a45a8ff 1065 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1066 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1067
bogdanm 0:9b334a45a8ff 1068 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1069 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1070
bogdanm 0:9b334a45a8ff 1071 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1072 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1073
bogdanm 0:9b334a45a8ff 1074 /* Reset TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1075 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1076
bogdanm 0:9b334a45a8ff 1077 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1078 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1079
bogdanm 0:9b334a45a8ff 1080 /* Return function status */
bogdanm 0:9b334a45a8ff 1081 return HAL_OK;
bogdanm 0:9b334a45a8ff 1082 }
bogdanm 0:9b334a45a8ff 1083
bogdanm 0:9b334a45a8ff 1084 /**
bogdanm 0:9b334a45a8ff 1085 * @brief Starts the Timeout function in interrupt mode. The first trigger
bogdanm 0:9b334a45a8ff 1086 * event will start the timer, any successive trigger event will reset
bogdanm 0:9b334a45a8ff 1087 * the counter and the timer restarts.
bogdanm 0:9b334a45a8ff 1088 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1089 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1090 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1091 * @param Timeout : Specifies the TimeOut value to rest the counter.
bogdanm 0:9b334a45a8ff 1092 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1093 * @retval HAL status
bogdanm 0:9b334a45a8ff 1094 */
bogdanm 0:9b334a45a8ff 1095 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1096 {
bogdanm 0:9b334a45a8ff 1097 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1098 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1099 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1100 assert_param(IS_LPTIM_PULSE(Timeout));
bogdanm 0:9b334a45a8ff 1101
bogdanm 0:9b334a45a8ff 1102 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1103 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1104
bogdanm 0:9b334a45a8ff 1105 /* Set TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1106 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1107
bogdanm 0:9b334a45a8ff 1108 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 1109 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 1110
bogdanm 0:9b334a45a8ff 1111 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1112 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1113
bogdanm 0:9b334a45a8ff 1114 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1115 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1116
bogdanm 0:9b334a45a8ff 1117 /* Load the Timeout value in the compare register */
bogdanm 0:9b334a45a8ff 1118 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
bogdanm 0:9b334a45a8ff 1119
bogdanm 0:9b334a45a8ff 1120 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1121 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1122
bogdanm 0:9b334a45a8ff 1123 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1124 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1125
bogdanm 0:9b334a45a8ff 1126 /* Return function status */
bogdanm 0:9b334a45a8ff 1127 return HAL_OK;
bogdanm 0:9b334a45a8ff 1128 }
bogdanm 0:9b334a45a8ff 1129
bogdanm 0:9b334a45a8ff 1130 /**
bogdanm 0:9b334a45a8ff 1131 * @brief Stops the Timeout function in interrupt mode.
bogdanm 0:9b334a45a8ff 1132 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1133 * @retval HAL status
bogdanm 0:9b334a45a8ff 1134 */
bogdanm 0:9b334a45a8ff 1135 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1136 {
bogdanm 0:9b334a45a8ff 1137 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1138 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1139
bogdanm 0:9b334a45a8ff 1140 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1141 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1142
bogdanm 0:9b334a45a8ff 1143 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1144 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1145
bogdanm 0:9b334a45a8ff 1146 /* Reset TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1147 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1148
bogdanm 0:9b334a45a8ff 1149 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 1150 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 1151
bogdanm 0:9b334a45a8ff 1152 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1153 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1154
bogdanm 0:9b334a45a8ff 1155 /* Return function status */
bogdanm 0:9b334a45a8ff 1156 return HAL_OK;
bogdanm 0:9b334a45a8ff 1157 }
bogdanm 0:9b334a45a8ff 1158
bogdanm 0:9b334a45a8ff 1159 /**
bogdanm 0:9b334a45a8ff 1160 * @brief Starts the Counter mode.
bogdanm 0:9b334a45a8ff 1161 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1162 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1163 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1164 * @retval HAL status
bogdanm 0:9b334a45a8ff 1165 */
bogdanm 0:9b334a45a8ff 1166 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 1167 {
bogdanm 0:9b334a45a8ff 1168 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1169 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1170 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1171
bogdanm 0:9b334a45a8ff 1172 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1173 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1174
bogdanm 0:9b334a45a8ff 1175 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
bogdanm 0:9b334a45a8ff 1176 if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm 0:9b334a45a8ff 1177 {
bogdanm 0:9b334a45a8ff 1178 /* Check if clock is prescaled */
bogdanm 0:9b334a45a8ff 1179 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 1180 /* Set clock prescaler to 0 */
bogdanm 0:9b334a45a8ff 1181 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
bogdanm 0:9b334a45a8ff 1182 }
bogdanm 0:9b334a45a8ff 1183
bogdanm 0:9b334a45a8ff 1184 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1185 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1186
bogdanm 0:9b334a45a8ff 1187 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1188 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1189
bogdanm 0:9b334a45a8ff 1190 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1191 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1192
bogdanm 0:9b334a45a8ff 1193 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1194 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1195
bogdanm 0:9b334a45a8ff 1196 /* Return function status */
bogdanm 0:9b334a45a8ff 1197 return HAL_OK;
bogdanm 0:9b334a45a8ff 1198 }
bogdanm 0:9b334a45a8ff 1199
bogdanm 0:9b334a45a8ff 1200 /**
bogdanm 0:9b334a45a8ff 1201 * @brief Stops the Counter mode.
bogdanm 0:9b334a45a8ff 1202 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1203 * @retval HAL status
bogdanm 0:9b334a45a8ff 1204 */
bogdanm 0:9b334a45a8ff 1205 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1206 {
bogdanm 0:9b334a45a8ff 1207 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1208 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1209
bogdanm 0:9b334a45a8ff 1210 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1211 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1212
bogdanm 0:9b334a45a8ff 1213 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1214 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1215
bogdanm 0:9b334a45a8ff 1216 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1217 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1218
bogdanm 0:9b334a45a8ff 1219 /* Return function status */
bogdanm 0:9b334a45a8ff 1220 return HAL_OK;
bogdanm 0:9b334a45a8ff 1221 }
bogdanm 0:9b334a45a8ff 1222
bogdanm 0:9b334a45a8ff 1223 /**
bogdanm 0:9b334a45a8ff 1224 * @brief Starts the Counter mode in interrupt mode.
bogdanm 0:9b334a45a8ff 1225 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1226 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1227 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1228 * @retval HAL status
bogdanm 0:9b334a45a8ff 1229 */
bogdanm 0:9b334a45a8ff 1230 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 1231 {
bogdanm 0:9b334a45a8ff 1232 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1233 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1234 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1235
bogdanm 0:9b334a45a8ff 1236 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1237 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1238
bogdanm 0:9b334a45a8ff 1239 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
bogdanm 0:9b334a45a8ff 1240 if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm 0:9b334a45a8ff 1241 {
bogdanm 0:9b334a45a8ff 1242 /* Check if clock is prescaled */
bogdanm 0:9b334a45a8ff 1243 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 1244 /* Set clock prescaler to 0 */
bogdanm 0:9b334a45a8ff 1245 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
bogdanm 0:9b334a45a8ff 1246 }
bogdanm 0:9b334a45a8ff 1247
bogdanm 0:9b334a45a8ff 1248 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 1249 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 1250
bogdanm 0:9b334a45a8ff 1251 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1252 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 1253
bogdanm 0:9b334a45a8ff 1254 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1255 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1256
bogdanm 0:9b334a45a8ff 1257 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1258 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1259
bogdanm 0:9b334a45a8ff 1260 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1261 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1262
bogdanm 0:9b334a45a8ff 1263 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1264 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1265
bogdanm 0:9b334a45a8ff 1266 /* Return function status */
bogdanm 0:9b334a45a8ff 1267 return HAL_OK;
bogdanm 0:9b334a45a8ff 1268 }
bogdanm 0:9b334a45a8ff 1269
bogdanm 0:9b334a45a8ff 1270 /**
bogdanm 0:9b334a45a8ff 1271 * @brief Stops the Counter mode in interrupt mode.
bogdanm 0:9b334a45a8ff 1272 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1273 * @retval HAL status
bogdanm 0:9b334a45a8ff 1274 */
bogdanm 0:9b334a45a8ff 1275 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1276 {
bogdanm 0:9b334a45a8ff 1277 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1278 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1279
bogdanm 0:9b334a45a8ff 1280 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1281 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1282
bogdanm 0:9b334a45a8ff 1283 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1284 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1285
bogdanm 0:9b334a45a8ff 1286 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 1287 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 1288
bogdanm 0:9b334a45a8ff 1289 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1290 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 1291
bogdanm 0:9b334a45a8ff 1292 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1293 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1294
bogdanm 0:9b334a45a8ff 1295 /* Return function status */
bogdanm 0:9b334a45a8ff 1296 return HAL_OK;
bogdanm 0:9b334a45a8ff 1297 }
bogdanm 0:9b334a45a8ff 1298
bogdanm 0:9b334a45a8ff 1299 /**
bogdanm 0:9b334a45a8ff 1300 * @}
bogdanm 0:9b334a45a8ff 1301 */
bogdanm 0:9b334a45a8ff 1302
bogdanm 0:9b334a45a8ff 1303 /** @addtogroup LPTIM_Exported_Functions_Group3
bogdanm 0:9b334a45a8ff 1304 * @brief Read operation functions.
bogdanm 0:9b334a45a8ff 1305 *
bogdanm 0:9b334a45a8ff 1306 @verbatim
bogdanm 0:9b334a45a8ff 1307 ==============================================================================
bogdanm 0:9b334a45a8ff 1308 ##### LPTIM Read operation functions #####
bogdanm 0:9b334a45a8ff 1309 ==============================================================================
bogdanm 0:9b334a45a8ff 1310 [..] This section provides LPTIM Reading functions.
bogdanm 0:9b334a45a8ff 1311 (+) Read the counter value.
bogdanm 0:9b334a45a8ff 1312 (+) Read the period (Auto-reload) value.
bogdanm 0:9b334a45a8ff 1313 (+) Read the pulse (Compare)value.
bogdanm 0:9b334a45a8ff 1314 @endverbatim
bogdanm 0:9b334a45a8ff 1315 * @{
bogdanm 0:9b334a45a8ff 1316 */
bogdanm 0:9b334a45a8ff 1317
bogdanm 0:9b334a45a8ff 1318 /**
bogdanm 0:9b334a45a8ff 1319 * @brief This function returns the current counter value.
bogdanm 0:9b334a45a8ff 1320 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1321 * @retval Counter value.
bogdanm 0:9b334a45a8ff 1322 */
bogdanm 0:9b334a45a8ff 1323 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1324 {
bogdanm 0:9b334a45a8ff 1325 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1326 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1327
bogdanm 0:9b334a45a8ff 1328 return (hlptim->Instance->CNT);
bogdanm 0:9b334a45a8ff 1329 }
bogdanm 0:9b334a45a8ff 1330
bogdanm 0:9b334a45a8ff 1331 /**
bogdanm 0:9b334a45a8ff 1332 * @brief This function return the current Autoreload (Period) value.
bogdanm 0:9b334a45a8ff 1333 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1334 * @retval Autoreload value.
bogdanm 0:9b334a45a8ff 1335 */
bogdanm 0:9b334a45a8ff 1336 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1337 {
bogdanm 0:9b334a45a8ff 1338 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1339 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1340
bogdanm 0:9b334a45a8ff 1341 return (hlptim->Instance->ARR);
bogdanm 0:9b334a45a8ff 1342 }
bogdanm 0:9b334a45a8ff 1343
bogdanm 0:9b334a45a8ff 1344 /**
bogdanm 0:9b334a45a8ff 1345 * @brief This function return the current Compare (Pulse) value.
bogdanm 0:9b334a45a8ff 1346 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1347 * @retval Compare value.
bogdanm 0:9b334a45a8ff 1348 */
bogdanm 0:9b334a45a8ff 1349 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1350 {
bogdanm 0:9b334a45a8ff 1351 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1352 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1353
bogdanm 0:9b334a45a8ff 1354 return (hlptim->Instance->CMP);
bogdanm 0:9b334a45a8ff 1355 }
bogdanm 0:9b334a45a8ff 1356
bogdanm 0:9b334a45a8ff 1357 /**
bogdanm 0:9b334a45a8ff 1358 * @}
bogdanm 0:9b334a45a8ff 1359 */
bogdanm 0:9b334a45a8ff 1360
bogdanm 0:9b334a45a8ff 1361
bogdanm 0:9b334a45a8ff 1362
bogdanm 0:9b334a45a8ff 1363 /** @addtogroup LPTIM_Exported_Functions_Group4
bogdanm 0:9b334a45a8ff 1364 * @brief LPTIM IRQ handler.
bogdanm 0:9b334a45a8ff 1365 *
bogdanm 0:9b334a45a8ff 1366 @verbatim
bogdanm 0:9b334a45a8ff 1367 ==============================================================================
bogdanm 0:9b334a45a8ff 1368 ##### LPTIM IRQ handler #####
bogdanm 0:9b334a45a8ff 1369 ==============================================================================
bogdanm 0:9b334a45a8ff 1370 [..] This section provides LPTIM IRQ handler function.
bogdanm 0:9b334a45a8ff 1371
bogdanm 0:9b334a45a8ff 1372 @endverbatim
bogdanm 0:9b334a45a8ff 1373 * @{
bogdanm 0:9b334a45a8ff 1374 */
bogdanm 0:9b334a45a8ff 1375
bogdanm 0:9b334a45a8ff 1376 /**
bogdanm 0:9b334a45a8ff 1377 * @brief This function handles LPTIM interrupt request.
bogdanm 0:9b334a45a8ff 1378 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1379 * @retval None
bogdanm 0:9b334a45a8ff 1380 */
bogdanm 0:9b334a45a8ff 1381 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1382 {
bogdanm 0:9b334a45a8ff 1383 /* Compare match interrupt */
bogdanm 0:9b334a45a8ff 1384 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
bogdanm 0:9b334a45a8ff 1385 {
bogdanm 0:9b334a45a8ff 1386 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) !=RESET)
bogdanm 0:9b334a45a8ff 1387 {
bogdanm 0:9b334a45a8ff 1388 /* Clear Compare match flag */
bogdanm 0:9b334a45a8ff 1389 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
bogdanm 0:9b334a45a8ff 1390
bogdanm 0:9b334a45a8ff 1391 /* Compare match Callback */
bogdanm 0:9b334a45a8ff 1392 HAL_LPTIM_CompareMatchCallback(hlptim);
bogdanm 0:9b334a45a8ff 1393 }
bogdanm 0:9b334a45a8ff 1394 }
bogdanm 0:9b334a45a8ff 1395
bogdanm 0:9b334a45a8ff 1396 /* Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1397 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
bogdanm 0:9b334a45a8ff 1398 {
bogdanm 0:9b334a45a8ff 1399 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) !=RESET)
bogdanm 0:9b334a45a8ff 1400 {
bogdanm 0:9b334a45a8ff 1401 /* Clear Autoreload match flag */
bogdanm 0:9b334a45a8ff 1402 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
bogdanm 0:9b334a45a8ff 1403
bogdanm 0:9b334a45a8ff 1404 /* Autoreload match Callback */
bogdanm 0:9b334a45a8ff 1405 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
bogdanm 0:9b334a45a8ff 1406 }
bogdanm 0:9b334a45a8ff 1407 }
bogdanm 0:9b334a45a8ff 1408
bogdanm 0:9b334a45a8ff 1409 /* Trigger detected interrupt */
bogdanm 0:9b334a45a8ff 1410 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
bogdanm 0:9b334a45a8ff 1411 {
bogdanm 0:9b334a45a8ff 1412 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) !=RESET)
bogdanm 0:9b334a45a8ff 1413 {
bogdanm 0:9b334a45a8ff 1414 /* Clear Trigger detected flag */
bogdanm 0:9b334a45a8ff 1415 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
bogdanm 0:9b334a45a8ff 1416
bogdanm 0:9b334a45a8ff 1417 /* Trigger detected callback */
bogdanm 0:9b334a45a8ff 1418 HAL_LPTIM_TriggerCallback(hlptim);
bogdanm 0:9b334a45a8ff 1419 }
bogdanm 0:9b334a45a8ff 1420 }
bogdanm 0:9b334a45a8ff 1421
bogdanm 0:9b334a45a8ff 1422 /* Compare write interrupt */
bogdanm 0:9b334a45a8ff 1423 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
bogdanm 0:9b334a45a8ff 1424 {
bogdanm 0:9b334a45a8ff 1425 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) !=RESET)
bogdanm 0:9b334a45a8ff 1426 {
bogdanm 0:9b334a45a8ff 1427 /* Clear Compare write flag */
bogdanm 0:9b334a45a8ff 1428 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
bogdanm 0:9b334a45a8ff 1429
bogdanm 0:9b334a45a8ff 1430 /* Compare write Callback */
bogdanm 0:9b334a45a8ff 1431 HAL_LPTIM_CompareWriteCallback(hlptim);
bogdanm 0:9b334a45a8ff 1432 }
bogdanm 0:9b334a45a8ff 1433 }
bogdanm 0:9b334a45a8ff 1434
bogdanm 0:9b334a45a8ff 1435 /* Autoreload write interrupt */
bogdanm 0:9b334a45a8ff 1436 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
bogdanm 0:9b334a45a8ff 1437 {
bogdanm 0:9b334a45a8ff 1438 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) !=RESET)
bogdanm 0:9b334a45a8ff 1439 {
bogdanm 0:9b334a45a8ff 1440 /* Clear Autoreload write flag */
bogdanm 0:9b334a45a8ff 1441 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
bogdanm 0:9b334a45a8ff 1442
bogdanm 0:9b334a45a8ff 1443 /* Autoreload write Callback */
bogdanm 0:9b334a45a8ff 1444 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
bogdanm 0:9b334a45a8ff 1445 }
bogdanm 0:9b334a45a8ff 1446 }
bogdanm 0:9b334a45a8ff 1447
bogdanm 0:9b334a45a8ff 1448 /* Direction counter changed from Down to Up interrupt */
bogdanm 0:9b334a45a8ff 1449 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
bogdanm 0:9b334a45a8ff 1450 {
bogdanm 0:9b334a45a8ff 1451 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) !=RESET)
bogdanm 0:9b334a45a8ff 1452 {
bogdanm 0:9b334a45a8ff 1453 /* Clear Direction counter changed from Down to Up flag */
bogdanm 0:9b334a45a8ff 1454 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
bogdanm 0:9b334a45a8ff 1455
bogdanm 0:9b334a45a8ff 1456 /* Direction counter changed from Down to Up Callback */
bogdanm 0:9b334a45a8ff 1457 HAL_LPTIM_DirectionUpCallback(hlptim);
bogdanm 0:9b334a45a8ff 1458 }
bogdanm 0:9b334a45a8ff 1459 }
bogdanm 0:9b334a45a8ff 1460
bogdanm 0:9b334a45a8ff 1461 /* Direction counter changed from Up to Down interrupt */
bogdanm 0:9b334a45a8ff 1462 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
bogdanm 0:9b334a45a8ff 1463 {
bogdanm 0:9b334a45a8ff 1464 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) !=RESET)
bogdanm 0:9b334a45a8ff 1465 {
bogdanm 0:9b334a45a8ff 1466 /* Clear Direction counter changed from Up to Down flag */
bogdanm 0:9b334a45a8ff 1467 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
bogdanm 0:9b334a45a8ff 1468
bogdanm 0:9b334a45a8ff 1469 /* Direction counter changed from Up to Down Callback */
bogdanm 0:9b334a45a8ff 1470 HAL_LPTIM_DirectionDownCallback(hlptim);
bogdanm 0:9b334a45a8ff 1471 }
bogdanm 0:9b334a45a8ff 1472 }
bogdanm 0:9b334a45a8ff 1473 }
bogdanm 0:9b334a45a8ff 1474
bogdanm 0:9b334a45a8ff 1475 /**
bogdanm 0:9b334a45a8ff 1476 * @brief Compare match callback in non blocking mode
bogdanm 0:9b334a45a8ff 1477 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1478 * @retval None
bogdanm 0:9b334a45a8ff 1479 */
bogdanm 0:9b334a45a8ff 1480 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1481 {
mbed_official 113:b3775bf36a83 1482 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 1483 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 1484
bogdanm 0:9b334a45a8ff 1485 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1486 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1487 */
bogdanm 0:9b334a45a8ff 1488 }
bogdanm 0:9b334a45a8ff 1489
bogdanm 0:9b334a45a8ff 1490 /**
bogdanm 0:9b334a45a8ff 1491 * @brief Autoreload match callback in non blocking mode
bogdanm 0:9b334a45a8ff 1492 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1493 * @retval None
bogdanm 0:9b334a45a8ff 1494 */
bogdanm 0:9b334a45a8ff 1495 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1496 {
mbed_official 113:b3775bf36a83 1497 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 1498 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 1499
bogdanm 0:9b334a45a8ff 1500 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1501 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1502 */
bogdanm 0:9b334a45a8ff 1503 }
bogdanm 0:9b334a45a8ff 1504
bogdanm 0:9b334a45a8ff 1505 /**
bogdanm 0:9b334a45a8ff 1506 * @brief Trigger detected callback in non blocking mode
bogdanm 0:9b334a45a8ff 1507 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1508 * @retval None
bogdanm 0:9b334a45a8ff 1509 */
bogdanm 0:9b334a45a8ff 1510 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1511 {
mbed_official 113:b3775bf36a83 1512 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 1513 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 1514
bogdanm 0:9b334a45a8ff 1515 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1516 the HAL_LPTIM_TriggerCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1517 */
bogdanm 0:9b334a45a8ff 1518 }
bogdanm 0:9b334a45a8ff 1519
bogdanm 0:9b334a45a8ff 1520 /**
bogdanm 0:9b334a45a8ff 1521 * @brief Compare write callback in non blocking mode
bogdanm 0:9b334a45a8ff 1522 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1523 * @retval None
bogdanm 0:9b334a45a8ff 1524 */
bogdanm 0:9b334a45a8ff 1525 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1526 {
mbed_official 113:b3775bf36a83 1527 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 1528 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 1529
bogdanm 0:9b334a45a8ff 1530 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1531 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1532 */
bogdanm 0:9b334a45a8ff 1533 }
bogdanm 0:9b334a45a8ff 1534
bogdanm 0:9b334a45a8ff 1535 /**
bogdanm 0:9b334a45a8ff 1536 * @brief Autoreload write callback in non blocking mode
bogdanm 0:9b334a45a8ff 1537 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1538 * @retval None
bogdanm 0:9b334a45a8ff 1539 */
bogdanm 0:9b334a45a8ff 1540 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1541 {
mbed_official 113:b3775bf36a83 1542 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 1543 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 1544
bogdanm 0:9b334a45a8ff 1545 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1546 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1547 */
bogdanm 0:9b334a45a8ff 1548 }
bogdanm 0:9b334a45a8ff 1549
bogdanm 0:9b334a45a8ff 1550 /**
bogdanm 0:9b334a45a8ff 1551 * @brief Direction counter changed from Down to Up callback in non blocking mode
bogdanm 0:9b334a45a8ff 1552 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1553 * @retval None
bogdanm 0:9b334a45a8ff 1554 */
bogdanm 0:9b334a45a8ff 1555 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1556 {
mbed_official 113:b3775bf36a83 1557 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 1558 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 1559
bogdanm 0:9b334a45a8ff 1560 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1561 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1562 */
bogdanm 0:9b334a45a8ff 1563 }
bogdanm 0:9b334a45a8ff 1564
bogdanm 0:9b334a45a8ff 1565 /**
bogdanm 0:9b334a45a8ff 1566 * @brief Direction counter changed from Up to Down callback in non blocking mode
bogdanm 0:9b334a45a8ff 1567 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1568 * @retval None
bogdanm 0:9b334a45a8ff 1569 */
bogdanm 0:9b334a45a8ff 1570 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1571 {
mbed_official 113:b3775bf36a83 1572 /* Prevent unused argument(s) compilation warning */
mbed_official 113:b3775bf36a83 1573 UNUSED(hlptim);
mbed_official 113:b3775bf36a83 1574
bogdanm 0:9b334a45a8ff 1575 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1576 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1577 */
bogdanm 0:9b334a45a8ff 1578 }
bogdanm 0:9b334a45a8ff 1579
bogdanm 0:9b334a45a8ff 1580 /**
bogdanm 0:9b334a45a8ff 1581 * @}
bogdanm 0:9b334a45a8ff 1582 */
bogdanm 0:9b334a45a8ff 1583
bogdanm 0:9b334a45a8ff 1584 /** @addtogroup LPTIM_Exported_Functions_Group5
bogdanm 0:9b334a45a8ff 1585 * @brief Peripheral State functions.
bogdanm 0:9b334a45a8ff 1586 *
bogdanm 0:9b334a45a8ff 1587 @verbatim
bogdanm 0:9b334a45a8ff 1588 ==============================================================================
bogdanm 0:9b334a45a8ff 1589 ##### Peripheral State functions #####
bogdanm 0:9b334a45a8ff 1590 ==============================================================================
bogdanm 0:9b334a45a8ff 1591 [..]
bogdanm 0:9b334a45a8ff 1592 This subsection permits to get in run-time the status of the peripheral.
bogdanm 0:9b334a45a8ff 1593
bogdanm 0:9b334a45a8ff 1594 @endverbatim
bogdanm 0:9b334a45a8ff 1595 * @{
bogdanm 0:9b334a45a8ff 1596 */
bogdanm 0:9b334a45a8ff 1597
bogdanm 0:9b334a45a8ff 1598 /**
bogdanm 0:9b334a45a8ff 1599 * @brief Returns the LPTIM state.
bogdanm 0:9b334a45a8ff 1600 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1601 * @retval HAL state
bogdanm 0:9b334a45a8ff 1602 */
bogdanm 0:9b334a45a8ff 1603 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1604 {
bogdanm 0:9b334a45a8ff 1605 return hlptim->State;
bogdanm 0:9b334a45a8ff 1606 }
bogdanm 0:9b334a45a8ff 1607
bogdanm 0:9b334a45a8ff 1608 /**
bogdanm 0:9b334a45a8ff 1609 * @}
bogdanm 0:9b334a45a8ff 1610 */
bogdanm 0:9b334a45a8ff 1611
bogdanm 0:9b334a45a8ff 1612 /**
bogdanm 0:9b334a45a8ff 1613 * @}
bogdanm 0:9b334a45a8ff 1614 */
bogdanm 0:9b334a45a8ff 1615
bogdanm 0:9b334a45a8ff 1616 /**
bogdanm 0:9b334a45a8ff 1617 * @}
bogdanm 0:9b334a45a8ff 1618 */
bogdanm 0:9b334a45a8ff 1619
bogdanm 0:9b334a45a8ff 1620 /**
bogdanm 0:9b334a45a8ff 1621 * @}
bogdanm 0:9b334a45a8ff 1622 */
bogdanm 0:9b334a45a8ff 1623
mbed_official 113:b3775bf36a83 1624 #endif /* HAL_LPTIM_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1625 /**
bogdanm 0:9b334a45a8ff 1626 * @}
bogdanm 0:9b334a45a8ff 1627 */
bogdanm 0:9b334a45a8ff 1628
bogdanm 0:9b334a45a8ff 1629 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 1630