en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lptim.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
113:b3775bf36a83
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32l0xx_hal_lptim.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.2.0
bogdanm 0:9b334a45a8ff 6 * @date 06-February-2015
bogdanm 0:9b334a45a8ff 7 * @brief LPTIM HAL module driver.
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 10 * functionalities of the Low Power Timer (LPTIM) peripheral:
bogdanm 0:9b334a45a8ff 11 * + Initialization and de-initialization functions.
bogdanm 0:9b334a45a8ff 12 * + Start/Stop operation functions in polling mode.
bogdanm 0:9b334a45a8ff 13 * + Start/Stop operation functions in interrupt mode.
bogdanm 0:9b334a45a8ff 14 * + Reading operation functions.
bogdanm 0:9b334a45a8ff 15 * + Peripheral State functions.
bogdanm 0:9b334a45a8ff 16 *
bogdanm 0:9b334a45a8ff 17 @verbatim
bogdanm 0:9b334a45a8ff 18 ==============================================================================
bogdanm 0:9b334a45a8ff 19 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 20 ==============================================================================
bogdanm 0:9b334a45a8ff 21 [..]
bogdanm 0:9b334a45a8ff 22 The LPTIM HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 (#)Initialize the LPTIM low level resources by implementing the
bogdanm 0:9b334a45a8ff 25 HAL_LPTIM_MspInit():
bogdanm 0:9b334a45a8ff 26 (##) Enable the LPTIM interface clock using __HAL_RCC_LPTIM1_CLK_ENABLE().
bogdanm 0:9b334a45a8ff 27 (##) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
bogdanm 0:9b334a45a8ff 28 (+) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
bogdanm 0:9b334a45a8ff 29 (+) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
bogdanm 0:9b334a45a8ff 30 (+) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
bogdanm 0:9b334a45a8ff 31
bogdanm 0:9b334a45a8ff 32 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
bogdanm 0:9b334a45a8ff 33 configures mainly:
bogdanm 0:9b334a45a8ff 34 (##) The instance: Only LPTIM1 is present in STM32L053xx.
bogdanm 0:9b334a45a8ff 35 (##) Clock: the counter clock.
bogdanm 0:9b334a45a8ff 36 - Source : it can be either the ULPTIM input (IN1) or one of
bogdanm 0:9b334a45a8ff 37 the internal clock; (APB, LSE, LSI or MSI).
bogdanm 0:9b334a45a8ff 38 - Prescaler: select the clock divider.
bogdanm 0:9b334a45a8ff 39 (##) UltraLowPowerClock : To be used only if the ULPTIM is selected
bogdanm 0:9b334a45a8ff 40 as counter clock source.
bogdanm 0:9b334a45a8ff 41 - Polarity: polarity of the active edge for the counter unit
bogdanm 0:9b334a45a8ff 42 if the ULPTIM input is selected.
bogdanm 0:9b334a45a8ff 43 - SampleTime: clock sampling time to configure the clock glitch
bogdanm 0:9b334a45a8ff 44 filter.
bogdanm 0:9b334a45a8ff 45 (##) Trigger: How the counter start.
bogdanm 0:9b334a45a8ff 46 - Source: trigger can be software or one of the hardware triggers.
bogdanm 0:9b334a45a8ff 47 - ActiveEdge : only for hardware trigger.
bogdanm 0:9b334a45a8ff 48 - SampleTime : trigger sampling time to configure the trigger
bogdanm 0:9b334a45a8ff 49 glitch filter.
bogdanm 0:9b334a45a8ff 50 (##) OutputPolarity : 2 opposite polarities are possibles.
bogdanm 0:9b334a45a8ff 51 (##) UpdateMode: specifies whether the update of the autoreload and
bogdanm 0:9b334a45a8ff 52 the compare values is done immediately or after the end of current
bogdanm 0:9b334a45a8ff 53 period.
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 (#)Six modes are available:
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 (##) PWM Mode: To generate a PWM signal with specified period and pulse,
bogdanm 0:9b334a45a8ff 58 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
bogdanm 0:9b334a45a8ff 59 mode.
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 (##) One Pulse Mode: To generate pulse with specified width in response
bogdanm 0:9b334a45a8ff 62 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
bogdanm 0:9b334a45a8ff 63 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 (##) Set once Mode: In this mode, the output changes the level (from
bogdanm 0:9b334a45a8ff 66 low level to high level if the output polarity is configured high, else
bogdanm 0:9b334a45a8ff 67 the opposite) when a compare match occurs. To start this mode, call
bogdanm 0:9b334a45a8ff 68 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
bogdanm 0:9b334a45a8ff 69 interruption mode.
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 (##) Encoder Mode: To use the encoder interface call
bogdanm 0:9b334a45a8ff 72 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
bogdanm 0:9b334a45a8ff 73 interruption mode.
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 (##) Time out Mode: an active edge on one selected trigger input rests
bogdanm 0:9b334a45a8ff 76 the counter. The first trigger event will start the timer, any
bogdanm 0:9b334a45a8ff 77 successive trigger event will reset the counter and the timer will
bogdanm 0:9b334a45a8ff 78 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
bogdanm 0:9b334a45a8ff 79 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 (##) Counter Mode: counter can be used to count external events on
bogdanm 0:9b334a45a8ff 82 the LPTIM Input1 or it can be used to count internal clock cycles.
bogdanm 0:9b334a45a8ff 83 To start this mode, call HAL_LPTIM_Counter_Start() or
bogdanm 0:9b334a45a8ff 84 HAL_LPTIM_Counter_Start_IT() for interruption mode.
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 (#) User can stop any process by calling the corresponding API:
bogdanm 0:9b334a45a8ff 88 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
bogdanm 0:9b334a45a8ff 89 already started in interruption mode.
bogdanm 0:9b334a45a8ff 90
bogdanm 0:9b334a45a8ff 91 (#)Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 @endverbatim
bogdanm 0:9b334a45a8ff 94 ******************************************************************************
bogdanm 0:9b334a45a8ff 95 * @attention
bogdanm 0:9b334a45a8ff 96 *
bogdanm 0:9b334a45a8ff 97 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 98 *
bogdanm 0:9b334a45a8ff 99 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 100 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 101 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 102 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 103 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 104 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 105 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 106 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 107 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 108 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 109 *
bogdanm 0:9b334a45a8ff 110 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 111 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 112 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 113 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 114 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 115 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 116 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 117 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 118 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 119 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 120 *
bogdanm 0:9b334a45a8ff 121 ******************************************************************************
bogdanm 0:9b334a45a8ff 122 */
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 125 #include "stm32l0xx_hal.h"
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /** @addtogroup STM32L0xx_HAL_Driver
bogdanm 0:9b334a45a8ff 128 * @{
bogdanm 0:9b334a45a8ff 129 */
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 /** @addtogroup LPTIM
bogdanm 0:9b334a45a8ff 132 * @brief LPTIM HAL module driver.
bogdanm 0:9b334a45a8ff 133 * @{
bogdanm 0:9b334a45a8ff 134 */
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 #ifdef HAL_LPTIM_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 137
bogdanm 0:9b334a45a8ff 138 /** @addtogroup LPTIM_Exported_Functions
bogdanm 0:9b334a45a8ff 139 * @{
bogdanm 0:9b334a45a8ff 140 */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 /** @addtogroup LPTIM_Exported_Functions_Group1
bogdanm 0:9b334a45a8ff 143 * @brief Initialization and Configuration functions.
bogdanm 0:9b334a45a8ff 144 *
bogdanm 0:9b334a45a8ff 145 @verbatim
bogdanm 0:9b334a45a8ff 146 ==============================================================================
bogdanm 0:9b334a45a8ff 147 ##### Initialization and de-initialization functions #####
bogdanm 0:9b334a45a8ff 148 ==============================================================================
bogdanm 0:9b334a45a8ff 149 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 150 (+) Initialize the LPTIM according to the specified parameters in the
bogdanm 0:9b334a45a8ff 151 LPTIM_InitTypeDef and creates the associated handle.
bogdanm 0:9b334a45a8ff 152 (+) DeInitialize the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 153 (+) Initialize the LPTIM MSP.
bogdanm 0:9b334a45a8ff 154 (+) DeInitialize LPTIM MSP.
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 @endverbatim
bogdanm 0:9b334a45a8ff 157 * @{
bogdanm 0:9b334a45a8ff 158 */
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 /**
bogdanm 0:9b334a45a8ff 161 * @brief Initializes the LPTIM according to the specified parameters in the
bogdanm 0:9b334a45a8ff 162 * LPTIM_InitTypeDef and creates the associated handle.
bogdanm 0:9b334a45a8ff 163 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 164 * @retval HAL status
bogdanm 0:9b334a45a8ff 165 */
bogdanm 0:9b334a45a8ff 166 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 167 {
bogdanm 0:9b334a45a8ff 168 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 /* Check the LPTIM handle allocation */
bogdanm 0:9b334a45a8ff 171 if(hlptim == NULL)
bogdanm 0:9b334a45a8ff 172 {
bogdanm 0:9b334a45a8ff 173 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 174 }
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176 /* Check the parameters */
bogdanm 0:9b334a45a8ff 177 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
bogdanm 0:9b334a45a8ff 180 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 181 if((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 182 {
bogdanm 0:9b334a45a8ff 183 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 184 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
bogdanm 0:9b334a45a8ff 185 }
bogdanm 0:9b334a45a8ff 186 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
bogdanm 0:9b334a45a8ff 187 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 188 {
bogdanm 0:9b334a45a8ff 189 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
bogdanm 0:9b334a45a8ff 190 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
bogdanm 0:9b334a45a8ff 191 }
bogdanm 0:9b334a45a8ff 192 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
bogdanm 0:9b334a45a8ff 193 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
bogdanm 0:9b334a45a8ff 194 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 if(hlptim->State == HAL_LPTIM_STATE_RESET)
bogdanm 0:9b334a45a8ff 197 {
bogdanm 0:9b334a45a8ff 198 /* Init the low level hardware */
bogdanm 0:9b334a45a8ff 199 HAL_LPTIM_MspInit(hlptim);
bogdanm 0:9b334a45a8ff 200 }
bogdanm 0:9b334a45a8ff 201
bogdanm 0:9b334a45a8ff 202 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 203 hlptim->State = HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 204
bogdanm 0:9b334a45a8ff 205 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 206 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 209 {
bogdanm 0:9b334a45a8ff 210 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
bogdanm 0:9b334a45a8ff 211 }
bogdanm 0:9b334a45a8ff 212 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 213 {
bogdanm 0:9b334a45a8ff 214 tmpcfgr &= (uint32_t)(~ (LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
bogdanm 0:9b334a45a8ff 215 }
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
bogdanm 0:9b334a45a8ff 218 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
bogdanm 0:9b334a45a8ff 219 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE ));
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 /* Set initialization parameters */
bogdanm 0:9b334a45a8ff 222 tmpcfgr |= (hlptim->Init.Clock.Source |
bogdanm 0:9b334a45a8ff 223 hlptim->Init.Clock.Prescaler |
bogdanm 0:9b334a45a8ff 224 hlptim->Init.OutputPolarity |
bogdanm 0:9b334a45a8ff 225 hlptim->Init.UpdateMode |
bogdanm 0:9b334a45a8ff 226 hlptim->Init.CounterSource);
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
bogdanm 0:9b334a45a8ff 229 {
bogdanm 0:9b334a45a8ff 230 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
bogdanm 0:9b334a45a8ff 231 hlptim->Init.UltraLowPowerClock.SampleTime);
bogdanm 0:9b334a45a8ff 232 }
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 235 {
bogdanm 0:9b334a45a8ff 236 /* Enable External trigger and set the trigger source */
bogdanm 0:9b334a45a8ff 237 tmpcfgr |= (hlptim->Init.Trigger.Source |
bogdanm 0:9b334a45a8ff 238 hlptim->Init.Trigger.ActiveEdge |
bogdanm 0:9b334a45a8ff 239 hlptim->Init.Trigger.SampleTime);
bogdanm 0:9b334a45a8ff 240 }
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 243 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 244
bogdanm 0:9b334a45a8ff 245 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 246 hlptim->State = HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 247
bogdanm 0:9b334a45a8ff 248 /* Return function status */
bogdanm 0:9b334a45a8ff 249 return HAL_OK;
bogdanm 0:9b334a45a8ff 250 }
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 /**
bogdanm 0:9b334a45a8ff 253 * @brief DeInitializes the LPTIM peripheral.
bogdanm 0:9b334a45a8ff 254 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 255 * @retval HAL status
bogdanm 0:9b334a45a8ff 256 */
bogdanm 0:9b334a45a8ff 257 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 258 {
bogdanm 0:9b334a45a8ff 259 /* Check the LPTIM handle allocation */
bogdanm 0:9b334a45a8ff 260 if(hlptim == NULL)
bogdanm 0:9b334a45a8ff 261 {
bogdanm 0:9b334a45a8ff 262 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 263 }
bogdanm 0:9b334a45a8ff 264
bogdanm 0:9b334a45a8ff 265 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 266 hlptim->State = HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 /* Disable the LPTIM Peripheral Clock */
bogdanm 0:9b334a45a8ff 269 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /* DeInit the low level hardware: CLOCK, NVIC.*/
bogdanm 0:9b334a45a8ff 272 HAL_LPTIM_MspDeInit(hlptim);
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 /* Change the LPTIM state */
bogdanm 0:9b334a45a8ff 275 hlptim->State = HAL_LPTIM_STATE_RESET;
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 /* Release Lock */
bogdanm 0:9b334a45a8ff 278 __HAL_UNLOCK(hlptim);
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 /* Return function status */
bogdanm 0:9b334a45a8ff 281 return HAL_OK;
bogdanm 0:9b334a45a8ff 282 }
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 /**
bogdanm 0:9b334a45a8ff 285 * @brief Initializes the LPTIM MSP.
bogdanm 0:9b334a45a8ff 286 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 287 * @retval None
bogdanm 0:9b334a45a8ff 288 */
bogdanm 0:9b334a45a8ff 289 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 290 {
bogdanm 0:9b334a45a8ff 291 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 292 the HAL_LPTIM_MspInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 293 */
bogdanm 0:9b334a45a8ff 294 }
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 /**
bogdanm 0:9b334a45a8ff 297 * @brief DeInitializes LPTIM MSP.
bogdanm 0:9b334a45a8ff 298 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 299 * @retval None
bogdanm 0:9b334a45a8ff 300 */
bogdanm 0:9b334a45a8ff 301 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 302 {
bogdanm 0:9b334a45a8ff 303 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 304 the HAL_LPTIM_MspDeInit could be implemented in the user file
bogdanm 0:9b334a45a8ff 305 */
bogdanm 0:9b334a45a8ff 306 }
bogdanm 0:9b334a45a8ff 307
bogdanm 0:9b334a45a8ff 308 /**
bogdanm 0:9b334a45a8ff 309 * @}
bogdanm 0:9b334a45a8ff 310 */
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 /** @addtogroup LPTIM_Exported_Functions_Group2
bogdanm 0:9b334a45a8ff 313 * @brief Start-Stop operation functions.
bogdanm 0:9b334a45a8ff 314 *
bogdanm 0:9b334a45a8ff 315 @verbatim
bogdanm 0:9b334a45a8ff 316 ==============================================================================
bogdanm 0:9b334a45a8ff 317 ##### LPTIM Start Stop operation functions #####
bogdanm 0:9b334a45a8ff 318 ==============================================================================
bogdanm 0:9b334a45a8ff 319 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 320 (+) Start the PWM mode.
bogdanm 0:9b334a45a8ff 321 (+) Stop the PWM mode.
bogdanm 0:9b334a45a8ff 322 (+) Start the One pulse mode.
bogdanm 0:9b334a45a8ff 323 (+) Stop the One pulse mode.
bogdanm 0:9b334a45a8ff 324 (+) Start the Set once mode.
bogdanm 0:9b334a45a8ff 325 (+) Stop the Set once mode.
bogdanm 0:9b334a45a8ff 326 (+) Start the Encoder mode.
bogdanm 0:9b334a45a8ff 327 (+) Stop the Encoder mode.
bogdanm 0:9b334a45a8ff 328 (+) Start the Timeout mode.
bogdanm 0:9b334a45a8ff 329 (+) Stop the Timeout mode.
bogdanm 0:9b334a45a8ff 330 (+) Start the Counter mode.
bogdanm 0:9b334a45a8ff 331 (+) Stop the Counter mode.
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333
bogdanm 0:9b334a45a8ff 334 @endverbatim
bogdanm 0:9b334a45a8ff 335 * @{
bogdanm 0:9b334a45a8ff 336 */
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 /**
bogdanm 0:9b334a45a8ff 339 * @brief Starts the LPTIM PWM generation.
bogdanm 0:9b334a45a8ff 340 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 341 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 342 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 343 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 344 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 345 * @retval HAL status
bogdanm 0:9b334a45a8ff 346 */
bogdanm 0:9b334a45a8ff 347 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 348 {
bogdanm 0:9b334a45a8ff 349 /* Check the parameters */
bogdanm 0:9b334a45a8ff 350 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 351 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 352 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 353
bogdanm 0:9b334a45a8ff 354 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 355 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /* Reset WAVE bit to set PWM mode */
bogdanm 0:9b334a45a8ff 358 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 359
bogdanm 0:9b334a45a8ff 360 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 361 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 364 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 367 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 370 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 373 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /* Return function status */
bogdanm 0:9b334a45a8ff 376 return HAL_OK;
bogdanm 0:9b334a45a8ff 377 }
bogdanm 0:9b334a45a8ff 378
bogdanm 0:9b334a45a8ff 379 /**
bogdanm 0:9b334a45a8ff 380 * @brief Stops the LPTIM PWM generation.
bogdanm 0:9b334a45a8ff 381 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 382 * @retval HAL status
bogdanm 0:9b334a45a8ff 383 */
bogdanm 0:9b334a45a8ff 384 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 385 {
bogdanm 0:9b334a45a8ff 386 /* Check the parameters */
bogdanm 0:9b334a45a8ff 387 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 390 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 393 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 396 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 /* Return function status */
bogdanm 0:9b334a45a8ff 399 return HAL_OK;
bogdanm 0:9b334a45a8ff 400 }
bogdanm 0:9b334a45a8ff 401
bogdanm 0:9b334a45a8ff 402 /**
bogdanm 0:9b334a45a8ff 403 * @brief Starts the LPTIM PWM generation in interrupt mode.
bogdanm 0:9b334a45a8ff 404 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 405 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 406 * This parameter must be a value between 0x0000 and 0xFFFF
bogdanm 0:9b334a45a8ff 407 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 408 * This parameter must be a value between 0x0000 and 0xFFFF
bogdanm 0:9b334a45a8ff 409 * @retval HAL status
bogdanm 0:9b334a45a8ff 410 */
bogdanm 0:9b334a45a8ff 411 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 412 {
bogdanm 0:9b334a45a8ff 413 /* Check the parameters */
bogdanm 0:9b334a45a8ff 414 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 415 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 416 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 417
bogdanm 0:9b334a45a8ff 418 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 419 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 /* Reset WAVE bit to set PWM mode */
bogdanm 0:9b334a45a8ff 422 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 425 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 426
bogdanm 0:9b334a45a8ff 427 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 428 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 429
bogdanm 0:9b334a45a8ff 430 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 431 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 432
bogdanm 0:9b334a45a8ff 433 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 434 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 437 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 438 {
bogdanm 0:9b334a45a8ff 439 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 440 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 441 }
bogdanm 0:9b334a45a8ff 442
bogdanm 0:9b334a45a8ff 443 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 444 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 447 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 448
bogdanm 0:9b334a45a8ff 449 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 450 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 453 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 456 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 457
bogdanm 0:9b334a45a8ff 458 /* Return function status */
bogdanm 0:9b334a45a8ff 459 return HAL_OK;
bogdanm 0:9b334a45a8ff 460 }
bogdanm 0:9b334a45a8ff 461
bogdanm 0:9b334a45a8ff 462 /**
bogdanm 0:9b334a45a8ff 463 * @brief Stops the LPTIM PWM generation in interrupt mode.
bogdanm 0:9b334a45a8ff 464 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 465 * @retval HAL status
bogdanm 0:9b334a45a8ff 466 */
bogdanm 0:9b334a45a8ff 467 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 468 {
bogdanm 0:9b334a45a8ff 469 /* Check the parameters */
bogdanm 0:9b334a45a8ff 470 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 471
bogdanm 0:9b334a45a8ff 472 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 473 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 474
bogdanm 0:9b334a45a8ff 475 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 476 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 477
bogdanm 0:9b334a45a8ff 478 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 479 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 480
bogdanm 0:9b334a45a8ff 481 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 482 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 483
bogdanm 0:9b334a45a8ff 484 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 485 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 488 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 489
bogdanm 0:9b334a45a8ff 490 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 491 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 492 {
bogdanm 0:9b334a45a8ff 493 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 494 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 495 }
bogdanm 0:9b334a45a8ff 496
bogdanm 0:9b334a45a8ff 497 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 498 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 499
bogdanm 0:9b334a45a8ff 500 /* Return function status */
bogdanm 0:9b334a45a8ff 501 return HAL_OK;
bogdanm 0:9b334a45a8ff 502 }
bogdanm 0:9b334a45a8ff 503
bogdanm 0:9b334a45a8ff 504 /**
bogdanm 0:9b334a45a8ff 505 * @brief Starts the LPTIM One pulse generation.
bogdanm 0:9b334a45a8ff 506 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 507 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 508 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 509 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 510 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 511 * @retval HAL status
bogdanm 0:9b334a45a8ff 512 */
bogdanm 0:9b334a45a8ff 513 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 514 {
bogdanm 0:9b334a45a8ff 515 /* Check the parameters */
bogdanm 0:9b334a45a8ff 516 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 517 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 518 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 519
bogdanm 0:9b334a45a8ff 520 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 521 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 522
bogdanm 0:9b334a45a8ff 523 /* Reset WAVE bit to set one pulse mode */
bogdanm 0:9b334a45a8ff 524 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 525
bogdanm 0:9b334a45a8ff 526 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 527 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 528
bogdanm 0:9b334a45a8ff 529 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 530 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 533 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 534
bogdanm 0:9b334a45a8ff 535 /* Start timer in single mode */
bogdanm 0:9b334a45a8ff 536 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 537
bogdanm 0:9b334a45a8ff 538 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 539 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 540
bogdanm 0:9b334a45a8ff 541 /* Return function status */
bogdanm 0:9b334a45a8ff 542 return HAL_OK;
bogdanm 0:9b334a45a8ff 543 }
bogdanm 0:9b334a45a8ff 544
bogdanm 0:9b334a45a8ff 545 /**
bogdanm 0:9b334a45a8ff 546 * @brief Stops the LPTIM One pulse generation.
bogdanm 0:9b334a45a8ff 547 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 548 * @retval HAL status
bogdanm 0:9b334a45a8ff 549 */
bogdanm 0:9b334a45a8ff 550 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 551 {
bogdanm 0:9b334a45a8ff 552 /* Check the parameters */
bogdanm 0:9b334a45a8ff 553 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 554
bogdanm 0:9b334a45a8ff 555 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 556 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 557
bogdanm 0:9b334a45a8ff 558 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 559 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 560
bogdanm 0:9b334a45a8ff 561 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 562 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 563
bogdanm 0:9b334a45a8ff 564 /* Return function status */
bogdanm 0:9b334a45a8ff 565 return HAL_OK;
bogdanm 0:9b334a45a8ff 566 }
bogdanm 0:9b334a45a8ff 567
bogdanm 0:9b334a45a8ff 568 /**
bogdanm 0:9b334a45a8ff 569 * @brief Starts the LPTIM One pulse generation in interrupt mode.
bogdanm 0:9b334a45a8ff 570 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 571 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 572 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 573 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 574 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 575 * @retval HAL status
bogdanm 0:9b334a45a8ff 576 */
bogdanm 0:9b334a45a8ff 577 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 578 {
bogdanm 0:9b334a45a8ff 579 /* Check the parameters */
bogdanm 0:9b334a45a8ff 580 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 581 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 582 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 583
bogdanm 0:9b334a45a8ff 584 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 585 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 586
bogdanm 0:9b334a45a8ff 587 /* Reset WAVE bit to set one pulse mode */
bogdanm 0:9b334a45a8ff 588 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 589
bogdanm 0:9b334a45a8ff 590 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 591 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 594 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 597 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 598
bogdanm 0:9b334a45a8ff 599 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 600 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 603 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 604 {
bogdanm 0:9b334a45a8ff 605 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 606 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 607 }
bogdanm 0:9b334a45a8ff 608
bogdanm 0:9b334a45a8ff 609 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 610 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 611
bogdanm 0:9b334a45a8ff 612 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 613 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 614
bogdanm 0:9b334a45a8ff 615 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 616 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 619 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 620
bogdanm 0:9b334a45a8ff 621 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 622 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 623
bogdanm 0:9b334a45a8ff 624 /* Return function status */
bogdanm 0:9b334a45a8ff 625 return HAL_OK;
bogdanm 0:9b334a45a8ff 626 }
bogdanm 0:9b334a45a8ff 627
bogdanm 0:9b334a45a8ff 628 /**
bogdanm 0:9b334a45a8ff 629 * @brief Stops the LPTIM One pulse generation in interrupt mode.
bogdanm 0:9b334a45a8ff 630 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 631 * @retval HAL status
bogdanm 0:9b334a45a8ff 632 */
bogdanm 0:9b334a45a8ff 633 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 634 {
bogdanm 0:9b334a45a8ff 635 /* Check the parameters */
bogdanm 0:9b334a45a8ff 636 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 637
bogdanm 0:9b334a45a8ff 638 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 639 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 640
bogdanm 0:9b334a45a8ff 641 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 642 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 643
bogdanm 0:9b334a45a8ff 644 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 645 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 646
bogdanm 0:9b334a45a8ff 647 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 648 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 649
bogdanm 0:9b334a45a8ff 650 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 651 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 652
bogdanm 0:9b334a45a8ff 653 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 654 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 655
bogdanm 0:9b334a45a8ff 656 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 657 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 658 {
bogdanm 0:9b334a45a8ff 659 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 660 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 661 }
bogdanm 0:9b334a45a8ff 662
bogdanm 0:9b334a45a8ff 663 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 664 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 665
bogdanm 0:9b334a45a8ff 666 /* Return function status */
bogdanm 0:9b334a45a8ff 667 return HAL_OK;
bogdanm 0:9b334a45a8ff 668 }
bogdanm 0:9b334a45a8ff 669
bogdanm 0:9b334a45a8ff 670 /**
bogdanm 0:9b334a45a8ff 671 * @brief Starts the LPTIM in Set once mode.
bogdanm 0:9b334a45a8ff 672 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 673 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 674 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 675 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 676 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 677 * @retval HAL status
bogdanm 0:9b334a45a8ff 678 */
bogdanm 0:9b334a45a8ff 679 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 680 {
bogdanm 0:9b334a45a8ff 681 /* Check the parameters */
bogdanm 0:9b334a45a8ff 682 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 683 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 684 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 685
bogdanm 0:9b334a45a8ff 686 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 687 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 688
bogdanm 0:9b334a45a8ff 689 /* Set WAVE bit to enable the set once mode */
bogdanm 0:9b334a45a8ff 690 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 691
bogdanm 0:9b334a45a8ff 692 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 693 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 694
bogdanm 0:9b334a45a8ff 695 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 696 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 697
bogdanm 0:9b334a45a8ff 698 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 699 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 700
bogdanm 0:9b334a45a8ff 701 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 702 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 703
bogdanm 0:9b334a45a8ff 704 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 705 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 706
bogdanm 0:9b334a45a8ff 707 /* Return function status */
bogdanm 0:9b334a45a8ff 708 return HAL_OK;
bogdanm 0:9b334a45a8ff 709 }
bogdanm 0:9b334a45a8ff 710
bogdanm 0:9b334a45a8ff 711 /**
bogdanm 0:9b334a45a8ff 712 * @brief Stops the LPTIM Set once mode.
bogdanm 0:9b334a45a8ff 713 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 714 * @retval HAL status
bogdanm 0:9b334a45a8ff 715 */
bogdanm 0:9b334a45a8ff 716 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 717 {
bogdanm 0:9b334a45a8ff 718 /* Check the parameters */
bogdanm 0:9b334a45a8ff 719 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 720
bogdanm 0:9b334a45a8ff 721 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 722 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 723
bogdanm 0:9b334a45a8ff 724 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 725 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 726
bogdanm 0:9b334a45a8ff 727 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 728 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 729
bogdanm 0:9b334a45a8ff 730 /* Return function status */
bogdanm 0:9b334a45a8ff 731 return HAL_OK;
bogdanm 0:9b334a45a8ff 732 }
bogdanm 0:9b334a45a8ff 733
bogdanm 0:9b334a45a8ff 734 /**
bogdanm 0:9b334a45a8ff 735 * @brief Starts the LPTIM Set once mode in interrupt mode.
bogdanm 0:9b334a45a8ff 736 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 737 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 738 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 739 * @param Pulse : Specifies the compare value.
bogdanm 0:9b334a45a8ff 740 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 741 * @retval HAL status
bogdanm 0:9b334a45a8ff 742 */
bogdanm 0:9b334a45a8ff 743 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
bogdanm 0:9b334a45a8ff 744 {
bogdanm 0:9b334a45a8ff 745 /* Check the parameters */
bogdanm 0:9b334a45a8ff 746 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 747 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 748 assert_param(IS_LPTIM_PULSE(Pulse));
bogdanm 0:9b334a45a8ff 749
bogdanm 0:9b334a45a8ff 750 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 751 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 752
bogdanm 0:9b334a45a8ff 753 /* Set WAVE bit to enable the set once mode */
bogdanm 0:9b334a45a8ff 754 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
bogdanm 0:9b334a45a8ff 755
bogdanm 0:9b334a45a8ff 756 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 757 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 758
bogdanm 0:9b334a45a8ff 759 /* Enable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 760 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 761
bogdanm 0:9b334a45a8ff 762 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 763 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 764
bogdanm 0:9b334a45a8ff 765 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 766 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 767
bogdanm 0:9b334a45a8ff 768 /* If external trigger source is used, then enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 769 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 770 {
bogdanm 0:9b334a45a8ff 771 /* Enable external trigger interrupt */
bogdanm 0:9b334a45a8ff 772 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 773 }
bogdanm 0:9b334a45a8ff 774
bogdanm 0:9b334a45a8ff 775 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 776 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 777
bogdanm 0:9b334a45a8ff 778 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 779 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 780
bogdanm 0:9b334a45a8ff 781 /* Load the pulse value in the compare register */
bogdanm 0:9b334a45a8ff 782 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
bogdanm 0:9b334a45a8ff 783
bogdanm 0:9b334a45a8ff 784 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 785 __HAL_LPTIM_START_SINGLE(hlptim);
bogdanm 0:9b334a45a8ff 786
bogdanm 0:9b334a45a8ff 787 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 788 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 789
bogdanm 0:9b334a45a8ff 790 /* Return function status */
bogdanm 0:9b334a45a8ff 791 return HAL_OK;
bogdanm 0:9b334a45a8ff 792 }
bogdanm 0:9b334a45a8ff 793
bogdanm 0:9b334a45a8ff 794 /**
bogdanm 0:9b334a45a8ff 795 * @brief Stops the LPTIM Set once mode in interrupt mode.
bogdanm 0:9b334a45a8ff 796 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 797 * @retval HAL status
bogdanm 0:9b334a45a8ff 798 */
bogdanm 0:9b334a45a8ff 799 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 800 {
bogdanm 0:9b334a45a8ff 801 /* Check the parameters */
bogdanm 0:9b334a45a8ff 802 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 803
bogdanm 0:9b334a45a8ff 804 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 805 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 806
bogdanm 0:9b334a45a8ff 807 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 808 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 809
bogdanm 0:9b334a45a8ff 810 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 811 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 812
bogdanm 0:9b334a45a8ff 813 /* Disable Compare write complete interrupt */
bogdanm 0:9b334a45a8ff 814 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
bogdanm 0:9b334a45a8ff 815
bogdanm 0:9b334a45a8ff 816 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 817 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 818
bogdanm 0:9b334a45a8ff 819 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 820 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 821
bogdanm 0:9b334a45a8ff 822 /* If external trigger source is used, then disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 823 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
bogdanm 0:9b334a45a8ff 824 {
bogdanm 0:9b334a45a8ff 825 /* Disable external trigger interrupt */
bogdanm 0:9b334a45a8ff 826 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
bogdanm 0:9b334a45a8ff 827 }
bogdanm 0:9b334a45a8ff 828
bogdanm 0:9b334a45a8ff 829 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 830 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 831
bogdanm 0:9b334a45a8ff 832 /* Return function status */
bogdanm 0:9b334a45a8ff 833 return HAL_OK;
bogdanm 0:9b334a45a8ff 834 }
bogdanm 0:9b334a45a8ff 835
bogdanm 0:9b334a45a8ff 836 /**
bogdanm 0:9b334a45a8ff 837 * @brief Starts the Encoder interface.
bogdanm 0:9b334a45a8ff 838 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 839 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 840 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 841 * @retval HAL status
bogdanm 0:9b334a45a8ff 842 */
bogdanm 0:9b334a45a8ff 843 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 844 {
bogdanm 0:9b334a45a8ff 845 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 846
bogdanm 0:9b334a45a8ff 847 /* Check the parameters */
bogdanm 0:9b334a45a8ff 848 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 849 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 850 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
bogdanm 0:9b334a45a8ff 851 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
bogdanm 0:9b334a45a8ff 852 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 853
bogdanm 0:9b334a45a8ff 854 /* Configure edge sensitivity for encoder mode */
bogdanm 0:9b334a45a8ff 855 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 856 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 857
bogdanm 0:9b334a45a8ff 858 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 859 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 860
bogdanm 0:9b334a45a8ff 861 /* Clear CKPOL bits */
bogdanm 0:9b334a45a8ff 862 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
bogdanm 0:9b334a45a8ff 863
bogdanm 0:9b334a45a8ff 864 /* Set Input polarity */
bogdanm 0:9b334a45a8ff 865 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
bogdanm 0:9b334a45a8ff 866
bogdanm 0:9b334a45a8ff 867 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 868 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 869
bogdanm 0:9b334a45a8ff 870 /* Set ENC bit to enable the encoder interface */
bogdanm 0:9b334a45a8ff 871 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 872
bogdanm 0:9b334a45a8ff 873 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 874 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 875
bogdanm 0:9b334a45a8ff 876 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 877 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 878
bogdanm 0:9b334a45a8ff 879 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 880 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 881
bogdanm 0:9b334a45a8ff 882 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 883 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 884
bogdanm 0:9b334a45a8ff 885 /* Return function status */
bogdanm 0:9b334a45a8ff 886 return HAL_OK;
bogdanm 0:9b334a45a8ff 887 }
bogdanm 0:9b334a45a8ff 888
bogdanm 0:9b334a45a8ff 889 /**
bogdanm 0:9b334a45a8ff 890 * @brief Stops the Encoder interface.
bogdanm 0:9b334a45a8ff 891 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 892 * @retval HAL status
bogdanm 0:9b334a45a8ff 893 */
bogdanm 0:9b334a45a8ff 894 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 895 {
bogdanm 0:9b334a45a8ff 896 /* Check the parameters */
bogdanm 0:9b334a45a8ff 897 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 898
bogdanm 0:9b334a45a8ff 899 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 900 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 901
bogdanm 0:9b334a45a8ff 902 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 903 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 904
bogdanm 0:9b334a45a8ff 905 /* Reset ENC bit to disable the encoder interface */
bogdanm 0:9b334a45a8ff 906 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 907
bogdanm 0:9b334a45a8ff 908 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 909 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 910
bogdanm 0:9b334a45a8ff 911 /* Return function status */
bogdanm 0:9b334a45a8ff 912 return HAL_OK;
bogdanm 0:9b334a45a8ff 913 }
bogdanm 0:9b334a45a8ff 914
bogdanm 0:9b334a45a8ff 915 /**
bogdanm 0:9b334a45a8ff 916 * @brief Starts the Encoder interface in interrupt mode.
bogdanm 0:9b334a45a8ff 917 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 918 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 919 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 920 * @retval HAL status
bogdanm 0:9b334a45a8ff 921 */
bogdanm 0:9b334a45a8ff 922 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 923 {
bogdanm 0:9b334a45a8ff 924 uint32_t tmpcfgr = 0;
bogdanm 0:9b334a45a8ff 925
bogdanm 0:9b334a45a8ff 926 /* Check the parameters */
bogdanm 0:9b334a45a8ff 927 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 928 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 929 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
bogdanm 0:9b334a45a8ff 930 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
bogdanm 0:9b334a45a8ff 931 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
bogdanm 0:9b334a45a8ff 932
bogdanm 0:9b334a45a8ff 933 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 934 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 935
bogdanm 0:9b334a45a8ff 936 /* Configure edge sensitivity for encoder mode */
bogdanm 0:9b334a45a8ff 937 /* Get the LPTIMx CFGR value */
bogdanm 0:9b334a45a8ff 938 tmpcfgr = hlptim->Instance->CFGR;
bogdanm 0:9b334a45a8ff 939
bogdanm 0:9b334a45a8ff 940 /* Clear CKPOL bits */
bogdanm 0:9b334a45a8ff 941 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
bogdanm 0:9b334a45a8ff 942
bogdanm 0:9b334a45a8ff 943 /* Set Input polarity */
bogdanm 0:9b334a45a8ff 944 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
bogdanm 0:9b334a45a8ff 945
bogdanm 0:9b334a45a8ff 946 /* Write to LPTIMx CFGR */
bogdanm 0:9b334a45a8ff 947 hlptim->Instance->CFGR = tmpcfgr;
bogdanm 0:9b334a45a8ff 948
bogdanm 0:9b334a45a8ff 949 /* Set ENC bit to enable the encoder interface */
bogdanm 0:9b334a45a8ff 950 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 951
bogdanm 0:9b334a45a8ff 952 /* Enable "switch to down direction" interrupt */
bogdanm 0:9b334a45a8ff 953 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
bogdanm 0:9b334a45a8ff 954
bogdanm 0:9b334a45a8ff 955 /* Enable "switch to up direction" interrupt */
bogdanm 0:9b334a45a8ff 956 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
bogdanm 0:9b334a45a8ff 957
bogdanm 0:9b334a45a8ff 958 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 959 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 960
bogdanm 0:9b334a45a8ff 961 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 962 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 963
bogdanm 0:9b334a45a8ff 964 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 965 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 966
bogdanm 0:9b334a45a8ff 967 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 968 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 969
bogdanm 0:9b334a45a8ff 970 /* Return function status */
bogdanm 0:9b334a45a8ff 971 return HAL_OK;
bogdanm 0:9b334a45a8ff 972 }
bogdanm 0:9b334a45a8ff 973
bogdanm 0:9b334a45a8ff 974 /**
bogdanm 0:9b334a45a8ff 975 * @brief Stops the Encoder interface in nterrupt mode.
bogdanm 0:9b334a45a8ff 976 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 977 * @retval HAL status
bogdanm 0:9b334a45a8ff 978 */
bogdanm 0:9b334a45a8ff 979 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 980 {
bogdanm 0:9b334a45a8ff 981 /* Check the parameters */
bogdanm 0:9b334a45a8ff 982 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 983
bogdanm 0:9b334a45a8ff 984 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 985 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 986
bogdanm 0:9b334a45a8ff 987 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 988 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 989
bogdanm 0:9b334a45a8ff 990 /* Reset ENC bit to disable the encoder interface */
bogdanm 0:9b334a45a8ff 991 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
bogdanm 0:9b334a45a8ff 992
bogdanm 0:9b334a45a8ff 993 /* Disable "switch to down direction" interrupt */
bogdanm 0:9b334a45a8ff 994 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
bogdanm 0:9b334a45a8ff 995
bogdanm 0:9b334a45a8ff 996 /* Disable "switch to up direction" interrupt */
bogdanm 0:9b334a45a8ff 997 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
bogdanm 0:9b334a45a8ff 998
bogdanm 0:9b334a45a8ff 999 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1000 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1001
bogdanm 0:9b334a45a8ff 1002 /* Return function status */
bogdanm 0:9b334a45a8ff 1003 return HAL_OK;
bogdanm 0:9b334a45a8ff 1004 }
bogdanm 0:9b334a45a8ff 1005
bogdanm 0:9b334a45a8ff 1006 /**
bogdanm 0:9b334a45a8ff 1007 * @brief Starts the Timeout function. The first trigger event will start the
bogdanm 0:9b334a45a8ff 1008 * timer, any successive trigger event will reset the counter and
bogdanm 0:9b334a45a8ff 1009 * the timer restarts.
bogdanm 0:9b334a45a8ff 1010 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1011 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1012 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1013 * @param Timeout : Specifies the TimeOut value to rest the counter.
bogdanm 0:9b334a45a8ff 1014 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1015 * @retval HAL status
bogdanm 0:9b334a45a8ff 1016 */
bogdanm 0:9b334a45a8ff 1017 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1018 {
bogdanm 0:9b334a45a8ff 1019 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1020 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1021 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1022 assert_param(IS_LPTIM_PULSE(Timeout));
bogdanm 0:9b334a45a8ff 1023
bogdanm 0:9b334a45a8ff 1024 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1025 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1026
bogdanm 0:9b334a45a8ff 1027 /* Set TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1028 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1029
bogdanm 0:9b334a45a8ff 1030 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1031 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1032
bogdanm 0:9b334a45a8ff 1033 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1034 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1035
bogdanm 0:9b334a45a8ff 1036 /* Load the Timeout value in the compare register */
bogdanm 0:9b334a45a8ff 1037 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
bogdanm 0:9b334a45a8ff 1038
bogdanm 0:9b334a45a8ff 1039 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1040 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1041
bogdanm 0:9b334a45a8ff 1042 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1043 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1044
bogdanm 0:9b334a45a8ff 1045 /* Return function status */
bogdanm 0:9b334a45a8ff 1046 return HAL_OK;
bogdanm 0:9b334a45a8ff 1047 }
bogdanm 0:9b334a45a8ff 1048
bogdanm 0:9b334a45a8ff 1049 /**
bogdanm 0:9b334a45a8ff 1050 * @brief Stops the Timeout function.
bogdanm 0:9b334a45a8ff 1051 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1052 * @retval HAL status
bogdanm 0:9b334a45a8ff 1053 */
bogdanm 0:9b334a45a8ff 1054 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1055 {
bogdanm 0:9b334a45a8ff 1056 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1057 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1058
bogdanm 0:9b334a45a8ff 1059 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1060 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1061
bogdanm 0:9b334a45a8ff 1062 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1063 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1064
bogdanm 0:9b334a45a8ff 1065 /* Reset TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1066 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1067
bogdanm 0:9b334a45a8ff 1068 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1069 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1070
bogdanm 0:9b334a45a8ff 1071 /* Return function status */
bogdanm 0:9b334a45a8ff 1072 return HAL_OK;
bogdanm 0:9b334a45a8ff 1073 }
bogdanm 0:9b334a45a8ff 1074
bogdanm 0:9b334a45a8ff 1075 /**
bogdanm 0:9b334a45a8ff 1076 * @brief Starts the Timeout function in interrupt mode. The first trigger
bogdanm 0:9b334a45a8ff 1077 * event will start the timer, any successive trigger event will reset
bogdanm 0:9b334a45a8ff 1078 * the counter and the timer restarts.
bogdanm 0:9b334a45a8ff 1079 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1080 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1081 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1082 * @param Timeout : Specifies the TimeOut value to rest the counter.
bogdanm 0:9b334a45a8ff 1083 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1084 * @retval HAL status
bogdanm 0:9b334a45a8ff 1085 */
bogdanm 0:9b334a45a8ff 1086 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1087 {
bogdanm 0:9b334a45a8ff 1088 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1089 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1090 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1091 assert_param(IS_LPTIM_PULSE(Timeout));
bogdanm 0:9b334a45a8ff 1092
bogdanm 0:9b334a45a8ff 1093 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1094 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1095
bogdanm 0:9b334a45a8ff 1096 /* Set TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1097 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1098
bogdanm 0:9b334a45a8ff 1099 /* Enable Compare match interrupt */
bogdanm 0:9b334a45a8ff 1100 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 1101
bogdanm 0:9b334a45a8ff 1102 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1103 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1104
bogdanm 0:9b334a45a8ff 1105 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1106 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1107
bogdanm 0:9b334a45a8ff 1108 /* Load the Timeout value in the compare register */
bogdanm 0:9b334a45a8ff 1109 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
bogdanm 0:9b334a45a8ff 1110
bogdanm 0:9b334a45a8ff 1111 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1112 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1113
bogdanm 0:9b334a45a8ff 1114 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1115 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1116
bogdanm 0:9b334a45a8ff 1117 /* Return function status */
bogdanm 0:9b334a45a8ff 1118 return HAL_OK;
bogdanm 0:9b334a45a8ff 1119 }
bogdanm 0:9b334a45a8ff 1120
bogdanm 0:9b334a45a8ff 1121 /**
bogdanm 0:9b334a45a8ff 1122 * @brief Stops the Timeout function in interrupt mode.
bogdanm 0:9b334a45a8ff 1123 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1124 * @retval HAL status
bogdanm 0:9b334a45a8ff 1125 */
bogdanm 0:9b334a45a8ff 1126 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1127 {
bogdanm 0:9b334a45a8ff 1128 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1129 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1130
bogdanm 0:9b334a45a8ff 1131 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1132 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1133
bogdanm 0:9b334a45a8ff 1134 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1135 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1136
bogdanm 0:9b334a45a8ff 1137 /* Reset TIMOUT bit to enable the timeout function */
bogdanm 0:9b334a45a8ff 1138 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
bogdanm 0:9b334a45a8ff 1139
bogdanm 0:9b334a45a8ff 1140 /* Disable Compare match interrupt */
bogdanm 0:9b334a45a8ff 1141 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
bogdanm 0:9b334a45a8ff 1142
bogdanm 0:9b334a45a8ff 1143 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1144 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1145
bogdanm 0:9b334a45a8ff 1146 /* Return function status */
bogdanm 0:9b334a45a8ff 1147 return HAL_OK;
bogdanm 0:9b334a45a8ff 1148 }
bogdanm 0:9b334a45a8ff 1149
bogdanm 0:9b334a45a8ff 1150 /**
bogdanm 0:9b334a45a8ff 1151 * @brief Starts the Counter mode.
bogdanm 0:9b334a45a8ff 1152 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1153 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1154 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1155 * @retval HAL status
bogdanm 0:9b334a45a8ff 1156 */
bogdanm 0:9b334a45a8ff 1157 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 1158 {
bogdanm 0:9b334a45a8ff 1159 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1160 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1161 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1162
bogdanm 0:9b334a45a8ff 1163 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1164 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1165
bogdanm 0:9b334a45a8ff 1166 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
bogdanm 0:9b334a45a8ff 1167 if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm 0:9b334a45a8ff 1168 {
bogdanm 0:9b334a45a8ff 1169 /* Check if clock is prescaled */
bogdanm 0:9b334a45a8ff 1170 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 1171 /* Set clock prescaler to 0 */
bogdanm 0:9b334a45a8ff 1172 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
bogdanm 0:9b334a45a8ff 1173 }
bogdanm 0:9b334a45a8ff 1174
bogdanm 0:9b334a45a8ff 1175 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1176 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1177
bogdanm 0:9b334a45a8ff 1178 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1179 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1180
bogdanm 0:9b334a45a8ff 1181 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1182 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1183
bogdanm 0:9b334a45a8ff 1184 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1185 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1186
bogdanm 0:9b334a45a8ff 1187 /* Return function status */
bogdanm 0:9b334a45a8ff 1188 return HAL_OK;
bogdanm 0:9b334a45a8ff 1189 }
bogdanm 0:9b334a45a8ff 1190
bogdanm 0:9b334a45a8ff 1191 /**
bogdanm 0:9b334a45a8ff 1192 * @brief Stops the Counter mode.
bogdanm 0:9b334a45a8ff 1193 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1194 * @retval HAL status
bogdanm 0:9b334a45a8ff 1195 */
bogdanm 0:9b334a45a8ff 1196 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1197 {
bogdanm 0:9b334a45a8ff 1198 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1199 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1200
bogdanm 0:9b334a45a8ff 1201 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1202 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1203
bogdanm 0:9b334a45a8ff 1204 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1205 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1206
bogdanm 0:9b334a45a8ff 1207 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1208 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1209
bogdanm 0:9b334a45a8ff 1210 /* Return function status */
bogdanm 0:9b334a45a8ff 1211 return HAL_OK;
bogdanm 0:9b334a45a8ff 1212 }
bogdanm 0:9b334a45a8ff 1213
bogdanm 0:9b334a45a8ff 1214 /**
bogdanm 0:9b334a45a8ff 1215 * @brief Starts the Counter mode in interrupt mode.
bogdanm 0:9b334a45a8ff 1216 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1217 * @param Period : Specifies the Autoreload value.
bogdanm 0:9b334a45a8ff 1218 * This parameter must be a value between 0x0000 and 0xFFFF.
bogdanm 0:9b334a45a8ff 1219 * @retval HAL status
bogdanm 0:9b334a45a8ff 1220 */
bogdanm 0:9b334a45a8ff 1221 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
bogdanm 0:9b334a45a8ff 1222 {
bogdanm 0:9b334a45a8ff 1223 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1224 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1225 assert_param(IS_LPTIM_PERIOD(Period));
bogdanm 0:9b334a45a8ff 1226
bogdanm 0:9b334a45a8ff 1227 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1228 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1229
bogdanm 0:9b334a45a8ff 1230 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
bogdanm 0:9b334a45a8ff 1231 if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
bogdanm 0:9b334a45a8ff 1232 {
bogdanm 0:9b334a45a8ff 1233 /* Check if clock is prescaled */
bogdanm 0:9b334a45a8ff 1234 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
bogdanm 0:9b334a45a8ff 1235 /* Set clock prescaler to 0 */
bogdanm 0:9b334a45a8ff 1236 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
bogdanm 0:9b334a45a8ff 1237 }
bogdanm 0:9b334a45a8ff 1238
bogdanm 0:9b334a45a8ff 1239 /* Enable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 1240 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 1241
bogdanm 0:9b334a45a8ff 1242 /* Enable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1243 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 1244
bogdanm 0:9b334a45a8ff 1245 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 1246 __HAL_LPTIM_ENABLE(hlptim);
bogdanm 0:9b334a45a8ff 1247
bogdanm 0:9b334a45a8ff 1248 /* Load the period value in the autoreload register */
bogdanm 0:9b334a45a8ff 1249 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
bogdanm 0:9b334a45a8ff 1250
bogdanm 0:9b334a45a8ff 1251 /* Start timer in continuous mode */
bogdanm 0:9b334a45a8ff 1252 __HAL_LPTIM_START_CONTINUOUS(hlptim);
bogdanm 0:9b334a45a8ff 1253
bogdanm 0:9b334a45a8ff 1254 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1255 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1256
bogdanm 0:9b334a45a8ff 1257 /* Return function status */
bogdanm 0:9b334a45a8ff 1258 return HAL_OK;
bogdanm 0:9b334a45a8ff 1259 }
bogdanm 0:9b334a45a8ff 1260
bogdanm 0:9b334a45a8ff 1261 /**
bogdanm 0:9b334a45a8ff 1262 * @brief Stops the Counter mode in interrupt mode.
bogdanm 0:9b334a45a8ff 1263 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1264 * @retval HAL status
bogdanm 0:9b334a45a8ff 1265 */
bogdanm 0:9b334a45a8ff 1266 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1267 {
bogdanm 0:9b334a45a8ff 1268 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1269 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1270
bogdanm 0:9b334a45a8ff 1271 /* Set the LPTIM state */
bogdanm 0:9b334a45a8ff 1272 hlptim->State= HAL_LPTIM_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1273
bogdanm 0:9b334a45a8ff 1274 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 1275 __HAL_LPTIM_DISABLE(hlptim);
bogdanm 0:9b334a45a8ff 1276
bogdanm 0:9b334a45a8ff 1277 /* Disable Autoreload write complete interrupt */
bogdanm 0:9b334a45a8ff 1278 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
bogdanm 0:9b334a45a8ff 1279
bogdanm 0:9b334a45a8ff 1280 /* Disable Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1281 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
bogdanm 0:9b334a45a8ff 1282
bogdanm 0:9b334a45a8ff 1283 /* Change the TIM state*/
bogdanm 0:9b334a45a8ff 1284 hlptim->State= HAL_LPTIM_STATE_READY;
bogdanm 0:9b334a45a8ff 1285
bogdanm 0:9b334a45a8ff 1286 /* Return function status */
bogdanm 0:9b334a45a8ff 1287 return HAL_OK;
bogdanm 0:9b334a45a8ff 1288 }
bogdanm 0:9b334a45a8ff 1289
bogdanm 0:9b334a45a8ff 1290 /**
bogdanm 0:9b334a45a8ff 1291 * @}
bogdanm 0:9b334a45a8ff 1292 */
bogdanm 0:9b334a45a8ff 1293
bogdanm 0:9b334a45a8ff 1294 /** @addtogroup LPTIM_Exported_Functions_Group3
bogdanm 0:9b334a45a8ff 1295 * @brief Read operation functions.
bogdanm 0:9b334a45a8ff 1296 *
bogdanm 0:9b334a45a8ff 1297 @verbatim
bogdanm 0:9b334a45a8ff 1298 ==============================================================================
bogdanm 0:9b334a45a8ff 1299 ##### LPTIM Read operation functions #####
bogdanm 0:9b334a45a8ff 1300 ==============================================================================
bogdanm 0:9b334a45a8ff 1301 [..] This section provides LPTIM Reading functions.
bogdanm 0:9b334a45a8ff 1302 (+) Read the counter value.
bogdanm 0:9b334a45a8ff 1303 (+) Read the period (Auto-reload) value.
bogdanm 0:9b334a45a8ff 1304 (+) Read the pulse (Compare)value.
bogdanm 0:9b334a45a8ff 1305 @endverbatim
bogdanm 0:9b334a45a8ff 1306 * @{
bogdanm 0:9b334a45a8ff 1307 */
bogdanm 0:9b334a45a8ff 1308
bogdanm 0:9b334a45a8ff 1309 /**
bogdanm 0:9b334a45a8ff 1310 * @brief This function returns the current counter value.
bogdanm 0:9b334a45a8ff 1311 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1312 * @retval Counter value.
bogdanm 0:9b334a45a8ff 1313 */
bogdanm 0:9b334a45a8ff 1314 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1315 {
bogdanm 0:9b334a45a8ff 1316 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1317 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1318
bogdanm 0:9b334a45a8ff 1319 return (hlptim->Instance->CNT);
bogdanm 0:9b334a45a8ff 1320 }
bogdanm 0:9b334a45a8ff 1321
bogdanm 0:9b334a45a8ff 1322 /**
bogdanm 0:9b334a45a8ff 1323 * @brief This function return the current Autoreload (Period) value.
bogdanm 0:9b334a45a8ff 1324 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1325 * @retval Autoreload value.
bogdanm 0:9b334a45a8ff 1326 */
bogdanm 0:9b334a45a8ff 1327 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1328 {
bogdanm 0:9b334a45a8ff 1329 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1330 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1331
bogdanm 0:9b334a45a8ff 1332 return (hlptim->Instance->ARR);
bogdanm 0:9b334a45a8ff 1333 }
bogdanm 0:9b334a45a8ff 1334
bogdanm 0:9b334a45a8ff 1335 /**
bogdanm 0:9b334a45a8ff 1336 * @brief This function return the current Compare (Pulse) value.
bogdanm 0:9b334a45a8ff 1337 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1338 * @retval Compare value.
bogdanm 0:9b334a45a8ff 1339 */
bogdanm 0:9b334a45a8ff 1340 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1341 {
bogdanm 0:9b334a45a8ff 1342 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1343 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
bogdanm 0:9b334a45a8ff 1344
bogdanm 0:9b334a45a8ff 1345 return (hlptim->Instance->CMP);
bogdanm 0:9b334a45a8ff 1346 }
bogdanm 0:9b334a45a8ff 1347
bogdanm 0:9b334a45a8ff 1348 /**
bogdanm 0:9b334a45a8ff 1349 * @}
bogdanm 0:9b334a45a8ff 1350 */
bogdanm 0:9b334a45a8ff 1351
bogdanm 0:9b334a45a8ff 1352
bogdanm 0:9b334a45a8ff 1353
bogdanm 0:9b334a45a8ff 1354 /** @addtogroup LPTIM_Exported_Functions_Group4
bogdanm 0:9b334a45a8ff 1355 * @brief LPTIM IRQ handler.
bogdanm 0:9b334a45a8ff 1356 *
bogdanm 0:9b334a45a8ff 1357 @verbatim
bogdanm 0:9b334a45a8ff 1358 ==============================================================================
bogdanm 0:9b334a45a8ff 1359 ##### LPTIM IRQ handler #####
bogdanm 0:9b334a45a8ff 1360 ==============================================================================
bogdanm 0:9b334a45a8ff 1361 [..] This section provides LPTIM IRQ handler function.
bogdanm 0:9b334a45a8ff 1362
bogdanm 0:9b334a45a8ff 1363 @endverbatim
bogdanm 0:9b334a45a8ff 1364 * @{
bogdanm 0:9b334a45a8ff 1365 */
bogdanm 0:9b334a45a8ff 1366
bogdanm 0:9b334a45a8ff 1367 /**
bogdanm 0:9b334a45a8ff 1368 * @brief This function handles LPTIM interrupt request.
bogdanm 0:9b334a45a8ff 1369 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1370 * @retval None
bogdanm 0:9b334a45a8ff 1371 */
bogdanm 0:9b334a45a8ff 1372 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1373 {
bogdanm 0:9b334a45a8ff 1374 /* Compare match interrupt */
bogdanm 0:9b334a45a8ff 1375 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
bogdanm 0:9b334a45a8ff 1376 {
bogdanm 0:9b334a45a8ff 1377 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) !=RESET)
bogdanm 0:9b334a45a8ff 1378 {
bogdanm 0:9b334a45a8ff 1379 /* Clear Compare match flag */
bogdanm 0:9b334a45a8ff 1380 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
bogdanm 0:9b334a45a8ff 1381
bogdanm 0:9b334a45a8ff 1382 /* Compare match Callback */
bogdanm 0:9b334a45a8ff 1383 HAL_LPTIM_CompareMatchCallback(hlptim);
bogdanm 0:9b334a45a8ff 1384 }
bogdanm 0:9b334a45a8ff 1385 }
bogdanm 0:9b334a45a8ff 1386
bogdanm 0:9b334a45a8ff 1387 /* Autoreload match interrupt */
bogdanm 0:9b334a45a8ff 1388 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
bogdanm 0:9b334a45a8ff 1389 {
bogdanm 0:9b334a45a8ff 1390 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) !=RESET)
bogdanm 0:9b334a45a8ff 1391 {
bogdanm 0:9b334a45a8ff 1392 /* Clear Autoreload match flag */
bogdanm 0:9b334a45a8ff 1393 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
bogdanm 0:9b334a45a8ff 1394
bogdanm 0:9b334a45a8ff 1395 /* Autoreload match Callback */
bogdanm 0:9b334a45a8ff 1396 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
bogdanm 0:9b334a45a8ff 1397 }
bogdanm 0:9b334a45a8ff 1398 }
bogdanm 0:9b334a45a8ff 1399
bogdanm 0:9b334a45a8ff 1400 /* Trigger detected interrupt */
bogdanm 0:9b334a45a8ff 1401 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
bogdanm 0:9b334a45a8ff 1402 {
bogdanm 0:9b334a45a8ff 1403 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) !=RESET)
bogdanm 0:9b334a45a8ff 1404 {
bogdanm 0:9b334a45a8ff 1405 /* Clear Trigger detected flag */
bogdanm 0:9b334a45a8ff 1406 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
bogdanm 0:9b334a45a8ff 1407
bogdanm 0:9b334a45a8ff 1408 /* Trigger detected callback */
bogdanm 0:9b334a45a8ff 1409 HAL_LPTIM_TriggerCallback(hlptim);
bogdanm 0:9b334a45a8ff 1410 }
bogdanm 0:9b334a45a8ff 1411 }
bogdanm 0:9b334a45a8ff 1412
bogdanm 0:9b334a45a8ff 1413 /* Compare write interrupt */
bogdanm 0:9b334a45a8ff 1414 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
bogdanm 0:9b334a45a8ff 1415 {
bogdanm 0:9b334a45a8ff 1416 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) !=RESET)
bogdanm 0:9b334a45a8ff 1417 {
bogdanm 0:9b334a45a8ff 1418 /* Clear Compare write flag */
bogdanm 0:9b334a45a8ff 1419 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
bogdanm 0:9b334a45a8ff 1420
bogdanm 0:9b334a45a8ff 1421 /* Compare write Callback */
bogdanm 0:9b334a45a8ff 1422 HAL_LPTIM_CompareWriteCallback(hlptim);
bogdanm 0:9b334a45a8ff 1423 }
bogdanm 0:9b334a45a8ff 1424 }
bogdanm 0:9b334a45a8ff 1425
bogdanm 0:9b334a45a8ff 1426 /* Autoreload write interrupt */
bogdanm 0:9b334a45a8ff 1427 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
bogdanm 0:9b334a45a8ff 1428 {
bogdanm 0:9b334a45a8ff 1429 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) !=RESET)
bogdanm 0:9b334a45a8ff 1430 {
bogdanm 0:9b334a45a8ff 1431 /* Clear Autoreload write flag */
bogdanm 0:9b334a45a8ff 1432 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
bogdanm 0:9b334a45a8ff 1433
bogdanm 0:9b334a45a8ff 1434 /* Autoreload write Callback */
bogdanm 0:9b334a45a8ff 1435 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
bogdanm 0:9b334a45a8ff 1436 }
bogdanm 0:9b334a45a8ff 1437 }
bogdanm 0:9b334a45a8ff 1438
bogdanm 0:9b334a45a8ff 1439 /* Direction counter changed from Down to Up interrupt */
bogdanm 0:9b334a45a8ff 1440 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
bogdanm 0:9b334a45a8ff 1441 {
bogdanm 0:9b334a45a8ff 1442 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) !=RESET)
bogdanm 0:9b334a45a8ff 1443 {
bogdanm 0:9b334a45a8ff 1444 /* Clear Direction counter changed from Down to Up flag */
bogdanm 0:9b334a45a8ff 1445 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
bogdanm 0:9b334a45a8ff 1446
bogdanm 0:9b334a45a8ff 1447 /* Direction counter changed from Down to Up Callback */
bogdanm 0:9b334a45a8ff 1448 HAL_LPTIM_DirectionUpCallback(hlptim);
bogdanm 0:9b334a45a8ff 1449 }
bogdanm 0:9b334a45a8ff 1450 }
bogdanm 0:9b334a45a8ff 1451
bogdanm 0:9b334a45a8ff 1452 /* Direction counter changed from Up to Down interrupt */
bogdanm 0:9b334a45a8ff 1453 if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
bogdanm 0:9b334a45a8ff 1454 {
bogdanm 0:9b334a45a8ff 1455 if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) !=RESET)
bogdanm 0:9b334a45a8ff 1456 {
bogdanm 0:9b334a45a8ff 1457 /* Clear Direction counter changed from Up to Down flag */
bogdanm 0:9b334a45a8ff 1458 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
bogdanm 0:9b334a45a8ff 1459
bogdanm 0:9b334a45a8ff 1460 /* Direction counter changed from Up to Down Callback */
bogdanm 0:9b334a45a8ff 1461 HAL_LPTIM_DirectionDownCallback(hlptim);
bogdanm 0:9b334a45a8ff 1462 }
bogdanm 0:9b334a45a8ff 1463 }
bogdanm 0:9b334a45a8ff 1464 }
bogdanm 0:9b334a45a8ff 1465
bogdanm 0:9b334a45a8ff 1466 /**
bogdanm 0:9b334a45a8ff 1467 * @brief Compare match callback in non blocking mode
bogdanm 0:9b334a45a8ff 1468 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1469 * @retval None
bogdanm 0:9b334a45a8ff 1470 */
bogdanm 0:9b334a45a8ff 1471 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1472 {
bogdanm 0:9b334a45a8ff 1473 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1474 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1475 */
bogdanm 0:9b334a45a8ff 1476 }
bogdanm 0:9b334a45a8ff 1477
bogdanm 0:9b334a45a8ff 1478 /**
bogdanm 0:9b334a45a8ff 1479 * @brief Autoreload match callback in non blocking mode
bogdanm 0:9b334a45a8ff 1480 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1481 * @retval None
bogdanm 0:9b334a45a8ff 1482 */
bogdanm 0:9b334a45a8ff 1483 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1484 {
bogdanm 0:9b334a45a8ff 1485 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1486 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1487 */
bogdanm 0:9b334a45a8ff 1488 }
bogdanm 0:9b334a45a8ff 1489
bogdanm 0:9b334a45a8ff 1490 /**
bogdanm 0:9b334a45a8ff 1491 * @brief Trigger detected callback in non blocking mode
bogdanm 0:9b334a45a8ff 1492 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1493 * @retval None
bogdanm 0:9b334a45a8ff 1494 */
bogdanm 0:9b334a45a8ff 1495 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1496 {
bogdanm 0:9b334a45a8ff 1497 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1498 the HAL_LPTIM_TriggerCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1499 */
bogdanm 0:9b334a45a8ff 1500 }
bogdanm 0:9b334a45a8ff 1501
bogdanm 0:9b334a45a8ff 1502 /**
bogdanm 0:9b334a45a8ff 1503 * @brief Compare write callback in non blocking mode
bogdanm 0:9b334a45a8ff 1504 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1505 * @retval None
bogdanm 0:9b334a45a8ff 1506 */
bogdanm 0:9b334a45a8ff 1507 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1508 {
bogdanm 0:9b334a45a8ff 1509 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1510 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1511 */
bogdanm 0:9b334a45a8ff 1512 }
bogdanm 0:9b334a45a8ff 1513
bogdanm 0:9b334a45a8ff 1514 /**
bogdanm 0:9b334a45a8ff 1515 * @brief Autoreload write callback in non blocking mode
bogdanm 0:9b334a45a8ff 1516 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1517 * @retval None
bogdanm 0:9b334a45a8ff 1518 */
bogdanm 0:9b334a45a8ff 1519 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1520 {
bogdanm 0:9b334a45a8ff 1521 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1522 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1523 */
bogdanm 0:9b334a45a8ff 1524 }
bogdanm 0:9b334a45a8ff 1525
bogdanm 0:9b334a45a8ff 1526 /**
bogdanm 0:9b334a45a8ff 1527 * @brief Direction counter changed from Down to Up callback in non blocking mode
bogdanm 0:9b334a45a8ff 1528 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1529 * @retval None
bogdanm 0:9b334a45a8ff 1530 */
bogdanm 0:9b334a45a8ff 1531 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1532 {
bogdanm 0:9b334a45a8ff 1533 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1534 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1535 */
bogdanm 0:9b334a45a8ff 1536 }
bogdanm 0:9b334a45a8ff 1537
bogdanm 0:9b334a45a8ff 1538 /**
bogdanm 0:9b334a45a8ff 1539 * @brief Direction counter changed from Up to Down callback in non blocking mode
bogdanm 0:9b334a45a8ff 1540 * @param hlptim : LPTIM handle
bogdanm 0:9b334a45a8ff 1541 * @retval None
bogdanm 0:9b334a45a8ff 1542 */
bogdanm 0:9b334a45a8ff 1543 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1544 {
bogdanm 0:9b334a45a8ff 1545 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1546 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1547 */
bogdanm 0:9b334a45a8ff 1548 }
bogdanm 0:9b334a45a8ff 1549
bogdanm 0:9b334a45a8ff 1550 /**
bogdanm 0:9b334a45a8ff 1551 * @}
bogdanm 0:9b334a45a8ff 1552 */
bogdanm 0:9b334a45a8ff 1553
bogdanm 0:9b334a45a8ff 1554 /** @addtogroup LPTIM_Exported_Functions_Group5
bogdanm 0:9b334a45a8ff 1555 * @brief Peripheral State functions.
bogdanm 0:9b334a45a8ff 1556 *
bogdanm 0:9b334a45a8ff 1557 @verbatim
bogdanm 0:9b334a45a8ff 1558 ==============================================================================
bogdanm 0:9b334a45a8ff 1559 ##### Peripheral State functions #####
bogdanm 0:9b334a45a8ff 1560 ==============================================================================
bogdanm 0:9b334a45a8ff 1561 [..]
bogdanm 0:9b334a45a8ff 1562 This subsection permits to get in run-time the status of the peripheral.
bogdanm 0:9b334a45a8ff 1563
bogdanm 0:9b334a45a8ff 1564 @endverbatim
bogdanm 0:9b334a45a8ff 1565 * @{
bogdanm 0:9b334a45a8ff 1566 */
bogdanm 0:9b334a45a8ff 1567
bogdanm 0:9b334a45a8ff 1568 /**
bogdanm 0:9b334a45a8ff 1569 * @brief Returns the LPTIM state.
bogdanm 0:9b334a45a8ff 1570 * @param hlptim: LPTIM handle
bogdanm 0:9b334a45a8ff 1571 * @retval HAL state
bogdanm 0:9b334a45a8ff 1572 */
bogdanm 0:9b334a45a8ff 1573 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
bogdanm 0:9b334a45a8ff 1574 {
bogdanm 0:9b334a45a8ff 1575 return hlptim->State;
bogdanm 0:9b334a45a8ff 1576 }
bogdanm 0:9b334a45a8ff 1577
bogdanm 0:9b334a45a8ff 1578 /**
bogdanm 0:9b334a45a8ff 1579 * @}
bogdanm 0:9b334a45a8ff 1580 */
bogdanm 0:9b334a45a8ff 1581
bogdanm 0:9b334a45a8ff 1582 /**
bogdanm 0:9b334a45a8ff 1583 * @}
bogdanm 0:9b334a45a8ff 1584 */
bogdanm 0:9b334a45a8ff 1585
bogdanm 0:9b334a45a8ff 1586 /**
bogdanm 0:9b334a45a8ff 1587 * @}
bogdanm 0:9b334a45a8ff 1588 */
bogdanm 0:9b334a45a8ff 1589
bogdanm 0:9b334a45a8ff 1590 #endif /* HAL_LPTIM_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1591
bogdanm 0:9b334a45a8ff 1592
bogdanm 0:9b334a45a8ff 1593 /**
bogdanm 0:9b334a45a8ff 1594 * @}
bogdanm 0:9b334a45a8ff 1595 */
bogdanm 0:9b334a45a8ff 1596
bogdanm 0:9b334a45a8ff 1597 /**
bogdanm 0:9b334a45a8ff 1598 * @}
bogdanm 0:9b334a45a8ff 1599 */
bogdanm 0:9b334a45a8ff 1600
bogdanm 0:9b334a45a8ff 1601 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 0:9b334a45a8ff 1602