en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_ll_usb.c@83:a036322b8637, 2016-03-07 (annotated)

Committer:
mbed_official
Date:
Mon Mar 07 10:00:14 2016 +0000
Revision:
83:a036322b8637
Parent:
0:9b334a45a8ff 
Synchronized with git revision ee20d03969aa5c570152f88e8f3d8a4739eed40b



Full URL: https://github.com/mbedmicro/mbed/commit/ee20d03969aa5c570152f88e8f3d8a4739eed40b/



[STM32F7] Update STM32F7Cube_FW version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_ll_usb.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 83:a036322b8637 5 * @version V1.0.4
mbed_official 83:a036322b8637 6 * @date 09-December-2015
bogdanm 0:9b334a45a8ff 7 * @brief USB Low Layer HAL module driver.
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 10 * functionalities of the USB Peripheral Controller:
bogdanm 0:9b334a45a8ff 11 * + Initialization/de-initialization functions
bogdanm 0:9b334a45a8ff 12 * + I/O operation functions
bogdanm 0:9b334a45a8ff 13 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 14 * + Peripheral State functions
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 @verbatim
bogdanm 0:9b334a45a8ff 17 ==============================================================================
bogdanm 0:9b334a45a8ff 18 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 19 ==============================================================================
bogdanm 0:9b334a45a8ff 20 [..]
bogdanm 0:9b334a45a8ff 21 (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 (#) Call USB_CoreInit() API to initialize the USB Core peripheral.
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 @endverbatim
bogdanm 0:9b334a45a8ff 28 ******************************************************************************
bogdanm 0:9b334a45a8ff 29 * @attention
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 32 *
bogdanm 0:9b334a45a8ff 33 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 34 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 35 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 36 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 37 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 38 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 39 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 40 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 41 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 42 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 43 *
bogdanm 0:9b334a45a8ff 44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 45 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 47 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 50 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 51 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 54 *
bogdanm 0:9b334a45a8ff 55 ******************************************************************************
bogdanm 0:9b334a45a8ff 56 */
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 #include "stm32f7xx_hal.h"
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 /** @addtogroup STM32F7xx_LL_USB_DRIVER
bogdanm 0:9b334a45a8ff 62 * @{
bogdanm 0:9b334a45a8ff 63 */
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 #if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED)
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 68 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 69 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 70 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 71 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 72 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 73 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
bogdanm 0:9b334a45a8ff 74
mbed_official 83:a036322b8637 75 /* Exported functions --------------------------------------------------------*/
mbed_official 83:a036322b8637 76 /** @defgroup LL_USB_Exported_Functions USB Low Layer Exported Functions
bogdanm 0:9b334a45a8ff 77 * @{
bogdanm 0:9b334a45a8ff 78 */
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 /** @defgroup LL_USB_Group1 Initialization/de-initialization functions
bogdanm 0:9b334a45a8ff 81 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 82 *
bogdanm 0:9b334a45a8ff 83 @verbatim
bogdanm 0:9b334a45a8ff 84 ===============================================================================
bogdanm 0:9b334a45a8ff 85 ##### Initialization/de-initialization functions #####
bogdanm 0:9b334a45a8ff 86 ===============================================================================
bogdanm 0:9b334a45a8ff 87 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 @endverbatim
bogdanm 0:9b334a45a8ff 90 * @{
bogdanm 0:9b334a45a8ff 91 */
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 /**
bogdanm 0:9b334a45a8ff 94 * @brief Initializes the USB Core
bogdanm 0:9b334a45a8ff 95 * @param USBx: USB Instance
bogdanm 0:9b334a45a8ff 96 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm 0:9b334a45a8ff 97 * the configuration information for the specified USBx peripheral.
bogdanm 0:9b334a45a8ff 98 * @retval HAL status
bogdanm 0:9b334a45a8ff 99 */
bogdanm 0:9b334a45a8ff 100 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm 0:9b334a45a8ff 101 {
bogdanm 0:9b334a45a8ff 102 if (cfg.phy_itface == USB_OTG_ULPI_PHY)
bogdanm 0:9b334a45a8ff 103 {
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 /* Init The ULPI Interface */
bogdanm 0:9b334a45a8ff 108 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL);
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 /* Select vbus source */
bogdanm 0:9b334a45a8ff 111 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI);
bogdanm 0:9b334a45a8ff 112 if(cfg.use_external_vbus == 1)
bogdanm 0:9b334a45a8ff 113 {
bogdanm 0:9b334a45a8ff 114 USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD;
bogdanm 0:9b334a45a8ff 115 }
bogdanm 0:9b334a45a8ff 116 /* Reset after a PHY select */
bogdanm 0:9b334a45a8ff 117 USB_CoreReset(USBx);
bogdanm 0:9b334a45a8ff 118 }
bogdanm 0:9b334a45a8ff 119 else /* FS interface (embedded Phy) */
bogdanm 0:9b334a45a8ff 120 {
bogdanm 0:9b334a45a8ff 121 /* Select FS Embedded PHY */
bogdanm 0:9b334a45a8ff 122 USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /* Reset after a PHY select and set Host mode */
bogdanm 0:9b334a45a8ff 125 USB_CoreReset(USBx);
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /* Deactivate the power down*/
bogdanm 0:9b334a45a8ff 128 USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
bogdanm 0:9b334a45a8ff 129 }
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 if(cfg.dma_enable == ENABLE)
bogdanm 0:9b334a45a8ff 132 {
bogdanm 0:9b334a45a8ff 133 USBx->GAHBCFG |= (USB_OTG_GAHBCFG_HBSTLEN_1 | USB_OTG_GAHBCFG_HBSTLEN_2);
bogdanm 0:9b334a45a8ff 134 USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN;
bogdanm 0:9b334a45a8ff 135 }
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 return HAL_OK;
bogdanm 0:9b334a45a8ff 138 }
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 /**
bogdanm 0:9b334a45a8ff 141 * @brief USB_EnableGlobalInt
bogdanm 0:9b334a45a8ff 142 * Enables the controller's Global Int in the AHB Config reg
bogdanm 0:9b334a45a8ff 143 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 144 * @retval HAL status
bogdanm 0:9b334a45a8ff 145 */
bogdanm 0:9b334a45a8ff 146 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 147 {
bogdanm 0:9b334a45a8ff 148 USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
bogdanm 0:9b334a45a8ff 149 return HAL_OK;
bogdanm 0:9b334a45a8ff 150 }
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 /**
bogdanm 0:9b334a45a8ff 154 * @brief USB_DisableGlobalInt
bogdanm 0:9b334a45a8ff 155 * Disable the controller's Global Int in the AHB Config reg
bogdanm 0:9b334a45a8ff 156 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 157 * @retval HAL status
bogdanm 0:9b334a45a8ff 158 */
bogdanm 0:9b334a45a8ff 159 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 160 {
bogdanm 0:9b334a45a8ff 161 USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
bogdanm 0:9b334a45a8ff 162 return HAL_OK;
bogdanm 0:9b334a45a8ff 163 }
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /**
bogdanm 0:9b334a45a8ff 166 * @brief USB_SetCurrentMode : Set functional mode
bogdanm 0:9b334a45a8ff 167 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 168 * @param mode : current core mode
mbed_official 83:a036322b8637 169 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 170 * @arg USB_OTG_DEVICE_MODE: Peripheral mode
bogdanm 0:9b334a45a8ff 171 * @arg USB_OTG_HOST_MODE: Host mode
bogdanm 0:9b334a45a8ff 172 * @arg USB_OTG_DRD_MODE: Dual Role Device mode
bogdanm 0:9b334a45a8ff 173 * @retval HAL status
bogdanm 0:9b334a45a8ff 174 */
bogdanm 0:9b334a45a8ff 175 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode)
bogdanm 0:9b334a45a8ff 176 {
bogdanm 0:9b334a45a8ff 177 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 if ( mode == USB_OTG_HOST_MODE)
bogdanm 0:9b334a45a8ff 180 {
bogdanm 0:9b334a45a8ff 181 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
bogdanm 0:9b334a45a8ff 182 }
bogdanm 0:9b334a45a8ff 183 else if ( mode == USB_OTG_DEVICE_MODE)
bogdanm 0:9b334a45a8ff 184 {
bogdanm 0:9b334a45a8ff 185 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
bogdanm 0:9b334a45a8ff 186 }
bogdanm 0:9b334a45a8ff 187 HAL_Delay(50);
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 return HAL_OK;
bogdanm 0:9b334a45a8ff 190 }
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 /**
bogdanm 0:9b334a45a8ff 193 * @brief USB_DevInit : Initializes the USB_OTG controller registers
bogdanm 0:9b334a45a8ff 194 * for device mode
bogdanm 0:9b334a45a8ff 195 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 196 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm 0:9b334a45a8ff 197 * the configuration information for the specified USBx peripheral.
bogdanm 0:9b334a45a8ff 198 * @retval HAL status
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200 HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm 0:9b334a45a8ff 201 {
bogdanm 0:9b334a45a8ff 202 uint32_t i = 0;
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 /*Activate VBUS Sensing B */
bogdanm 0:9b334a45a8ff 205 USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 if (cfg.vbus_sensing_enable == 0)
bogdanm 0:9b334a45a8ff 208 {
mbed_official 83:a036322b8637 209 /* Deactivate VBUS Sensing B */
bogdanm 0:9b334a45a8ff 210 USBx->GCCFG &= ~ USB_OTG_GCCFG_VBDEN;
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 /* B-peripheral session valid override enable*/
bogdanm 0:9b334a45a8ff 213 USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
bogdanm 0:9b334a45a8ff 214 USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
bogdanm 0:9b334a45a8ff 215 }
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 /* Restart the Phy Clock */
bogdanm 0:9b334a45a8ff 218 USBx_PCGCCTL = 0;
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 /* Device mode configuration */
bogdanm 0:9b334a45a8ff 221 USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80;
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 if(cfg.phy_itface == USB_OTG_ULPI_PHY)
bogdanm 0:9b334a45a8ff 224 {
bogdanm 0:9b334a45a8ff 225 if(cfg.speed == USB_OTG_SPEED_HIGH)
bogdanm 0:9b334a45a8ff 226 {
bogdanm 0:9b334a45a8ff 227 /* Set High speed phy */
bogdanm 0:9b334a45a8ff 228 USB_SetDevSpeed (USBx , USB_OTG_SPEED_HIGH);
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230 else
bogdanm 0:9b334a45a8ff 231 {
bogdanm 0:9b334a45a8ff 232 /* set High speed phy in Full speed mode */
bogdanm 0:9b334a45a8ff 233 USB_SetDevSpeed (USBx , USB_OTG_SPEED_HIGH_IN_FULL);
bogdanm 0:9b334a45a8ff 234 }
bogdanm 0:9b334a45a8ff 235 }
bogdanm 0:9b334a45a8ff 236 else
bogdanm 0:9b334a45a8ff 237 {
bogdanm 0:9b334a45a8ff 238 /* Set Full speed phy */
bogdanm 0:9b334a45a8ff 239 USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL);
bogdanm 0:9b334a45a8ff 240 }
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 /* Flush the FIFOs */
bogdanm 0:9b334a45a8ff 243 USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */
bogdanm 0:9b334a45a8ff 244 USB_FlushRxFifo(USBx);
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 /* Clear all pending Device Interrupts */
bogdanm 0:9b334a45a8ff 247 USBx_DEVICE->DIEPMSK = 0;
bogdanm 0:9b334a45a8ff 248 USBx_DEVICE->DOEPMSK = 0;
bogdanm 0:9b334a45a8ff 249 USBx_DEVICE->DAINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 250 USBx_DEVICE->DAINTMSK = 0;
bogdanm 0:9b334a45a8ff 251
bogdanm 0:9b334a45a8ff 252 for (i = 0; i < cfg.dev_endpoints; i++)
bogdanm 0:9b334a45a8ff 253 {
bogdanm 0:9b334a45a8ff 254 if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
bogdanm 0:9b334a45a8ff 255 {
bogdanm 0:9b334a45a8ff 256 USBx_INEP(i)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK);
bogdanm 0:9b334a45a8ff 257 }
bogdanm 0:9b334a45a8ff 258 else
bogdanm 0:9b334a45a8ff 259 {
bogdanm 0:9b334a45a8ff 260 USBx_INEP(i)->DIEPCTL = 0;
bogdanm 0:9b334a45a8ff 261 }
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 USBx_INEP(i)->DIEPTSIZ = 0;
bogdanm 0:9b334a45a8ff 264 USBx_INEP(i)->DIEPINT = 0xFF;
bogdanm 0:9b334a45a8ff 265 }
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 for (i = 0; i < cfg.dev_endpoints; i++)
bogdanm 0:9b334a45a8ff 268 {
bogdanm 0:9b334a45a8ff 269 if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
bogdanm 0:9b334a45a8ff 270 {
bogdanm 0:9b334a45a8ff 271 USBx_OUTEP(i)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK);
bogdanm 0:9b334a45a8ff 272 }
bogdanm 0:9b334a45a8ff 273 else
bogdanm 0:9b334a45a8ff 274 {
bogdanm 0:9b334a45a8ff 275 USBx_OUTEP(i)->DOEPCTL = 0;
bogdanm 0:9b334a45a8ff 276 }
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 USBx_OUTEP(i)->DOEPTSIZ = 0;
bogdanm 0:9b334a45a8ff 279 USBx_OUTEP(i)->DOEPINT = 0xFF;
bogdanm 0:9b334a45a8ff 280 }
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 if (cfg.dma_enable == 1)
bogdanm 0:9b334a45a8ff 285 {
bogdanm 0:9b334a45a8ff 286 /*Set threshold parameters */
bogdanm 0:9b334a45a8ff 287 USBx_DEVICE->DTHRCTL = (USB_OTG_DTHRCTL_TXTHRLEN_6 | USB_OTG_DTHRCTL_RXTHRLEN_6);
bogdanm 0:9b334a45a8ff 288 USBx_DEVICE->DTHRCTL |= (USB_OTG_DTHRCTL_RXTHREN | USB_OTG_DTHRCTL_ISOTHREN | USB_OTG_DTHRCTL_NONISOTHREN);
bogdanm 0:9b334a45a8ff 289
bogdanm 0:9b334a45a8ff 290 i= USBx_DEVICE->DTHRCTL;
bogdanm 0:9b334a45a8ff 291 }
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 /* Disable all interrupts. */
bogdanm 0:9b334a45a8ff 294 USBx->GINTMSK = 0;
bogdanm 0:9b334a45a8ff 295
bogdanm 0:9b334a45a8ff 296 /* Clear any pending interrupts */
bogdanm 0:9b334a45a8ff 297 USBx->GINTSTS = 0xBFFFFFFF;
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /* Enable the common interrupts */
bogdanm 0:9b334a45a8ff 300 if (cfg.dma_enable == DISABLE)
bogdanm 0:9b334a45a8ff 301 {
bogdanm 0:9b334a45a8ff 302 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
bogdanm 0:9b334a45a8ff 303 }
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 /* Enable interrupts matching to the Device mode ONLY */
bogdanm 0:9b334a45a8ff 306 USBx->GINTMSK |= (USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |\
bogdanm 0:9b334a45a8ff 307 USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |\
bogdanm 0:9b334a45a8ff 308 USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM|\
bogdanm 0:9b334a45a8ff 309 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 if(cfg.Sof_enable)
bogdanm 0:9b334a45a8ff 312 {
bogdanm 0:9b334a45a8ff 313 USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM;
bogdanm 0:9b334a45a8ff 314 }
bogdanm 0:9b334a45a8ff 315
bogdanm 0:9b334a45a8ff 316 if (cfg.vbus_sensing_enable == ENABLE)
bogdanm 0:9b334a45a8ff 317 {
bogdanm 0:9b334a45a8ff 318 USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT);
bogdanm 0:9b334a45a8ff 319 }
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 return HAL_OK;
bogdanm 0:9b334a45a8ff 322 }
bogdanm 0:9b334a45a8ff 323
bogdanm 0:9b334a45a8ff 324
bogdanm 0:9b334a45a8ff 325 /**
bogdanm 0:9b334a45a8ff 326 * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
bogdanm 0:9b334a45a8ff 327 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 328 * @param num : FIFO number
bogdanm 0:9b334a45a8ff 329 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 330 15 means Flush all Tx FIFOs
bogdanm 0:9b334a45a8ff 331 * @retval HAL status
bogdanm 0:9b334a45a8ff 332 */
bogdanm 0:9b334a45a8ff 333 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num )
bogdanm 0:9b334a45a8ff 334 {
bogdanm 0:9b334a45a8ff 335 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 6));
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 do
bogdanm 0:9b334a45a8ff 340 {
bogdanm 0:9b334a45a8ff 341 if (++count > 200000)
bogdanm 0:9b334a45a8ff 342 {
bogdanm 0:9b334a45a8ff 343 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 344 }
bogdanm 0:9b334a45a8ff 345 }
bogdanm 0:9b334a45a8ff 346 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 return HAL_OK;
bogdanm 0:9b334a45a8ff 349 }
bogdanm 0:9b334a45a8ff 350
bogdanm 0:9b334a45a8ff 351
bogdanm 0:9b334a45a8ff 352 /**
bogdanm 0:9b334a45a8ff 353 * @brief USB_FlushRxFifo : Flush Rx FIFO
bogdanm 0:9b334a45a8ff 354 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 355 * @retval HAL status
bogdanm 0:9b334a45a8ff 356 */
bogdanm 0:9b334a45a8ff 357 HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 358 {
bogdanm 0:9b334a45a8ff 359 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 360
bogdanm 0:9b334a45a8ff 361 USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 do
bogdanm 0:9b334a45a8ff 364 {
bogdanm 0:9b334a45a8ff 365 if (++count > 200000)
bogdanm 0:9b334a45a8ff 366 {
bogdanm 0:9b334a45a8ff 367 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 368 }
bogdanm 0:9b334a45a8ff 369 }
bogdanm 0:9b334a45a8ff 370 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 return HAL_OK;
bogdanm 0:9b334a45a8ff 373 }
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /**
bogdanm 0:9b334a45a8ff 376 * @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register
bogdanm 0:9b334a45a8ff 377 * depending the PHY type and the enumeration speed of the device.
bogdanm 0:9b334a45a8ff 378 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 379 * @param speed : device speed
mbed_official 83:a036322b8637 380 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 381 * @arg USB_OTG_SPEED_HIGH: High speed mode
bogdanm 0:9b334a45a8ff 382 * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode
bogdanm 0:9b334a45a8ff 383 * @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm 0:9b334a45a8ff 384 * @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm 0:9b334a45a8ff 385 * @retval Hal status
bogdanm 0:9b334a45a8ff 386 */
bogdanm 0:9b334a45a8ff 387 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
bogdanm 0:9b334a45a8ff 388 {
bogdanm 0:9b334a45a8ff 389 USBx_DEVICE->DCFG |= speed;
bogdanm 0:9b334a45a8ff 390 return HAL_OK;
bogdanm 0:9b334a45a8ff 391 }
bogdanm 0:9b334a45a8ff 392
bogdanm 0:9b334a45a8ff 393 /**
bogdanm 0:9b334a45a8ff 394 * @brief USB_GetDevSpeed :Return the Dev Speed
bogdanm 0:9b334a45a8ff 395 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 396 * @retval speed : device speed
mbed_official 83:a036322b8637 397 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 398 * @arg USB_OTG_SPEED_HIGH: High speed mode
bogdanm 0:9b334a45a8ff 399 * @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm 0:9b334a45a8ff 400 * @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm 0:9b334a45a8ff 401 */
bogdanm 0:9b334a45a8ff 402 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 403 {
bogdanm 0:9b334a45a8ff 404 uint8_t speed = 0;
bogdanm 0:9b334a45a8ff 405
bogdanm 0:9b334a45a8ff 406 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ)
bogdanm 0:9b334a45a8ff 407 {
bogdanm 0:9b334a45a8ff 408 speed = USB_OTG_SPEED_HIGH;
bogdanm 0:9b334a45a8ff 409 }
bogdanm 0:9b334a45a8ff 410 else if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)||
bogdanm 0:9b334a45a8ff 411 ((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ))
bogdanm 0:9b334a45a8ff 412 {
bogdanm 0:9b334a45a8ff 413 speed = USB_OTG_SPEED_FULL;
bogdanm 0:9b334a45a8ff 414 }
bogdanm 0:9b334a45a8ff 415 else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
bogdanm 0:9b334a45a8ff 416 {
bogdanm 0:9b334a45a8ff 417 speed = USB_OTG_SPEED_LOW;
bogdanm 0:9b334a45a8ff 418 }
bogdanm 0:9b334a45a8ff 419
bogdanm 0:9b334a45a8ff 420 return speed;
bogdanm 0:9b334a45a8ff 421 }
bogdanm 0:9b334a45a8ff 422
bogdanm 0:9b334a45a8ff 423 /**
bogdanm 0:9b334a45a8ff 424 * @brief Activate and configure an endpoint
bogdanm 0:9b334a45a8ff 425 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 426 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 427 * @retval HAL status
bogdanm 0:9b334a45a8ff 428 */
bogdanm 0:9b334a45a8ff 429 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 430 {
bogdanm 0:9b334a45a8ff 431 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 432 {
bogdanm 0:9b334a45a8ff 433 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
bogdanm 0:9b334a45a8ff 434
bogdanm 0:9b334a45a8ff 435 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
bogdanm 0:9b334a45a8ff 436 {
bogdanm 0:9b334a45a8ff 437 USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 438 ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 439 }
bogdanm 0:9b334a45a8ff 440
bogdanm 0:9b334a45a8ff 441 }
bogdanm 0:9b334a45a8ff 442 else
bogdanm 0:9b334a45a8ff 443 {
bogdanm 0:9b334a45a8ff 444 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
bogdanm 0:9b334a45a8ff 447 {
bogdanm 0:9b334a45a8ff 448 USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 449 (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 450 }
bogdanm 0:9b334a45a8ff 451 }
bogdanm 0:9b334a45a8ff 452 return HAL_OK;
bogdanm 0:9b334a45a8ff 453 }
bogdanm 0:9b334a45a8ff 454 /**
bogdanm 0:9b334a45a8ff 455 * @brief Activate and configure a dedicated endpoint
bogdanm 0:9b334a45a8ff 456 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 457 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 458 * @retval HAL status
bogdanm 0:9b334a45a8ff 459 */
bogdanm 0:9b334a45a8ff 460 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 461 {
bogdanm 0:9b334a45a8ff 462 static __IO uint32_t debug = 0;
bogdanm 0:9b334a45a8ff 463
bogdanm 0:9b334a45a8ff 464 /* Read DEPCTLn register */
bogdanm 0:9b334a45a8ff 465 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 466 {
bogdanm 0:9b334a45a8ff 467 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
bogdanm 0:9b334a45a8ff 468 {
bogdanm 0:9b334a45a8ff 469 USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 470 ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 471 }
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 debug |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 475 ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
bogdanm 0:9b334a45a8ff 478 }
bogdanm 0:9b334a45a8ff 479 else
bogdanm 0:9b334a45a8ff 480 {
bogdanm 0:9b334a45a8ff 481 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
bogdanm 0:9b334a45a8ff 482 {
bogdanm 0:9b334a45a8ff 483 USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 484 ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 485
bogdanm 0:9b334a45a8ff 486 debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0)*USB_OTG_EP_REG_SIZE);
bogdanm 0:9b334a45a8ff 487 debug = (uint32_t )&USBx_OUTEP(ep->num)->DOEPCTL;
bogdanm 0:9b334a45a8ff 488 debug |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 489 ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 490 }
bogdanm 0:9b334a45a8ff 491
bogdanm 0:9b334a45a8ff 492 USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
bogdanm 0:9b334a45a8ff 493 }
bogdanm 0:9b334a45a8ff 494
bogdanm 0:9b334a45a8ff 495 return HAL_OK;
bogdanm 0:9b334a45a8ff 496 }
bogdanm 0:9b334a45a8ff 497 /**
bogdanm 0:9b334a45a8ff 498 * @brief De-activate and de-initialize an endpoint
bogdanm 0:9b334a45a8ff 499 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 500 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 501 * @retval HAL status
bogdanm 0:9b334a45a8ff 502 */
bogdanm 0:9b334a45a8ff 503 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 504 {
bogdanm 0:9b334a45a8ff 505 /* Read DEPCTLn register */
bogdanm 0:9b334a45a8ff 506 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 507 {
bogdanm 0:9b334a45a8ff 508 USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
bogdanm 0:9b334a45a8ff 509 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
bogdanm 0:9b334a45a8ff 510 USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
bogdanm 0:9b334a45a8ff 511 }
bogdanm 0:9b334a45a8ff 512 else
bogdanm 0:9b334a45a8ff 513 {
bogdanm 0:9b334a45a8ff 514 USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
bogdanm 0:9b334a45a8ff 515 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
bogdanm 0:9b334a45a8ff 516 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
bogdanm 0:9b334a45a8ff 517 }
bogdanm 0:9b334a45a8ff 518 return HAL_OK;
bogdanm 0:9b334a45a8ff 519 }
bogdanm 0:9b334a45a8ff 520
bogdanm 0:9b334a45a8ff 521 /**
bogdanm 0:9b334a45a8ff 522 * @brief De-activate and de-initialize a dedicated endpoint
bogdanm 0:9b334a45a8ff 523 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 524 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 525 * @retval HAL status
bogdanm 0:9b334a45a8ff 526 */
bogdanm 0:9b334a45a8ff 527 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 528 {
bogdanm 0:9b334a45a8ff 529 /* Read DEPCTLn register */
bogdanm 0:9b334a45a8ff 530 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 531 {
bogdanm 0:9b334a45a8ff 532 USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
bogdanm 0:9b334a45a8ff 533 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
bogdanm 0:9b334a45a8ff 534 }
bogdanm 0:9b334a45a8ff 535 else
bogdanm 0:9b334a45a8ff 536 {
bogdanm 0:9b334a45a8ff 537 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
bogdanm 0:9b334a45a8ff 538 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
bogdanm 0:9b334a45a8ff 539 }
bogdanm 0:9b334a45a8ff 540 return HAL_OK;
bogdanm 0:9b334a45a8ff 541 }
bogdanm 0:9b334a45a8ff 542
bogdanm 0:9b334a45a8ff 543 /**
bogdanm 0:9b334a45a8ff 544 * @brief USB_EPStartXfer : setup and starts a transfer over an EP
bogdanm 0:9b334a45a8ff 545 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 546 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 547 * @param dma: USB dma enabled or disabled
mbed_official 83:a036322b8637 548 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 549 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 550 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 551 * @retval HAL status
bogdanm 0:9b334a45a8ff 552 */
bogdanm 0:9b334a45a8ff 553 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
bogdanm 0:9b334a45a8ff 554 {
bogdanm 0:9b334a45a8ff 555 uint16_t pktcnt = 0;
bogdanm 0:9b334a45a8ff 556
bogdanm 0:9b334a45a8ff 557 /* IN endpoint */
bogdanm 0:9b334a45a8ff 558 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 559 {
bogdanm 0:9b334a45a8ff 560 /* Zero Length Packet? */
bogdanm 0:9b334a45a8ff 561 if (ep->xfer_len == 0)
bogdanm 0:9b334a45a8ff 562 {
bogdanm 0:9b334a45a8ff 563 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 564 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 565 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 566 }
bogdanm 0:9b334a45a8ff 567 else
bogdanm 0:9b334a45a8ff 568 {
bogdanm 0:9b334a45a8ff 569 /* Program the transfer size and packet count
bogdanm 0:9b334a45a8ff 570 * as follows: xfersize = N * maxpacket +
bogdanm 0:9b334a45a8ff 571 * short_packet pktcnt = N + (short_packet
bogdanm 0:9b334a45a8ff 572 * exist ? 1 : 0)
bogdanm 0:9b334a45a8ff 573 */
bogdanm 0:9b334a45a8ff 574 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 575 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 576 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ;
bogdanm 0:9b334a45a8ff 577 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
bogdanm 0:9b334a45a8ff 578
bogdanm 0:9b334a45a8ff 579 if (ep->type == EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 580 {
bogdanm 0:9b334a45a8ff 581 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
bogdanm 0:9b334a45a8ff 582 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29));
bogdanm 0:9b334a45a8ff 583 }
bogdanm 0:9b334a45a8ff 584 }
bogdanm 0:9b334a45a8ff 585
bogdanm 0:9b334a45a8ff 586 if (dma == 1)
bogdanm 0:9b334a45a8ff 587 {
bogdanm 0:9b334a45a8ff 588 USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
bogdanm 0:9b334a45a8ff 589 }
bogdanm 0:9b334a45a8ff 590 else
bogdanm 0:9b334a45a8ff 591 {
bogdanm 0:9b334a45a8ff 592 if (ep->type != EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 593 {
bogdanm 0:9b334a45a8ff 594 /* Enable the Tx FIFO Empty Interrupt for this EP */
bogdanm 0:9b334a45a8ff 595 if (ep->xfer_len > 0)
bogdanm 0:9b334a45a8ff 596 {
bogdanm 0:9b334a45a8ff 597 USBx_DEVICE->DIEPEMPMSK |= 1 << ep->num;
bogdanm 0:9b334a45a8ff 598 }
bogdanm 0:9b334a45a8ff 599 }
bogdanm 0:9b334a45a8ff 600 }
bogdanm 0:9b334a45a8ff 601
bogdanm 0:9b334a45a8ff 602 if (ep->type == EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 603 {
bogdanm 0:9b334a45a8ff 604 if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
bogdanm 0:9b334a45a8ff 605 {
bogdanm 0:9b334a45a8ff 606 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
bogdanm 0:9b334a45a8ff 607 }
bogdanm 0:9b334a45a8ff 608 else
bogdanm 0:9b334a45a8ff 609 {
bogdanm 0:9b334a45a8ff 610 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
bogdanm 0:9b334a45a8ff 611 }
bogdanm 0:9b334a45a8ff 612 }
bogdanm 0:9b334a45a8ff 613
bogdanm 0:9b334a45a8ff 614 /* EP enable, IN data in FIFO */
bogdanm 0:9b334a45a8ff 615 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
bogdanm 0:9b334a45a8ff 616
bogdanm 0:9b334a45a8ff 617 if (ep->type == EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 618 {
bogdanm 0:9b334a45a8ff 619 USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len, dma);
bogdanm 0:9b334a45a8ff 620 }
bogdanm 0:9b334a45a8ff 621 }
bogdanm 0:9b334a45a8ff 622 else /* OUT endpoint */
bogdanm 0:9b334a45a8ff 623 {
bogdanm 0:9b334a45a8ff 624 /* Program the transfer size and packet count as follows:
bogdanm 0:9b334a45a8ff 625 * pktcnt = N
bogdanm 0:9b334a45a8ff 626 * xfersize = N * maxpacket
bogdanm 0:9b334a45a8ff 627 */
bogdanm 0:9b334a45a8ff 628 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 629 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 630
bogdanm 0:9b334a45a8ff 631 if (ep->xfer_len == 0)
bogdanm 0:9b334a45a8ff 632 {
bogdanm 0:9b334a45a8ff 633 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
bogdanm 0:9b334a45a8ff 634 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 635 }
bogdanm 0:9b334a45a8ff 636 else
bogdanm 0:9b334a45a8ff 637 {
bogdanm 0:9b334a45a8ff 638 pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket;
bogdanm 0:9b334a45a8ff 639 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19));
bogdanm 0:9b334a45a8ff 640 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt));
bogdanm 0:9b334a45a8ff 641 }
bogdanm 0:9b334a45a8ff 642
bogdanm 0:9b334a45a8ff 643 if (dma == 1)
bogdanm 0:9b334a45a8ff 644 {
bogdanm 0:9b334a45a8ff 645 USBx_OUTEP(ep->num)->DOEPDMA = (uint32_t)ep->xfer_buff;
bogdanm 0:9b334a45a8ff 646 }
bogdanm 0:9b334a45a8ff 647
bogdanm 0:9b334a45a8ff 648 if (ep->type == EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 649 {
bogdanm 0:9b334a45a8ff 650 if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
bogdanm 0:9b334a45a8ff 651 {
bogdanm 0:9b334a45a8ff 652 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM;
bogdanm 0:9b334a45a8ff 653 }
bogdanm 0:9b334a45a8ff 654 else
bogdanm 0:9b334a45a8ff 655 {
bogdanm 0:9b334a45a8ff 656 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
bogdanm 0:9b334a45a8ff 657 }
bogdanm 0:9b334a45a8ff 658 }
bogdanm 0:9b334a45a8ff 659 /* EP enable */
bogdanm 0:9b334a45a8ff 660 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
bogdanm 0:9b334a45a8ff 661 }
bogdanm 0:9b334a45a8ff 662 return HAL_OK;
bogdanm 0:9b334a45a8ff 663 }
bogdanm 0:9b334a45a8ff 664
bogdanm 0:9b334a45a8ff 665 /**
bogdanm 0:9b334a45a8ff 666 * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
bogdanm 0:9b334a45a8ff 667 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 668 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 669 * @param dma: USB dma enabled or disabled
mbed_official 83:a036322b8637 670 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 671 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 672 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 673 * @retval HAL status
bogdanm 0:9b334a45a8ff 674 */
bogdanm 0:9b334a45a8ff 675 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
bogdanm 0:9b334a45a8ff 676 {
bogdanm 0:9b334a45a8ff 677 /* IN endpoint */
bogdanm 0:9b334a45a8ff 678 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 679 {
bogdanm 0:9b334a45a8ff 680 /* Zero Length Packet? */
bogdanm 0:9b334a45a8ff 681 if (ep->xfer_len == 0)
bogdanm 0:9b334a45a8ff 682 {
bogdanm 0:9b334a45a8ff 683 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 684 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 685 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 686 }
bogdanm 0:9b334a45a8ff 687 else
bogdanm 0:9b334a45a8ff 688 {
bogdanm 0:9b334a45a8ff 689 /* Program the transfer size and packet count
bogdanm 0:9b334a45a8ff 690 * as follows: xfersize = N * maxpacket +
bogdanm 0:9b334a45a8ff 691 * short_packet pktcnt = N + (short_packet
bogdanm 0:9b334a45a8ff 692 * exist ? 1 : 0)
bogdanm 0:9b334a45a8ff 693 */
bogdanm 0:9b334a45a8ff 694 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 695 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 696
bogdanm 0:9b334a45a8ff 697 if(ep->xfer_len > ep->maxpacket)
bogdanm 0:9b334a45a8ff 698 {
bogdanm 0:9b334a45a8ff 699 ep->xfer_len = ep->maxpacket;
bogdanm 0:9b334a45a8ff 700 }
bogdanm 0:9b334a45a8ff 701 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 702 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
bogdanm 0:9b334a45a8ff 703
bogdanm 0:9b334a45a8ff 704 }
bogdanm 0:9b334a45a8ff 705
bogdanm 0:9b334a45a8ff 706 if (dma == 1)
bogdanm 0:9b334a45a8ff 707 {
bogdanm 0:9b334a45a8ff 708 USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
bogdanm 0:9b334a45a8ff 709 }
bogdanm 0:9b334a45a8ff 710 else
bogdanm 0:9b334a45a8ff 711 {
bogdanm 0:9b334a45a8ff 712 /* Enable the Tx FIFO Empty Interrupt for this EP */
bogdanm 0:9b334a45a8ff 713 if (ep->xfer_len > 0)
bogdanm 0:9b334a45a8ff 714 {
bogdanm 0:9b334a45a8ff 715 USBx_DEVICE->DIEPEMPMSK |= 1 << (ep->num);
bogdanm 0:9b334a45a8ff 716 }
bogdanm 0:9b334a45a8ff 717 }
bogdanm 0:9b334a45a8ff 718
bogdanm 0:9b334a45a8ff 719 /* EP enable, IN data in FIFO */
bogdanm 0:9b334a45a8ff 720 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
bogdanm 0:9b334a45a8ff 721 }
bogdanm 0:9b334a45a8ff 722 else /* OUT endpoint */
bogdanm 0:9b334a45a8ff 723 {
bogdanm 0:9b334a45a8ff 724 /* Program the transfer size and packet count as follows:
bogdanm 0:9b334a45a8ff 725 * pktcnt = N
bogdanm 0:9b334a45a8ff 726 * xfersize = N * maxpacket
bogdanm 0:9b334a45a8ff 727 */
bogdanm 0:9b334a45a8ff 728 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 729 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 730
bogdanm 0:9b334a45a8ff 731 if (ep->xfer_len > 0)
bogdanm 0:9b334a45a8ff 732 {
bogdanm 0:9b334a45a8ff 733 ep->xfer_len = ep->maxpacket;
bogdanm 0:9b334a45a8ff 734 }
bogdanm 0:9b334a45a8ff 735
bogdanm 0:9b334a45a8ff 736 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
bogdanm 0:9b334a45a8ff 737 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket));
bogdanm 0:9b334a45a8ff 738
bogdanm 0:9b334a45a8ff 739
bogdanm 0:9b334a45a8ff 740 if (dma == 1)
bogdanm 0:9b334a45a8ff 741 {
bogdanm 0:9b334a45a8ff 742 USBx_OUTEP(ep->num)->DOEPDMA = (uint32_t)(ep->xfer_buff);
bogdanm 0:9b334a45a8ff 743 }
bogdanm 0:9b334a45a8ff 744
bogdanm 0:9b334a45a8ff 745 /* EP enable */
bogdanm 0:9b334a45a8ff 746 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
bogdanm 0:9b334a45a8ff 747 }
bogdanm 0:9b334a45a8ff 748 return HAL_OK;
bogdanm 0:9b334a45a8ff 749 }
bogdanm 0:9b334a45a8ff 750
bogdanm 0:9b334a45a8ff 751 /**
bogdanm 0:9b334a45a8ff 752 * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
bogdanm 0:9b334a45a8ff 753 * with the EP/channel
bogdanm 0:9b334a45a8ff 754 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 755 * @param src : pointer to source buffer
bogdanm 0:9b334a45a8ff 756 * @param ch_ep_num : endpoint or host channel number
bogdanm 0:9b334a45a8ff 757 * @param len : Number of bytes to write
bogdanm 0:9b334a45a8ff 758 * @param dma: USB dma enabled or disabled
mbed_official 83:a036322b8637 759 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 760 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 761 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 762 * @retval HAL status
bogdanm 0:9b334a45a8ff 763 */
bogdanm 0:9b334a45a8ff 764 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma)
bogdanm 0:9b334a45a8ff 765 {
bogdanm 0:9b334a45a8ff 766 uint32_t count32b= 0 , i= 0;
bogdanm 0:9b334a45a8ff 767
bogdanm 0:9b334a45a8ff 768 if (dma == 0)
bogdanm 0:9b334a45a8ff 769 {
bogdanm 0:9b334a45a8ff 770 count32b = (len + 3) / 4;
bogdanm 0:9b334a45a8ff 771 for (i = 0; i < count32b; i++, src += 4)
bogdanm 0:9b334a45a8ff 772 {
bogdanm 0:9b334a45a8ff 773 USBx_DFIFO(ch_ep_num) = *((__packed uint32_t *)src);
bogdanm 0:9b334a45a8ff 774 }
bogdanm 0:9b334a45a8ff 775 }
bogdanm 0:9b334a45a8ff 776 return HAL_OK;
bogdanm 0:9b334a45a8ff 777 }
bogdanm 0:9b334a45a8ff 778
bogdanm 0:9b334a45a8ff 779 /**
bogdanm 0:9b334a45a8ff 780 * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
bogdanm 0:9b334a45a8ff 781 * with the EP/channel
bogdanm 0:9b334a45a8ff 782 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 783 * @param src : source pointer
bogdanm 0:9b334a45a8ff 784 * @param ch_ep_num : endpoint or host channel number
bogdanm 0:9b334a45a8ff 785 * @param len : Number of bytes to read
bogdanm 0:9b334a45a8ff 786 * @param dma: USB dma enabled or disabled
mbed_official 83:a036322b8637 787 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 788 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 789 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 790 * @retval pointer to destination buffer
bogdanm 0:9b334a45a8ff 791 */
bogdanm 0:9b334a45a8ff 792 void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
bogdanm 0:9b334a45a8ff 793 {
bogdanm 0:9b334a45a8ff 794 uint32_t i=0;
bogdanm 0:9b334a45a8ff 795 uint32_t count32b = (len + 3) / 4;
bogdanm 0:9b334a45a8ff 796
bogdanm 0:9b334a45a8ff 797 for ( i = 0; i < count32b; i++, dest += 4 )
bogdanm 0:9b334a45a8ff 798 {
bogdanm 0:9b334a45a8ff 799 *(__packed uint32_t *)dest = USBx_DFIFO(0);
bogdanm 0:9b334a45a8ff 800
bogdanm 0:9b334a45a8ff 801 }
bogdanm 0:9b334a45a8ff 802 return ((void *)dest);
bogdanm 0:9b334a45a8ff 803 }
bogdanm 0:9b334a45a8ff 804
bogdanm 0:9b334a45a8ff 805 /**
bogdanm 0:9b334a45a8ff 806 * @brief USB_EPSetStall : set a stall condition over an EP
bogdanm 0:9b334a45a8ff 807 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 808 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 809 * @retval HAL status
bogdanm 0:9b334a45a8ff 810 */
bogdanm 0:9b334a45a8ff 811 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 812 {
bogdanm 0:9b334a45a8ff 813 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 814 {
bogdanm 0:9b334a45a8ff 815 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0)
bogdanm 0:9b334a45a8ff 816 {
bogdanm 0:9b334a45a8ff 817 USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
bogdanm 0:9b334a45a8ff 818 }
bogdanm 0:9b334a45a8ff 819 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_STALL;
bogdanm 0:9b334a45a8ff 820 }
bogdanm 0:9b334a45a8ff 821 else
bogdanm 0:9b334a45a8ff 822 {
bogdanm 0:9b334a45a8ff 823 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0)
bogdanm 0:9b334a45a8ff 824 {
bogdanm 0:9b334a45a8ff 825 USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
bogdanm 0:9b334a45a8ff 826 }
bogdanm 0:9b334a45a8ff 827 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_STALL;
bogdanm 0:9b334a45a8ff 828 }
bogdanm 0:9b334a45a8ff 829 return HAL_OK;
bogdanm 0:9b334a45a8ff 830 }
bogdanm 0:9b334a45a8ff 831
bogdanm 0:9b334a45a8ff 832
bogdanm 0:9b334a45a8ff 833 /**
bogdanm 0:9b334a45a8ff 834 * @brief USB_EPClearStall : Clear a stall condition over an EP
bogdanm 0:9b334a45a8ff 835 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 836 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 837 * @retval HAL status
bogdanm 0:9b334a45a8ff 838 */
bogdanm 0:9b334a45a8ff 839 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 840 {
bogdanm 0:9b334a45a8ff 841 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 842 {
bogdanm 0:9b334a45a8ff 843 USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
bogdanm 0:9b334a45a8ff 844 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
bogdanm 0:9b334a45a8ff 845 {
bogdanm 0:9b334a45a8ff 846 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
bogdanm 0:9b334a45a8ff 847 }
bogdanm 0:9b334a45a8ff 848 }
bogdanm 0:9b334a45a8ff 849 else
bogdanm 0:9b334a45a8ff 850 {
bogdanm 0:9b334a45a8ff 851 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
bogdanm 0:9b334a45a8ff 852 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
bogdanm 0:9b334a45a8ff 853 {
bogdanm 0:9b334a45a8ff 854 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
bogdanm 0:9b334a45a8ff 855 }
bogdanm 0:9b334a45a8ff 856 }
bogdanm 0:9b334a45a8ff 857 return HAL_OK;
bogdanm 0:9b334a45a8ff 858 }
bogdanm 0:9b334a45a8ff 859
bogdanm 0:9b334a45a8ff 860 /**
bogdanm 0:9b334a45a8ff 861 * @brief USB_StopDevice : Stop the usb device mode
bogdanm 0:9b334a45a8ff 862 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 863 * @retval HAL status
bogdanm 0:9b334a45a8ff 864 */
bogdanm 0:9b334a45a8ff 865 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 866 {
bogdanm 0:9b334a45a8ff 867 uint32_t i;
bogdanm 0:9b334a45a8ff 868
bogdanm 0:9b334a45a8ff 869 /* Clear Pending interrupt */
bogdanm 0:9b334a45a8ff 870 for (i = 0; i < 15 ; i++)
bogdanm 0:9b334a45a8ff 871 {
bogdanm 0:9b334a45a8ff 872 USBx_INEP(i)->DIEPINT = 0xFF;
bogdanm 0:9b334a45a8ff 873 USBx_OUTEP(i)->DOEPINT = 0xFF;
bogdanm 0:9b334a45a8ff 874 }
bogdanm 0:9b334a45a8ff 875 USBx_DEVICE->DAINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 876
bogdanm 0:9b334a45a8ff 877 /* Clear interrupt masks */
bogdanm 0:9b334a45a8ff 878 USBx_DEVICE->DIEPMSK = 0;
bogdanm 0:9b334a45a8ff 879 USBx_DEVICE->DOEPMSK = 0;
bogdanm 0:9b334a45a8ff 880 USBx_DEVICE->DAINTMSK = 0;
bogdanm 0:9b334a45a8ff 881
bogdanm 0:9b334a45a8ff 882 /* Flush the FIFO */
bogdanm 0:9b334a45a8ff 883 USB_FlushRxFifo(USBx);
bogdanm 0:9b334a45a8ff 884 USB_FlushTxFifo(USBx , 0x10 );
bogdanm 0:9b334a45a8ff 885
bogdanm 0:9b334a45a8ff 886 return HAL_OK;
bogdanm 0:9b334a45a8ff 887 }
bogdanm 0:9b334a45a8ff 888
bogdanm 0:9b334a45a8ff 889 /**
bogdanm 0:9b334a45a8ff 890 * @brief USB_SetDevAddress : Stop the usb device mode
bogdanm 0:9b334a45a8ff 891 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 892 * @param address : new device address to be assigned
bogdanm 0:9b334a45a8ff 893 * This parameter can be a value from 0 to 255
bogdanm 0:9b334a45a8ff 894 * @retval HAL status
bogdanm 0:9b334a45a8ff 895 */
bogdanm 0:9b334a45a8ff 896 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address)
bogdanm 0:9b334a45a8ff 897 {
bogdanm 0:9b334a45a8ff 898 USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD);
bogdanm 0:9b334a45a8ff 899 USBx_DEVICE->DCFG |= (address << 4) & USB_OTG_DCFG_DAD ;
bogdanm 0:9b334a45a8ff 900
bogdanm 0:9b334a45a8ff 901 return HAL_OK;
bogdanm 0:9b334a45a8ff 902 }
bogdanm 0:9b334a45a8ff 903
bogdanm 0:9b334a45a8ff 904 /**
bogdanm 0:9b334a45a8ff 905 * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
bogdanm 0:9b334a45a8ff 906 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 907 * @retval HAL status
bogdanm 0:9b334a45a8ff 908 */
bogdanm 0:9b334a45a8ff 909 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 910 {
bogdanm 0:9b334a45a8ff 911 USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ;
bogdanm 0:9b334a45a8ff 912 HAL_Delay(3);
bogdanm 0:9b334a45a8ff 913
bogdanm 0:9b334a45a8ff 914 return HAL_OK;
bogdanm 0:9b334a45a8ff 915 }
bogdanm 0:9b334a45a8ff 916
bogdanm 0:9b334a45a8ff 917 /**
bogdanm 0:9b334a45a8ff 918 * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
bogdanm 0:9b334a45a8ff 919 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 920 * @retval HAL status
bogdanm 0:9b334a45a8ff 921 */
bogdanm 0:9b334a45a8ff 922 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 923 {
bogdanm 0:9b334a45a8ff 924 USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS ;
bogdanm 0:9b334a45a8ff 925 HAL_Delay(3);
bogdanm 0:9b334a45a8ff 926
bogdanm 0:9b334a45a8ff 927 return HAL_OK;
bogdanm 0:9b334a45a8ff 928 }
bogdanm 0:9b334a45a8ff 929
bogdanm 0:9b334a45a8ff 930 /**
bogdanm 0:9b334a45a8ff 931 * @brief USB_ReadInterrupts: return the global USB interrupt status
bogdanm 0:9b334a45a8ff 932 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 933 * @retval HAL status
bogdanm 0:9b334a45a8ff 934 */
bogdanm 0:9b334a45a8ff 935 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 936 {
bogdanm 0:9b334a45a8ff 937 uint32_t v = 0;
bogdanm 0:9b334a45a8ff 938
bogdanm 0:9b334a45a8ff 939 v = USBx->GINTSTS;
bogdanm 0:9b334a45a8ff 940 v &= USBx->GINTMSK;
bogdanm 0:9b334a45a8ff 941 return v;
bogdanm 0:9b334a45a8ff 942 }
bogdanm 0:9b334a45a8ff 943
bogdanm 0:9b334a45a8ff 944 /**
bogdanm 0:9b334a45a8ff 945 * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
bogdanm 0:9b334a45a8ff 946 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 947 * @retval HAL status
bogdanm 0:9b334a45a8ff 948 */
bogdanm 0:9b334a45a8ff 949 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 950 {
bogdanm 0:9b334a45a8ff 951 uint32_t v;
bogdanm 0:9b334a45a8ff 952 v = USBx_DEVICE->DAINT;
bogdanm 0:9b334a45a8ff 953 v &= USBx_DEVICE->DAINTMSK;
bogdanm 0:9b334a45a8ff 954 return ((v & 0xffff0000) >> 16);
bogdanm 0:9b334a45a8ff 955 }
bogdanm 0:9b334a45a8ff 956
bogdanm 0:9b334a45a8ff 957 /**
bogdanm 0:9b334a45a8ff 958 * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
bogdanm 0:9b334a45a8ff 959 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 960 * @retval HAL status
bogdanm 0:9b334a45a8ff 961 */
bogdanm 0:9b334a45a8ff 962 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 963 {
bogdanm 0:9b334a45a8ff 964 uint32_t v;
bogdanm 0:9b334a45a8ff 965 v = USBx_DEVICE->DAINT;
bogdanm 0:9b334a45a8ff 966 v &= USBx_DEVICE->DAINTMSK;
bogdanm 0:9b334a45a8ff 967 return ((v & 0xFFFF));
bogdanm 0:9b334a45a8ff 968 }
bogdanm 0:9b334a45a8ff 969
bogdanm 0:9b334a45a8ff 970 /**
bogdanm 0:9b334a45a8ff 971 * @brief Returns Device OUT EP Interrupt register
bogdanm 0:9b334a45a8ff 972 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 973 * @param epnum : endpoint number
bogdanm 0:9b334a45a8ff 974 * This parameter can be a value from 0 to 15
bogdanm 0:9b334a45a8ff 975 * @retval Device OUT EP Interrupt register
bogdanm 0:9b334a45a8ff 976 */
bogdanm 0:9b334a45a8ff 977 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
bogdanm 0:9b334a45a8ff 978 {
bogdanm 0:9b334a45a8ff 979 uint32_t v;
bogdanm 0:9b334a45a8ff 980 v = USBx_OUTEP(epnum)->DOEPINT;
bogdanm 0:9b334a45a8ff 981 v &= USBx_DEVICE->DOEPMSK;
bogdanm 0:9b334a45a8ff 982 return v;
bogdanm 0:9b334a45a8ff 983 }
bogdanm 0:9b334a45a8ff 984
bogdanm 0:9b334a45a8ff 985 /**
bogdanm 0:9b334a45a8ff 986 * @brief Returns Device IN EP Interrupt register
bogdanm 0:9b334a45a8ff 987 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 988 * @param epnum : endpoint number
bogdanm 0:9b334a45a8ff 989 * This parameter can be a value from 0 to 15
bogdanm 0:9b334a45a8ff 990 * @retval Device IN EP Interrupt register
bogdanm 0:9b334a45a8ff 991 */
bogdanm 0:9b334a45a8ff 992 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
bogdanm 0:9b334a45a8ff 993 {
bogdanm 0:9b334a45a8ff 994 uint32_t v, msk, emp;
bogdanm 0:9b334a45a8ff 995
bogdanm 0:9b334a45a8ff 996 msk = USBx_DEVICE->DIEPMSK;
bogdanm 0:9b334a45a8ff 997 emp = USBx_DEVICE->DIEPEMPMSK;
bogdanm 0:9b334a45a8ff 998 msk |= ((emp >> epnum) & 0x1) << 7;
bogdanm 0:9b334a45a8ff 999 v = USBx_INEP(epnum)->DIEPINT & msk;
bogdanm 0:9b334a45a8ff 1000 return v;
bogdanm 0:9b334a45a8ff 1001 }
bogdanm 0:9b334a45a8ff 1002
bogdanm 0:9b334a45a8ff 1003 /**
bogdanm 0:9b334a45a8ff 1004 * @brief USB_ClearInterrupts: clear a USB interrupt
bogdanm 0:9b334a45a8ff 1005 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1006 * @param interrupt : interrupt flag
bogdanm 0:9b334a45a8ff 1007 * @retval None
bogdanm 0:9b334a45a8ff 1008 */
bogdanm 0:9b334a45a8ff 1009 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
bogdanm 0:9b334a45a8ff 1010 {
bogdanm 0:9b334a45a8ff 1011 USBx->GINTSTS |= interrupt;
bogdanm 0:9b334a45a8ff 1012 }
bogdanm 0:9b334a45a8ff 1013
bogdanm 0:9b334a45a8ff 1014 /**
bogdanm 0:9b334a45a8ff 1015 * @brief Returns USB core mode
bogdanm 0:9b334a45a8ff 1016 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1017 * @retval return core mode : Host or Device
mbed_official 83:a036322b8637 1018 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 1019 * 0 : Host
bogdanm 0:9b334a45a8ff 1020 * 1 : Device
bogdanm 0:9b334a45a8ff 1021 */
bogdanm 0:9b334a45a8ff 1022 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1023 {
bogdanm 0:9b334a45a8ff 1024 return ((USBx->GINTSTS ) & 0x1);
bogdanm 0:9b334a45a8ff 1025 }
bogdanm 0:9b334a45a8ff 1026
bogdanm 0:9b334a45a8ff 1027
bogdanm 0:9b334a45a8ff 1028 /**
bogdanm 0:9b334a45a8ff 1029 * @brief Activate EP0 for Setup transactions
bogdanm 0:9b334a45a8ff 1030 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1031 * @retval HAL status
bogdanm 0:9b334a45a8ff 1032 */
bogdanm 0:9b334a45a8ff 1033 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1034 {
bogdanm 0:9b334a45a8ff 1035 /* Set the MPS of the IN EP based on the enumeration speed */
bogdanm 0:9b334a45a8ff 1036 USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
bogdanm 0:9b334a45a8ff 1037
bogdanm 0:9b334a45a8ff 1038 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
bogdanm 0:9b334a45a8ff 1039 {
bogdanm 0:9b334a45a8ff 1040 USBx_INEP(0)->DIEPCTL |= 3;
bogdanm 0:9b334a45a8ff 1041 }
bogdanm 0:9b334a45a8ff 1042 USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
bogdanm 0:9b334a45a8ff 1043
bogdanm 0:9b334a45a8ff 1044 return HAL_OK;
bogdanm 0:9b334a45a8ff 1045 }
bogdanm 0:9b334a45a8ff 1046
bogdanm 0:9b334a45a8ff 1047
bogdanm 0:9b334a45a8ff 1048 /**
bogdanm 0:9b334a45a8ff 1049 * @brief Prepare the EP0 to start the first control setup
bogdanm 0:9b334a45a8ff 1050 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1051 * @param dma: USB dma enabled or disabled
mbed_official 83:a036322b8637 1052 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 1053 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 1054 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 1055 * @param psetup : pointer to setup packet
bogdanm 0:9b334a45a8ff 1056 * @retval HAL status
bogdanm 0:9b334a45a8ff 1057 */
bogdanm 0:9b334a45a8ff 1058 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup)
bogdanm 0:9b334a45a8ff 1059 {
bogdanm 0:9b334a45a8ff 1060 USBx_OUTEP(0)->DOEPTSIZ = 0;
bogdanm 0:9b334a45a8ff 1061 USBx_OUTEP(0)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 1062 USBx_OUTEP(0)->DOEPTSIZ |= (3 * 8);
bogdanm 0:9b334a45a8ff 1063 USBx_OUTEP(0)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT;
bogdanm 0:9b334a45a8ff 1064
bogdanm 0:9b334a45a8ff 1065 if (dma == 1)
bogdanm 0:9b334a45a8ff 1066 {
bogdanm 0:9b334a45a8ff 1067 USBx_OUTEP(0)->DOEPDMA = (uint32_t)psetup;
bogdanm 0:9b334a45a8ff 1068 /* EP enable */
bogdanm 0:9b334a45a8ff 1069 USBx_OUTEP(0)->DOEPCTL = 0x80008000;
bogdanm 0:9b334a45a8ff 1070 }
bogdanm 0:9b334a45a8ff 1071
bogdanm 0:9b334a45a8ff 1072 return HAL_OK;
bogdanm 0:9b334a45a8ff 1073 }
bogdanm 0:9b334a45a8ff 1074
bogdanm 0:9b334a45a8ff 1075
bogdanm 0:9b334a45a8ff 1076 /**
bogdanm 0:9b334a45a8ff 1077 * @brief Reset the USB Core (needed after USB clock settings change)
bogdanm 0:9b334a45a8ff 1078 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1079 * @retval HAL status
bogdanm 0:9b334a45a8ff 1080 */
bogdanm 0:9b334a45a8ff 1081 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1082 {
bogdanm 0:9b334a45a8ff 1083 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 1084
bogdanm 0:9b334a45a8ff 1085 /* Wait for AHB master IDLE state. */
bogdanm 0:9b334a45a8ff 1086 do
bogdanm 0:9b334a45a8ff 1087 {
bogdanm 0:9b334a45a8ff 1088 if (++count > 200000)
bogdanm 0:9b334a45a8ff 1089 {
bogdanm 0:9b334a45a8ff 1090 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1091 }
bogdanm 0:9b334a45a8ff 1092 }
bogdanm 0:9b334a45a8ff 1093 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
bogdanm 0:9b334a45a8ff 1094
bogdanm 0:9b334a45a8ff 1095 /* Core Soft Reset */
bogdanm 0:9b334a45a8ff 1096 count = 0;
bogdanm 0:9b334a45a8ff 1097 USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
bogdanm 0:9b334a45a8ff 1098
bogdanm 0:9b334a45a8ff 1099 do
bogdanm 0:9b334a45a8ff 1100 {
bogdanm 0:9b334a45a8ff 1101 if (++count > 200000)
bogdanm 0:9b334a45a8ff 1102 {
bogdanm 0:9b334a45a8ff 1103 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1104 }
bogdanm 0:9b334a45a8ff 1105 }
bogdanm 0:9b334a45a8ff 1106 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
bogdanm 0:9b334a45a8ff 1107
bogdanm 0:9b334a45a8ff 1108 return HAL_OK;
bogdanm 0:9b334a45a8ff 1109 }
bogdanm 0:9b334a45a8ff 1110
bogdanm 0:9b334a45a8ff 1111
bogdanm 0:9b334a45a8ff 1112 /**
bogdanm 0:9b334a45a8ff 1113 * @brief USB_HostInit : Initializes the USB OTG controller registers
bogdanm 0:9b334a45a8ff 1114 * for Host mode
bogdanm 0:9b334a45a8ff 1115 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1116 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1117 * the configuration information for the specified USBx peripheral.
bogdanm 0:9b334a45a8ff 1118 * @retval HAL status
bogdanm 0:9b334a45a8ff 1119 */
bogdanm 0:9b334a45a8ff 1120 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm 0:9b334a45a8ff 1121 {
bogdanm 0:9b334a45a8ff 1122 uint32_t i;
bogdanm 0:9b334a45a8ff 1123
bogdanm 0:9b334a45a8ff 1124 /* Restart the Phy Clock */
bogdanm 0:9b334a45a8ff 1125 USBx_PCGCCTL = 0;
bogdanm 0:9b334a45a8ff 1126
bogdanm 0:9b334a45a8ff 1127 /*Activate VBUS Sensing B */
bogdanm 0:9b334a45a8ff 1128 USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
bogdanm 0:9b334a45a8ff 1129
bogdanm 0:9b334a45a8ff 1130 /* Disable the FS/LS support mode only */
bogdanm 0:9b334a45a8ff 1131 if((cfg.speed == USB_OTG_SPEED_FULL)&&
bogdanm 0:9b334a45a8ff 1132 (USBx != USB_OTG_FS))
bogdanm 0:9b334a45a8ff 1133 {
bogdanm 0:9b334a45a8ff 1134 USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS;
bogdanm 0:9b334a45a8ff 1135 }
bogdanm 0:9b334a45a8ff 1136 else
bogdanm 0:9b334a45a8ff 1137 {
bogdanm 0:9b334a45a8ff 1138 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
bogdanm 0:9b334a45a8ff 1139 }
bogdanm 0:9b334a45a8ff 1140
bogdanm 0:9b334a45a8ff 1141 /* Make sure the FIFOs are flushed. */
bogdanm 0:9b334a45a8ff 1142 USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */
bogdanm 0:9b334a45a8ff 1143 USB_FlushRxFifo(USBx);
bogdanm 0:9b334a45a8ff 1144
bogdanm 0:9b334a45a8ff 1145 /* Clear all pending HC Interrupts */
bogdanm 0:9b334a45a8ff 1146 for (i = 0; i < cfg.Host_channels; i++)
bogdanm 0:9b334a45a8ff 1147 {
bogdanm 0:9b334a45a8ff 1148 USBx_HC(i)->HCINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1149 USBx_HC(i)->HCINTMSK = 0;
bogdanm 0:9b334a45a8ff 1150 }
bogdanm 0:9b334a45a8ff 1151
bogdanm 0:9b334a45a8ff 1152 /* Enable VBUS driving */
bogdanm 0:9b334a45a8ff 1153 USB_DriveVbus(USBx, 1);
bogdanm 0:9b334a45a8ff 1154
bogdanm 0:9b334a45a8ff 1155 HAL_Delay(200);
bogdanm 0:9b334a45a8ff 1156
bogdanm 0:9b334a45a8ff 1157 /* Disable all interrupts. */
bogdanm 0:9b334a45a8ff 1158 USBx->GINTMSK = 0;
bogdanm 0:9b334a45a8ff 1159
bogdanm 0:9b334a45a8ff 1160 /* Clear any pending interrupts */
bogdanm 0:9b334a45a8ff 1161 USBx->GINTSTS = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1162
bogdanm 0:9b334a45a8ff 1163 if(USBx == USB_OTG_FS)
bogdanm 0:9b334a45a8ff 1164 {
bogdanm 0:9b334a45a8ff 1165 /* set Rx FIFO size */
bogdanm 0:9b334a45a8ff 1166 USBx->GRXFSIZ = (uint32_t )0x80;
bogdanm 0:9b334a45a8ff 1167 USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80);
bogdanm 0:9b334a45a8ff 1168 USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0);
bogdanm 0:9b334a45a8ff 1169 }
bogdanm 0:9b334a45a8ff 1170 else
bogdanm 0:9b334a45a8ff 1171 {
bogdanm 0:9b334a45a8ff 1172 /* set Rx FIFO size */
bogdanm 0:9b334a45a8ff 1173 USBx->GRXFSIZ = (uint32_t )0x200;
bogdanm 0:9b334a45a8ff 1174 USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x100 << 16)& USB_OTG_NPTXFD) | 0x200);
bogdanm 0:9b334a45a8ff 1175 USBx->HPTXFSIZ = (uint32_t )(((0xE0 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0x300);
bogdanm 0:9b334a45a8ff 1176 }
bogdanm 0:9b334a45a8ff 1177
bogdanm 0:9b334a45a8ff 1178 /* Enable the common interrupts */
bogdanm 0:9b334a45a8ff 1179 if (cfg.dma_enable == DISABLE)
bogdanm 0:9b334a45a8ff 1180 {
bogdanm 0:9b334a45a8ff 1181 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
bogdanm 0:9b334a45a8ff 1182 }
bogdanm 0:9b334a45a8ff 1183
bogdanm 0:9b334a45a8ff 1184 /* Enable interrupts matching to the Host mode ONLY */
bogdanm 0:9b334a45a8ff 1185 USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\
bogdanm 0:9b334a45a8ff 1186 USB_OTG_GINTMSK_SOFM |USB_OTG_GINTSTS_DISCINT|\
bogdanm 0:9b334a45a8ff 1187 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
bogdanm 0:9b334a45a8ff 1188
bogdanm 0:9b334a45a8ff 1189 return HAL_OK;
bogdanm 0:9b334a45a8ff 1190 }
bogdanm 0:9b334a45a8ff 1191
bogdanm 0:9b334a45a8ff 1192 /**
bogdanm 0:9b334a45a8ff 1193 * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
bogdanm 0:9b334a45a8ff 1194 * HCFG register on the PHY type and set the right frame interval
bogdanm 0:9b334a45a8ff 1195 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1196 * @param freq : clock frequency
mbed_official 83:a036322b8637 1197 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 1198 * HCFG_48_MHZ : Full Speed 48 MHz Clock
bogdanm 0:9b334a45a8ff 1199 * HCFG_6_MHZ : Low Speed 6 MHz Clock
bogdanm 0:9b334a45a8ff 1200 * @retval HAL status
bogdanm 0:9b334a45a8ff 1201 */
bogdanm 0:9b334a45a8ff 1202 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq)
bogdanm 0:9b334a45a8ff 1203 {
bogdanm 0:9b334a45a8ff 1204 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
bogdanm 0:9b334a45a8ff 1205 USBx_HOST->HCFG |= (freq & USB_OTG_HCFG_FSLSPCS);
bogdanm 0:9b334a45a8ff 1206
bogdanm 0:9b334a45a8ff 1207 if (freq == HCFG_48_MHZ)
bogdanm 0:9b334a45a8ff 1208 {
bogdanm 0:9b334a45a8ff 1209 USBx_HOST->HFIR = (uint32_t)48000;
bogdanm 0:9b334a45a8ff 1210 }
bogdanm 0:9b334a45a8ff 1211 else if (freq == HCFG_6_MHZ)
bogdanm 0:9b334a45a8ff 1212 {
bogdanm 0:9b334a45a8ff 1213 USBx_HOST->HFIR = (uint32_t)6000;
bogdanm 0:9b334a45a8ff 1214 }
bogdanm 0:9b334a45a8ff 1215 return HAL_OK;
bogdanm 0:9b334a45a8ff 1216 }
bogdanm 0:9b334a45a8ff 1217
bogdanm 0:9b334a45a8ff 1218 /**
bogdanm 0:9b334a45a8ff 1219 * @brief USB_OTG_ResetPort : Reset Host Port
bogdanm 0:9b334a45a8ff 1220 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1221 * @retval HAL status
bogdanm 0:9b334a45a8ff 1222 * @note : (1)The application must wait at least 10 ms
bogdanm 0:9b334a45a8ff 1223 * before clearing the reset bit.
bogdanm 0:9b334a45a8ff 1224 */
bogdanm 0:9b334a45a8ff 1225 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1226 {
bogdanm 0:9b334a45a8ff 1227 __IO uint32_t hprt0;
bogdanm 0:9b334a45a8ff 1228
bogdanm 0:9b334a45a8ff 1229 hprt0 = USBx_HPRT0;
bogdanm 0:9b334a45a8ff 1230
bogdanm 0:9b334a45a8ff 1231 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
bogdanm 0:9b334a45a8ff 1232 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
bogdanm 0:9b334a45a8ff 1233
bogdanm 0:9b334a45a8ff 1234 USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
bogdanm 0:9b334a45a8ff 1235 HAL_Delay (10); /* See Note #1 */
bogdanm 0:9b334a45a8ff 1236 USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
bogdanm 0:9b334a45a8ff 1237 return HAL_OK;
bogdanm 0:9b334a45a8ff 1238 }
bogdanm 0:9b334a45a8ff 1239
bogdanm 0:9b334a45a8ff 1240 /**
bogdanm 0:9b334a45a8ff 1241 * @brief USB_DriveVbus : activate or de-activate vbus
bogdanm 0:9b334a45a8ff 1242 * @param state : VBUS state
mbed_official 83:a036322b8637 1243 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 1244 * 0 : VBUS Active
bogdanm 0:9b334a45a8ff 1245 * 1 : VBUS Inactive
bogdanm 0:9b334a45a8ff 1246 * @retval HAL status
bogdanm 0:9b334a45a8ff 1247 */
bogdanm 0:9b334a45a8ff 1248 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
bogdanm 0:9b334a45a8ff 1249 {
bogdanm 0:9b334a45a8ff 1250 __IO uint32_t hprt0;
bogdanm 0:9b334a45a8ff 1251
bogdanm 0:9b334a45a8ff 1252 hprt0 = USBx_HPRT0;
bogdanm 0:9b334a45a8ff 1253 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
bogdanm 0:9b334a45a8ff 1254 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
bogdanm 0:9b334a45a8ff 1255
bogdanm 0:9b334a45a8ff 1256 if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 ))
bogdanm 0:9b334a45a8ff 1257 {
bogdanm 0:9b334a45a8ff 1258 USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
bogdanm 0:9b334a45a8ff 1259 }
bogdanm 0:9b334a45a8ff 1260 if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 ))
bogdanm 0:9b334a45a8ff 1261 {
bogdanm 0:9b334a45a8ff 1262 USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
bogdanm 0:9b334a45a8ff 1263 }
bogdanm 0:9b334a45a8ff 1264 return HAL_OK;
bogdanm 0:9b334a45a8ff 1265 }
bogdanm 0:9b334a45a8ff 1266
bogdanm 0:9b334a45a8ff 1267 /**
bogdanm 0:9b334a45a8ff 1268 * @brief Return Host Core speed
bogdanm 0:9b334a45a8ff 1269 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1270 * @retval speed : Host speed
mbed_official 83:a036322b8637 1271 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 1272 * @arg USB_OTG_SPEED_HIGH: High speed mode
bogdanm 0:9b334a45a8ff 1273 * @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm 0:9b334a45a8ff 1274 * @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm 0:9b334a45a8ff 1275 */
bogdanm 0:9b334a45a8ff 1276 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1277 {
bogdanm 0:9b334a45a8ff 1278 __IO uint32_t hprt0;
bogdanm 0:9b334a45a8ff 1279
bogdanm 0:9b334a45a8ff 1280 hprt0 = USBx_HPRT0;
bogdanm 0:9b334a45a8ff 1281 return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
bogdanm 0:9b334a45a8ff 1282 }
bogdanm 0:9b334a45a8ff 1283
bogdanm 0:9b334a45a8ff 1284 /**
bogdanm 0:9b334a45a8ff 1285 * @brief Return Host Current Frame number
bogdanm 0:9b334a45a8ff 1286 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1287 * @retval current frame number
bogdanm 0:9b334a45a8ff 1288 */
bogdanm 0:9b334a45a8ff 1289 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1290 {
bogdanm 0:9b334a45a8ff 1291 return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
bogdanm 0:9b334a45a8ff 1292 }
bogdanm 0:9b334a45a8ff 1293
bogdanm 0:9b334a45a8ff 1294 /**
bogdanm 0:9b334a45a8ff 1295 * @brief Initialize a host channel
bogdanm 0:9b334a45a8ff 1296 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1297 * @param ch_num : Channel number
bogdanm 0:9b334a45a8ff 1298 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 1299 * @param epnum : Endpoint number
bogdanm 0:9b334a45a8ff 1300 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 1301 * @param dev_address : Current device address
bogdanm 0:9b334a45a8ff 1302 * This parameter can be a value from 0 to 255
bogdanm 0:9b334a45a8ff 1303 * @param speed : Current device speed
mbed_official 83:a036322b8637 1304 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 1305 * @arg USB_OTG_SPEED_HIGH: High speed mode
bogdanm 0:9b334a45a8ff 1306 * @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm 0:9b334a45a8ff 1307 * @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm 0:9b334a45a8ff 1308 * @param ep_type : Endpoint Type
mbed_official 83:a036322b8637 1309 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 1310 * @arg EP_TYPE_CTRL: Control type
bogdanm 0:9b334a45a8ff 1311 * @arg EP_TYPE_ISOC: Isochronous type
bogdanm 0:9b334a45a8ff 1312 * @arg EP_TYPE_BULK: Bulk type
bogdanm 0:9b334a45a8ff 1313 * @arg EP_TYPE_INTR: Interrupt type
bogdanm 0:9b334a45a8ff 1314 * @param mps : Max Packet Size
bogdanm 0:9b334a45a8ff 1315 * This parameter can be a value from 0 to32K
bogdanm 0:9b334a45a8ff 1316 * @retval HAL state
bogdanm 0:9b334a45a8ff 1317 */
bogdanm 0:9b334a45a8ff 1318 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
bogdanm 0:9b334a45a8ff 1319 uint8_t ch_num,
bogdanm 0:9b334a45a8ff 1320 uint8_t epnum,
bogdanm 0:9b334a45a8ff 1321 uint8_t dev_address,
bogdanm 0:9b334a45a8ff 1322 uint8_t speed,
bogdanm 0:9b334a45a8ff 1323 uint8_t ep_type,
bogdanm 0:9b334a45a8ff 1324 uint16_t mps)
bogdanm 0:9b334a45a8ff 1325 {
bogdanm 0:9b334a45a8ff 1326
bogdanm 0:9b334a45a8ff 1327 /* Clear old interrupt conditions for this host channel. */
bogdanm 0:9b334a45a8ff 1328 USBx_HC(ch_num)->HCINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1329
bogdanm 0:9b334a45a8ff 1330 /* Enable channel interrupts required for this transfer. */
bogdanm 0:9b334a45a8ff 1331 switch (ep_type)
bogdanm 0:9b334a45a8ff 1332 {
bogdanm 0:9b334a45a8ff 1333 case EP_TYPE_CTRL:
bogdanm 0:9b334a45a8ff 1334 case EP_TYPE_BULK:
bogdanm 0:9b334a45a8ff 1335
bogdanm 0:9b334a45a8ff 1336 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
bogdanm 0:9b334a45a8ff 1337 USB_OTG_HCINTMSK_STALLM |\
bogdanm 0:9b334a45a8ff 1338 USB_OTG_HCINTMSK_TXERRM |\
bogdanm 0:9b334a45a8ff 1339 USB_OTG_HCINTMSK_DTERRM |\
bogdanm 0:9b334a45a8ff 1340 USB_OTG_HCINTMSK_AHBERR |\
bogdanm 0:9b334a45a8ff 1341 USB_OTG_HCINTMSK_NAKM ;
bogdanm 0:9b334a45a8ff 1342
bogdanm 0:9b334a45a8ff 1343 if (epnum & 0x80)
bogdanm 0:9b334a45a8ff 1344 {
bogdanm 0:9b334a45a8ff 1345 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
bogdanm 0:9b334a45a8ff 1346 }
bogdanm 0:9b334a45a8ff 1347 else
bogdanm 0:9b334a45a8ff 1348 {
bogdanm 0:9b334a45a8ff 1349 if(USBx != USB_OTG_FS)
bogdanm 0:9b334a45a8ff 1350 {
bogdanm 0:9b334a45a8ff 1351 USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
bogdanm 0:9b334a45a8ff 1352 }
bogdanm 0:9b334a45a8ff 1353 }
bogdanm 0:9b334a45a8ff 1354 break;
mbed_official 83:a036322b8637 1355
bogdanm 0:9b334a45a8ff 1356 case EP_TYPE_INTR:
bogdanm 0:9b334a45a8ff 1357
bogdanm 0:9b334a45a8ff 1358 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
bogdanm 0:9b334a45a8ff 1359 USB_OTG_HCINTMSK_STALLM |\
bogdanm 0:9b334a45a8ff 1360 USB_OTG_HCINTMSK_TXERRM |\
bogdanm 0:9b334a45a8ff 1361 USB_OTG_HCINTMSK_DTERRM |\
bogdanm 0:9b334a45a8ff 1362 USB_OTG_HCINTMSK_NAKM |\
bogdanm 0:9b334a45a8ff 1363 USB_OTG_HCINTMSK_AHBERR |\
bogdanm 0:9b334a45a8ff 1364 USB_OTG_HCINTMSK_FRMORM ;
bogdanm 0:9b334a45a8ff 1365
bogdanm 0:9b334a45a8ff 1366 if (epnum & 0x80)
bogdanm 0:9b334a45a8ff 1367 {
bogdanm 0:9b334a45a8ff 1368 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
bogdanm 0:9b334a45a8ff 1369 }
bogdanm 0:9b334a45a8ff 1370
bogdanm 0:9b334a45a8ff 1371 break;
bogdanm 0:9b334a45a8ff 1372 case EP_TYPE_ISOC:
bogdanm 0:9b334a45a8ff 1373
bogdanm 0:9b334a45a8ff 1374 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
bogdanm 0:9b334a45a8ff 1375 USB_OTG_HCINTMSK_ACKM |\
bogdanm 0:9b334a45a8ff 1376 USB_OTG_HCINTMSK_AHBERR |\
bogdanm 0:9b334a45a8ff 1377 USB_OTG_HCINTMSK_FRMORM ;
bogdanm 0:9b334a45a8ff 1378
bogdanm 0:9b334a45a8ff 1379 if (epnum & 0x80)
bogdanm 0:9b334a45a8ff 1380 {
bogdanm 0:9b334a45a8ff 1381 USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM);
bogdanm 0:9b334a45a8ff 1382 }
bogdanm 0:9b334a45a8ff 1383 break;
bogdanm 0:9b334a45a8ff 1384 }
bogdanm 0:9b334a45a8ff 1385
bogdanm 0:9b334a45a8ff 1386 /* Enable the top level host channel interrupt. */
bogdanm 0:9b334a45a8ff 1387 USBx_HOST->HAINTMSK |= (1 << ch_num);
bogdanm 0:9b334a45a8ff 1388
bogdanm 0:9b334a45a8ff 1389 /* Make sure host channel interrupts are enabled. */
bogdanm 0:9b334a45a8ff 1390 USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM;
bogdanm 0:9b334a45a8ff 1391
bogdanm 0:9b334a45a8ff 1392 /* Program the HCCHAR register */
bogdanm 0:9b334a45a8ff 1393 USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) |\
bogdanm 0:9b334a45a8ff 1394 (((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)|\
bogdanm 0:9b334a45a8ff 1395 ((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)|\
bogdanm 0:9b334a45a8ff 1396 (((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)|\
bogdanm 0:9b334a45a8ff 1397 ((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)|\
bogdanm 0:9b334a45a8ff 1398 (mps & USB_OTG_HCCHAR_MPSIZ));
bogdanm 0:9b334a45a8ff 1399
bogdanm 0:9b334a45a8ff 1400 if (ep_type == EP_TYPE_INTR)
bogdanm 0:9b334a45a8ff 1401 {
bogdanm 0:9b334a45a8ff 1402 USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ;
bogdanm 0:9b334a45a8ff 1403 }
bogdanm 0:9b334a45a8ff 1404
bogdanm 0:9b334a45a8ff 1405 return HAL_OK;
bogdanm 0:9b334a45a8ff 1406 }
bogdanm 0:9b334a45a8ff 1407
bogdanm 0:9b334a45a8ff 1408 /**
bogdanm 0:9b334a45a8ff 1409 * @brief Start a transfer over a host channel
bogdanm 0:9b334a45a8ff 1410 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1411 * @param hc : pointer to host channel structure
bogdanm 0:9b334a45a8ff 1412 * @param dma: USB dma enabled or disabled
mbed_official 83:a036322b8637 1413 * This parameter can be one of these values:
bogdanm 0:9b334a45a8ff 1414 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 1415 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 1416 * @retval HAL state
bogdanm 0:9b334a45a8ff 1417 */
bogdanm 0:9b334a45a8ff 1418 #if defined (__CC_ARM) /*!< ARM Compiler */
bogdanm 0:9b334a45a8ff 1419 #pragma O0
bogdanm 0:9b334a45a8ff 1420 #elif defined (__GNUC__) /*!< GNU Compiler */
bogdanm 0:9b334a45a8ff 1421 #pragma GCC optimize ("O0")
bogdanm 0:9b334a45a8ff 1422 #endif /* __CC_ARM */
bogdanm 0:9b334a45a8ff 1423 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma)
bogdanm 0:9b334a45a8ff 1424 {
bogdanm 0:9b334a45a8ff 1425 uint8_t is_oddframe = 0;
bogdanm 0:9b334a45a8ff 1426 uint16_t len_words = 0;
bogdanm 0:9b334a45a8ff 1427 uint16_t num_packets = 0;
bogdanm 0:9b334a45a8ff 1428 uint16_t max_hc_pkt_count = 256;
bogdanm 0:9b334a45a8ff 1429 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 1430
bogdanm 0:9b334a45a8ff 1431 if((USBx != USB_OTG_FS) && (hc->speed == USB_OTG_SPEED_HIGH))
bogdanm 0:9b334a45a8ff 1432 {
bogdanm 0:9b334a45a8ff 1433 if((dma == 0) && (hc->do_ping == 1))
bogdanm 0:9b334a45a8ff 1434 {
bogdanm 0:9b334a45a8ff 1435 USB_DoPing(USBx, hc->ch_num);
bogdanm 0:9b334a45a8ff 1436 return HAL_OK;
bogdanm 0:9b334a45a8ff 1437 }
bogdanm 0:9b334a45a8ff 1438 else if(dma == 1)
bogdanm 0:9b334a45a8ff 1439 {
bogdanm 0:9b334a45a8ff 1440 USBx_HC(hc->ch_num)->HCINTMSK &= ~(USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
bogdanm 0:9b334a45a8ff 1441 hc->do_ping = 0;
bogdanm 0:9b334a45a8ff 1442 }
bogdanm 0:9b334a45a8ff 1443 }
bogdanm 0:9b334a45a8ff 1444
bogdanm 0:9b334a45a8ff 1445 /* Compute the expected number of packets associated to the transfer */
bogdanm 0:9b334a45a8ff 1446 if (hc->xfer_len > 0)
bogdanm 0:9b334a45a8ff 1447 {
bogdanm 0:9b334a45a8ff 1448 num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet;
bogdanm 0:9b334a45a8ff 1449
bogdanm 0:9b334a45a8ff 1450 if (num_packets > max_hc_pkt_count)
bogdanm 0:9b334a45a8ff 1451 {
bogdanm 0:9b334a45a8ff 1452 num_packets = max_hc_pkt_count;
bogdanm 0:9b334a45a8ff 1453 hc->xfer_len = num_packets * hc->max_packet;
bogdanm 0:9b334a45a8ff 1454 }
bogdanm 0:9b334a45a8ff 1455 }
bogdanm 0:9b334a45a8ff 1456 else
bogdanm 0:9b334a45a8ff 1457 {
bogdanm 0:9b334a45a8ff 1458 num_packets = 1;
bogdanm 0:9b334a45a8ff 1459 }
bogdanm 0:9b334a45a8ff 1460 if (hc->ep_is_in)
bogdanm 0:9b334a45a8ff 1461 {
bogdanm 0:9b334a45a8ff 1462 hc->xfer_len = num_packets * hc->max_packet;
bogdanm 0:9b334a45a8ff 1463 }
bogdanm 0:9b334a45a8ff 1464
bogdanm 0:9b334a45a8ff 1465 /* Initialize the HCTSIZn register */
bogdanm 0:9b334a45a8ff 1466 USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\
bogdanm 0:9b334a45a8ff 1467 ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
bogdanm 0:9b334a45a8ff 1468 (((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID);
bogdanm 0:9b334a45a8ff 1469
bogdanm 0:9b334a45a8ff 1470 if (dma)
bogdanm 0:9b334a45a8ff 1471 {
bogdanm 0:9b334a45a8ff 1472 /* xfer_buff MUST be 32-bits aligned */
bogdanm 0:9b334a45a8ff 1473 USBx_HC(hc->ch_num)->HCDMA = (uint32_t)hc->xfer_buff;
bogdanm 0:9b334a45a8ff 1474 }
bogdanm 0:9b334a45a8ff 1475
bogdanm 0:9b334a45a8ff 1476 is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1;
bogdanm 0:9b334a45a8ff 1477 USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
bogdanm 0:9b334a45a8ff 1478 USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29);
bogdanm 0:9b334a45a8ff 1479
bogdanm 0:9b334a45a8ff 1480 /* Set host channel enable */
bogdanm 0:9b334a45a8ff 1481 tmpreg = USBx_HC(hc->ch_num)->HCCHAR;
bogdanm 0:9b334a45a8ff 1482 tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1483 tmpreg |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1484 USBx_HC(hc->ch_num)->HCCHAR = tmpreg;
bogdanm 0:9b334a45a8ff 1485
bogdanm 0:9b334a45a8ff 1486 if (dma == 0) /* Slave mode */
bogdanm 0:9b334a45a8ff 1487 {
bogdanm 0:9b334a45a8ff 1488 if((hc->ep_is_in == 0) && (hc->xfer_len > 0))
bogdanm 0:9b334a45a8ff 1489 {
bogdanm 0:9b334a45a8ff 1490 switch(hc->ep_type)
bogdanm 0:9b334a45a8ff 1491 {
bogdanm 0:9b334a45a8ff 1492 /* Non periodic transfer */
bogdanm 0:9b334a45a8ff 1493 case EP_TYPE_CTRL:
bogdanm 0:9b334a45a8ff 1494 case EP_TYPE_BULK:
bogdanm 0:9b334a45a8ff 1495
bogdanm 0:9b334a45a8ff 1496 len_words = (hc->xfer_len + 3) / 4;
bogdanm 0:9b334a45a8ff 1497
bogdanm 0:9b334a45a8ff 1498 /* check if there is enough space in FIFO space */
bogdanm 0:9b334a45a8ff 1499 if(len_words > (USBx->HNPTXSTS & 0xFFFF))
bogdanm 0:9b334a45a8ff 1500 {
bogdanm 0:9b334a45a8ff 1501 /* need to process data in nptxfempty interrupt */
bogdanm 0:9b334a45a8ff 1502 USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
bogdanm 0:9b334a45a8ff 1503 }
bogdanm 0:9b334a45a8ff 1504 break;
bogdanm 0:9b334a45a8ff 1505 /* Periodic transfer */
bogdanm 0:9b334a45a8ff 1506 case EP_TYPE_INTR:
bogdanm 0:9b334a45a8ff 1507 case EP_TYPE_ISOC:
bogdanm 0:9b334a45a8ff 1508 len_words = (hc->xfer_len + 3) / 4;
bogdanm 0:9b334a45a8ff 1509 /* check if there is enough space in FIFO space */
bogdanm 0:9b334a45a8ff 1510 if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */
bogdanm 0:9b334a45a8ff 1511 {
bogdanm 0:9b334a45a8ff 1512 /* need to process data in ptxfempty interrupt */
bogdanm 0:9b334a45a8ff 1513 USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
bogdanm 0:9b334a45a8ff 1514 }
bogdanm 0:9b334a45a8ff 1515 break;
bogdanm 0:9b334a45a8ff 1516
bogdanm 0:9b334a45a8ff 1517 default:
bogdanm 0:9b334a45a8ff 1518 break;
bogdanm 0:9b334a45a8ff 1519 }
bogdanm 0:9b334a45a8ff 1520
bogdanm 0:9b334a45a8ff 1521 /* Write packet into the Tx FIFO. */
bogdanm 0:9b334a45a8ff 1522 USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len, 0);
bogdanm 0:9b334a45a8ff 1523 }
bogdanm 0:9b334a45a8ff 1524 }
bogdanm 0:9b334a45a8ff 1525
bogdanm 0:9b334a45a8ff 1526 return HAL_OK;
bogdanm 0:9b334a45a8ff 1527 }
bogdanm 0:9b334a45a8ff 1528
bogdanm 0:9b334a45a8ff 1529 /**
bogdanm 0:9b334a45a8ff 1530 * @brief Read all host channel interrupts status
bogdanm 0:9b334a45a8ff 1531 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1532 * @retval HAL state
bogdanm 0:9b334a45a8ff 1533 */
bogdanm 0:9b334a45a8ff 1534 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1535 {
bogdanm 0:9b334a45a8ff 1536 return ((USBx_HOST->HAINT) & 0xFFFF);
bogdanm 0:9b334a45a8ff 1537 }
bogdanm 0:9b334a45a8ff 1538
bogdanm 0:9b334a45a8ff 1539 /**
bogdanm 0:9b334a45a8ff 1540 * @brief Halt a host channel
bogdanm 0:9b334a45a8ff 1541 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1542 * @param hc_num : Host Channel number
bogdanm 0:9b334a45a8ff 1543 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 1544 * @retval HAL state
bogdanm 0:9b334a45a8ff 1545 */
bogdanm 0:9b334a45a8ff 1546 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
bogdanm 0:9b334a45a8ff 1547 {
bogdanm 0:9b334a45a8ff 1548 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 1549
bogdanm 0:9b334a45a8ff 1550 /* Check for space in the request queue to issue the halt. */
bogdanm 0:9b334a45a8ff 1551 if (((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_CTRL << 18)) || ((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_BULK << 18)))
bogdanm 0:9b334a45a8ff 1552 {
bogdanm 0:9b334a45a8ff 1553 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1554
bogdanm 0:9b334a45a8ff 1555 if ((USBx->HNPTXSTS & 0xFFFF) == 0)
bogdanm 0:9b334a45a8ff 1556 {
bogdanm 0:9b334a45a8ff 1557 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1558 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1559 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm 0:9b334a45a8ff 1560 do
bogdanm 0:9b334a45a8ff 1561 {
bogdanm 0:9b334a45a8ff 1562 if (++count > 1000)
bogdanm 0:9b334a45a8ff 1563 {
bogdanm 0:9b334a45a8ff 1564 break;
bogdanm 0:9b334a45a8ff 1565 }
bogdanm 0:9b334a45a8ff 1566 }
bogdanm 0:9b334a45a8ff 1567 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm 0:9b334a45a8ff 1568 }
bogdanm 0:9b334a45a8ff 1569 else
bogdanm 0:9b334a45a8ff 1570 {
bogdanm 0:9b334a45a8ff 1571 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1572 }
bogdanm 0:9b334a45a8ff 1573 }
bogdanm 0:9b334a45a8ff 1574 else
bogdanm 0:9b334a45a8ff 1575 {
bogdanm 0:9b334a45a8ff 1576 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1577
bogdanm 0:9b334a45a8ff 1578 if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0)
bogdanm 0:9b334a45a8ff 1579 {
bogdanm 0:9b334a45a8ff 1580 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1581 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1582 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm 0:9b334a45a8ff 1583 do
bogdanm 0:9b334a45a8ff 1584 {
bogdanm 0:9b334a45a8ff 1585 if (++count > 1000)
bogdanm 0:9b334a45a8ff 1586 {
bogdanm 0:9b334a45a8ff 1587 break;
bogdanm 0:9b334a45a8ff 1588 }
bogdanm 0:9b334a45a8ff 1589 }
bogdanm 0:9b334a45a8ff 1590 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm 0:9b334a45a8ff 1591 }
bogdanm 0:9b334a45a8ff 1592 else
bogdanm 0:9b334a45a8ff 1593 {
bogdanm 0:9b334a45a8ff 1594 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1595 }
bogdanm 0:9b334a45a8ff 1596 }
bogdanm 0:9b334a45a8ff 1597
bogdanm 0:9b334a45a8ff 1598 return HAL_OK;
bogdanm 0:9b334a45a8ff 1599 }
bogdanm 0:9b334a45a8ff 1600
bogdanm 0:9b334a45a8ff 1601 /**
bogdanm 0:9b334a45a8ff 1602 * @brief Initiate Do Ping protocol
bogdanm 0:9b334a45a8ff 1603 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1604 * @param hc_num : Host Channel number
bogdanm 0:9b334a45a8ff 1605 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 1606 * @retval HAL state
bogdanm 0:9b334a45a8ff 1607 */
bogdanm 0:9b334a45a8ff 1608 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
bogdanm 0:9b334a45a8ff 1609 {
bogdanm 0:9b334a45a8ff 1610 uint8_t num_packets = 1;
bogdanm 0:9b334a45a8ff 1611 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 1612
bogdanm 0:9b334a45a8ff 1613 USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
bogdanm 0:9b334a45a8ff 1614 USB_OTG_HCTSIZ_DOPING;
bogdanm 0:9b334a45a8ff 1615
bogdanm 0:9b334a45a8ff 1616 /* Set host channel enable */
bogdanm 0:9b334a45a8ff 1617 tmpreg = USBx_HC(ch_num)->HCCHAR;
bogdanm 0:9b334a45a8ff 1618 tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1619 tmpreg |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1620 USBx_HC(ch_num)->HCCHAR = tmpreg;
bogdanm 0:9b334a45a8ff 1621
bogdanm 0:9b334a45a8ff 1622 return HAL_OK;
bogdanm 0:9b334a45a8ff 1623 }
bogdanm 0:9b334a45a8ff 1624
bogdanm 0:9b334a45a8ff 1625 /**
bogdanm 0:9b334a45a8ff 1626 * @brief Stop Host Core
bogdanm 0:9b334a45a8ff 1627 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1628 * @retval HAL state
bogdanm 0:9b334a45a8ff 1629 */
bogdanm 0:9b334a45a8ff 1630 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1631 {
bogdanm 0:9b334a45a8ff 1632 uint8_t i;
bogdanm 0:9b334a45a8ff 1633 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 1634 uint32_t value;
bogdanm 0:9b334a45a8ff 1635
bogdanm 0:9b334a45a8ff 1636 USB_DisableGlobalInt(USBx);
bogdanm 0:9b334a45a8ff 1637
bogdanm 0:9b334a45a8ff 1638 /* Flush FIFO */
bogdanm 0:9b334a45a8ff 1639 USB_FlushTxFifo(USBx, 0x10);
bogdanm 0:9b334a45a8ff 1640 USB_FlushRxFifo(USBx);
bogdanm 0:9b334a45a8ff 1641
bogdanm 0:9b334a45a8ff 1642 /* Flush out any leftover queued requests. */
bogdanm 0:9b334a45a8ff 1643 for (i = 0; i <= 15; i++)
bogdanm 0:9b334a45a8ff 1644 {
bogdanm 0:9b334a45a8ff 1645
bogdanm 0:9b334a45a8ff 1646 value = USBx_HC(i)->HCCHAR ;
bogdanm 0:9b334a45a8ff 1647 value |= USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1648 value &= ~USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1649 value &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm 0:9b334a45a8ff 1650 USBx_HC(i)->HCCHAR = value;
bogdanm 0:9b334a45a8ff 1651 }
bogdanm 0:9b334a45a8ff 1652
bogdanm 0:9b334a45a8ff 1653 /* Halt all channels to put them into a known state. */
bogdanm 0:9b334a45a8ff 1654 for (i = 0; i <= 15; i++)
mbed_official 83:a036322b8637 1655 {
bogdanm 0:9b334a45a8ff 1656 value = USBx_HC(i)->HCCHAR ;
bogdanm 0:9b334a45a8ff 1657
bogdanm 0:9b334a45a8ff 1658 value |= USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1659 value |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1660 value &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm 0:9b334a45a8ff 1661
bogdanm 0:9b334a45a8ff 1662 USBx_HC(i)->HCCHAR = value;
bogdanm 0:9b334a45a8ff 1663 do
bogdanm 0:9b334a45a8ff 1664 {
bogdanm 0:9b334a45a8ff 1665 if (++count > 1000)
bogdanm 0:9b334a45a8ff 1666 {
bogdanm 0:9b334a45a8ff 1667 break;
bogdanm 0:9b334a45a8ff 1668 }
bogdanm 0:9b334a45a8ff 1669 }
bogdanm 0:9b334a45a8ff 1670 while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm 0:9b334a45a8ff 1671 }
bogdanm 0:9b334a45a8ff 1672
bogdanm 0:9b334a45a8ff 1673 /* Clear any pending Host interrupts */
bogdanm 0:9b334a45a8ff 1674 USBx_HOST->HAINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1675 USBx->GINTSTS = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1676 USB_EnableGlobalInt(USBx);
bogdanm 0:9b334a45a8ff 1677 return HAL_OK;
bogdanm 0:9b334a45a8ff 1678 }
bogdanm 0:9b334a45a8ff 1679 /**
bogdanm 0:9b334a45a8ff 1680 * @}
bogdanm 0:9b334a45a8ff 1681 */
bogdanm 0:9b334a45a8ff 1682
bogdanm 0:9b334a45a8ff 1683 #endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */
bogdanm 0:9b334a45a8ff 1684
bogdanm 0:9b334a45a8ff 1685 /**
bogdanm 0:9b334a45a8ff 1686 * @}
bogdanm 0:9b334a45a8ff 1687 */
bogdanm 0:9b334a45a8ff 1688
bogdanm 0:9b334a45a8ff 1689 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/