en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_ll_usb.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
83:a036322b8637
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_ll_usb.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.1
bogdanm 0:9b334a45a8ff 6 * @date 25-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief USB Low Layer HAL module driver.
bogdanm 0:9b334a45a8ff 8 *
bogdanm 0:9b334a45a8ff 9 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 10 * functionalities of the USB Peripheral Controller:
bogdanm 0:9b334a45a8ff 11 * + Initialization/de-initialization functions
bogdanm 0:9b334a45a8ff 12 * + I/O operation functions
bogdanm 0:9b334a45a8ff 13 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 14 * + Peripheral State functions
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 @verbatim
bogdanm 0:9b334a45a8ff 17 ==============================================================================
bogdanm 0:9b334a45a8ff 18 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 19 ==============================================================================
bogdanm 0:9b334a45a8ff 20 [..]
bogdanm 0:9b334a45a8ff 21 (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 (#) Call USB_CoreInit() API to initialize the USB Core peripheral.
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 @endverbatim
bogdanm 0:9b334a45a8ff 28 ******************************************************************************
bogdanm 0:9b334a45a8ff 29 * @attention
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 32 *
bogdanm 0:9b334a45a8ff 33 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 34 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 35 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 36 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 37 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 38 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 39 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 40 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 41 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 42 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 43 *
bogdanm 0:9b334a45a8ff 44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 45 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 47 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 50 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 51 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 54 *
bogdanm 0:9b334a45a8ff 55 ******************************************************************************
bogdanm 0:9b334a45a8ff 56 */
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 59 #include "stm32f7xx_hal.h"
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 /** @addtogroup STM32F7xx_LL_USB_DRIVER
bogdanm 0:9b334a45a8ff 62 * @{
bogdanm 0:9b334a45a8ff 63 */
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 #if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED)
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 68 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 69 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 70 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 71 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 72 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 73 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 /** @defgroup PCD_Private_Functions
bogdanm 0:9b334a45a8ff 76 * @{
bogdanm 0:9b334a45a8ff 77 */
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 /** @defgroup LL_USB_Group1 Initialization/de-initialization functions
bogdanm 0:9b334a45a8ff 80 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 81 *
bogdanm 0:9b334a45a8ff 82 @verbatim
bogdanm 0:9b334a45a8ff 83 ===============================================================================
bogdanm 0:9b334a45a8ff 84 ##### Initialization/de-initialization functions #####
bogdanm 0:9b334a45a8ff 85 ===============================================================================
bogdanm 0:9b334a45a8ff 86 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 @endverbatim
bogdanm 0:9b334a45a8ff 89 * @{
bogdanm 0:9b334a45a8ff 90 */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 /**
bogdanm 0:9b334a45a8ff 93 * @brief Initializes the USB Core
bogdanm 0:9b334a45a8ff 94 * @param USBx: USB Instance
bogdanm 0:9b334a45a8ff 95 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm 0:9b334a45a8ff 96 * the configuration information for the specified USBx peripheral.
bogdanm 0:9b334a45a8ff 97 * @retval HAL status
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm 0:9b334a45a8ff 100 {
bogdanm 0:9b334a45a8ff 101 if (cfg.phy_itface == USB_OTG_ULPI_PHY)
bogdanm 0:9b334a45a8ff 102 {
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
bogdanm 0:9b334a45a8ff 105
bogdanm 0:9b334a45a8ff 106 /* Init The ULPI Interface */
bogdanm 0:9b334a45a8ff 107 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL);
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 /* Select vbus source */
bogdanm 0:9b334a45a8ff 110 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI);
bogdanm 0:9b334a45a8ff 111 if(cfg.use_external_vbus == 1)
bogdanm 0:9b334a45a8ff 112 {
bogdanm 0:9b334a45a8ff 113 USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD;
bogdanm 0:9b334a45a8ff 114 }
bogdanm 0:9b334a45a8ff 115 /* Reset after a PHY select */
bogdanm 0:9b334a45a8ff 116 USB_CoreReset(USBx);
bogdanm 0:9b334a45a8ff 117 }
bogdanm 0:9b334a45a8ff 118 else /* FS interface (embedded Phy) */
bogdanm 0:9b334a45a8ff 119 {
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 /* Select FS Embedded PHY */
bogdanm 0:9b334a45a8ff 122 USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /* Reset after a PHY select and set Host mode */
bogdanm 0:9b334a45a8ff 125 USB_CoreReset(USBx);
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /* Deactivate the power down*/
bogdanm 0:9b334a45a8ff 128 USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
bogdanm 0:9b334a45a8ff 129 }
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 if(cfg.dma_enable == ENABLE)
bogdanm 0:9b334a45a8ff 132 {
bogdanm 0:9b334a45a8ff 133 USBx->GAHBCFG |= (USB_OTG_GAHBCFG_HBSTLEN_1 | USB_OTG_GAHBCFG_HBSTLEN_2);
bogdanm 0:9b334a45a8ff 134 USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN;
bogdanm 0:9b334a45a8ff 135 }
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 return HAL_OK;
bogdanm 0:9b334a45a8ff 138 }
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 /**
bogdanm 0:9b334a45a8ff 141 * @brief USB_EnableGlobalInt
bogdanm 0:9b334a45a8ff 142 * Enables the controller's Global Int in the AHB Config reg
bogdanm 0:9b334a45a8ff 143 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 144 * @retval HAL status
bogdanm 0:9b334a45a8ff 145 */
bogdanm 0:9b334a45a8ff 146 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 147 {
bogdanm 0:9b334a45a8ff 148 USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
bogdanm 0:9b334a45a8ff 149 return HAL_OK;
bogdanm 0:9b334a45a8ff 150 }
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 /**
bogdanm 0:9b334a45a8ff 154 * @brief USB_DisableGlobalInt
bogdanm 0:9b334a45a8ff 155 * Disable the controller's Global Int in the AHB Config reg
bogdanm 0:9b334a45a8ff 156 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 157 * @retval HAL status
bogdanm 0:9b334a45a8ff 158 */
bogdanm 0:9b334a45a8ff 159 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 160 {
bogdanm 0:9b334a45a8ff 161 USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
bogdanm 0:9b334a45a8ff 162 return HAL_OK;
bogdanm 0:9b334a45a8ff 163 }
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 /**
bogdanm 0:9b334a45a8ff 166 * @brief USB_SetCurrentMode : Set functional mode
bogdanm 0:9b334a45a8ff 167 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 168 * @param mode : current core mode
bogdanm 0:9b334a45a8ff 169 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 170 * @arg USB_OTG_DEVICE_MODE: Peripheral mode
bogdanm 0:9b334a45a8ff 171 * @arg USB_OTG_HOST_MODE: Host mode
bogdanm 0:9b334a45a8ff 172 * @arg USB_OTG_DRD_MODE: Dual Role Device mode
bogdanm 0:9b334a45a8ff 173 * @retval HAL status
bogdanm 0:9b334a45a8ff 174 */
bogdanm 0:9b334a45a8ff 175 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode)
bogdanm 0:9b334a45a8ff 176 {
bogdanm 0:9b334a45a8ff 177 USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
bogdanm 0:9b334a45a8ff 178
bogdanm 0:9b334a45a8ff 179 if ( mode == USB_OTG_HOST_MODE)
bogdanm 0:9b334a45a8ff 180 {
bogdanm 0:9b334a45a8ff 181 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
bogdanm 0:9b334a45a8ff 182 }
bogdanm 0:9b334a45a8ff 183 else if ( mode == USB_OTG_DEVICE_MODE)
bogdanm 0:9b334a45a8ff 184 {
bogdanm 0:9b334a45a8ff 185 USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
bogdanm 0:9b334a45a8ff 186 }
bogdanm 0:9b334a45a8ff 187 HAL_Delay(50);
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 return HAL_OK;
bogdanm 0:9b334a45a8ff 190 }
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 /**
bogdanm 0:9b334a45a8ff 193 * @brief USB_DevInit : Initializes the USB_OTG controller registers
bogdanm 0:9b334a45a8ff 194 * for device mode
bogdanm 0:9b334a45a8ff 195 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 196 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm 0:9b334a45a8ff 197 * the configuration information for the specified USBx peripheral.
bogdanm 0:9b334a45a8ff 198 * @retval HAL status
bogdanm 0:9b334a45a8ff 199 */
bogdanm 0:9b334a45a8ff 200 HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm 0:9b334a45a8ff 201 {
bogdanm 0:9b334a45a8ff 202 uint32_t i = 0;
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 /*Activate VBUS Sensing B */
bogdanm 0:9b334a45a8ff 205 USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 if (cfg.vbus_sensing_enable == 0)
bogdanm 0:9b334a45a8ff 208 {
bogdanm 0:9b334a45a8ff 209 /*Desactivate VBUS Sensing B */
bogdanm 0:9b334a45a8ff 210 USBx->GCCFG &= ~ USB_OTG_GCCFG_VBDEN;
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 /* B-peripheral session valid override enable*/
bogdanm 0:9b334a45a8ff 213 USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
bogdanm 0:9b334a45a8ff 214 USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
bogdanm 0:9b334a45a8ff 215 }
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 /* Restart the Phy Clock */
bogdanm 0:9b334a45a8ff 218 USBx_PCGCCTL = 0;
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 /* Device mode configuration */
bogdanm 0:9b334a45a8ff 221 USBx_DEVICE->DCFG |= DCFG_FRAME_INTERVAL_80;
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 if(cfg.phy_itface == USB_OTG_ULPI_PHY)
bogdanm 0:9b334a45a8ff 224 {
bogdanm 0:9b334a45a8ff 225 if(cfg.speed == USB_OTG_SPEED_HIGH)
bogdanm 0:9b334a45a8ff 226 {
bogdanm 0:9b334a45a8ff 227 /* Set High speed phy */
bogdanm 0:9b334a45a8ff 228 USB_SetDevSpeed (USBx , USB_OTG_SPEED_HIGH);
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230 else
bogdanm 0:9b334a45a8ff 231 {
bogdanm 0:9b334a45a8ff 232 /* set High speed phy in Full speed mode */
bogdanm 0:9b334a45a8ff 233 USB_SetDevSpeed (USBx , USB_OTG_SPEED_HIGH_IN_FULL);
bogdanm 0:9b334a45a8ff 234 }
bogdanm 0:9b334a45a8ff 235 }
bogdanm 0:9b334a45a8ff 236 else
bogdanm 0:9b334a45a8ff 237 {
bogdanm 0:9b334a45a8ff 238 /* Set Full speed phy */
bogdanm 0:9b334a45a8ff 239 USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL);
bogdanm 0:9b334a45a8ff 240 }
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 /* Flush the FIFOs */
bogdanm 0:9b334a45a8ff 243 USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */
bogdanm 0:9b334a45a8ff 244 USB_FlushRxFifo(USBx);
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 /* Clear all pending Device Interrupts */
bogdanm 0:9b334a45a8ff 248 USBx_DEVICE->DIEPMSK = 0;
bogdanm 0:9b334a45a8ff 249 USBx_DEVICE->DOEPMSK = 0;
bogdanm 0:9b334a45a8ff 250 USBx_DEVICE->DAINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 251 USBx_DEVICE->DAINTMSK = 0;
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 for (i = 0; i < cfg.dev_endpoints; i++)
bogdanm 0:9b334a45a8ff 254 {
bogdanm 0:9b334a45a8ff 255 if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
bogdanm 0:9b334a45a8ff 256 {
bogdanm 0:9b334a45a8ff 257 USBx_INEP(i)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK);
bogdanm 0:9b334a45a8ff 258 }
bogdanm 0:9b334a45a8ff 259 else
bogdanm 0:9b334a45a8ff 260 {
bogdanm 0:9b334a45a8ff 261 USBx_INEP(i)->DIEPCTL = 0;
bogdanm 0:9b334a45a8ff 262 }
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 USBx_INEP(i)->DIEPTSIZ = 0;
bogdanm 0:9b334a45a8ff 265 USBx_INEP(i)->DIEPINT = 0xFF;
bogdanm 0:9b334a45a8ff 266 }
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 for (i = 0; i < cfg.dev_endpoints; i++)
bogdanm 0:9b334a45a8ff 269 {
bogdanm 0:9b334a45a8ff 270 if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
bogdanm 0:9b334a45a8ff 271 {
bogdanm 0:9b334a45a8ff 272 USBx_OUTEP(i)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK);
bogdanm 0:9b334a45a8ff 273 }
bogdanm 0:9b334a45a8ff 274 else
bogdanm 0:9b334a45a8ff 275 {
bogdanm 0:9b334a45a8ff 276 USBx_OUTEP(i)->DOEPCTL = 0;
bogdanm 0:9b334a45a8ff 277 }
bogdanm 0:9b334a45a8ff 278
bogdanm 0:9b334a45a8ff 279 USBx_OUTEP(i)->DOEPTSIZ = 0;
bogdanm 0:9b334a45a8ff 280 USBx_OUTEP(i)->DOEPINT = 0xFF;
bogdanm 0:9b334a45a8ff 281 }
bogdanm 0:9b334a45a8ff 282
bogdanm 0:9b334a45a8ff 283 USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
bogdanm 0:9b334a45a8ff 284
bogdanm 0:9b334a45a8ff 285 if (cfg.dma_enable == 1)
bogdanm 0:9b334a45a8ff 286 {
bogdanm 0:9b334a45a8ff 287 /*Set threshold parameters */
bogdanm 0:9b334a45a8ff 288 USBx_DEVICE->DTHRCTL = (USB_OTG_DTHRCTL_TXTHRLEN_6 | USB_OTG_DTHRCTL_RXTHRLEN_6);
bogdanm 0:9b334a45a8ff 289 USBx_DEVICE->DTHRCTL |= (USB_OTG_DTHRCTL_RXTHREN | USB_OTG_DTHRCTL_ISOTHREN | USB_OTG_DTHRCTL_NONISOTHREN);
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 i= USBx_DEVICE->DTHRCTL;
bogdanm 0:9b334a45a8ff 292 }
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294 /* Disable all interrupts. */
bogdanm 0:9b334a45a8ff 295 USBx->GINTMSK = 0;
bogdanm 0:9b334a45a8ff 296
bogdanm 0:9b334a45a8ff 297 /* Clear any pending interrupts */
bogdanm 0:9b334a45a8ff 298 USBx->GINTSTS = 0xBFFFFFFF;
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 /* Enable the common interrupts */
bogdanm 0:9b334a45a8ff 301 if (cfg.dma_enable == DISABLE)
bogdanm 0:9b334a45a8ff 302 {
bogdanm 0:9b334a45a8ff 303 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
bogdanm 0:9b334a45a8ff 304 }
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 /* Enable interrupts matching to the Device mode ONLY */
bogdanm 0:9b334a45a8ff 307 USBx->GINTMSK |= (USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |\
bogdanm 0:9b334a45a8ff 308 USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |\
bogdanm 0:9b334a45a8ff 309 USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM|\
bogdanm 0:9b334a45a8ff 310 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
bogdanm 0:9b334a45a8ff 311
bogdanm 0:9b334a45a8ff 312 if(cfg.Sof_enable)
bogdanm 0:9b334a45a8ff 313 {
bogdanm 0:9b334a45a8ff 314 USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM;
bogdanm 0:9b334a45a8ff 315 }
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 if (cfg.vbus_sensing_enable == ENABLE)
bogdanm 0:9b334a45a8ff 318 {
bogdanm 0:9b334a45a8ff 319 USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT);
bogdanm 0:9b334a45a8ff 320 }
bogdanm 0:9b334a45a8ff 321
bogdanm 0:9b334a45a8ff 322 return HAL_OK;
bogdanm 0:9b334a45a8ff 323 }
bogdanm 0:9b334a45a8ff 324
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 /**
bogdanm 0:9b334a45a8ff 327 * @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
bogdanm 0:9b334a45a8ff 328 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 329 * @param num : FIFO number
bogdanm 0:9b334a45a8ff 330 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 331 15 means Flush all Tx FIFOs
bogdanm 0:9b334a45a8ff 332 * @retval HAL status
bogdanm 0:9b334a45a8ff 333 */
bogdanm 0:9b334a45a8ff 334 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num )
bogdanm 0:9b334a45a8ff 335 {
bogdanm 0:9b334a45a8ff 336 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338 USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 6));
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 do
bogdanm 0:9b334a45a8ff 341 {
bogdanm 0:9b334a45a8ff 342 if (++count > 200000)
bogdanm 0:9b334a45a8ff 343 {
bogdanm 0:9b334a45a8ff 344 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 345 }
bogdanm 0:9b334a45a8ff 346 }
bogdanm 0:9b334a45a8ff 347 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
bogdanm 0:9b334a45a8ff 348
bogdanm 0:9b334a45a8ff 349 return HAL_OK;
bogdanm 0:9b334a45a8ff 350 }
bogdanm 0:9b334a45a8ff 351
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 /**
bogdanm 0:9b334a45a8ff 354 * @brief USB_FlushRxFifo : Flush Rx FIFO
bogdanm 0:9b334a45a8ff 355 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 356 * @retval HAL status
bogdanm 0:9b334a45a8ff 357 */
bogdanm 0:9b334a45a8ff 358 HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 359 {
bogdanm 0:9b334a45a8ff 360 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362 USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
bogdanm 0:9b334a45a8ff 363
bogdanm 0:9b334a45a8ff 364 do
bogdanm 0:9b334a45a8ff 365 {
bogdanm 0:9b334a45a8ff 366 if (++count > 200000)
bogdanm 0:9b334a45a8ff 367 {
bogdanm 0:9b334a45a8ff 368 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 369 }
bogdanm 0:9b334a45a8ff 370 }
bogdanm 0:9b334a45a8ff 371 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
bogdanm 0:9b334a45a8ff 372
bogdanm 0:9b334a45a8ff 373 return HAL_OK;
bogdanm 0:9b334a45a8ff 374 }
bogdanm 0:9b334a45a8ff 375
bogdanm 0:9b334a45a8ff 376 /**
bogdanm 0:9b334a45a8ff 377 * @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register
bogdanm 0:9b334a45a8ff 378 * depending the PHY type and the enumeration speed of the device.
bogdanm 0:9b334a45a8ff 379 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 380 * @param speed : device speed
bogdanm 0:9b334a45a8ff 381 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 382 * @arg USB_OTG_SPEED_HIGH: High speed mode
bogdanm 0:9b334a45a8ff 383 * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode
bogdanm 0:9b334a45a8ff 384 * @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm 0:9b334a45a8ff 385 * @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm 0:9b334a45a8ff 386 * @retval Hal status
bogdanm 0:9b334a45a8ff 387 */
bogdanm 0:9b334a45a8ff 388 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
bogdanm 0:9b334a45a8ff 389 {
bogdanm 0:9b334a45a8ff 390 USBx_DEVICE->DCFG |= speed;
bogdanm 0:9b334a45a8ff 391 return HAL_OK;
bogdanm 0:9b334a45a8ff 392 }
bogdanm 0:9b334a45a8ff 393
bogdanm 0:9b334a45a8ff 394 /**
bogdanm 0:9b334a45a8ff 395 * @brief USB_GetDevSpeed :Return the Dev Speed
bogdanm 0:9b334a45a8ff 396 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 397 * @retval speed : device speed
bogdanm 0:9b334a45a8ff 398 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 399 * @arg USB_OTG_SPEED_HIGH: High speed mode
bogdanm 0:9b334a45a8ff 400 * @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm 0:9b334a45a8ff 401 * @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm 0:9b334a45a8ff 402 */
bogdanm 0:9b334a45a8ff 403 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 404 {
bogdanm 0:9b334a45a8ff 405 uint8_t speed = 0;
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ)
bogdanm 0:9b334a45a8ff 408 {
bogdanm 0:9b334a45a8ff 409 speed = USB_OTG_SPEED_HIGH;
bogdanm 0:9b334a45a8ff 410 }
bogdanm 0:9b334a45a8ff 411 else if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)||
bogdanm 0:9b334a45a8ff 412 ((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ))
bogdanm 0:9b334a45a8ff 413 {
bogdanm 0:9b334a45a8ff 414 speed = USB_OTG_SPEED_FULL;
bogdanm 0:9b334a45a8ff 415 }
bogdanm 0:9b334a45a8ff 416 else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
bogdanm 0:9b334a45a8ff 417 {
bogdanm 0:9b334a45a8ff 418 speed = USB_OTG_SPEED_LOW;
bogdanm 0:9b334a45a8ff 419 }
bogdanm 0:9b334a45a8ff 420
bogdanm 0:9b334a45a8ff 421 return speed;
bogdanm 0:9b334a45a8ff 422 }
bogdanm 0:9b334a45a8ff 423
bogdanm 0:9b334a45a8ff 424 /**
bogdanm 0:9b334a45a8ff 425 * @brief Activate and configure an endpoint
bogdanm 0:9b334a45a8ff 426 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 427 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 428 * @retval HAL status
bogdanm 0:9b334a45a8ff 429 */
bogdanm 0:9b334a45a8ff 430 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 431 {
bogdanm 0:9b334a45a8ff 432 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 433 {
bogdanm 0:9b334a45a8ff 434 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
bogdanm 0:9b334a45a8ff 435
bogdanm 0:9b334a45a8ff 436 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
bogdanm 0:9b334a45a8ff 437 {
bogdanm 0:9b334a45a8ff 438 USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 439 ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 440 }
bogdanm 0:9b334a45a8ff 441
bogdanm 0:9b334a45a8ff 442 }
bogdanm 0:9b334a45a8ff 443 else
bogdanm 0:9b334a45a8ff 444 {
bogdanm 0:9b334a45a8ff 445 USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
bogdanm 0:9b334a45a8ff 446
bogdanm 0:9b334a45a8ff 447 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
bogdanm 0:9b334a45a8ff 448 {
bogdanm 0:9b334a45a8ff 449 USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 450 (USB_OTG_DIEPCTL_SD0PID_SEVNFRM)| (USB_OTG_DOEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 451 }
bogdanm 0:9b334a45a8ff 452 }
bogdanm 0:9b334a45a8ff 453 return HAL_OK;
bogdanm 0:9b334a45a8ff 454 }
bogdanm 0:9b334a45a8ff 455 /**
bogdanm 0:9b334a45a8ff 456 * @brief Activate and configure a dedicated endpoint
bogdanm 0:9b334a45a8ff 457 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 458 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 459 * @retval HAL status
bogdanm 0:9b334a45a8ff 460 */
bogdanm 0:9b334a45a8ff 461 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 462 {
bogdanm 0:9b334a45a8ff 463 static __IO uint32_t debug = 0;
bogdanm 0:9b334a45a8ff 464
bogdanm 0:9b334a45a8ff 465 /* Read DEPCTLn register */
bogdanm 0:9b334a45a8ff 466 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 467 {
bogdanm 0:9b334a45a8ff 468 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
bogdanm 0:9b334a45a8ff 469 {
bogdanm 0:9b334a45a8ff 470 USBx_INEP(ep->num)->DIEPCTL |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 471 ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 472 }
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474
bogdanm 0:9b334a45a8ff 475 debug |= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 476 ((ep->num) << 22 ) | (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) | (USB_OTG_DIEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 477
bogdanm 0:9b334a45a8ff 478 USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
bogdanm 0:9b334a45a8ff 479 }
bogdanm 0:9b334a45a8ff 480 else
bogdanm 0:9b334a45a8ff 481 {
bogdanm 0:9b334a45a8ff 482 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
bogdanm 0:9b334a45a8ff 483 {
bogdanm 0:9b334a45a8ff 484 USBx_OUTEP(ep->num)->DOEPCTL |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 485 ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 486
bogdanm 0:9b334a45a8ff 487 debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0)*USB_OTG_EP_REG_SIZE);
bogdanm 0:9b334a45a8ff 488 debug = (uint32_t )&USBx_OUTEP(ep->num)->DOEPCTL;
bogdanm 0:9b334a45a8ff 489 debug |= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) | (ep->type << 18 ) |\
bogdanm 0:9b334a45a8ff 490 ((ep->num) << 22 ) | (USB_OTG_DOEPCTL_USBAEP));
bogdanm 0:9b334a45a8ff 491 }
bogdanm 0:9b334a45a8ff 492
bogdanm 0:9b334a45a8ff 493 USBx_DEVICE->DEACHMSK |= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
bogdanm 0:9b334a45a8ff 494 }
bogdanm 0:9b334a45a8ff 495
bogdanm 0:9b334a45a8ff 496 return HAL_OK;
bogdanm 0:9b334a45a8ff 497 }
bogdanm 0:9b334a45a8ff 498 /**
bogdanm 0:9b334a45a8ff 499 * @brief De-activate and de-initialize an endpoint
bogdanm 0:9b334a45a8ff 500 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 501 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 502 * @retval HAL status
bogdanm 0:9b334a45a8ff 503 */
bogdanm 0:9b334a45a8ff 504 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 505 {
bogdanm 0:9b334a45a8ff 506 /* Read DEPCTLn register */
bogdanm 0:9b334a45a8ff 507 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 508 {
bogdanm 0:9b334a45a8ff 509 USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
bogdanm 0:9b334a45a8ff 510 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
bogdanm 0:9b334a45a8ff 511 USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
bogdanm 0:9b334a45a8ff 512 }
bogdanm 0:9b334a45a8ff 513 else
bogdanm 0:9b334a45a8ff 514 {
bogdanm 0:9b334a45a8ff 515
bogdanm 0:9b334a45a8ff 516 USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
bogdanm 0:9b334a45a8ff 517 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
bogdanm 0:9b334a45a8ff 518 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
bogdanm 0:9b334a45a8ff 519 }
bogdanm 0:9b334a45a8ff 520 return HAL_OK;
bogdanm 0:9b334a45a8ff 521 }
bogdanm 0:9b334a45a8ff 522
bogdanm 0:9b334a45a8ff 523 /**
bogdanm 0:9b334a45a8ff 524 * @brief De-activate and de-initialize a dedicated endpoint
bogdanm 0:9b334a45a8ff 525 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 526 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 527 * @retval HAL status
bogdanm 0:9b334a45a8ff 528 */
bogdanm 0:9b334a45a8ff 529 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 530 {
bogdanm 0:9b334a45a8ff 531 /* Read DEPCTLn register */
bogdanm 0:9b334a45a8ff 532 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 533 {
bogdanm 0:9b334a45a8ff 534 USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
bogdanm 0:9b334a45a8ff 535 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
bogdanm 0:9b334a45a8ff 536 }
bogdanm 0:9b334a45a8ff 537 else
bogdanm 0:9b334a45a8ff 538 {
bogdanm 0:9b334a45a8ff 539 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
bogdanm 0:9b334a45a8ff 540 USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
bogdanm 0:9b334a45a8ff 541 }
bogdanm 0:9b334a45a8ff 542 return HAL_OK;
bogdanm 0:9b334a45a8ff 543 }
bogdanm 0:9b334a45a8ff 544
bogdanm 0:9b334a45a8ff 545 /**
bogdanm 0:9b334a45a8ff 546 * @brief USB_EPStartXfer : setup and starts a transfer over an EP
bogdanm 0:9b334a45a8ff 547 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 548 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 549 * @param dma: USB dma enabled or disabled
bogdanm 0:9b334a45a8ff 550 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 551 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 552 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 553 * @retval HAL status
bogdanm 0:9b334a45a8ff 554 */
bogdanm 0:9b334a45a8ff 555 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
bogdanm 0:9b334a45a8ff 556 {
bogdanm 0:9b334a45a8ff 557 uint16_t pktcnt = 0;
bogdanm 0:9b334a45a8ff 558
bogdanm 0:9b334a45a8ff 559 /* IN endpoint */
bogdanm 0:9b334a45a8ff 560 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 561 {
bogdanm 0:9b334a45a8ff 562 /* Zero Length Packet? */
bogdanm 0:9b334a45a8ff 563 if (ep->xfer_len == 0)
bogdanm 0:9b334a45a8ff 564 {
bogdanm 0:9b334a45a8ff 565 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 566 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 567 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 568 }
bogdanm 0:9b334a45a8ff 569 else
bogdanm 0:9b334a45a8ff 570 {
bogdanm 0:9b334a45a8ff 571 /* Program the transfer size and packet count
bogdanm 0:9b334a45a8ff 572 * as follows: xfersize = N * maxpacket +
bogdanm 0:9b334a45a8ff 573 * short_packet pktcnt = N + (short_packet
bogdanm 0:9b334a45a8ff 574 * exist ? 1 : 0)
bogdanm 0:9b334a45a8ff 575 */
bogdanm 0:9b334a45a8ff 576 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 577 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 578 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ;
bogdanm 0:9b334a45a8ff 579 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
bogdanm 0:9b334a45a8ff 580
bogdanm 0:9b334a45a8ff 581 if (ep->type == EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 582 {
bogdanm 0:9b334a45a8ff 583 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
bogdanm 0:9b334a45a8ff 584 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29));
bogdanm 0:9b334a45a8ff 585 }
bogdanm 0:9b334a45a8ff 586 }
bogdanm 0:9b334a45a8ff 587
bogdanm 0:9b334a45a8ff 588 if (dma == 1)
bogdanm 0:9b334a45a8ff 589 {
bogdanm 0:9b334a45a8ff 590 USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
bogdanm 0:9b334a45a8ff 591 }
bogdanm 0:9b334a45a8ff 592 else
bogdanm 0:9b334a45a8ff 593 {
bogdanm 0:9b334a45a8ff 594 if (ep->type != EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 595 {
bogdanm 0:9b334a45a8ff 596 /* Enable the Tx FIFO Empty Interrupt for this EP */
bogdanm 0:9b334a45a8ff 597 if (ep->xfer_len > 0)
bogdanm 0:9b334a45a8ff 598 {
bogdanm 0:9b334a45a8ff 599 USBx_DEVICE->DIEPEMPMSK |= 1 << ep->num;
bogdanm 0:9b334a45a8ff 600 }
bogdanm 0:9b334a45a8ff 601 }
bogdanm 0:9b334a45a8ff 602 }
bogdanm 0:9b334a45a8ff 603
bogdanm 0:9b334a45a8ff 604 if (ep->type == EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 605 {
bogdanm 0:9b334a45a8ff 606 if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
bogdanm 0:9b334a45a8ff 607 {
bogdanm 0:9b334a45a8ff 608 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
bogdanm 0:9b334a45a8ff 609 }
bogdanm 0:9b334a45a8ff 610 else
bogdanm 0:9b334a45a8ff 611 {
bogdanm 0:9b334a45a8ff 612 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
bogdanm 0:9b334a45a8ff 613 }
bogdanm 0:9b334a45a8ff 614 }
bogdanm 0:9b334a45a8ff 615
bogdanm 0:9b334a45a8ff 616 /* EP enable, IN data in FIFO */
bogdanm 0:9b334a45a8ff 617 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
bogdanm 0:9b334a45a8ff 618
bogdanm 0:9b334a45a8ff 619 if (ep->type == EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 620 {
bogdanm 0:9b334a45a8ff 621 USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len, dma);
bogdanm 0:9b334a45a8ff 622 }
bogdanm 0:9b334a45a8ff 623 }
bogdanm 0:9b334a45a8ff 624 else /* OUT endpoint */
bogdanm 0:9b334a45a8ff 625 {
bogdanm 0:9b334a45a8ff 626 /* Program the transfer size and packet count as follows:
bogdanm 0:9b334a45a8ff 627 * pktcnt = N
bogdanm 0:9b334a45a8ff 628 * xfersize = N * maxpacket
bogdanm 0:9b334a45a8ff 629 */
bogdanm 0:9b334a45a8ff 630 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 631 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 632
bogdanm 0:9b334a45a8ff 633 if (ep->xfer_len == 0)
bogdanm 0:9b334a45a8ff 634 {
bogdanm 0:9b334a45a8ff 635 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
bogdanm 0:9b334a45a8ff 636 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 637 }
bogdanm 0:9b334a45a8ff 638 else
bogdanm 0:9b334a45a8ff 639 {
bogdanm 0:9b334a45a8ff 640 pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket;
bogdanm 0:9b334a45a8ff 641 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19));
bogdanm 0:9b334a45a8ff 642 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt));
bogdanm 0:9b334a45a8ff 643 }
bogdanm 0:9b334a45a8ff 644
bogdanm 0:9b334a45a8ff 645 if (dma == 1)
bogdanm 0:9b334a45a8ff 646 {
bogdanm 0:9b334a45a8ff 647 USBx_OUTEP(ep->num)->DOEPDMA = (uint32_t)ep->xfer_buff;
bogdanm 0:9b334a45a8ff 648 }
bogdanm 0:9b334a45a8ff 649
bogdanm 0:9b334a45a8ff 650 if (ep->type == EP_TYPE_ISOC)
bogdanm 0:9b334a45a8ff 651 {
bogdanm 0:9b334a45a8ff 652 if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
bogdanm 0:9b334a45a8ff 653 {
bogdanm 0:9b334a45a8ff 654 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM;
bogdanm 0:9b334a45a8ff 655 }
bogdanm 0:9b334a45a8ff 656 else
bogdanm 0:9b334a45a8ff 657 {
bogdanm 0:9b334a45a8ff 658 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
bogdanm 0:9b334a45a8ff 659 }
bogdanm 0:9b334a45a8ff 660 }
bogdanm 0:9b334a45a8ff 661 /* EP enable */
bogdanm 0:9b334a45a8ff 662 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
bogdanm 0:9b334a45a8ff 663 }
bogdanm 0:9b334a45a8ff 664 return HAL_OK;
bogdanm 0:9b334a45a8ff 665 }
bogdanm 0:9b334a45a8ff 666
bogdanm 0:9b334a45a8ff 667 /**
bogdanm 0:9b334a45a8ff 668 * @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
bogdanm 0:9b334a45a8ff 669 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 670 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 671 * @param dma: USB dma enabled or disabled
bogdanm 0:9b334a45a8ff 672 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 673 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 674 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 675 * @retval HAL status
bogdanm 0:9b334a45a8ff 676 */
bogdanm 0:9b334a45a8ff 677 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma)
bogdanm 0:9b334a45a8ff 678 {
bogdanm 0:9b334a45a8ff 679 /* IN endpoint */
bogdanm 0:9b334a45a8ff 680 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 681 {
bogdanm 0:9b334a45a8ff 682 /* Zero Length Packet? */
bogdanm 0:9b334a45a8ff 683 if (ep->xfer_len == 0)
bogdanm 0:9b334a45a8ff 684 {
bogdanm 0:9b334a45a8ff 685 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 686 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 687 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 688 }
bogdanm 0:9b334a45a8ff 689 else
bogdanm 0:9b334a45a8ff 690 {
bogdanm 0:9b334a45a8ff 691 /* Program the transfer size and packet count
bogdanm 0:9b334a45a8ff 692 * as follows: xfersize = N * maxpacket +
bogdanm 0:9b334a45a8ff 693 * short_packet pktcnt = N + (short_packet
bogdanm 0:9b334a45a8ff 694 * exist ? 1 : 0)
bogdanm 0:9b334a45a8ff 695 */
bogdanm 0:9b334a45a8ff 696 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 697 USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 698
bogdanm 0:9b334a45a8ff 699 if(ep->xfer_len > ep->maxpacket)
bogdanm 0:9b334a45a8ff 700 {
bogdanm 0:9b334a45a8ff 701 ep->xfer_len = ep->maxpacket;
bogdanm 0:9b334a45a8ff 702 }
bogdanm 0:9b334a45a8ff 703 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 704 USBx_INEP(ep->num)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
bogdanm 0:9b334a45a8ff 705
bogdanm 0:9b334a45a8ff 706 }
bogdanm 0:9b334a45a8ff 707
bogdanm 0:9b334a45a8ff 708 if (dma == 1)
bogdanm 0:9b334a45a8ff 709 {
bogdanm 0:9b334a45a8ff 710 USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
bogdanm 0:9b334a45a8ff 711 }
bogdanm 0:9b334a45a8ff 712 else
bogdanm 0:9b334a45a8ff 713 {
bogdanm 0:9b334a45a8ff 714 /* Enable the Tx FIFO Empty Interrupt for this EP */
bogdanm 0:9b334a45a8ff 715 if (ep->xfer_len > 0)
bogdanm 0:9b334a45a8ff 716 {
bogdanm 0:9b334a45a8ff 717 USBx_DEVICE->DIEPEMPMSK |= 1 << (ep->num);
bogdanm 0:9b334a45a8ff 718 }
bogdanm 0:9b334a45a8ff 719 }
bogdanm 0:9b334a45a8ff 720
bogdanm 0:9b334a45a8ff 721 /* EP enable, IN data in FIFO */
bogdanm 0:9b334a45a8ff 722 USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
bogdanm 0:9b334a45a8ff 723 }
bogdanm 0:9b334a45a8ff 724 else /* OUT endpoint */
bogdanm 0:9b334a45a8ff 725 {
bogdanm 0:9b334a45a8ff 726 /* Program the transfer size and packet count as follows:
bogdanm 0:9b334a45a8ff 727 * pktcnt = N
bogdanm 0:9b334a45a8ff 728 * xfersize = N * maxpacket
bogdanm 0:9b334a45a8ff 729 */
bogdanm 0:9b334a45a8ff 730 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
bogdanm 0:9b334a45a8ff 731 USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
bogdanm 0:9b334a45a8ff 732
bogdanm 0:9b334a45a8ff 733 if (ep->xfer_len > 0)
bogdanm 0:9b334a45a8ff 734 {
bogdanm 0:9b334a45a8ff 735 ep->xfer_len = ep->maxpacket;
bogdanm 0:9b334a45a8ff 736 }
bogdanm 0:9b334a45a8ff 737
bogdanm 0:9b334a45a8ff 738 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
bogdanm 0:9b334a45a8ff 739 USBx_OUTEP(ep->num)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket));
bogdanm 0:9b334a45a8ff 740
bogdanm 0:9b334a45a8ff 741
bogdanm 0:9b334a45a8ff 742 if (dma == 1)
bogdanm 0:9b334a45a8ff 743 {
bogdanm 0:9b334a45a8ff 744 USBx_OUTEP(ep->num)->DOEPDMA = (uint32_t)(ep->xfer_buff);
bogdanm 0:9b334a45a8ff 745 }
bogdanm 0:9b334a45a8ff 746
bogdanm 0:9b334a45a8ff 747 /* EP enable */
bogdanm 0:9b334a45a8ff 748 USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
bogdanm 0:9b334a45a8ff 749 }
bogdanm 0:9b334a45a8ff 750 return HAL_OK;
bogdanm 0:9b334a45a8ff 751 }
bogdanm 0:9b334a45a8ff 752
bogdanm 0:9b334a45a8ff 753 /**
bogdanm 0:9b334a45a8ff 754 * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
bogdanm 0:9b334a45a8ff 755 * with the EP/channel
bogdanm 0:9b334a45a8ff 756 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 757 * @param src : pointer to source buffer
bogdanm 0:9b334a45a8ff 758 * @param ch_ep_num : endpoint or host channel number
bogdanm 0:9b334a45a8ff 759 * @param len : Number of bytes to write
bogdanm 0:9b334a45a8ff 760 * @param dma: USB dma enabled or disabled
bogdanm 0:9b334a45a8ff 761 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 762 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 763 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 764 * @retval HAL status
bogdanm 0:9b334a45a8ff 765 */
bogdanm 0:9b334a45a8ff 766 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma)
bogdanm 0:9b334a45a8ff 767 {
bogdanm 0:9b334a45a8ff 768 uint32_t count32b= 0 , i= 0;
bogdanm 0:9b334a45a8ff 769
bogdanm 0:9b334a45a8ff 770 if (dma == 0)
bogdanm 0:9b334a45a8ff 771 {
bogdanm 0:9b334a45a8ff 772 count32b = (len + 3) / 4;
bogdanm 0:9b334a45a8ff 773 for (i = 0; i < count32b; i++, src += 4)
bogdanm 0:9b334a45a8ff 774 {
bogdanm 0:9b334a45a8ff 775 USBx_DFIFO(ch_ep_num) = *((__packed uint32_t *)src);
bogdanm 0:9b334a45a8ff 776 }
bogdanm 0:9b334a45a8ff 777 }
bogdanm 0:9b334a45a8ff 778 return HAL_OK;
bogdanm 0:9b334a45a8ff 779 }
bogdanm 0:9b334a45a8ff 780
bogdanm 0:9b334a45a8ff 781 /**
bogdanm 0:9b334a45a8ff 782 * @brief USB_ReadPacket : read a packet from the Tx FIFO associated
bogdanm 0:9b334a45a8ff 783 * with the EP/channel
bogdanm 0:9b334a45a8ff 784 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 785 * @param src : source pointer
bogdanm 0:9b334a45a8ff 786 * @param ch_ep_num : endpoint or host channel number
bogdanm 0:9b334a45a8ff 787 * @param len : Number of bytes to read
bogdanm 0:9b334a45a8ff 788 * @param dma: USB dma enabled or disabled
bogdanm 0:9b334a45a8ff 789 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 790 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 791 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 792 * @retval pointer to destination buffer
bogdanm 0:9b334a45a8ff 793 */
bogdanm 0:9b334a45a8ff 794 void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
bogdanm 0:9b334a45a8ff 795 {
bogdanm 0:9b334a45a8ff 796 uint32_t i=0;
bogdanm 0:9b334a45a8ff 797 uint32_t count32b = (len + 3) / 4;
bogdanm 0:9b334a45a8ff 798
bogdanm 0:9b334a45a8ff 799 for ( i = 0; i < count32b; i++, dest += 4 )
bogdanm 0:9b334a45a8ff 800 {
bogdanm 0:9b334a45a8ff 801 *(__packed uint32_t *)dest = USBx_DFIFO(0);
bogdanm 0:9b334a45a8ff 802
bogdanm 0:9b334a45a8ff 803 }
bogdanm 0:9b334a45a8ff 804 return ((void *)dest);
bogdanm 0:9b334a45a8ff 805 }
bogdanm 0:9b334a45a8ff 806
bogdanm 0:9b334a45a8ff 807 /**
bogdanm 0:9b334a45a8ff 808 * @brief USB_EPSetStall : set a stall condition over an EP
bogdanm 0:9b334a45a8ff 809 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 810 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 811 * @retval HAL status
bogdanm 0:9b334a45a8ff 812 */
bogdanm 0:9b334a45a8ff 813 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 814 {
bogdanm 0:9b334a45a8ff 815 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 816 {
bogdanm 0:9b334a45a8ff 817 if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0)
bogdanm 0:9b334a45a8ff 818 {
bogdanm 0:9b334a45a8ff 819 USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
bogdanm 0:9b334a45a8ff 820 }
bogdanm 0:9b334a45a8ff 821 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_STALL;
bogdanm 0:9b334a45a8ff 822 }
bogdanm 0:9b334a45a8ff 823 else
bogdanm 0:9b334a45a8ff 824 {
bogdanm 0:9b334a45a8ff 825 if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0)
bogdanm 0:9b334a45a8ff 826 {
bogdanm 0:9b334a45a8ff 827 USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
bogdanm 0:9b334a45a8ff 828 }
bogdanm 0:9b334a45a8ff 829 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_STALL;
bogdanm 0:9b334a45a8ff 830 }
bogdanm 0:9b334a45a8ff 831 return HAL_OK;
bogdanm 0:9b334a45a8ff 832 }
bogdanm 0:9b334a45a8ff 833
bogdanm 0:9b334a45a8ff 834
bogdanm 0:9b334a45a8ff 835 /**
bogdanm 0:9b334a45a8ff 836 * @brief USB_EPClearStall : Clear a stall condition over an EP
bogdanm 0:9b334a45a8ff 837 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 838 * @param ep: pointer to endpoint structure
bogdanm 0:9b334a45a8ff 839 * @retval HAL status
bogdanm 0:9b334a45a8ff 840 */
bogdanm 0:9b334a45a8ff 841 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
bogdanm 0:9b334a45a8ff 842 {
bogdanm 0:9b334a45a8ff 843 if (ep->is_in == 1)
bogdanm 0:9b334a45a8ff 844 {
bogdanm 0:9b334a45a8ff 845 USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
bogdanm 0:9b334a45a8ff 846 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
bogdanm 0:9b334a45a8ff 847 {
bogdanm 0:9b334a45a8ff 848 USBx_INEP(ep->num)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
bogdanm 0:9b334a45a8ff 849 }
bogdanm 0:9b334a45a8ff 850 }
bogdanm 0:9b334a45a8ff 851 else
bogdanm 0:9b334a45a8ff 852 {
bogdanm 0:9b334a45a8ff 853 USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
bogdanm 0:9b334a45a8ff 854 if (ep->type == EP_TYPE_INTR || ep->type == EP_TYPE_BULK)
bogdanm 0:9b334a45a8ff 855 {
bogdanm 0:9b334a45a8ff 856 USBx_OUTEP(ep->num)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
bogdanm 0:9b334a45a8ff 857 }
bogdanm 0:9b334a45a8ff 858 }
bogdanm 0:9b334a45a8ff 859 return HAL_OK;
bogdanm 0:9b334a45a8ff 860 }
bogdanm 0:9b334a45a8ff 861
bogdanm 0:9b334a45a8ff 862 /**
bogdanm 0:9b334a45a8ff 863 * @brief USB_StopDevice : Stop the usb device mode
bogdanm 0:9b334a45a8ff 864 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 865 * @retval HAL status
bogdanm 0:9b334a45a8ff 866 */
bogdanm 0:9b334a45a8ff 867 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 868 {
bogdanm 0:9b334a45a8ff 869 uint32_t i;
bogdanm 0:9b334a45a8ff 870
bogdanm 0:9b334a45a8ff 871 /* Clear Pending interrupt */
bogdanm 0:9b334a45a8ff 872 for (i = 0; i < 15 ; i++)
bogdanm 0:9b334a45a8ff 873 {
bogdanm 0:9b334a45a8ff 874 USBx_INEP(i)->DIEPINT = 0xFF;
bogdanm 0:9b334a45a8ff 875 USBx_OUTEP(i)->DOEPINT = 0xFF;
bogdanm 0:9b334a45a8ff 876 }
bogdanm 0:9b334a45a8ff 877 USBx_DEVICE->DAINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 878
bogdanm 0:9b334a45a8ff 879 /* Clear interrupt masks */
bogdanm 0:9b334a45a8ff 880 USBx_DEVICE->DIEPMSK = 0;
bogdanm 0:9b334a45a8ff 881 USBx_DEVICE->DOEPMSK = 0;
bogdanm 0:9b334a45a8ff 882 USBx_DEVICE->DAINTMSK = 0;
bogdanm 0:9b334a45a8ff 883
bogdanm 0:9b334a45a8ff 884 /* Flush the FIFO */
bogdanm 0:9b334a45a8ff 885 USB_FlushRxFifo(USBx);
bogdanm 0:9b334a45a8ff 886 USB_FlushTxFifo(USBx , 0x10 );
bogdanm 0:9b334a45a8ff 887
bogdanm 0:9b334a45a8ff 888 return HAL_OK;
bogdanm 0:9b334a45a8ff 889 }
bogdanm 0:9b334a45a8ff 890
bogdanm 0:9b334a45a8ff 891 /**
bogdanm 0:9b334a45a8ff 892 * @brief USB_SetDevAddress : Stop the usb device mode
bogdanm 0:9b334a45a8ff 893 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 894 * @param address : new device address to be assigned
bogdanm 0:9b334a45a8ff 895 * This parameter can be a value from 0 to 255
bogdanm 0:9b334a45a8ff 896 * @retval HAL status
bogdanm 0:9b334a45a8ff 897 */
bogdanm 0:9b334a45a8ff 898 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address)
bogdanm 0:9b334a45a8ff 899 {
bogdanm 0:9b334a45a8ff 900 USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD);
bogdanm 0:9b334a45a8ff 901 USBx_DEVICE->DCFG |= (address << 4) & USB_OTG_DCFG_DAD ;
bogdanm 0:9b334a45a8ff 902
bogdanm 0:9b334a45a8ff 903 return HAL_OK;
bogdanm 0:9b334a45a8ff 904 }
bogdanm 0:9b334a45a8ff 905
bogdanm 0:9b334a45a8ff 906 /**
bogdanm 0:9b334a45a8ff 907 * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
bogdanm 0:9b334a45a8ff 908 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 909 * @retval HAL status
bogdanm 0:9b334a45a8ff 910 */
bogdanm 0:9b334a45a8ff 911 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 912 {
bogdanm 0:9b334a45a8ff 913 USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ;
bogdanm 0:9b334a45a8ff 914 HAL_Delay(3);
bogdanm 0:9b334a45a8ff 915
bogdanm 0:9b334a45a8ff 916 return HAL_OK;
bogdanm 0:9b334a45a8ff 917 }
bogdanm 0:9b334a45a8ff 918
bogdanm 0:9b334a45a8ff 919 /**
bogdanm 0:9b334a45a8ff 920 * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
bogdanm 0:9b334a45a8ff 921 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 922 * @retval HAL status
bogdanm 0:9b334a45a8ff 923 */
bogdanm 0:9b334a45a8ff 924 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 925 {
bogdanm 0:9b334a45a8ff 926 USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS ;
bogdanm 0:9b334a45a8ff 927 HAL_Delay(3);
bogdanm 0:9b334a45a8ff 928
bogdanm 0:9b334a45a8ff 929 return HAL_OK;
bogdanm 0:9b334a45a8ff 930 }
bogdanm 0:9b334a45a8ff 931
bogdanm 0:9b334a45a8ff 932 /**
bogdanm 0:9b334a45a8ff 933 * @brief USB_ReadInterrupts: return the global USB interrupt status
bogdanm 0:9b334a45a8ff 934 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 935 * @retval HAL status
bogdanm 0:9b334a45a8ff 936 */
bogdanm 0:9b334a45a8ff 937 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 938 {
bogdanm 0:9b334a45a8ff 939 uint32_t v = 0;
bogdanm 0:9b334a45a8ff 940
bogdanm 0:9b334a45a8ff 941 v = USBx->GINTSTS;
bogdanm 0:9b334a45a8ff 942 v &= USBx->GINTMSK;
bogdanm 0:9b334a45a8ff 943 return v;
bogdanm 0:9b334a45a8ff 944 }
bogdanm 0:9b334a45a8ff 945
bogdanm 0:9b334a45a8ff 946 /**
bogdanm 0:9b334a45a8ff 947 * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
bogdanm 0:9b334a45a8ff 948 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 949 * @retval HAL status
bogdanm 0:9b334a45a8ff 950 */
bogdanm 0:9b334a45a8ff 951 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 952 {
bogdanm 0:9b334a45a8ff 953 uint32_t v;
bogdanm 0:9b334a45a8ff 954 v = USBx_DEVICE->DAINT;
bogdanm 0:9b334a45a8ff 955 v &= USBx_DEVICE->DAINTMSK;
bogdanm 0:9b334a45a8ff 956 return ((v & 0xffff0000) >> 16);
bogdanm 0:9b334a45a8ff 957 }
bogdanm 0:9b334a45a8ff 958
bogdanm 0:9b334a45a8ff 959 /**
bogdanm 0:9b334a45a8ff 960 * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
bogdanm 0:9b334a45a8ff 961 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 962 * @retval HAL status
bogdanm 0:9b334a45a8ff 963 */
bogdanm 0:9b334a45a8ff 964 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 965 {
bogdanm 0:9b334a45a8ff 966 uint32_t v;
bogdanm 0:9b334a45a8ff 967 v = USBx_DEVICE->DAINT;
bogdanm 0:9b334a45a8ff 968 v &= USBx_DEVICE->DAINTMSK;
bogdanm 0:9b334a45a8ff 969 return ((v & 0xFFFF));
bogdanm 0:9b334a45a8ff 970 }
bogdanm 0:9b334a45a8ff 971
bogdanm 0:9b334a45a8ff 972 /**
bogdanm 0:9b334a45a8ff 973 * @brief Returns Device OUT EP Interrupt register
bogdanm 0:9b334a45a8ff 974 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 975 * @param epnum : endpoint number
bogdanm 0:9b334a45a8ff 976 * This parameter can be a value from 0 to 15
bogdanm 0:9b334a45a8ff 977 * @retval Device OUT EP Interrupt register
bogdanm 0:9b334a45a8ff 978 */
bogdanm 0:9b334a45a8ff 979 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
bogdanm 0:9b334a45a8ff 980 {
bogdanm 0:9b334a45a8ff 981 uint32_t v;
bogdanm 0:9b334a45a8ff 982 v = USBx_OUTEP(epnum)->DOEPINT;
bogdanm 0:9b334a45a8ff 983 v &= USBx_DEVICE->DOEPMSK;
bogdanm 0:9b334a45a8ff 984 return v;
bogdanm 0:9b334a45a8ff 985 }
bogdanm 0:9b334a45a8ff 986
bogdanm 0:9b334a45a8ff 987 /**
bogdanm 0:9b334a45a8ff 988 * @brief Returns Device IN EP Interrupt register
bogdanm 0:9b334a45a8ff 989 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 990 * @param epnum : endpoint number
bogdanm 0:9b334a45a8ff 991 * This parameter can be a value from 0 to 15
bogdanm 0:9b334a45a8ff 992 * @retval Device IN EP Interrupt register
bogdanm 0:9b334a45a8ff 993 */
bogdanm 0:9b334a45a8ff 994 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
bogdanm 0:9b334a45a8ff 995 {
bogdanm 0:9b334a45a8ff 996 uint32_t v, msk, emp;
bogdanm 0:9b334a45a8ff 997
bogdanm 0:9b334a45a8ff 998 msk = USBx_DEVICE->DIEPMSK;
bogdanm 0:9b334a45a8ff 999 emp = USBx_DEVICE->DIEPEMPMSK;
bogdanm 0:9b334a45a8ff 1000 msk |= ((emp >> epnum) & 0x1) << 7;
bogdanm 0:9b334a45a8ff 1001 v = USBx_INEP(epnum)->DIEPINT & msk;
bogdanm 0:9b334a45a8ff 1002 return v;
bogdanm 0:9b334a45a8ff 1003 }
bogdanm 0:9b334a45a8ff 1004
bogdanm 0:9b334a45a8ff 1005 /**
bogdanm 0:9b334a45a8ff 1006 * @brief USB_ClearInterrupts: clear a USB interrupt
bogdanm 0:9b334a45a8ff 1007 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1008 * @param interrupt : interrupt flag
bogdanm 0:9b334a45a8ff 1009 * @retval None
bogdanm 0:9b334a45a8ff 1010 */
bogdanm 0:9b334a45a8ff 1011 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
bogdanm 0:9b334a45a8ff 1012 {
bogdanm 0:9b334a45a8ff 1013 USBx->GINTSTS |= interrupt;
bogdanm 0:9b334a45a8ff 1014 }
bogdanm 0:9b334a45a8ff 1015
bogdanm 0:9b334a45a8ff 1016 /**
bogdanm 0:9b334a45a8ff 1017 * @brief Returns USB core mode
bogdanm 0:9b334a45a8ff 1018 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1019 * @retval return core mode : Host or Device
bogdanm 0:9b334a45a8ff 1020 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 1021 * 0 : Host
bogdanm 0:9b334a45a8ff 1022 * 1 : Device
bogdanm 0:9b334a45a8ff 1023 */
bogdanm 0:9b334a45a8ff 1024 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1025 {
bogdanm 0:9b334a45a8ff 1026 return ((USBx->GINTSTS ) & 0x1);
bogdanm 0:9b334a45a8ff 1027 }
bogdanm 0:9b334a45a8ff 1028
bogdanm 0:9b334a45a8ff 1029
bogdanm 0:9b334a45a8ff 1030 /**
bogdanm 0:9b334a45a8ff 1031 * @brief Activate EP0 for Setup transactions
bogdanm 0:9b334a45a8ff 1032 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1033 * @retval HAL status
bogdanm 0:9b334a45a8ff 1034 */
bogdanm 0:9b334a45a8ff 1035 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1036 {
bogdanm 0:9b334a45a8ff 1037 /* Set the MPS of the IN EP based on the enumeration speed */
bogdanm 0:9b334a45a8ff 1038 USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
bogdanm 0:9b334a45a8ff 1039
bogdanm 0:9b334a45a8ff 1040 if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
bogdanm 0:9b334a45a8ff 1041 {
bogdanm 0:9b334a45a8ff 1042 USBx_INEP(0)->DIEPCTL |= 3;
bogdanm 0:9b334a45a8ff 1043 }
bogdanm 0:9b334a45a8ff 1044 USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
bogdanm 0:9b334a45a8ff 1045
bogdanm 0:9b334a45a8ff 1046 return HAL_OK;
bogdanm 0:9b334a45a8ff 1047 }
bogdanm 0:9b334a45a8ff 1048
bogdanm 0:9b334a45a8ff 1049
bogdanm 0:9b334a45a8ff 1050 /**
bogdanm 0:9b334a45a8ff 1051 * @brief Prepare the EP0 to start the first control setup
bogdanm 0:9b334a45a8ff 1052 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1053 * @param dma: USB dma enabled or disabled
bogdanm 0:9b334a45a8ff 1054 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 1055 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 1056 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 1057 * @param psetup : pointer to setup packet
bogdanm 0:9b334a45a8ff 1058 * @retval HAL status
bogdanm 0:9b334a45a8ff 1059 */
bogdanm 0:9b334a45a8ff 1060 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup)
bogdanm 0:9b334a45a8ff 1061 {
bogdanm 0:9b334a45a8ff 1062 USBx_OUTEP(0)->DOEPTSIZ = 0;
bogdanm 0:9b334a45a8ff 1063 USBx_OUTEP(0)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ;
bogdanm 0:9b334a45a8ff 1064 USBx_OUTEP(0)->DOEPTSIZ |= (3 * 8);
bogdanm 0:9b334a45a8ff 1065 USBx_OUTEP(0)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT;
bogdanm 0:9b334a45a8ff 1066
bogdanm 0:9b334a45a8ff 1067 if (dma == 1)
bogdanm 0:9b334a45a8ff 1068 {
bogdanm 0:9b334a45a8ff 1069 USBx_OUTEP(0)->DOEPDMA = (uint32_t)psetup;
bogdanm 0:9b334a45a8ff 1070 /* EP enable */
bogdanm 0:9b334a45a8ff 1071 USBx_OUTEP(0)->DOEPCTL = 0x80008000;
bogdanm 0:9b334a45a8ff 1072 }
bogdanm 0:9b334a45a8ff 1073
bogdanm 0:9b334a45a8ff 1074 return HAL_OK;
bogdanm 0:9b334a45a8ff 1075 }
bogdanm 0:9b334a45a8ff 1076
bogdanm 0:9b334a45a8ff 1077
bogdanm 0:9b334a45a8ff 1078 /**
bogdanm 0:9b334a45a8ff 1079 * @brief Reset the USB Core (needed after USB clock settings change)
bogdanm 0:9b334a45a8ff 1080 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1081 * @retval HAL status
bogdanm 0:9b334a45a8ff 1082 */
bogdanm 0:9b334a45a8ff 1083 static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1084 {
bogdanm 0:9b334a45a8ff 1085 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 1086
bogdanm 0:9b334a45a8ff 1087 /* Wait for AHB master IDLE state. */
bogdanm 0:9b334a45a8ff 1088 do
bogdanm 0:9b334a45a8ff 1089 {
bogdanm 0:9b334a45a8ff 1090 if (++count > 200000)
bogdanm 0:9b334a45a8ff 1091 {
bogdanm 0:9b334a45a8ff 1092 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1093 }
bogdanm 0:9b334a45a8ff 1094 }
bogdanm 0:9b334a45a8ff 1095 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
bogdanm 0:9b334a45a8ff 1096
bogdanm 0:9b334a45a8ff 1097 /* Core Soft Reset */
bogdanm 0:9b334a45a8ff 1098 count = 0;
bogdanm 0:9b334a45a8ff 1099 USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
bogdanm 0:9b334a45a8ff 1100
bogdanm 0:9b334a45a8ff 1101 do
bogdanm 0:9b334a45a8ff 1102 {
bogdanm 0:9b334a45a8ff 1103 if (++count > 200000)
bogdanm 0:9b334a45a8ff 1104 {
bogdanm 0:9b334a45a8ff 1105 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1106 }
bogdanm 0:9b334a45a8ff 1107 }
bogdanm 0:9b334a45a8ff 1108 while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
bogdanm 0:9b334a45a8ff 1109
bogdanm 0:9b334a45a8ff 1110 return HAL_OK;
bogdanm 0:9b334a45a8ff 1111 }
bogdanm 0:9b334a45a8ff 1112
bogdanm 0:9b334a45a8ff 1113
bogdanm 0:9b334a45a8ff 1114 /**
bogdanm 0:9b334a45a8ff 1115 * @brief USB_HostInit : Initializes the USB OTG controller registers
bogdanm 0:9b334a45a8ff 1116 * for Host mode
bogdanm 0:9b334a45a8ff 1117 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1118 * @param cfg : pointer to a USB_OTG_CfgTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1119 * the configuration information for the specified USBx peripheral.
bogdanm 0:9b334a45a8ff 1120 * @retval HAL status
bogdanm 0:9b334a45a8ff 1121 */
bogdanm 0:9b334a45a8ff 1122 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
bogdanm 0:9b334a45a8ff 1123 {
bogdanm 0:9b334a45a8ff 1124 uint32_t i;
bogdanm 0:9b334a45a8ff 1125
bogdanm 0:9b334a45a8ff 1126 /* Restart the Phy Clock */
bogdanm 0:9b334a45a8ff 1127 USBx_PCGCCTL = 0;
bogdanm 0:9b334a45a8ff 1128
bogdanm 0:9b334a45a8ff 1129 /*Activate VBUS Sensing B */
bogdanm 0:9b334a45a8ff 1130 USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
bogdanm 0:9b334a45a8ff 1131
bogdanm 0:9b334a45a8ff 1132 /* Disable the FS/LS support mode only */
bogdanm 0:9b334a45a8ff 1133 if((cfg.speed == USB_OTG_SPEED_FULL)&&
bogdanm 0:9b334a45a8ff 1134 (USBx != USB_OTG_FS))
bogdanm 0:9b334a45a8ff 1135 {
bogdanm 0:9b334a45a8ff 1136 USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS;
bogdanm 0:9b334a45a8ff 1137 }
bogdanm 0:9b334a45a8ff 1138 else
bogdanm 0:9b334a45a8ff 1139 {
bogdanm 0:9b334a45a8ff 1140 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
bogdanm 0:9b334a45a8ff 1141 }
bogdanm 0:9b334a45a8ff 1142
bogdanm 0:9b334a45a8ff 1143 /* Make sure the FIFOs are flushed. */
bogdanm 0:9b334a45a8ff 1144 USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */
bogdanm 0:9b334a45a8ff 1145 USB_FlushRxFifo(USBx);
bogdanm 0:9b334a45a8ff 1146
bogdanm 0:9b334a45a8ff 1147 /* Clear all pending HC Interrupts */
bogdanm 0:9b334a45a8ff 1148 for (i = 0; i < cfg.Host_channels; i++)
bogdanm 0:9b334a45a8ff 1149 {
bogdanm 0:9b334a45a8ff 1150 USBx_HC(i)->HCINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1151 USBx_HC(i)->HCINTMSK = 0;
bogdanm 0:9b334a45a8ff 1152 }
bogdanm 0:9b334a45a8ff 1153
bogdanm 0:9b334a45a8ff 1154 /* Enable VBUS driving */
bogdanm 0:9b334a45a8ff 1155 USB_DriveVbus(USBx, 1);
bogdanm 0:9b334a45a8ff 1156
bogdanm 0:9b334a45a8ff 1157 HAL_Delay(200);
bogdanm 0:9b334a45a8ff 1158
bogdanm 0:9b334a45a8ff 1159 /* Disable all interrupts. */
bogdanm 0:9b334a45a8ff 1160 USBx->GINTMSK = 0;
bogdanm 0:9b334a45a8ff 1161
bogdanm 0:9b334a45a8ff 1162 /* Clear any pending interrupts */
bogdanm 0:9b334a45a8ff 1163 USBx->GINTSTS = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1164
bogdanm 0:9b334a45a8ff 1165
bogdanm 0:9b334a45a8ff 1166 if(USBx == USB_OTG_FS)
bogdanm 0:9b334a45a8ff 1167 {
bogdanm 0:9b334a45a8ff 1168 /* set Rx FIFO size */
bogdanm 0:9b334a45a8ff 1169 USBx->GRXFSIZ = (uint32_t )0x80;
bogdanm 0:9b334a45a8ff 1170 USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80);
bogdanm 0:9b334a45a8ff 1171 USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0);
bogdanm 0:9b334a45a8ff 1172
bogdanm 0:9b334a45a8ff 1173 }
bogdanm 0:9b334a45a8ff 1174
bogdanm 0:9b334a45a8ff 1175 else
bogdanm 0:9b334a45a8ff 1176 {
bogdanm 0:9b334a45a8ff 1177 /* set Rx FIFO size */
bogdanm 0:9b334a45a8ff 1178 USBx->GRXFSIZ = (uint32_t )0x200;
bogdanm 0:9b334a45a8ff 1179 USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x100 << 16)& USB_OTG_NPTXFD) | 0x200);
bogdanm 0:9b334a45a8ff 1180 USBx->HPTXFSIZ = (uint32_t )(((0xE0 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0x300);
bogdanm 0:9b334a45a8ff 1181 }
bogdanm 0:9b334a45a8ff 1182
bogdanm 0:9b334a45a8ff 1183 /* Enable the common interrupts */
bogdanm 0:9b334a45a8ff 1184 if (cfg.dma_enable == DISABLE)
bogdanm 0:9b334a45a8ff 1185 {
bogdanm 0:9b334a45a8ff 1186 USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
bogdanm 0:9b334a45a8ff 1187 }
bogdanm 0:9b334a45a8ff 1188
bogdanm 0:9b334a45a8ff 1189 /* Enable interrupts matching to the Host mode ONLY */
bogdanm 0:9b334a45a8ff 1190 USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM |\
bogdanm 0:9b334a45a8ff 1191 USB_OTG_GINTMSK_SOFM |USB_OTG_GINTSTS_DISCINT|\
bogdanm 0:9b334a45a8ff 1192 USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
bogdanm 0:9b334a45a8ff 1193
bogdanm 0:9b334a45a8ff 1194 return HAL_OK;
bogdanm 0:9b334a45a8ff 1195 }
bogdanm 0:9b334a45a8ff 1196
bogdanm 0:9b334a45a8ff 1197 /**
bogdanm 0:9b334a45a8ff 1198 * @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
bogdanm 0:9b334a45a8ff 1199 * HCFG register on the PHY type and set the right frame interval
bogdanm 0:9b334a45a8ff 1200 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1201 * @param freq : clock frequency
bogdanm 0:9b334a45a8ff 1202 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 1203 * HCFG_48_MHZ : Full Speed 48 MHz Clock
bogdanm 0:9b334a45a8ff 1204 * HCFG_6_MHZ : Low Speed 6 MHz Clock
bogdanm 0:9b334a45a8ff 1205 * @retval HAL status
bogdanm 0:9b334a45a8ff 1206 */
bogdanm 0:9b334a45a8ff 1207 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq)
bogdanm 0:9b334a45a8ff 1208 {
bogdanm 0:9b334a45a8ff 1209 USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
bogdanm 0:9b334a45a8ff 1210 USBx_HOST->HCFG |= (freq & USB_OTG_HCFG_FSLSPCS);
bogdanm 0:9b334a45a8ff 1211
bogdanm 0:9b334a45a8ff 1212 if (freq == HCFG_48_MHZ)
bogdanm 0:9b334a45a8ff 1213 {
bogdanm 0:9b334a45a8ff 1214 USBx_HOST->HFIR = (uint32_t)48000;
bogdanm 0:9b334a45a8ff 1215 }
bogdanm 0:9b334a45a8ff 1216 else if (freq == HCFG_6_MHZ)
bogdanm 0:9b334a45a8ff 1217 {
bogdanm 0:9b334a45a8ff 1218 USBx_HOST->HFIR = (uint32_t)6000;
bogdanm 0:9b334a45a8ff 1219 }
bogdanm 0:9b334a45a8ff 1220 return HAL_OK;
bogdanm 0:9b334a45a8ff 1221 }
bogdanm 0:9b334a45a8ff 1222
bogdanm 0:9b334a45a8ff 1223 /**
bogdanm 0:9b334a45a8ff 1224 * @brief USB_OTG_ResetPort : Reset Host Port
bogdanm 0:9b334a45a8ff 1225 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1226 * @retval HAL status
bogdanm 0:9b334a45a8ff 1227 * @note : (1)The application must wait at least 10 ms
bogdanm 0:9b334a45a8ff 1228 * before clearing the reset bit.
bogdanm 0:9b334a45a8ff 1229 */
bogdanm 0:9b334a45a8ff 1230 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1231 {
bogdanm 0:9b334a45a8ff 1232 __IO uint32_t hprt0;
bogdanm 0:9b334a45a8ff 1233
bogdanm 0:9b334a45a8ff 1234 hprt0 = USBx_HPRT0;
bogdanm 0:9b334a45a8ff 1235
bogdanm 0:9b334a45a8ff 1236 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
bogdanm 0:9b334a45a8ff 1237 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
bogdanm 0:9b334a45a8ff 1238
bogdanm 0:9b334a45a8ff 1239 USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
bogdanm 0:9b334a45a8ff 1240 HAL_Delay (10); /* See Note #1 */
bogdanm 0:9b334a45a8ff 1241 USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
bogdanm 0:9b334a45a8ff 1242 return HAL_OK;
bogdanm 0:9b334a45a8ff 1243 }
bogdanm 0:9b334a45a8ff 1244
bogdanm 0:9b334a45a8ff 1245 /**
bogdanm 0:9b334a45a8ff 1246 * @brief USB_DriveVbus : activate or de-activate vbus
bogdanm 0:9b334a45a8ff 1247 * @param state : VBUS state
bogdanm 0:9b334a45a8ff 1248 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 1249 * 0 : VBUS Active
bogdanm 0:9b334a45a8ff 1250 * 1 : VBUS Inactive
bogdanm 0:9b334a45a8ff 1251 * @retval HAL status
bogdanm 0:9b334a45a8ff 1252 */
bogdanm 0:9b334a45a8ff 1253 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
bogdanm 0:9b334a45a8ff 1254 {
bogdanm 0:9b334a45a8ff 1255 __IO uint32_t hprt0;
bogdanm 0:9b334a45a8ff 1256
bogdanm 0:9b334a45a8ff 1257 hprt0 = USBx_HPRT0;
bogdanm 0:9b334a45a8ff 1258 hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\
bogdanm 0:9b334a45a8ff 1259 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG );
bogdanm 0:9b334a45a8ff 1260
bogdanm 0:9b334a45a8ff 1261 if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 ))
bogdanm 0:9b334a45a8ff 1262 {
bogdanm 0:9b334a45a8ff 1263 USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
bogdanm 0:9b334a45a8ff 1264 }
bogdanm 0:9b334a45a8ff 1265 if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 ))
bogdanm 0:9b334a45a8ff 1266 {
bogdanm 0:9b334a45a8ff 1267 USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
bogdanm 0:9b334a45a8ff 1268 }
bogdanm 0:9b334a45a8ff 1269 return HAL_OK;
bogdanm 0:9b334a45a8ff 1270 }
bogdanm 0:9b334a45a8ff 1271
bogdanm 0:9b334a45a8ff 1272 /**
bogdanm 0:9b334a45a8ff 1273 * @brief Return Host Core speed
bogdanm 0:9b334a45a8ff 1274 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1275 * @retval speed : Host speed
bogdanm 0:9b334a45a8ff 1276 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 1277 * @arg USB_OTG_SPEED_HIGH: High speed mode
bogdanm 0:9b334a45a8ff 1278 * @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm 0:9b334a45a8ff 1279 * @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm 0:9b334a45a8ff 1280 */
bogdanm 0:9b334a45a8ff 1281 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1282 {
bogdanm 0:9b334a45a8ff 1283 __IO uint32_t hprt0;
bogdanm 0:9b334a45a8ff 1284
bogdanm 0:9b334a45a8ff 1285 hprt0 = USBx_HPRT0;
bogdanm 0:9b334a45a8ff 1286 return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
bogdanm 0:9b334a45a8ff 1287 }
bogdanm 0:9b334a45a8ff 1288
bogdanm 0:9b334a45a8ff 1289 /**
bogdanm 0:9b334a45a8ff 1290 * @brief Return Host Current Frame number
bogdanm 0:9b334a45a8ff 1291 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1292 * @retval current frame number
bogdanm 0:9b334a45a8ff 1293 */
bogdanm 0:9b334a45a8ff 1294 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1295 {
bogdanm 0:9b334a45a8ff 1296 return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
bogdanm 0:9b334a45a8ff 1297 }
bogdanm 0:9b334a45a8ff 1298
bogdanm 0:9b334a45a8ff 1299 /**
bogdanm 0:9b334a45a8ff 1300 * @brief Initialize a host channel
bogdanm 0:9b334a45a8ff 1301 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1302 * @param ch_num : Channel number
bogdanm 0:9b334a45a8ff 1303 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 1304 * @param epnum : Endpoint number
bogdanm 0:9b334a45a8ff 1305 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 1306 * @param dev_address : Current device address
bogdanm 0:9b334a45a8ff 1307 * This parameter can be a value from 0 to 255
bogdanm 0:9b334a45a8ff 1308 * @param speed : Current device speed
bogdanm 0:9b334a45a8ff 1309 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 1310 * @arg USB_OTG_SPEED_HIGH: High speed mode
bogdanm 0:9b334a45a8ff 1311 * @arg USB_OTG_SPEED_FULL: Full speed mode
bogdanm 0:9b334a45a8ff 1312 * @arg USB_OTG_SPEED_LOW: Low speed mode
bogdanm 0:9b334a45a8ff 1313 * @param ep_type : Endpoint Type
bogdanm 0:9b334a45a8ff 1314 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 1315 * @arg EP_TYPE_CTRL: Control type
bogdanm 0:9b334a45a8ff 1316 * @arg EP_TYPE_ISOC: Isochronous type
bogdanm 0:9b334a45a8ff 1317 * @arg EP_TYPE_BULK: Bulk type
bogdanm 0:9b334a45a8ff 1318 * @arg EP_TYPE_INTR: Interrupt type
bogdanm 0:9b334a45a8ff 1319 * @param mps : Max Packet Size
bogdanm 0:9b334a45a8ff 1320 * This parameter can be a value from 0 to32K
bogdanm 0:9b334a45a8ff 1321 * @retval HAL state
bogdanm 0:9b334a45a8ff 1322 */
bogdanm 0:9b334a45a8ff 1323 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
bogdanm 0:9b334a45a8ff 1324 uint8_t ch_num,
bogdanm 0:9b334a45a8ff 1325 uint8_t epnum,
bogdanm 0:9b334a45a8ff 1326 uint8_t dev_address,
bogdanm 0:9b334a45a8ff 1327 uint8_t speed,
bogdanm 0:9b334a45a8ff 1328 uint8_t ep_type,
bogdanm 0:9b334a45a8ff 1329 uint16_t mps)
bogdanm 0:9b334a45a8ff 1330 {
bogdanm 0:9b334a45a8ff 1331
bogdanm 0:9b334a45a8ff 1332 /* Clear old interrupt conditions for this host channel. */
bogdanm 0:9b334a45a8ff 1333 USBx_HC(ch_num)->HCINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1334
bogdanm 0:9b334a45a8ff 1335 /* Enable channel interrupts required for this transfer. */
bogdanm 0:9b334a45a8ff 1336 switch (ep_type)
bogdanm 0:9b334a45a8ff 1337 {
bogdanm 0:9b334a45a8ff 1338 case EP_TYPE_CTRL:
bogdanm 0:9b334a45a8ff 1339 case EP_TYPE_BULK:
bogdanm 0:9b334a45a8ff 1340
bogdanm 0:9b334a45a8ff 1341 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
bogdanm 0:9b334a45a8ff 1342 USB_OTG_HCINTMSK_STALLM |\
bogdanm 0:9b334a45a8ff 1343 USB_OTG_HCINTMSK_TXERRM |\
bogdanm 0:9b334a45a8ff 1344 USB_OTG_HCINTMSK_DTERRM |\
bogdanm 0:9b334a45a8ff 1345 USB_OTG_HCINTMSK_AHBERR |\
bogdanm 0:9b334a45a8ff 1346 USB_OTG_HCINTMSK_NAKM ;
bogdanm 0:9b334a45a8ff 1347
bogdanm 0:9b334a45a8ff 1348 if (epnum & 0x80)
bogdanm 0:9b334a45a8ff 1349 {
bogdanm 0:9b334a45a8ff 1350 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
bogdanm 0:9b334a45a8ff 1351 }
bogdanm 0:9b334a45a8ff 1352 else
bogdanm 0:9b334a45a8ff 1353 {
bogdanm 0:9b334a45a8ff 1354 if(USBx != USB_OTG_FS)
bogdanm 0:9b334a45a8ff 1355 {
bogdanm 0:9b334a45a8ff 1356 USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
bogdanm 0:9b334a45a8ff 1357 }
bogdanm 0:9b334a45a8ff 1358 }
bogdanm 0:9b334a45a8ff 1359 break;
bogdanm 0:9b334a45a8ff 1360 case EP_TYPE_INTR:
bogdanm 0:9b334a45a8ff 1361
bogdanm 0:9b334a45a8ff 1362 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
bogdanm 0:9b334a45a8ff 1363 USB_OTG_HCINTMSK_STALLM |\
bogdanm 0:9b334a45a8ff 1364 USB_OTG_HCINTMSK_TXERRM |\
bogdanm 0:9b334a45a8ff 1365 USB_OTG_HCINTMSK_DTERRM |\
bogdanm 0:9b334a45a8ff 1366 USB_OTG_HCINTMSK_NAKM |\
bogdanm 0:9b334a45a8ff 1367 USB_OTG_HCINTMSK_AHBERR |\
bogdanm 0:9b334a45a8ff 1368 USB_OTG_HCINTMSK_FRMORM ;
bogdanm 0:9b334a45a8ff 1369
bogdanm 0:9b334a45a8ff 1370 if (epnum & 0x80)
bogdanm 0:9b334a45a8ff 1371 {
bogdanm 0:9b334a45a8ff 1372 USBx_HC(ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
bogdanm 0:9b334a45a8ff 1373 }
bogdanm 0:9b334a45a8ff 1374
bogdanm 0:9b334a45a8ff 1375 break;
bogdanm 0:9b334a45a8ff 1376 case EP_TYPE_ISOC:
bogdanm 0:9b334a45a8ff 1377
bogdanm 0:9b334a45a8ff 1378 USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
bogdanm 0:9b334a45a8ff 1379 USB_OTG_HCINTMSK_ACKM |\
bogdanm 0:9b334a45a8ff 1380 USB_OTG_HCINTMSK_AHBERR |\
bogdanm 0:9b334a45a8ff 1381 USB_OTG_HCINTMSK_FRMORM ;
bogdanm 0:9b334a45a8ff 1382
bogdanm 0:9b334a45a8ff 1383 if (epnum & 0x80)
bogdanm 0:9b334a45a8ff 1384 {
bogdanm 0:9b334a45a8ff 1385 USBx_HC(ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM);
bogdanm 0:9b334a45a8ff 1386 }
bogdanm 0:9b334a45a8ff 1387 break;
bogdanm 0:9b334a45a8ff 1388 }
bogdanm 0:9b334a45a8ff 1389
bogdanm 0:9b334a45a8ff 1390 /* Enable the top level host channel interrupt. */
bogdanm 0:9b334a45a8ff 1391 USBx_HOST->HAINTMSK |= (1 << ch_num);
bogdanm 0:9b334a45a8ff 1392
bogdanm 0:9b334a45a8ff 1393 /* Make sure host channel interrupts are enabled. */
bogdanm 0:9b334a45a8ff 1394 USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM;
bogdanm 0:9b334a45a8ff 1395
bogdanm 0:9b334a45a8ff 1396 /* Program the HCCHAR register */
bogdanm 0:9b334a45a8ff 1397 USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) |\
bogdanm 0:9b334a45a8ff 1398 (((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)|\
bogdanm 0:9b334a45a8ff 1399 ((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)|\
bogdanm 0:9b334a45a8ff 1400 (((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)|\
bogdanm 0:9b334a45a8ff 1401 ((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)|\
bogdanm 0:9b334a45a8ff 1402 (mps & USB_OTG_HCCHAR_MPSIZ));
bogdanm 0:9b334a45a8ff 1403
bogdanm 0:9b334a45a8ff 1404 if (ep_type == EP_TYPE_INTR)
bogdanm 0:9b334a45a8ff 1405 {
bogdanm 0:9b334a45a8ff 1406 USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ;
bogdanm 0:9b334a45a8ff 1407 }
bogdanm 0:9b334a45a8ff 1408
bogdanm 0:9b334a45a8ff 1409 return HAL_OK;
bogdanm 0:9b334a45a8ff 1410 }
bogdanm 0:9b334a45a8ff 1411
bogdanm 0:9b334a45a8ff 1412 /**
bogdanm 0:9b334a45a8ff 1413 * @brief Start a transfer over a host channel
bogdanm 0:9b334a45a8ff 1414 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1415 * @param hc : pointer to host channel structure
bogdanm 0:9b334a45a8ff 1416 * @param dma: USB dma enabled or disabled
bogdanm 0:9b334a45a8ff 1417 * This parameter can be one of the these values:
bogdanm 0:9b334a45a8ff 1418 * 0 : DMA feature not used
bogdanm 0:9b334a45a8ff 1419 * 1 : DMA feature used
bogdanm 0:9b334a45a8ff 1420 * @retval HAL state
bogdanm 0:9b334a45a8ff 1421 */
bogdanm 0:9b334a45a8ff 1422 #if defined (__CC_ARM) /*!< ARM Compiler */
bogdanm 0:9b334a45a8ff 1423 #pragma O0
bogdanm 0:9b334a45a8ff 1424 #elif defined (__GNUC__) /*!< GNU Compiler */
bogdanm 0:9b334a45a8ff 1425 #pragma GCC optimize ("O0")
bogdanm 0:9b334a45a8ff 1426 #endif /* __CC_ARM */
bogdanm 0:9b334a45a8ff 1427 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma)
bogdanm 0:9b334a45a8ff 1428 {
bogdanm 0:9b334a45a8ff 1429 uint8_t is_oddframe = 0;
bogdanm 0:9b334a45a8ff 1430 uint16_t len_words = 0;
bogdanm 0:9b334a45a8ff 1431 uint16_t num_packets = 0;
bogdanm 0:9b334a45a8ff 1432 uint16_t max_hc_pkt_count = 256;
bogdanm 0:9b334a45a8ff 1433 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 1434
bogdanm 0:9b334a45a8ff 1435 if((USBx != USB_OTG_FS) && (hc->speed == USB_OTG_SPEED_HIGH))
bogdanm 0:9b334a45a8ff 1436 {
bogdanm 0:9b334a45a8ff 1437 if((dma == 0) && (hc->do_ping == 1))
bogdanm 0:9b334a45a8ff 1438 {
bogdanm 0:9b334a45a8ff 1439 USB_DoPing(USBx, hc->ch_num);
bogdanm 0:9b334a45a8ff 1440 return HAL_OK;
bogdanm 0:9b334a45a8ff 1441 }
bogdanm 0:9b334a45a8ff 1442 else if(dma == 1)
bogdanm 0:9b334a45a8ff 1443 {
bogdanm 0:9b334a45a8ff 1444 USBx_HC(hc->ch_num)->HCINTMSK &= ~(USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
bogdanm 0:9b334a45a8ff 1445 hc->do_ping = 0;
bogdanm 0:9b334a45a8ff 1446 }
bogdanm 0:9b334a45a8ff 1447 }
bogdanm 0:9b334a45a8ff 1448
bogdanm 0:9b334a45a8ff 1449 /* Compute the expected number of packets associated to the transfer */
bogdanm 0:9b334a45a8ff 1450 if (hc->xfer_len > 0)
bogdanm 0:9b334a45a8ff 1451 {
bogdanm 0:9b334a45a8ff 1452 num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet;
bogdanm 0:9b334a45a8ff 1453
bogdanm 0:9b334a45a8ff 1454 if (num_packets > max_hc_pkt_count)
bogdanm 0:9b334a45a8ff 1455 {
bogdanm 0:9b334a45a8ff 1456 num_packets = max_hc_pkt_count;
bogdanm 0:9b334a45a8ff 1457 hc->xfer_len = num_packets * hc->max_packet;
bogdanm 0:9b334a45a8ff 1458 }
bogdanm 0:9b334a45a8ff 1459 }
bogdanm 0:9b334a45a8ff 1460 else
bogdanm 0:9b334a45a8ff 1461 {
bogdanm 0:9b334a45a8ff 1462 num_packets = 1;
bogdanm 0:9b334a45a8ff 1463 }
bogdanm 0:9b334a45a8ff 1464 if (hc->ep_is_in)
bogdanm 0:9b334a45a8ff 1465 {
bogdanm 0:9b334a45a8ff 1466 hc->xfer_len = num_packets * hc->max_packet;
bogdanm 0:9b334a45a8ff 1467 }
bogdanm 0:9b334a45a8ff 1468
bogdanm 0:9b334a45a8ff 1469
bogdanm 0:9b334a45a8ff 1470
bogdanm 0:9b334a45a8ff 1471 /* Initialize the HCTSIZn register */
bogdanm 0:9b334a45a8ff 1472 USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\
bogdanm 0:9b334a45a8ff 1473 ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
bogdanm 0:9b334a45a8ff 1474 (((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID);
bogdanm 0:9b334a45a8ff 1475
bogdanm 0:9b334a45a8ff 1476 if (dma)
bogdanm 0:9b334a45a8ff 1477 {
bogdanm 0:9b334a45a8ff 1478 /* xfer_buff MUST be 32-bits aligned */
bogdanm 0:9b334a45a8ff 1479 USBx_HC(hc->ch_num)->HCDMA = (uint32_t)hc->xfer_buff;
bogdanm 0:9b334a45a8ff 1480 }
bogdanm 0:9b334a45a8ff 1481
bogdanm 0:9b334a45a8ff 1482 is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1;
bogdanm 0:9b334a45a8ff 1483 USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
bogdanm 0:9b334a45a8ff 1484 USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29);
bogdanm 0:9b334a45a8ff 1485
bogdanm 0:9b334a45a8ff 1486 /* Set host channel enable */
bogdanm 0:9b334a45a8ff 1487 tmpreg = USBx_HC(hc->ch_num)->HCCHAR;
bogdanm 0:9b334a45a8ff 1488 tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1489 tmpreg |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1490 USBx_HC(hc->ch_num)->HCCHAR = tmpreg;
bogdanm 0:9b334a45a8ff 1491
bogdanm 0:9b334a45a8ff 1492 if (dma == 0) /* Slave mode */
bogdanm 0:9b334a45a8ff 1493 {
bogdanm 0:9b334a45a8ff 1494 if((hc->ep_is_in == 0) && (hc->xfer_len > 0))
bogdanm 0:9b334a45a8ff 1495 {
bogdanm 0:9b334a45a8ff 1496 switch(hc->ep_type)
bogdanm 0:9b334a45a8ff 1497 {
bogdanm 0:9b334a45a8ff 1498 /* Non periodic transfer */
bogdanm 0:9b334a45a8ff 1499 case EP_TYPE_CTRL:
bogdanm 0:9b334a45a8ff 1500 case EP_TYPE_BULK:
bogdanm 0:9b334a45a8ff 1501
bogdanm 0:9b334a45a8ff 1502 len_words = (hc->xfer_len + 3) / 4;
bogdanm 0:9b334a45a8ff 1503
bogdanm 0:9b334a45a8ff 1504 /* check if there is enough space in FIFO space */
bogdanm 0:9b334a45a8ff 1505 if(len_words > (USBx->HNPTXSTS & 0xFFFF))
bogdanm 0:9b334a45a8ff 1506 {
bogdanm 0:9b334a45a8ff 1507 /* need to process data in nptxfempty interrupt */
bogdanm 0:9b334a45a8ff 1508 USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
bogdanm 0:9b334a45a8ff 1509 }
bogdanm 0:9b334a45a8ff 1510 break;
bogdanm 0:9b334a45a8ff 1511 /* Periodic transfer */
bogdanm 0:9b334a45a8ff 1512 case EP_TYPE_INTR:
bogdanm 0:9b334a45a8ff 1513 case EP_TYPE_ISOC:
bogdanm 0:9b334a45a8ff 1514 len_words = (hc->xfer_len + 3) / 4;
bogdanm 0:9b334a45a8ff 1515 /* check if there is enough space in FIFO space */
bogdanm 0:9b334a45a8ff 1516 if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */
bogdanm 0:9b334a45a8ff 1517 {
bogdanm 0:9b334a45a8ff 1518 /* need to process data in ptxfempty interrupt */
bogdanm 0:9b334a45a8ff 1519 USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
bogdanm 0:9b334a45a8ff 1520 }
bogdanm 0:9b334a45a8ff 1521 break;
bogdanm 0:9b334a45a8ff 1522
bogdanm 0:9b334a45a8ff 1523 default:
bogdanm 0:9b334a45a8ff 1524 break;
bogdanm 0:9b334a45a8ff 1525 }
bogdanm 0:9b334a45a8ff 1526
bogdanm 0:9b334a45a8ff 1527 /* Write packet into the Tx FIFO. */
bogdanm 0:9b334a45a8ff 1528 USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len, 0);
bogdanm 0:9b334a45a8ff 1529 }
bogdanm 0:9b334a45a8ff 1530 }
bogdanm 0:9b334a45a8ff 1531
bogdanm 0:9b334a45a8ff 1532 return HAL_OK;
bogdanm 0:9b334a45a8ff 1533 }
bogdanm 0:9b334a45a8ff 1534
bogdanm 0:9b334a45a8ff 1535 /**
bogdanm 0:9b334a45a8ff 1536 * @brief Read all host channel interrupts status
bogdanm 0:9b334a45a8ff 1537 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1538 * @retval HAL state
bogdanm 0:9b334a45a8ff 1539 */
bogdanm 0:9b334a45a8ff 1540 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1541 {
bogdanm 0:9b334a45a8ff 1542 return ((USBx_HOST->HAINT) & 0xFFFF);
bogdanm 0:9b334a45a8ff 1543 }
bogdanm 0:9b334a45a8ff 1544
bogdanm 0:9b334a45a8ff 1545 /**
bogdanm 0:9b334a45a8ff 1546 * @brief Halt a host channel
bogdanm 0:9b334a45a8ff 1547 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1548 * @param hc_num : Host Channel number
bogdanm 0:9b334a45a8ff 1549 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 1550 * @retval HAL state
bogdanm 0:9b334a45a8ff 1551 */
bogdanm 0:9b334a45a8ff 1552 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
bogdanm 0:9b334a45a8ff 1553 {
bogdanm 0:9b334a45a8ff 1554 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 1555
bogdanm 0:9b334a45a8ff 1556 /* Check for space in the request queue to issue the halt. */
bogdanm 0:9b334a45a8ff 1557 if (((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_CTRL << 18)) || ((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_BULK << 18)))
bogdanm 0:9b334a45a8ff 1558 {
bogdanm 0:9b334a45a8ff 1559 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1560
bogdanm 0:9b334a45a8ff 1561 if ((USBx->HNPTXSTS & 0xFFFF) == 0)
bogdanm 0:9b334a45a8ff 1562 {
bogdanm 0:9b334a45a8ff 1563 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1564 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1565 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm 0:9b334a45a8ff 1566 do
bogdanm 0:9b334a45a8ff 1567 {
bogdanm 0:9b334a45a8ff 1568 if (++count > 1000)
bogdanm 0:9b334a45a8ff 1569 {
bogdanm 0:9b334a45a8ff 1570 break;
bogdanm 0:9b334a45a8ff 1571 }
bogdanm 0:9b334a45a8ff 1572 }
bogdanm 0:9b334a45a8ff 1573 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm 0:9b334a45a8ff 1574 }
bogdanm 0:9b334a45a8ff 1575 else
bogdanm 0:9b334a45a8ff 1576 {
bogdanm 0:9b334a45a8ff 1577 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1578 }
bogdanm 0:9b334a45a8ff 1579 }
bogdanm 0:9b334a45a8ff 1580 else
bogdanm 0:9b334a45a8ff 1581 {
bogdanm 0:9b334a45a8ff 1582 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1583
bogdanm 0:9b334a45a8ff 1584 if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0)
bogdanm 0:9b334a45a8ff 1585 {
bogdanm 0:9b334a45a8ff 1586 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1587 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1588 USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm 0:9b334a45a8ff 1589 do
bogdanm 0:9b334a45a8ff 1590 {
bogdanm 0:9b334a45a8ff 1591 if (++count > 1000)
bogdanm 0:9b334a45a8ff 1592 {
bogdanm 0:9b334a45a8ff 1593 break;
bogdanm 0:9b334a45a8ff 1594 }
bogdanm 0:9b334a45a8ff 1595 }
bogdanm 0:9b334a45a8ff 1596 while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm 0:9b334a45a8ff 1597 }
bogdanm 0:9b334a45a8ff 1598 else
bogdanm 0:9b334a45a8ff 1599 {
bogdanm 0:9b334a45a8ff 1600 USBx_HC(hc_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1601 }
bogdanm 0:9b334a45a8ff 1602 }
bogdanm 0:9b334a45a8ff 1603
bogdanm 0:9b334a45a8ff 1604 return HAL_OK;
bogdanm 0:9b334a45a8ff 1605 }
bogdanm 0:9b334a45a8ff 1606
bogdanm 0:9b334a45a8ff 1607 /**
bogdanm 0:9b334a45a8ff 1608 * @brief Initiate Do Ping protocol
bogdanm 0:9b334a45a8ff 1609 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1610 * @param hc_num : Host Channel number
bogdanm 0:9b334a45a8ff 1611 * This parameter can be a value from 1 to 15
bogdanm 0:9b334a45a8ff 1612 * @retval HAL state
bogdanm 0:9b334a45a8ff 1613 */
bogdanm 0:9b334a45a8ff 1614 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
bogdanm 0:9b334a45a8ff 1615 {
bogdanm 0:9b334a45a8ff 1616 uint8_t num_packets = 1;
bogdanm 0:9b334a45a8ff 1617 uint32_t tmpreg = 0;
bogdanm 0:9b334a45a8ff 1618
bogdanm 0:9b334a45a8ff 1619 USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
bogdanm 0:9b334a45a8ff 1620 USB_OTG_HCTSIZ_DOPING;
bogdanm 0:9b334a45a8ff 1621
bogdanm 0:9b334a45a8ff 1622 /* Set host channel enable */
bogdanm 0:9b334a45a8ff 1623 tmpreg = USBx_HC(ch_num)->HCCHAR;
bogdanm 0:9b334a45a8ff 1624 tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1625 tmpreg |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1626 USBx_HC(ch_num)->HCCHAR = tmpreg;
bogdanm 0:9b334a45a8ff 1627
bogdanm 0:9b334a45a8ff 1628 return HAL_OK;
bogdanm 0:9b334a45a8ff 1629 }
bogdanm 0:9b334a45a8ff 1630
bogdanm 0:9b334a45a8ff 1631 /**
bogdanm 0:9b334a45a8ff 1632 * @brief Stop Host Core
bogdanm 0:9b334a45a8ff 1633 * @param USBx : Selected device
bogdanm 0:9b334a45a8ff 1634 * @retval HAL state
bogdanm 0:9b334a45a8ff 1635 */
bogdanm 0:9b334a45a8ff 1636 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
bogdanm 0:9b334a45a8ff 1637 {
bogdanm 0:9b334a45a8ff 1638 uint8_t i;
bogdanm 0:9b334a45a8ff 1639 uint32_t count = 0;
bogdanm 0:9b334a45a8ff 1640 uint32_t value;
bogdanm 0:9b334a45a8ff 1641
bogdanm 0:9b334a45a8ff 1642 USB_DisableGlobalInt(USBx);
bogdanm 0:9b334a45a8ff 1643
bogdanm 0:9b334a45a8ff 1644 /* Flush FIFO */
bogdanm 0:9b334a45a8ff 1645 USB_FlushTxFifo(USBx, 0x10);
bogdanm 0:9b334a45a8ff 1646 USB_FlushRxFifo(USBx);
bogdanm 0:9b334a45a8ff 1647
bogdanm 0:9b334a45a8ff 1648 /* Flush out any leftover queued requests. */
bogdanm 0:9b334a45a8ff 1649 for (i = 0; i <= 15; i++)
bogdanm 0:9b334a45a8ff 1650 {
bogdanm 0:9b334a45a8ff 1651
bogdanm 0:9b334a45a8ff 1652 value = USBx_HC(i)->HCCHAR ;
bogdanm 0:9b334a45a8ff 1653 value |= USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1654 value &= ~USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1655 value &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm 0:9b334a45a8ff 1656 USBx_HC(i)->HCCHAR = value;
bogdanm 0:9b334a45a8ff 1657 }
bogdanm 0:9b334a45a8ff 1658
bogdanm 0:9b334a45a8ff 1659 /* Halt all channels to put them into a known state. */
bogdanm 0:9b334a45a8ff 1660 for (i = 0; i <= 15; i++)
bogdanm 0:9b334a45a8ff 1661 {
bogdanm 0:9b334a45a8ff 1662
bogdanm 0:9b334a45a8ff 1663 value = USBx_HC(i)->HCCHAR ;
bogdanm 0:9b334a45a8ff 1664
bogdanm 0:9b334a45a8ff 1665 value |= USB_OTG_HCCHAR_CHDIS;
bogdanm 0:9b334a45a8ff 1666 value |= USB_OTG_HCCHAR_CHENA;
bogdanm 0:9b334a45a8ff 1667 value &= ~USB_OTG_HCCHAR_EPDIR;
bogdanm 0:9b334a45a8ff 1668
bogdanm 0:9b334a45a8ff 1669 USBx_HC(i)->HCCHAR = value;
bogdanm 0:9b334a45a8ff 1670 do
bogdanm 0:9b334a45a8ff 1671 {
bogdanm 0:9b334a45a8ff 1672 if (++count > 1000)
bogdanm 0:9b334a45a8ff 1673 {
bogdanm 0:9b334a45a8ff 1674 break;
bogdanm 0:9b334a45a8ff 1675 }
bogdanm 0:9b334a45a8ff 1676 }
bogdanm 0:9b334a45a8ff 1677 while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
bogdanm 0:9b334a45a8ff 1678 }
bogdanm 0:9b334a45a8ff 1679
bogdanm 0:9b334a45a8ff 1680 /* Clear any pending Host interrupts */
bogdanm 0:9b334a45a8ff 1681 USBx_HOST->HAINT = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1682 USBx->GINTSTS = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 1683 USB_EnableGlobalInt(USBx);
bogdanm 0:9b334a45a8ff 1684 return HAL_OK;
bogdanm 0:9b334a45a8ff 1685 }
bogdanm 0:9b334a45a8ff 1686 /**
bogdanm 0:9b334a45a8ff 1687 * @}
bogdanm 0:9b334a45a8ff 1688 */
bogdanm 0:9b334a45a8ff 1689
bogdanm 0:9b334a45a8ff 1690 #endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */
bogdanm 0:9b334a45a8ff 1691
bogdanm 0:9b334a45a8ff 1692 /**
bogdanm 0:9b334a45a8ff 1693 * @}
bogdanm 0:9b334a45a8ff 1694 */
bogdanm 0:9b334a45a8ff 1695
bogdanm 0:9b334a45a8ff 1696 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/