en 129 / mbed-dev

fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F1/stm32f1xx_hal_adc_ex.c@124:6a4a5b7d7324, 2016-05-09 (annotated)

Committer:
mbed_official
Date:
Mon May 09 18:30:12 2016 +0100
Revision:
124:6a4a5b7d7324
Parent:
0:9b334a45a8ff 
Synchronized with git revision ad75bdcde34d7da9d54b7669010c7fb968a99c7c



Full URL: https://github.com/mbedmicro/mbed/commit/ad75bdcde34d7da9d54b7669010c7fb968a99c7c/



[STMF1] Stm32f1_hal_cube update

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f1xx_hal_adc_ex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
mbed_official 124:6a4a5b7d7324 5 * @version V1.0.4
mbed_official 124:6a4a5b7d7324 6 * @date 29-April-2016
bogdanm 0:9b334a45a8ff 7 * @brief This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 8 * functionalities of the Analog to Digital Convertor (ADC)
bogdanm 0:9b334a45a8ff 9 * peripheral:
bogdanm 0:9b334a45a8ff 10 * + Operation functions
bogdanm 0:9b334a45a8ff 11 * ++ Start, stop, get result of conversions of injected
bogdanm 0:9b334a45a8ff 12 * group, using 2 possible modes: polling, interruption.
bogdanm 0:9b334a45a8ff 13 * ++ Multimode feature (available on devices with 2 ADCs or more)
bogdanm 0:9b334a45a8ff 14 * ++ Calibration (ADC automatic self-calibration)
bogdanm 0:9b334a45a8ff 15 * + Control functions
bogdanm 0:9b334a45a8ff 16 * ++ Channels configuration on injected group
bogdanm 0:9b334a45a8ff 17 * Other functions (generic functions) are available in file
bogdanm 0:9b334a45a8ff 18 * "stm32f1xx_hal_adc.c".
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 @verbatim
bogdanm 0:9b334a45a8ff 21 [..]
bogdanm 0:9b334a45a8ff 22 (@) Sections "ADC peripheral features" and "How to use this driver" are
bogdanm 0:9b334a45a8ff 23 available in file of generic functions "stm32f1xx_hal_adc.c".
bogdanm 0:9b334a45a8ff 24 [..]
bogdanm 0:9b334a45a8ff 25 @endverbatim
bogdanm 0:9b334a45a8ff 26 ******************************************************************************
bogdanm 0:9b334a45a8ff 27 * @attention
bogdanm 0:9b334a45a8ff 28 *
mbed_official 124:6a4a5b7d7324 29 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 32 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 33 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 34 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 35 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 36 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 37 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 38 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 39 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 40 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 41 *
bogdanm 0:9b334a45a8ff 42 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 43 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 44 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 45 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 46 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 47 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 48 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 49 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 50 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 51 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 52 *
bogdanm 0:9b334a45a8ff 53 ******************************************************************************
bogdanm 0:9b334a45a8ff 54 */
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 57 #include "stm32f1xx_hal.h"
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 /** @addtogroup STM32F1xx_HAL_Driver
bogdanm 0:9b334a45a8ff 60 * @{
bogdanm 0:9b334a45a8ff 61 */
bogdanm 0:9b334a45a8ff 62
bogdanm 0:9b334a45a8ff 63 /** @defgroup ADCEx ADCEx
bogdanm 0:9b334a45a8ff 64 * @brief ADC Extension HAL module driver
bogdanm 0:9b334a45a8ff 65 * @{
bogdanm 0:9b334a45a8ff 66 */
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 #ifdef HAL_ADC_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 71 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 72 /** @defgroup ADCEx_Private_Constants ADCEx Private Constants
bogdanm 0:9b334a45a8ff 73 * @{
bogdanm 0:9b334a45a8ff 74 */
bogdanm 0:9b334a45a8ff 75
bogdanm 0:9b334a45a8ff 76 /* Delay for ADC calibration: */
bogdanm 0:9b334a45a8ff 77 /* Hardware prerequisite before starting a calibration: the ADC must have */
bogdanm 0:9b334a45a8ff 78 /* been in power-on state for at least two ADC clock cycles. */
bogdanm 0:9b334a45a8ff 79 /* Unit: ADC clock cycles */
bogdanm 0:9b334a45a8ff 80 #define ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ((uint32_t) 2)
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 /* Timeout value for ADC calibration */
bogdanm 0:9b334a45a8ff 83 /* Value defined to be higher than worst cases: low clocks freq, */
bogdanm 0:9b334a45a8ff 84 /* maximum prescaler. */
bogdanm 0:9b334a45a8ff 85 /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */
bogdanm 0:9b334a45a8ff 86 /* prescaler 4, sampling time 12.5 ADC clock cycles, resolution 12 bits. */
bogdanm 0:9b334a45a8ff 87 /* Unit: ms */
bogdanm 0:9b334a45a8ff 88 #define ADC_CALIBRATION_TIMEOUT ((uint32_t) 10)
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 /* Delay for temperature sensor stabilization time. */
bogdanm 0:9b334a45a8ff 91 /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
bogdanm 0:9b334a45a8ff 92 /* Unit: us */
bogdanm 0:9b334a45a8ff 93 #define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10)
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 /**
bogdanm 0:9b334a45a8ff 96 * @}
bogdanm 0:9b334a45a8ff 97 */
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 100 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 101 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 102 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 /** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
bogdanm 0:9b334a45a8ff 105 * @{
bogdanm 0:9b334a45a8ff 106 */
bogdanm 0:9b334a45a8ff 107
bogdanm 0:9b334a45a8ff 108 /** @defgroup ADCEx_Exported_Functions_Group1 Extended Extended IO operation functions
bogdanm 0:9b334a45a8ff 109 * @brief Extended Extended Input and Output operation functions
bogdanm 0:9b334a45a8ff 110 *
bogdanm 0:9b334a45a8ff 111 @verbatim
bogdanm 0:9b334a45a8ff 112 ===============================================================================
bogdanm 0:9b334a45a8ff 113 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 114 ===============================================================================
bogdanm 0:9b334a45a8ff 115 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 116 (+) Start conversion of injected group.
bogdanm 0:9b334a45a8ff 117 (+) Stop conversion of injected group.
bogdanm 0:9b334a45a8ff 118 (+) Poll for conversion complete on injected group.
bogdanm 0:9b334a45a8ff 119 (+) Get result of injected channel conversion.
bogdanm 0:9b334a45a8ff 120 (+) Start conversion of injected group and enable interruptions.
bogdanm 0:9b334a45a8ff 121 (+) Stop conversion of injected group and disable interruptions.
bogdanm 0:9b334a45a8ff 122
bogdanm 0:9b334a45a8ff 123 (+) Start multimode and enable DMA transfer.
bogdanm 0:9b334a45a8ff 124 (+) Stop multimode and disable ADC DMA transfer.
bogdanm 0:9b334a45a8ff 125 (+) Get result of multimode conversion.
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 (+) Perform the ADC self-calibration for single or differential ending.
bogdanm 0:9b334a45a8ff 128 (+) Get calibration factors for single or differential ending.
bogdanm 0:9b334a45a8ff 129 (+) Set calibration factors for single or differential ending.
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 @endverbatim
bogdanm 0:9b334a45a8ff 132 * @{
bogdanm 0:9b334a45a8ff 133 */
bogdanm 0:9b334a45a8ff 134
bogdanm 0:9b334a45a8ff 135 /**
bogdanm 0:9b334a45a8ff 136 * @brief Perform an ADC automatic self-calibration
bogdanm 0:9b334a45a8ff 137 * Calibration prerequisite: ADC must be disabled (execute this
bogdanm 0:9b334a45a8ff 138 * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
bogdanm 0:9b334a45a8ff 139 * During calibration process, ADC is enabled. ADC is let enabled at
bogdanm 0:9b334a45a8ff 140 * the completion of this function.
bogdanm 0:9b334a45a8ff 141 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 142 * @retval HAL status
bogdanm 0:9b334a45a8ff 143 */
bogdanm 0:9b334a45a8ff 144 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 145 {
bogdanm 0:9b334a45a8ff 146 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 147 uint32_t tickstart;
bogdanm 0:9b334a45a8ff 148 __IO uint32_t wait_loop_index = 0;
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 /* Check the parameters */
bogdanm 0:9b334a45a8ff 151 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 152
bogdanm 0:9b334a45a8ff 153 /* Process locked */
bogdanm 0:9b334a45a8ff 154 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 /* 1. Calibration prerequisite: */
bogdanm 0:9b334a45a8ff 157 /* - ADC must be disabled for at least two ADC clock cycles in disable */
bogdanm 0:9b334a45a8ff 158 /* mode before ADC enable */
bogdanm 0:9b334a45a8ff 159 /* Stop potential conversion on going, on regular and injected groups */
bogdanm 0:9b334a45a8ff 160 /* Disable ADC peripheral */
bogdanm 0:9b334a45a8ff 161 tmp_hal_status = ADC_ConversionStop_Disable(hadc);
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 /* Check if ADC is effectively disabled */
mbed_official 124:6a4a5b7d7324 164 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 165 {
mbed_official 124:6a4a5b7d7324 166 /* Set ADC state */
mbed_official 124:6a4a5b7d7324 167 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 168 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 124:6a4a5b7d7324 169 HAL_ADC_STATE_BUSY_INTERNAL);
mbed_official 124:6a4a5b7d7324 170
bogdanm 0:9b334a45a8ff 171 /* Hardware prerequisite: delay before starting the calibration. */
bogdanm 0:9b334a45a8ff 172 /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */
bogdanm 0:9b334a45a8ff 173 /* - Wait for the expected ADC clock cycles delay */
bogdanm 0:9b334a45a8ff 174 wait_loop_index = ((SystemCoreClock
bogdanm 0:9b334a45a8ff 175 / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
bogdanm 0:9b334a45a8ff 176 * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES );
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 while(wait_loop_index != 0)
bogdanm 0:9b334a45a8ff 179 {
bogdanm 0:9b334a45a8ff 180 wait_loop_index--;
bogdanm 0:9b334a45a8ff 181 }
bogdanm 0:9b334a45a8ff 182
bogdanm 0:9b334a45a8ff 183 /* 2. Enable the ADC peripheral */
bogdanm 0:9b334a45a8ff 184 ADC_Enable(hadc);
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 /* 3. Resets ADC calibration registers */
bogdanm 0:9b334a45a8ff 187 SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL);
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 /* Wait for calibration reset completion */
bogdanm 0:9b334a45a8ff 192 while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
bogdanm 0:9b334a45a8ff 193 {
bogdanm 0:9b334a45a8ff 194 if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
bogdanm 0:9b334a45a8ff 195 {
bogdanm 0:9b334a45a8ff 196 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 197 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 198 HAL_ADC_STATE_BUSY_INTERNAL,
mbed_official 124:6a4a5b7d7324 199 HAL_ADC_STATE_ERROR_INTERNAL);
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /* Process unlocked */
bogdanm 0:9b334a45a8ff 202 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 205 }
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 /* 4. Start ADC calibration */
bogdanm 0:9b334a45a8ff 210 SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL);
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 /* Wait for calibration completion */
bogdanm 0:9b334a45a8ff 215 while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
bogdanm 0:9b334a45a8ff 216 {
bogdanm 0:9b334a45a8ff 217 if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
bogdanm 0:9b334a45a8ff 218 {
bogdanm 0:9b334a45a8ff 219 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 220 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 221 HAL_ADC_STATE_BUSY_INTERNAL,
mbed_official 124:6a4a5b7d7324 222 HAL_ADC_STATE_ERROR_INTERNAL);
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 /* Process unlocked */
bogdanm 0:9b334a45a8ff 225 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 228 }
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230
mbed_official 124:6a4a5b7d7324 231 /* Set ADC state */
mbed_official 124:6a4a5b7d7324 232 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 233 HAL_ADC_STATE_BUSY_INTERNAL,
mbed_official 124:6a4a5b7d7324 234 HAL_ADC_STATE_READY);
bogdanm 0:9b334a45a8ff 235 }
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 /* Process unlocked */
bogdanm 0:9b334a45a8ff 238 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 /* Return function status */
bogdanm 0:9b334a45a8ff 241 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 242 }
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 /**
bogdanm 0:9b334a45a8ff 245 * @brief Enables ADC, starts conversion of injected group.
bogdanm 0:9b334a45a8ff 246 * Interruptions enabled in this function: None.
bogdanm 0:9b334a45a8ff 247 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 248 * @retval HAL status
bogdanm 0:9b334a45a8ff 249 */
bogdanm 0:9b334a45a8ff 250 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 251 {
bogdanm 0:9b334a45a8ff 252 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 253
bogdanm 0:9b334a45a8ff 254 /* Check the parameters */
bogdanm 0:9b334a45a8ff 255 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 256
bogdanm 0:9b334a45a8ff 257 /* Process locked */
bogdanm 0:9b334a45a8ff 258 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /* Enable the ADC peripheral */
bogdanm 0:9b334a45a8ff 261 tmp_hal_status = ADC_Enable(hadc);
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /* Start conversion if ADC is effectively enabled */
mbed_official 124:6a4a5b7d7324 264 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 265 {
mbed_official 124:6a4a5b7d7324 266 /* Set ADC state */
mbed_official 124:6a4a5b7d7324 267 /* - Clear state bitfield related to injected group conversion results */
mbed_official 124:6a4a5b7d7324 268 /* - Set state bitfield related to injected operation */
mbed_official 124:6a4a5b7d7324 269 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 270 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
mbed_official 124:6a4a5b7d7324 271 HAL_ADC_STATE_INJ_BUSY);
mbed_official 124:6a4a5b7d7324 272
mbed_official 124:6a4a5b7d7324 273 /* Case of independent mode or multimode (for devices with several ADCs): */
mbed_official 124:6a4a5b7d7324 274 /* Set multimode state. */
mbed_official 124:6a4a5b7d7324 275 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
bogdanm 0:9b334a45a8ff 276 {
mbed_official 124:6a4a5b7d7324 277 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
bogdanm 0:9b334a45a8ff 278 }
bogdanm 0:9b334a45a8ff 279 else
bogdanm 0:9b334a45a8ff 280 {
mbed_official 124:6a4a5b7d7324 281 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
mbed_official 124:6a4a5b7d7324 282 }
mbed_official 124:6a4a5b7d7324 283
mbed_official 124:6a4a5b7d7324 284 /* Check if a regular conversion is ongoing */
mbed_official 124:6a4a5b7d7324 285 /* Note: On this device, there is no ADC error code fields related to */
mbed_official 124:6a4a5b7d7324 286 /* conversions on group injected only. In case of conversion on */
mbed_official 124:6a4a5b7d7324 287 /* going on group regular, no error code is reset. */
mbed_official 124:6a4a5b7d7324 288 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
mbed_official 124:6a4a5b7d7324 289 {
mbed_official 124:6a4a5b7d7324 290 /* Reset ADC all error code fields */
mbed_official 124:6a4a5b7d7324 291 ADC_CLEAR_ERRORCODE(hadc);
bogdanm 0:9b334a45a8ff 292 }
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294 /* Process unlocked */
bogdanm 0:9b334a45a8ff 295 /* Unlock before starting ADC conversions: in case of potential */
bogdanm 0:9b334a45a8ff 296 /* interruption, to let the process to ADC IRQ Handler. */
bogdanm 0:9b334a45a8ff 297 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 /* Clear injected group conversion flag */
bogdanm 0:9b334a45a8ff 300 /* (To ensure of no unknown state from potential previous ADC operations) */
bogdanm 0:9b334a45a8ff 301 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
bogdanm 0:9b334a45a8ff 302
bogdanm 0:9b334a45a8ff 303 /* Enable conversion of injected group. */
bogdanm 0:9b334a45a8ff 304 /* If software start has been selected, conversion starts immediately. */
bogdanm 0:9b334a45a8ff 305 /* If external trigger has been selected, conversion will start at next */
bogdanm 0:9b334a45a8ff 306 /* trigger event. */
bogdanm 0:9b334a45a8ff 307 /* If automatic injected conversion is enabled, conversion will start */
bogdanm 0:9b334a45a8ff 308 /* after next regular group conversion. */
bogdanm 0:9b334a45a8ff 309 /* Case of multimode enabled (for devices with several ADCs): if ADC is */
bogdanm 0:9b334a45a8ff 310 /* slave, ADC is enabled only (conversion is not started). If ADC is */
bogdanm 0:9b334a45a8ff 311 /* master, ADC is enabled and conversion is started. */
bogdanm 0:9b334a45a8ff 312 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO))
bogdanm 0:9b334a45a8ff 313 {
bogdanm 0:9b334a45a8ff 314 if (ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
bogdanm 0:9b334a45a8ff 315 ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
bogdanm 0:9b334a45a8ff 316 {
bogdanm 0:9b334a45a8ff 317 /* Start ADC conversion on injected group with SW start */
bogdanm 0:9b334a45a8ff 318 SET_BIT(hadc->Instance->CR2, (ADC_CR2_JSWSTART | ADC_CR2_JEXTTRIG));
bogdanm 0:9b334a45a8ff 319 }
bogdanm 0:9b334a45a8ff 320 else
bogdanm 0:9b334a45a8ff 321 {
bogdanm 0:9b334a45a8ff 322 /* Start ADC conversion on injected group with external trigger */
bogdanm 0:9b334a45a8ff 323 SET_BIT(hadc->Instance->CR2, ADC_CR2_JEXTTRIG);
bogdanm 0:9b334a45a8ff 324 }
bogdanm 0:9b334a45a8ff 325 }
bogdanm 0:9b334a45a8ff 326 }
bogdanm 0:9b334a45a8ff 327 else
bogdanm 0:9b334a45a8ff 328 {
bogdanm 0:9b334a45a8ff 329 /* Process unlocked */
bogdanm 0:9b334a45a8ff 330 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 331 }
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 /* Return function status */
bogdanm 0:9b334a45a8ff 334 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 335 }
bogdanm 0:9b334a45a8ff 336
bogdanm 0:9b334a45a8ff 337 /**
bogdanm 0:9b334a45a8ff 338 * @brief Stop conversion of injected channels. Disable ADC peripheral if
bogdanm 0:9b334a45a8ff 339 * no regular conversion is on going.
bogdanm 0:9b334a45a8ff 340 * @note If ADC must be disabled and if conversion is on going on
bogdanm 0:9b334a45a8ff 341 * regular group, function HAL_ADC_Stop must be used to stop both
bogdanm 0:9b334a45a8ff 342 * injected and regular groups, and disable the ADC.
mbed_official 124:6a4a5b7d7324 343 * @note If injected group mode auto-injection is enabled,
mbed_official 124:6a4a5b7d7324 344 * function HAL_ADC_Stop must be used.
bogdanm 0:9b334a45a8ff 345 * @note In case of auto-injection mode, HAL_ADC_Stop must be used.
bogdanm 0:9b334a45a8ff 346 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 347 * @retval None
bogdanm 0:9b334a45a8ff 348 */
bogdanm 0:9b334a45a8ff 349 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 350 {
bogdanm 0:9b334a45a8ff 351 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 /* Check the parameters */
bogdanm 0:9b334a45a8ff 354 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 /* Process locked */
bogdanm 0:9b334a45a8ff 357 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 358
bogdanm 0:9b334a45a8ff 359 /* Stop potential conversion and disable ADC peripheral */
bogdanm 0:9b334a45a8ff 360 /* Conditioned to: */
bogdanm 0:9b334a45a8ff 361 /* - No conversion on the other group (regular group) is intended to */
bogdanm 0:9b334a45a8ff 362 /* continue (injected and regular groups stop conversion and ADC disable */
bogdanm 0:9b334a45a8ff 363 /* are common) */
bogdanm 0:9b334a45a8ff 364 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
mbed_official 124:6a4a5b7d7324 365 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
mbed_official 124:6a4a5b7d7324 366 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
bogdanm 0:9b334a45a8ff 367 {
bogdanm 0:9b334a45a8ff 368 /* Stop potential conversion on going, on regular and injected groups */
bogdanm 0:9b334a45a8ff 369 /* Disable ADC peripheral */
bogdanm 0:9b334a45a8ff 370 tmp_hal_status = ADC_ConversionStop_Disable(hadc);
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 /* Check if ADC is effectively disabled */
mbed_official 124:6a4a5b7d7324 373 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 374 {
mbed_official 124:6a4a5b7d7324 375 /* Set ADC state */
mbed_official 124:6a4a5b7d7324 376 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 377 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 124:6a4a5b7d7324 378 HAL_ADC_STATE_READY);
bogdanm 0:9b334a45a8ff 379 }
bogdanm 0:9b334a45a8ff 380 }
bogdanm 0:9b334a45a8ff 381 else
bogdanm 0:9b334a45a8ff 382 {
bogdanm 0:9b334a45a8ff 383 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 384 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 tmp_hal_status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 387 }
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 /* Process unlocked */
bogdanm 0:9b334a45a8ff 390 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /* Return function status */
bogdanm 0:9b334a45a8ff 393 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 394 }
bogdanm 0:9b334a45a8ff 395
bogdanm 0:9b334a45a8ff 396 /**
bogdanm 0:9b334a45a8ff 397 * @brief Wait for injected group conversion to be completed.
bogdanm 0:9b334a45a8ff 398 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 399 * @param Timeout: Timeout value in millisecond.
bogdanm 0:9b334a45a8ff 400 * @retval HAL status
bogdanm 0:9b334a45a8ff 401 */
bogdanm 0:9b334a45a8ff 402 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 403 {
bogdanm 0:9b334a45a8ff 404 uint32_t tickstart;
bogdanm 0:9b334a45a8ff 405
bogdanm 0:9b334a45a8ff 406 /* Variables for polling in case of scan mode enabled and polling for each */
bogdanm 0:9b334a45a8ff 407 /* conversion. */
bogdanm 0:9b334a45a8ff 408 __IO uint32_t Conversion_Timeout_CPU_cycles = 0;
bogdanm 0:9b334a45a8ff 409 uint32_t Conversion_Timeout_CPU_cycles_max = 0;
bogdanm 0:9b334a45a8ff 410
bogdanm 0:9b334a45a8ff 411 /* Check the parameters */
bogdanm 0:9b334a45a8ff 412 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 413
bogdanm 0:9b334a45a8ff 414 /* Get timeout */
bogdanm 0:9b334a45a8ff 415 tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 416
bogdanm 0:9b334a45a8ff 417 /* Polling for end of conversion: differentiation if single/sequence */
bogdanm 0:9b334a45a8ff 418 /* conversion. */
bogdanm 0:9b334a45a8ff 419 /* For injected group, flag JEOC is set only at the end of the sequence, */
bogdanm 0:9b334a45a8ff 420 /* not for each conversion within the sequence. */
bogdanm 0:9b334a45a8ff 421 /* - If single conversion for injected group (scan mode disabled or */
mbed_official 124:6a4a5b7d7324 422 /* InjectedNbrOfConversion ==1), flag JEOC is used to determine the */
bogdanm 0:9b334a45a8ff 423 /* conversion completion. */
bogdanm 0:9b334a45a8ff 424 /* - If sequence conversion for injected group (scan mode enabled and */
bogdanm 0:9b334a45a8ff 425 /* InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
bogdanm 0:9b334a45a8ff 426 /* sequence. */
bogdanm 0:9b334a45a8ff 427 /* To poll for each conversion, the maximum conversion time is computed */
bogdanm 0:9b334a45a8ff 428 /* from ADC conversion time (selected sampling time + conversion time of */
bogdanm 0:9b334a45a8ff 429 /* 12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on */
bogdanm 0:9b334a45a8ff 430 /* settings, conversion time range can be from 28 to 32256 CPU cycles). */
mbed_official 124:6a4a5b7d7324 431 /* As flag JEOC is not set after each conversion, no timeout status can */
mbed_official 124:6a4a5b7d7324 432 /* be set. */
bogdanm 0:9b334a45a8ff 433 if ((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)
bogdanm 0:9b334a45a8ff 434 {
bogdanm 0:9b334a45a8ff 435 /* Wait until End of Conversion flag is raised */
bogdanm 0:9b334a45a8ff 436 while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
bogdanm 0:9b334a45a8ff 437 {
bogdanm 0:9b334a45a8ff 438 /* Check if timeout is disabled (set to infinite wait) */
bogdanm 0:9b334a45a8ff 439 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 440 {
bogdanm 0:9b334a45a8ff 441 if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 442 {
bogdanm 0:9b334a45a8ff 443 /* Update ADC state machine to timeout */
mbed_official 124:6a4a5b7d7324 444 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 /* Process unlocked */
bogdanm 0:9b334a45a8ff 447 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 448
mbed_official 124:6a4a5b7d7324 449 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 450 }
bogdanm 0:9b334a45a8ff 451 }
bogdanm 0:9b334a45a8ff 452 }
bogdanm 0:9b334a45a8ff 453 }
bogdanm 0:9b334a45a8ff 454 else
bogdanm 0:9b334a45a8ff 455 {
mbed_official 124:6a4a5b7d7324 456 /* Replace polling by wait for maximum conversion time */
bogdanm 0:9b334a45a8ff 457 /* - Computation of CPU clock cycles corresponding to ADC clock cycles */
bogdanm 0:9b334a45a8ff 458 /* and ADC maximum conversion cycles on all channels. */
bogdanm 0:9b334a45a8ff 459 /* - Wait for the expected ADC clock cycles delay */
bogdanm 0:9b334a45a8ff 460 Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock
bogdanm 0:9b334a45a8ff 461 / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
bogdanm 0:9b334a45a8ff 462 * ADC_CONVCYCLES_MAX_RANGE(hadc) );
mbed_official 124:6a4a5b7d7324 463
bogdanm 0:9b334a45a8ff 464 while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
bogdanm 0:9b334a45a8ff 465 {
bogdanm 0:9b334a45a8ff 466 /* Check if timeout is disabled (set to infinite wait) */
bogdanm 0:9b334a45a8ff 467 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 468 {
bogdanm 0:9b334a45a8ff 469 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
bogdanm 0:9b334a45a8ff 470 {
bogdanm 0:9b334a45a8ff 471 /* Update ADC state machine to timeout */
mbed_official 124:6a4a5b7d7324 472 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
bogdanm 0:9b334a45a8ff 473
bogdanm 0:9b334a45a8ff 474 /* Process unlocked */
bogdanm 0:9b334a45a8ff 475 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 476
mbed_official 124:6a4a5b7d7324 477 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 478 }
bogdanm 0:9b334a45a8ff 479 }
bogdanm 0:9b334a45a8ff 480 Conversion_Timeout_CPU_cycles ++;
bogdanm 0:9b334a45a8ff 481 }
bogdanm 0:9b334a45a8ff 482 }
bogdanm 0:9b334a45a8ff 483
mbed_official 124:6a4a5b7d7324 484 /* Clear injected group conversion flag */
mbed_official 124:6a4a5b7d7324 485 /* Note: On STM32F1 ADC, clear regular conversion flag raised */
mbed_official 124:6a4a5b7d7324 486 /* simultaneously. */
bogdanm 0:9b334a45a8ff 487 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC | ADC_FLAG_EOC);
bogdanm 0:9b334a45a8ff 488
mbed_official 124:6a4a5b7d7324 489 /* Update ADC state machine */
mbed_official 124:6a4a5b7d7324 490 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
mbed_official 124:6a4a5b7d7324 491
mbed_official 124:6a4a5b7d7324 492 /* Determine whether any further conversion upcoming on group injected */
mbed_official 124:6a4a5b7d7324 493 /* by external trigger or by automatic injected conversion */
mbed_official 124:6a4a5b7d7324 494 /* from group regular. */
mbed_official 124:6a4a5b7d7324 495 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) ||
mbed_official 124:6a4a5b7d7324 496 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
mbed_official 124:6a4a5b7d7324 497 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official 124:6a4a5b7d7324 498 (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
bogdanm 0:9b334a45a8ff 499 {
mbed_official 124:6a4a5b7d7324 500 /* Set ADC state */
mbed_official 124:6a4a5b7d7324 501 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
mbed_official 124:6a4a5b7d7324 502
mbed_official 124:6a4a5b7d7324 503 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
bogdanm 0:9b334a45a8ff 504 {
mbed_official 124:6a4a5b7d7324 505 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
bogdanm 0:9b334a45a8ff 506 }
bogdanm 0:9b334a45a8ff 507 }
mbed_official 124:6a4a5b7d7324 508
bogdanm 0:9b334a45a8ff 509 /* Return ADC state */
bogdanm 0:9b334a45a8ff 510 return HAL_OK;
bogdanm 0:9b334a45a8ff 511 }
bogdanm 0:9b334a45a8ff 512
bogdanm 0:9b334a45a8ff 513 /**
bogdanm 0:9b334a45a8ff 514 * @brief Enables ADC, starts conversion of injected group with interruption.
bogdanm 0:9b334a45a8ff 515 * - JEOC (end of conversion of injected group)
bogdanm 0:9b334a45a8ff 516 * Each of these interruptions has its dedicated callback function.
bogdanm 0:9b334a45a8ff 517 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 518 * @retval HAL status.
bogdanm 0:9b334a45a8ff 519 */
bogdanm 0:9b334a45a8ff 520 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 521 {
bogdanm 0:9b334a45a8ff 522 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 523
bogdanm 0:9b334a45a8ff 524 /* Check the parameters */
bogdanm 0:9b334a45a8ff 525 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 526
bogdanm 0:9b334a45a8ff 527 /* Process locked */
bogdanm 0:9b334a45a8ff 528 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 529
bogdanm 0:9b334a45a8ff 530 /* Enable the ADC peripheral */
bogdanm 0:9b334a45a8ff 531 tmp_hal_status = ADC_Enable(hadc);
bogdanm 0:9b334a45a8ff 532
bogdanm 0:9b334a45a8ff 533 /* Start conversion if ADC is effectively enabled */
mbed_official 124:6a4a5b7d7324 534 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 535 {
mbed_official 124:6a4a5b7d7324 536 /* Set ADC state */
mbed_official 124:6a4a5b7d7324 537 /* - Clear state bitfield related to injected group conversion results */
mbed_official 124:6a4a5b7d7324 538 /* - Set state bitfield related to injected operation */
mbed_official 124:6a4a5b7d7324 539 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 540 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
mbed_official 124:6a4a5b7d7324 541 HAL_ADC_STATE_INJ_BUSY);
mbed_official 124:6a4a5b7d7324 542
mbed_official 124:6a4a5b7d7324 543 /* Case of independent mode or multimode (for devices with several ADCs): */
mbed_official 124:6a4a5b7d7324 544 /* Set multimode state. */
mbed_official 124:6a4a5b7d7324 545 if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
bogdanm 0:9b334a45a8ff 546 {
mbed_official 124:6a4a5b7d7324 547 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
bogdanm 0:9b334a45a8ff 548 }
bogdanm 0:9b334a45a8ff 549 else
bogdanm 0:9b334a45a8ff 550 {
mbed_official 124:6a4a5b7d7324 551 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
mbed_official 124:6a4a5b7d7324 552 }
mbed_official 124:6a4a5b7d7324 553
mbed_official 124:6a4a5b7d7324 554 /* Check if a regular conversion is ongoing */
mbed_official 124:6a4a5b7d7324 555 /* Note: On this device, there is no ADC error code fields related to */
mbed_official 124:6a4a5b7d7324 556 /* conversions on group injected only. In case of conversion on */
mbed_official 124:6a4a5b7d7324 557 /* going on group regular, no error code is reset. */
mbed_official 124:6a4a5b7d7324 558 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
mbed_official 124:6a4a5b7d7324 559 {
mbed_official 124:6a4a5b7d7324 560 /* Reset ADC all error code fields */
mbed_official 124:6a4a5b7d7324 561 ADC_CLEAR_ERRORCODE(hadc);
bogdanm 0:9b334a45a8ff 562 }
bogdanm 0:9b334a45a8ff 563
bogdanm 0:9b334a45a8ff 564 /* Process unlocked */
bogdanm 0:9b334a45a8ff 565 /* Unlock before starting ADC conversions: in case of potential */
bogdanm 0:9b334a45a8ff 566 /* interruption, to let the process to ADC IRQ Handler. */
bogdanm 0:9b334a45a8ff 567 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 568
bogdanm 0:9b334a45a8ff 569 /* Clear injected group conversion flag */
bogdanm 0:9b334a45a8ff 570 /* (To ensure of no unknown state from potential previous ADC operations) */
bogdanm 0:9b334a45a8ff 571 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
bogdanm 0:9b334a45a8ff 572
bogdanm 0:9b334a45a8ff 573 /* Enable end of conversion interrupt for injected channels */
bogdanm 0:9b334a45a8ff 574 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
bogdanm 0:9b334a45a8ff 575
bogdanm 0:9b334a45a8ff 576 /* Start conversion of injected group if software start has been selected */
bogdanm 0:9b334a45a8ff 577 /* and if automatic injected conversion is disabled. */
bogdanm 0:9b334a45a8ff 578 /* If external trigger has been selected, conversion will start at next */
bogdanm 0:9b334a45a8ff 579 /* trigger event. */
bogdanm 0:9b334a45a8ff 580 /* If automatic injected conversion is enabled, conversion will start */
bogdanm 0:9b334a45a8ff 581 /* after next regular group conversion. */
bogdanm 0:9b334a45a8ff 582 if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO))
bogdanm 0:9b334a45a8ff 583 {
bogdanm 0:9b334a45a8ff 584 if (ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
bogdanm 0:9b334a45a8ff 585 ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
bogdanm 0:9b334a45a8ff 586 {
bogdanm 0:9b334a45a8ff 587 /* Start ADC conversion on injected group with SW start */
bogdanm 0:9b334a45a8ff 588 SET_BIT(hadc->Instance->CR2, (ADC_CR2_JSWSTART | ADC_CR2_JEXTTRIG));
bogdanm 0:9b334a45a8ff 589 }
bogdanm 0:9b334a45a8ff 590 else
bogdanm 0:9b334a45a8ff 591 {
bogdanm 0:9b334a45a8ff 592 /* Start ADC conversion on injected group with external trigger */
bogdanm 0:9b334a45a8ff 593 SET_BIT(hadc->Instance->CR2, ADC_CR2_JEXTTRIG);
bogdanm 0:9b334a45a8ff 594 }
bogdanm 0:9b334a45a8ff 595 }
bogdanm 0:9b334a45a8ff 596 }
bogdanm 0:9b334a45a8ff 597 else
bogdanm 0:9b334a45a8ff 598 {
bogdanm 0:9b334a45a8ff 599 /* Process unlocked */
bogdanm 0:9b334a45a8ff 600 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 601 }
bogdanm 0:9b334a45a8ff 602
bogdanm 0:9b334a45a8ff 603 /* Return function status */
bogdanm 0:9b334a45a8ff 604 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 605 }
bogdanm 0:9b334a45a8ff 606
bogdanm 0:9b334a45a8ff 607 /**
bogdanm 0:9b334a45a8ff 608 * @brief Stop conversion of injected channels, disable interruption of
bogdanm 0:9b334a45a8ff 609 * end-of-conversion. Disable ADC peripheral if no regular conversion
bogdanm 0:9b334a45a8ff 610 * is on going.
bogdanm 0:9b334a45a8ff 611 * @note If ADC must be disabled and if conversion is on going on
bogdanm 0:9b334a45a8ff 612 * regular group, function HAL_ADC_Stop must be used to stop both
bogdanm 0:9b334a45a8ff 613 * injected and regular groups, and disable the ADC.
mbed_official 124:6a4a5b7d7324 614 * @note If injected group mode auto-injection is enabled,
mbed_official 124:6a4a5b7d7324 615 * function HAL_ADC_Stop must be used.
bogdanm 0:9b334a45a8ff 616 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 617 * @retval None
bogdanm 0:9b334a45a8ff 618 */
bogdanm 0:9b334a45a8ff 619 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 620 {
bogdanm 0:9b334a45a8ff 621 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 622
bogdanm 0:9b334a45a8ff 623 /* Check the parameters */
bogdanm 0:9b334a45a8ff 624 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 625
bogdanm 0:9b334a45a8ff 626 /* Process locked */
bogdanm 0:9b334a45a8ff 627 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 628
bogdanm 0:9b334a45a8ff 629 /* Stop potential conversion and disable ADC peripheral */
bogdanm 0:9b334a45a8ff 630 /* Conditioned to: */
bogdanm 0:9b334a45a8ff 631 /* - No conversion on the other group (regular group) is intended to */
bogdanm 0:9b334a45a8ff 632 /* continue (injected and regular groups stop conversion and ADC disable */
bogdanm 0:9b334a45a8ff 633 /* are common) */
bogdanm 0:9b334a45a8ff 634 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
mbed_official 124:6a4a5b7d7324 635 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
mbed_official 124:6a4a5b7d7324 636 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
bogdanm 0:9b334a45a8ff 637 {
bogdanm 0:9b334a45a8ff 638 /* Stop potential conversion on going, on regular and injected groups */
bogdanm 0:9b334a45a8ff 639 /* Disable ADC peripheral */
bogdanm 0:9b334a45a8ff 640 tmp_hal_status = ADC_ConversionStop_Disable(hadc);
bogdanm 0:9b334a45a8ff 641
bogdanm 0:9b334a45a8ff 642 /* Check if ADC is effectively disabled */
mbed_official 124:6a4a5b7d7324 643 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 644 {
bogdanm 0:9b334a45a8ff 645 /* Disable ADC end of conversion interrupt for injected channels */
bogdanm 0:9b334a45a8ff 646 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
bogdanm 0:9b334a45a8ff 647
mbed_official 124:6a4a5b7d7324 648 /* Set ADC state */
mbed_official 124:6a4a5b7d7324 649 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 650 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 124:6a4a5b7d7324 651 HAL_ADC_STATE_READY);
bogdanm 0:9b334a45a8ff 652 }
bogdanm 0:9b334a45a8ff 653 }
bogdanm 0:9b334a45a8ff 654 else
bogdanm 0:9b334a45a8ff 655 {
bogdanm 0:9b334a45a8ff 656 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 657 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 658
bogdanm 0:9b334a45a8ff 659 tmp_hal_status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 660 }
bogdanm 0:9b334a45a8ff 661
bogdanm 0:9b334a45a8ff 662 /* Process unlocked */
bogdanm 0:9b334a45a8ff 663 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 664
bogdanm 0:9b334a45a8ff 665 /* Return function status */
bogdanm 0:9b334a45a8ff 666 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 667 }
bogdanm 0:9b334a45a8ff 668
bogdanm 0:9b334a45a8ff 669 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
bogdanm 0:9b334a45a8ff 670 /**
bogdanm 0:9b334a45a8ff 671 * @brief Enables ADC, starts conversion of regular group and transfers result
bogdanm 0:9b334a45a8ff 672 * through DMA.
bogdanm 0:9b334a45a8ff 673 * Multimode must have been previously configured using
bogdanm 0:9b334a45a8ff 674 * HAL_ADCEx_MultiModeConfigChannel() function.
bogdanm 0:9b334a45a8ff 675 * Interruptions enabled in this function:
bogdanm 0:9b334a45a8ff 676 * - DMA transfer complete
bogdanm 0:9b334a45a8ff 677 * - DMA half transfer
bogdanm 0:9b334a45a8ff 678 * Each of these interruptions has its dedicated callback function.
bogdanm 0:9b334a45a8ff 679 * @note: On STM32F1 devices, ADC slave regular group must be configured
bogdanm 0:9b334a45a8ff 680 * with conversion trigger ADC_SOFTWARE_START.
bogdanm 0:9b334a45a8ff 681 * @note: ADC slave can be enabled preliminarily using single-mode
bogdanm 0:9b334a45a8ff 682 * HAL_ADC_Start() function.
bogdanm 0:9b334a45a8ff 683 * @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
bogdanm 0:9b334a45a8ff 684 * @param pData: The destination Buffer address.
bogdanm 0:9b334a45a8ff 685 * @param Length: The length of data to be transferred from ADC peripheral to memory.
bogdanm 0:9b334a45a8ff 686 * @retval None
bogdanm 0:9b334a45a8ff 687 */
bogdanm 0:9b334a45a8ff 688 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
bogdanm 0:9b334a45a8ff 689 {
bogdanm 0:9b334a45a8ff 690 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 691 ADC_HandleTypeDef tmphadcSlave;
bogdanm 0:9b334a45a8ff 692
bogdanm 0:9b334a45a8ff 693 /* Check the parameters */
bogdanm 0:9b334a45a8ff 694 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 695 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
bogdanm 0:9b334a45a8ff 696
bogdanm 0:9b334a45a8ff 697 /* Process locked */
bogdanm 0:9b334a45a8ff 698 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 699
bogdanm 0:9b334a45a8ff 700 /* Set a temporary handle of the ADC slave associated to the ADC master */
bogdanm 0:9b334a45a8ff 701 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
bogdanm 0:9b334a45a8ff 702
bogdanm 0:9b334a45a8ff 703 /* On STM32F1 devices, ADC slave regular group must be configured with */
bogdanm 0:9b334a45a8ff 704 /* conversion trigger ADC_SOFTWARE_START. */
bogdanm 0:9b334a45a8ff 705 /* Note: External trigger of ADC slave must be enabled, it is already done */
bogdanm 0:9b334a45a8ff 706 /* into function "HAL_ADC_Init()". */
bogdanm 0:9b334a45a8ff 707 if ((tmphadcSlave.Instance == NULL) ||
bogdanm 0:9b334a45a8ff 708 (! ADC_IS_SOFTWARE_START_REGULAR(&tmphadcSlave)) )
bogdanm 0:9b334a45a8ff 709 {
bogdanm 0:9b334a45a8ff 710 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 711 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 712
bogdanm 0:9b334a45a8ff 713 /* Process unlocked */
bogdanm 0:9b334a45a8ff 714 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 715
bogdanm 0:9b334a45a8ff 716 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 717 }
mbed_official 124:6a4a5b7d7324 718
bogdanm 0:9b334a45a8ff 719 /* Enable the ADC peripherals: master and slave (in case if not already */
bogdanm 0:9b334a45a8ff 720 /* enabled previously) */
bogdanm 0:9b334a45a8ff 721 tmp_hal_status = ADC_Enable(hadc);
mbed_official 124:6a4a5b7d7324 722 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 723 {
bogdanm 0:9b334a45a8ff 724 tmp_hal_status = ADC_Enable(&tmphadcSlave);
bogdanm 0:9b334a45a8ff 725 }
bogdanm 0:9b334a45a8ff 726
mbed_official 124:6a4a5b7d7324 727 /* Start conversion if all ADCs of multimode are effectively enabled */
mbed_official 124:6a4a5b7d7324 728 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 729 {
mbed_official 124:6a4a5b7d7324 730 /* Set ADC state (ADC master) */
mbed_official 124:6a4a5b7d7324 731 /* - Clear state bitfield related to regular group conversion results */
mbed_official 124:6a4a5b7d7324 732 /* - Set state bitfield related to regular operation */
mbed_official 124:6a4a5b7d7324 733 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 734 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_MULTIMODE_SLAVE,
mbed_official 124:6a4a5b7d7324 735 HAL_ADC_STATE_REG_BUSY);
mbed_official 124:6a4a5b7d7324 736
mbed_official 124:6a4a5b7d7324 737 /* If conversions on group regular are also triggering group injected, */
mbed_official 124:6a4a5b7d7324 738 /* update ADC state. */
mbed_official 124:6a4a5b7d7324 739 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
bogdanm 0:9b334a45a8ff 740 {
mbed_official 124:6a4a5b7d7324 741 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
bogdanm 0:9b334a45a8ff 742 }
mbed_official 124:6a4a5b7d7324 743
bogdanm 0:9b334a45a8ff 744 /* Process unlocked */
bogdanm 0:9b334a45a8ff 745 /* Unlock before starting ADC conversions: in case of potential */
bogdanm 0:9b334a45a8ff 746 /* interruption, to let the process to ADC IRQ Handler. */
bogdanm 0:9b334a45a8ff 747 __HAL_UNLOCK(hadc);
mbed_official 124:6a4a5b7d7324 748
bogdanm 0:9b334a45a8ff 749 /* Set ADC error code to none */
bogdanm 0:9b334a45a8ff 750 ADC_CLEAR_ERRORCODE(hadc);
bogdanm 0:9b334a45a8ff 751
bogdanm 0:9b334a45a8ff 752
bogdanm 0:9b334a45a8ff 753 /* Set the DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 754 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
bogdanm 0:9b334a45a8ff 755
bogdanm 0:9b334a45a8ff 756 /* Set the DMA half transfer complete callback */
bogdanm 0:9b334a45a8ff 757 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
bogdanm 0:9b334a45a8ff 758
bogdanm 0:9b334a45a8ff 759 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 760 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
bogdanm 0:9b334a45a8ff 761
bogdanm 0:9b334a45a8ff 762
bogdanm 0:9b334a45a8ff 763 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
bogdanm 0:9b334a45a8ff 764 /* start (in case of SW start): */
bogdanm 0:9b334a45a8ff 765
bogdanm 0:9b334a45a8ff 766 /* Clear regular group conversion flag and overrun flag */
bogdanm 0:9b334a45a8ff 767 /* (To ensure of no unknown state from potential previous ADC operations) */
bogdanm 0:9b334a45a8ff 768 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
bogdanm 0:9b334a45a8ff 769
bogdanm 0:9b334a45a8ff 770 /* Enable ADC DMA mode of ADC master */
bogdanm 0:9b334a45a8ff 771 SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
bogdanm 0:9b334a45a8ff 772
bogdanm 0:9b334a45a8ff 773 /* Start the DMA channel */
bogdanm 0:9b334a45a8ff 774 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
bogdanm 0:9b334a45a8ff 775
bogdanm 0:9b334a45a8ff 776 /* Start conversion of regular group if software start has been selected. */
bogdanm 0:9b334a45a8ff 777 /* If external trigger has been selected, conversion will start at next */
bogdanm 0:9b334a45a8ff 778 /* trigger event. */
bogdanm 0:9b334a45a8ff 779 /* Note: Alternate trigger for single conversion could be to force an */
bogdanm 0:9b334a45a8ff 780 /* additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/
bogdanm 0:9b334a45a8ff 781 if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
bogdanm 0:9b334a45a8ff 782 {
bogdanm 0:9b334a45a8ff 783 /* Start ADC conversion on regular group with SW start */
bogdanm 0:9b334a45a8ff 784 SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
bogdanm 0:9b334a45a8ff 785 }
bogdanm 0:9b334a45a8ff 786 else
bogdanm 0:9b334a45a8ff 787 {
bogdanm 0:9b334a45a8ff 788 /* Start ADC conversion on regular group with external trigger */
bogdanm 0:9b334a45a8ff 789 SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
bogdanm 0:9b334a45a8ff 790 }
bogdanm 0:9b334a45a8ff 791 }
bogdanm 0:9b334a45a8ff 792 else
bogdanm 0:9b334a45a8ff 793 {
bogdanm 0:9b334a45a8ff 794 /* Process unlocked */
bogdanm 0:9b334a45a8ff 795 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 796 }
bogdanm 0:9b334a45a8ff 797
bogdanm 0:9b334a45a8ff 798 /* Return function status */
bogdanm 0:9b334a45a8ff 799 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 800 }
bogdanm 0:9b334a45a8ff 801
bogdanm 0:9b334a45a8ff 802 /**
bogdanm 0:9b334a45a8ff 803 * @brief Stop ADC conversion of regular group (and injected channels in
bogdanm 0:9b334a45a8ff 804 * case of auto_injection mode), disable ADC DMA transfer, disable
bogdanm 0:9b334a45a8ff 805 * ADC peripheral.
bogdanm 0:9b334a45a8ff 806 * @note Multimode is kept enabled after this function. To disable multimode
bogdanm 0:9b334a45a8ff 807 * (set with HAL_ADCEx_MultiModeConfigChannel(), ADC must be
bogdanm 0:9b334a45a8ff 808 * reinitialized using HAL_ADC_Init() or HAL_ADC_ReInit().
bogdanm 0:9b334a45a8ff 809 * @note In case of DMA configured in circular mode, function
bogdanm 0:9b334a45a8ff 810 * HAL_ADC_Stop_DMA must be called after this function with handle of
bogdanm 0:9b334a45a8ff 811 * ADC slave, to properly disable the DMA channel.
bogdanm 0:9b334a45a8ff 812 * @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
bogdanm 0:9b334a45a8ff 813 * @retval None
bogdanm 0:9b334a45a8ff 814 */
bogdanm 0:9b334a45a8ff 815 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 816 {
bogdanm 0:9b334a45a8ff 817 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 818 ADC_HandleTypeDef tmphadcSlave;
bogdanm 0:9b334a45a8ff 819
bogdanm 0:9b334a45a8ff 820 /* Check the parameters */
bogdanm 0:9b334a45a8ff 821 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 822
bogdanm 0:9b334a45a8ff 823 /* Process locked */
bogdanm 0:9b334a45a8ff 824 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 825
bogdanm 0:9b334a45a8ff 826
bogdanm 0:9b334a45a8ff 827 /* Stop potential conversion on going, on regular and injected groups */
bogdanm 0:9b334a45a8ff 828 /* Disable ADC master peripheral */
bogdanm 0:9b334a45a8ff 829 tmp_hal_status = ADC_ConversionStop_Disable(hadc);
bogdanm 0:9b334a45a8ff 830
bogdanm 0:9b334a45a8ff 831 /* Check if ADC is effectively disabled */
mbed_official 124:6a4a5b7d7324 832 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 833 {
bogdanm 0:9b334a45a8ff 834 /* Set a temporary handle of the ADC slave associated to the ADC master */
bogdanm 0:9b334a45a8ff 835 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
bogdanm 0:9b334a45a8ff 836
bogdanm 0:9b334a45a8ff 837 if (tmphadcSlave.Instance == NULL)
bogdanm 0:9b334a45a8ff 838 {
bogdanm 0:9b334a45a8ff 839 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 840 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
bogdanm 0:9b334a45a8ff 841
bogdanm 0:9b334a45a8ff 842 /* Process unlocked */
bogdanm 0:9b334a45a8ff 843 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 844
bogdanm 0:9b334a45a8ff 845 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 846 }
bogdanm 0:9b334a45a8ff 847 else
bogdanm 0:9b334a45a8ff 848 {
bogdanm 0:9b334a45a8ff 849 /* Disable ADC slave peripheral */
bogdanm 0:9b334a45a8ff 850 tmp_hal_status = ADC_ConversionStop_Disable(&tmphadcSlave);
bogdanm 0:9b334a45a8ff 851
bogdanm 0:9b334a45a8ff 852 /* Check if ADC is effectively disabled */
bogdanm 0:9b334a45a8ff 853 if (tmp_hal_status != HAL_OK)
bogdanm 0:9b334a45a8ff 854 {
bogdanm 0:9b334a45a8ff 855 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 856 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
bogdanm 0:9b334a45a8ff 857
bogdanm 0:9b334a45a8ff 858 /* Process unlocked */
bogdanm 0:9b334a45a8ff 859 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 860
bogdanm 0:9b334a45a8ff 861 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 862 }
bogdanm 0:9b334a45a8ff 863 }
bogdanm 0:9b334a45a8ff 864
bogdanm 0:9b334a45a8ff 865 /* Disable ADC DMA mode */
bogdanm 0:9b334a45a8ff 866 CLEAR_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
bogdanm 0:9b334a45a8ff 867
bogdanm 0:9b334a45a8ff 868 /* Reset configuration of ADC DMA continuous request for dual mode */
bogdanm 0:9b334a45a8ff 869 CLEAR_BIT(hadc->Instance->CR1, ADC_CR1_DUALMOD);
bogdanm 0:9b334a45a8ff 870
bogdanm 0:9b334a45a8ff 871 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
bogdanm 0:9b334a45a8ff 872 /* while DMA transfer is on going) */
bogdanm 0:9b334a45a8ff 873 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
bogdanm 0:9b334a45a8ff 874
bogdanm 0:9b334a45a8ff 875
bogdanm 0:9b334a45a8ff 876 /* Check if DMA channel effectively disabled */
mbed_official 124:6a4a5b7d7324 877 if (tmp_hal_status == HAL_OK)
bogdanm 0:9b334a45a8ff 878 {
bogdanm 0:9b334a45a8ff 879 /* Change ADC state (ADC master) */
mbed_official 124:6a4a5b7d7324 880 ADC_STATE_CLR_SET(hadc->State,
mbed_official 124:6a4a5b7d7324 881 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
mbed_official 124:6a4a5b7d7324 882 HAL_ADC_STATE_READY);
bogdanm 0:9b334a45a8ff 883 }
bogdanm 0:9b334a45a8ff 884 else
bogdanm 0:9b334a45a8ff 885 {
bogdanm 0:9b334a45a8ff 886 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 887 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
bogdanm 0:9b334a45a8ff 888 }
bogdanm 0:9b334a45a8ff 889 }
bogdanm 0:9b334a45a8ff 890
bogdanm 0:9b334a45a8ff 891 /* Process unlocked */
bogdanm 0:9b334a45a8ff 892 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 893
bogdanm 0:9b334a45a8ff 894 /* Return function status */
bogdanm 0:9b334a45a8ff 895 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 896 }
bogdanm 0:9b334a45a8ff 897 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
bogdanm 0:9b334a45a8ff 898
bogdanm 0:9b334a45a8ff 899 /**
bogdanm 0:9b334a45a8ff 900 * @brief Get ADC injected group conversion result.
mbed_official 124:6a4a5b7d7324 901 * @note Reading register JDRx automatically clears ADC flag JEOC
mbed_official 124:6a4a5b7d7324 902 * (ADC group injected end of unitary conversion).
mbed_official 124:6a4a5b7d7324 903 * @note This function does not clear ADC flag JEOS
mbed_official 124:6a4a5b7d7324 904 * (ADC group injected end of sequence conversion)
mbed_official 124:6a4a5b7d7324 905 * Occurrence of flag JEOS rising:
mbed_official 124:6a4a5b7d7324 906 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
mbed_official 124:6a4a5b7d7324 907 * to flag JEOC.
mbed_official 124:6a4a5b7d7324 908 * - If sequencer is composed of several ranks, during the scan
mbed_official 124:6a4a5b7d7324 909 * sequence flag JEOC only is raised, at the end of the scan sequence
mbed_official 124:6a4a5b7d7324 910 * both flags JEOC and EOS are raised.
mbed_official 124:6a4a5b7d7324 911 * Flag JEOS must not be cleared by this function because
mbed_official 124:6a4a5b7d7324 912 * it would not be compliant with low power features
mbed_official 124:6a4a5b7d7324 913 * (feature low power auto-wait, not available on all STM32 families).
mbed_official 124:6a4a5b7d7324 914 * To clear this flag, either use function:
mbed_official 124:6a4a5b7d7324 915 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
mbed_official 124:6a4a5b7d7324 916 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
mbed_official 124:6a4a5b7d7324 917 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
bogdanm 0:9b334a45a8ff 918 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 919 * @param InjectedRank: the converted ADC injected rank.
bogdanm 0:9b334a45a8ff 920 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 921 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
bogdanm 0:9b334a45a8ff 922 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
bogdanm 0:9b334a45a8ff 923 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
bogdanm 0:9b334a45a8ff 924 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
mbed_official 124:6a4a5b7d7324 925 * @retval ADC group injected conversion data
bogdanm 0:9b334a45a8ff 926 */
bogdanm 0:9b334a45a8ff 927 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
bogdanm 0:9b334a45a8ff 928 {
bogdanm 0:9b334a45a8ff 929 uint32_t tmp_jdr = 0;
bogdanm 0:9b334a45a8ff 930
bogdanm 0:9b334a45a8ff 931 /* Check the parameters */
bogdanm 0:9b334a45a8ff 932 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 933 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
bogdanm 0:9b334a45a8ff 934
bogdanm 0:9b334a45a8ff 935 /* Get ADC converted value */
bogdanm 0:9b334a45a8ff 936 switch(InjectedRank)
bogdanm 0:9b334a45a8ff 937 {
bogdanm 0:9b334a45a8ff 938 case ADC_INJECTED_RANK_4:
bogdanm 0:9b334a45a8ff 939 tmp_jdr = hadc->Instance->JDR4;
bogdanm 0:9b334a45a8ff 940 break;
bogdanm 0:9b334a45a8ff 941 case ADC_INJECTED_RANK_3:
bogdanm 0:9b334a45a8ff 942 tmp_jdr = hadc->Instance->JDR3;
bogdanm 0:9b334a45a8ff 943 break;
bogdanm 0:9b334a45a8ff 944 case ADC_INJECTED_RANK_2:
bogdanm 0:9b334a45a8ff 945 tmp_jdr = hadc->Instance->JDR2;
bogdanm 0:9b334a45a8ff 946 break;
bogdanm 0:9b334a45a8ff 947 case ADC_INJECTED_RANK_1:
bogdanm 0:9b334a45a8ff 948 default:
bogdanm 0:9b334a45a8ff 949 tmp_jdr = hadc->Instance->JDR1;
bogdanm 0:9b334a45a8ff 950 break;
bogdanm 0:9b334a45a8ff 951 }
bogdanm 0:9b334a45a8ff 952
bogdanm 0:9b334a45a8ff 953 /* Return ADC converted value */
bogdanm 0:9b334a45a8ff 954 return tmp_jdr;
bogdanm 0:9b334a45a8ff 955 }
bogdanm 0:9b334a45a8ff 956
bogdanm 0:9b334a45a8ff 957 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
bogdanm 0:9b334a45a8ff 958 /**
bogdanm 0:9b334a45a8ff 959 * @brief Returns the last ADC Master&Slave regular conversions results data
bogdanm 0:9b334a45a8ff 960 * in the selected multi mode.
bogdanm 0:9b334a45a8ff 961 * @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
bogdanm 0:9b334a45a8ff 962 * @retval The converted data value.
bogdanm 0:9b334a45a8ff 963 */
bogdanm 0:9b334a45a8ff 964 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 965 {
bogdanm 0:9b334a45a8ff 966 uint32_t tmpDR = 0;
bogdanm 0:9b334a45a8ff 967
bogdanm 0:9b334a45a8ff 968 /* Check the parameters */
bogdanm 0:9b334a45a8ff 969 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 970
bogdanm 0:9b334a45a8ff 971 /* Check the parameters */
bogdanm 0:9b334a45a8ff 972 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 973
bogdanm 0:9b334a45a8ff 974 /* Note: EOC flag is not cleared here by software because automatically */
bogdanm 0:9b334a45a8ff 975 /* cleared by hardware when reading register DR. */
bogdanm 0:9b334a45a8ff 976
bogdanm 0:9b334a45a8ff 977 /* On STM32F1 devices, ADC1 data register DR contains ADC2 conversions */
bogdanm 0:9b334a45a8ff 978 /* only if ADC1 DMA mode is enabled. */
bogdanm 0:9b334a45a8ff 979 tmpDR = hadc->Instance->DR;
bogdanm 0:9b334a45a8ff 980
bogdanm 0:9b334a45a8ff 981 if (HAL_IS_BIT_CLR(ADC1->CR2, ADC_CR2_DMA))
bogdanm 0:9b334a45a8ff 982 {
bogdanm 0:9b334a45a8ff 983 tmpDR |= (ADC2->DR << 16);
bogdanm 0:9b334a45a8ff 984 }
bogdanm 0:9b334a45a8ff 985
bogdanm 0:9b334a45a8ff 986 /* Return ADC converted value */
bogdanm 0:9b334a45a8ff 987 return tmpDR;
bogdanm 0:9b334a45a8ff 988 }
bogdanm 0:9b334a45a8ff 989 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
bogdanm 0:9b334a45a8ff 990
bogdanm 0:9b334a45a8ff 991 /**
bogdanm 0:9b334a45a8ff 992 * @brief Injected conversion complete callback in non blocking mode
bogdanm 0:9b334a45a8ff 993 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 994 * @retval None
bogdanm 0:9b334a45a8ff 995 */
bogdanm 0:9b334a45a8ff 996 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
bogdanm 0:9b334a45a8ff 997 {
mbed_official 124:6a4a5b7d7324 998 /* Prevent unused argument(s) compilation warning */
mbed_official 124:6a4a5b7d7324 999 UNUSED(hadc);
bogdanm 0:9b334a45a8ff 1000 /* NOTE : This function Should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1001 the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
bogdanm 0:9b334a45a8ff 1002 */
bogdanm 0:9b334a45a8ff 1003 }
bogdanm 0:9b334a45a8ff 1004
bogdanm 0:9b334a45a8ff 1005 /**
bogdanm 0:9b334a45a8ff 1006 * @}
bogdanm 0:9b334a45a8ff 1007 */
bogdanm 0:9b334a45a8ff 1008
bogdanm 0:9b334a45a8ff 1009 /** @defgroup ADCEx_Exported_Functions_Group2 Extended Peripheral Control functions
bogdanm 0:9b334a45a8ff 1010 * @brief Extended Peripheral Control functions
bogdanm 0:9b334a45a8ff 1011 *
bogdanm 0:9b334a45a8ff 1012 @verbatim
bogdanm 0:9b334a45a8ff 1013 ===============================================================================
bogdanm 0:9b334a45a8ff 1014 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 1015 ===============================================================================
bogdanm 0:9b334a45a8ff 1016 [..] This section provides functions allowing to:
bogdanm 0:9b334a45a8ff 1017 (+) Configure channels on injected group
bogdanm 0:9b334a45a8ff 1018 (+) Configure multimode
bogdanm 0:9b334a45a8ff 1019
bogdanm 0:9b334a45a8ff 1020 @endverbatim
bogdanm 0:9b334a45a8ff 1021 * @{
bogdanm 0:9b334a45a8ff 1022 */
bogdanm 0:9b334a45a8ff 1023
bogdanm 0:9b334a45a8ff 1024 /**
bogdanm 0:9b334a45a8ff 1025 * @brief Configures the ADC injected group and the selected channel to be
bogdanm 0:9b334a45a8ff 1026 * linked to the injected group.
bogdanm 0:9b334a45a8ff 1027 * @note Possibility to update parameters on the fly:
bogdanm 0:9b334a45a8ff 1028 * This function initializes injected group, following calls to this
bogdanm 0:9b334a45a8ff 1029 * function can be used to reconfigure some parameters of structure
bogdanm 0:9b334a45a8ff 1030 * "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
bogdanm 0:9b334a45a8ff 1031 * The setting of these parameters is conditioned to ADC state:
bogdanm 0:9b334a45a8ff 1032 * this function must be called when ADC is not under conversion.
bogdanm 0:9b334a45a8ff 1033 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 1034 * @param sConfigInjected: Structure of ADC injected group and ADC channel for
bogdanm 0:9b334a45a8ff 1035 * injected group.
bogdanm 0:9b334a45a8ff 1036 * @retval None
bogdanm 0:9b334a45a8ff 1037 */
bogdanm 0:9b334a45a8ff 1038 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
bogdanm 0:9b334a45a8ff 1039 {
bogdanm 0:9b334a45a8ff 1040 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 1041 __IO uint32_t wait_loop_index = 0;
bogdanm 0:9b334a45a8ff 1042
bogdanm 0:9b334a45a8ff 1043 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1044 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 1045 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
bogdanm 0:9b334a45a8ff 1046 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
bogdanm 0:9b334a45a8ff 1047 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
bogdanm 0:9b334a45a8ff 1048 assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
bogdanm 0:9b334a45a8ff 1049 assert_param(IS_ADC_RANGE(sConfigInjected->InjectedOffset));
bogdanm 0:9b334a45a8ff 1050
bogdanm 0:9b334a45a8ff 1051 if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
bogdanm 0:9b334a45a8ff 1052 {
bogdanm 0:9b334a45a8ff 1053 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
bogdanm 0:9b334a45a8ff 1054 assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
bogdanm 0:9b334a45a8ff 1055 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
bogdanm 0:9b334a45a8ff 1056 }
bogdanm 0:9b334a45a8ff 1057
bogdanm 0:9b334a45a8ff 1058 /* Process locked */
bogdanm 0:9b334a45a8ff 1059 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 1060
bogdanm 0:9b334a45a8ff 1061 /* Configuration of injected group sequencer: */
bogdanm 0:9b334a45a8ff 1062 /* - if scan mode is disabled, injected channels sequence length is set to */
bogdanm 0:9b334a45a8ff 1063 /* 0x00: 1 channel converted (channel on regular rank 1) */
bogdanm 0:9b334a45a8ff 1064 /* Parameter "InjectedNbrOfConversion" is discarded. */
bogdanm 0:9b334a45a8ff 1065 /* Note: Scan mode is present by hardware on this device and, if */
bogdanm 0:9b334a45a8ff 1066 /* disabled, discards automatically nb of conversions. Anyway, nb of */
bogdanm 0:9b334a45a8ff 1067 /* conversions is forced to 0x00 for alignment over all STM32 devices. */
bogdanm 0:9b334a45a8ff 1068 /* - if scan mode is enabled, injected channels sequence length is set to */
bogdanm 0:9b334a45a8ff 1069 /* parameter "InjectedNbrOfConversion". */
bogdanm 0:9b334a45a8ff 1070 if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
bogdanm 0:9b334a45a8ff 1071 {
bogdanm 0:9b334a45a8ff 1072 if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
bogdanm 0:9b334a45a8ff 1073 {
bogdanm 0:9b334a45a8ff 1074 /* Clear the old SQx bits for all injected ranks */
bogdanm 0:9b334a45a8ff 1075 MODIFY_REG(hadc->Instance->JSQR ,
bogdanm 0:9b334a45a8ff 1076 ADC_JSQR_JL |
bogdanm 0:9b334a45a8ff 1077 ADC_JSQR_JSQ4 |
bogdanm 0:9b334a45a8ff 1078 ADC_JSQR_JSQ3 |
bogdanm 0:9b334a45a8ff 1079 ADC_JSQR_JSQ2 |
bogdanm 0:9b334a45a8ff 1080 ADC_JSQR_JSQ1 ,
bogdanm 0:9b334a45a8ff 1081 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
bogdanm 0:9b334a45a8ff 1082 ADC_INJECTED_RANK_1,
bogdanm 0:9b334a45a8ff 1083 0x01) );
bogdanm 0:9b334a45a8ff 1084 }
bogdanm 0:9b334a45a8ff 1085 /* If another injected rank than rank1 was intended to be set, and could */
bogdanm 0:9b334a45a8ff 1086 /* not due to ScanConvMode disabled, error is reported. */
bogdanm 0:9b334a45a8ff 1087 else
bogdanm 0:9b334a45a8ff 1088 {
bogdanm 0:9b334a45a8ff 1089 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 1090 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 1091
bogdanm 0:9b334a45a8ff 1092 tmp_hal_status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 1093 }
bogdanm 0:9b334a45a8ff 1094 }
bogdanm 0:9b334a45a8ff 1095 else
bogdanm 0:9b334a45a8ff 1096 {
bogdanm 0:9b334a45a8ff 1097 /* Since injected channels rank conv. order depends on total number of */
bogdanm 0:9b334a45a8ff 1098 /* injected conversions, selected rank must be below or equal to total */
bogdanm 0:9b334a45a8ff 1099 /* number of injected conversions to be updated. */
bogdanm 0:9b334a45a8ff 1100 if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
bogdanm 0:9b334a45a8ff 1101 {
bogdanm 0:9b334a45a8ff 1102 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1103 /* Set the SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1104 MODIFY_REG(hadc->Instance->JSQR ,
bogdanm 0:9b334a45a8ff 1105
bogdanm 0:9b334a45a8ff 1106 ADC_JSQR_JL |
bogdanm 0:9b334a45a8ff 1107 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
bogdanm 0:9b334a45a8ff 1108 sConfigInjected->InjectedRank,
bogdanm 0:9b334a45a8ff 1109 sConfigInjected->InjectedNbrOfConversion) ,
bogdanm 0:9b334a45a8ff 1110
bogdanm 0:9b334a45a8ff 1111 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion) |
bogdanm 0:9b334a45a8ff 1112 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
bogdanm 0:9b334a45a8ff 1113 sConfigInjected->InjectedRank,
bogdanm 0:9b334a45a8ff 1114 sConfigInjected->InjectedNbrOfConversion) );
bogdanm 0:9b334a45a8ff 1115 }
bogdanm 0:9b334a45a8ff 1116 else
bogdanm 0:9b334a45a8ff 1117 {
bogdanm 0:9b334a45a8ff 1118 /* Clear the old SQx bits for the selected rank */
bogdanm 0:9b334a45a8ff 1119 MODIFY_REG(hadc->Instance->JSQR ,
bogdanm 0:9b334a45a8ff 1120
bogdanm 0:9b334a45a8ff 1121 ADC_JSQR_JL |
bogdanm 0:9b334a45a8ff 1122 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
bogdanm 0:9b334a45a8ff 1123 sConfigInjected->InjectedRank,
bogdanm 0:9b334a45a8ff 1124 sConfigInjected->InjectedNbrOfConversion) ,
bogdanm 0:9b334a45a8ff 1125
bogdanm 0:9b334a45a8ff 1126 0x00000000 );
bogdanm 0:9b334a45a8ff 1127 }
bogdanm 0:9b334a45a8ff 1128 }
bogdanm 0:9b334a45a8ff 1129
bogdanm 0:9b334a45a8ff 1130 /* Configuration of injected group */
bogdanm 0:9b334a45a8ff 1131 /* Parameters update conditioned to ADC state: */
bogdanm 0:9b334a45a8ff 1132 /* Parameters that can be updated only when ADC is disabled: */
bogdanm 0:9b334a45a8ff 1133 /* - external trigger to start conversion */
bogdanm 0:9b334a45a8ff 1134 /* Parameters update not conditioned to ADC state: */
bogdanm 0:9b334a45a8ff 1135 /* - Automatic injected conversion */
bogdanm 0:9b334a45a8ff 1136 /* - Injected discontinuous mode */
bogdanm 0:9b334a45a8ff 1137 /* Note: In case of ADC already enabled, caution to not launch an unwanted */
bogdanm 0:9b334a45a8ff 1138 /* conversion while modifying register CR2 by writing 1 to bit ADON. */
bogdanm 0:9b334a45a8ff 1139 if (ADC_IS_ENABLE(hadc) == RESET)
bogdanm 0:9b334a45a8ff 1140 {
bogdanm 0:9b334a45a8ff 1141 MODIFY_REG(hadc->Instance->CR2 ,
bogdanm 0:9b334a45a8ff 1142 ADC_CR2_JEXTSEL |
bogdanm 0:9b334a45a8ff 1143 ADC_CR2_ADON ,
bogdanm 0:9b334a45a8ff 1144 ADC_CFGR_JEXTSEL(hadc, sConfigInjected->ExternalTrigInjecConv) );
bogdanm 0:9b334a45a8ff 1145 }
bogdanm 0:9b334a45a8ff 1146
bogdanm 0:9b334a45a8ff 1147
bogdanm 0:9b334a45a8ff 1148 /* Configuration of injected group */
bogdanm 0:9b334a45a8ff 1149 /* - Automatic injected conversion */
bogdanm 0:9b334a45a8ff 1150 /* - Injected discontinuous mode */
bogdanm 0:9b334a45a8ff 1151
bogdanm 0:9b334a45a8ff 1152 /* Automatic injected conversion can be enabled if injected group */
bogdanm 0:9b334a45a8ff 1153 /* external triggers are disabled. */
bogdanm 0:9b334a45a8ff 1154 if (sConfigInjected->AutoInjectedConv == ENABLE)
bogdanm 0:9b334a45a8ff 1155 {
bogdanm 0:9b334a45a8ff 1156 if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
bogdanm 0:9b334a45a8ff 1157 {
bogdanm 0:9b334a45a8ff 1158 SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
bogdanm 0:9b334a45a8ff 1159 }
bogdanm 0:9b334a45a8ff 1160 else
bogdanm 0:9b334a45a8ff 1161 {
bogdanm 0:9b334a45a8ff 1162 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 1163 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 1164
bogdanm 0:9b334a45a8ff 1165 tmp_hal_status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 1166 }
bogdanm 0:9b334a45a8ff 1167 }
bogdanm 0:9b334a45a8ff 1168
bogdanm 0:9b334a45a8ff 1169 /* Injected discontinuous can be enabled only if auto-injected mode is */
bogdanm 0:9b334a45a8ff 1170 /* disabled. */
bogdanm 0:9b334a45a8ff 1171 if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
bogdanm 0:9b334a45a8ff 1172 {
bogdanm 0:9b334a45a8ff 1173 if (sConfigInjected->AutoInjectedConv == DISABLE)
bogdanm 0:9b334a45a8ff 1174 {
bogdanm 0:9b334a45a8ff 1175 SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
bogdanm 0:9b334a45a8ff 1176 }
bogdanm 0:9b334a45a8ff 1177 else
bogdanm 0:9b334a45a8ff 1178 {
bogdanm 0:9b334a45a8ff 1179 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 1180 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 1181
bogdanm 0:9b334a45a8ff 1182 tmp_hal_status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 1183 }
bogdanm 0:9b334a45a8ff 1184 }
bogdanm 0:9b334a45a8ff 1185
bogdanm 0:9b334a45a8ff 1186
bogdanm 0:9b334a45a8ff 1187 /* InjectedChannel sampling time configuration */
bogdanm 0:9b334a45a8ff 1188 /* For channels 10 to 17 */
bogdanm 0:9b334a45a8ff 1189 if (sConfigInjected->InjectedChannel >= ADC_CHANNEL_10)
bogdanm 0:9b334a45a8ff 1190 {
bogdanm 0:9b334a45a8ff 1191 MODIFY_REG(hadc->Instance->SMPR1 ,
bogdanm 0:9b334a45a8ff 1192 ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel) ,
bogdanm 0:9b334a45a8ff 1193 ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
bogdanm 0:9b334a45a8ff 1194 }
bogdanm 0:9b334a45a8ff 1195 else /* For channels 0 to 9 */
bogdanm 0:9b334a45a8ff 1196 {
bogdanm 0:9b334a45a8ff 1197 MODIFY_REG(hadc->Instance->SMPR2 ,
bogdanm 0:9b334a45a8ff 1198 ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel) ,
bogdanm 0:9b334a45a8ff 1199 ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
bogdanm 0:9b334a45a8ff 1200 }
bogdanm 0:9b334a45a8ff 1201
bogdanm 0:9b334a45a8ff 1202 /* If ADC1 InjectedChannel_16 or InjectedChannel_17 is selected, enable Temperature sensor */
bogdanm 0:9b334a45a8ff 1203 /* and VREFINT measurement path. */
bogdanm 0:9b334a45a8ff 1204 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
bogdanm 0:9b334a45a8ff 1205 (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) )
bogdanm 0:9b334a45a8ff 1206 {
bogdanm 0:9b334a45a8ff 1207 SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
bogdanm 0:9b334a45a8ff 1208 }
bogdanm 0:9b334a45a8ff 1209
bogdanm 0:9b334a45a8ff 1210
bogdanm 0:9b334a45a8ff 1211 /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
bogdanm 0:9b334a45a8ff 1212 switch(sConfigInjected->InjectedRank)
bogdanm 0:9b334a45a8ff 1213 {
bogdanm 0:9b334a45a8ff 1214 case 1:
bogdanm 0:9b334a45a8ff 1215 /* Set injected channel 1 offset */
bogdanm 0:9b334a45a8ff 1216 MODIFY_REG(hadc->Instance->JOFR1,
bogdanm 0:9b334a45a8ff 1217 ADC_JOFR1_JOFFSET1,
bogdanm 0:9b334a45a8ff 1218 sConfigInjected->InjectedOffset);
bogdanm 0:9b334a45a8ff 1219 break;
bogdanm 0:9b334a45a8ff 1220 case 2:
bogdanm 0:9b334a45a8ff 1221 /* Set injected channel 2 offset */
bogdanm 0:9b334a45a8ff 1222 MODIFY_REG(hadc->Instance->JOFR2,
bogdanm 0:9b334a45a8ff 1223 ADC_JOFR2_JOFFSET2,
bogdanm 0:9b334a45a8ff 1224 sConfigInjected->InjectedOffset);
bogdanm 0:9b334a45a8ff 1225 break;
bogdanm 0:9b334a45a8ff 1226 case 3:
bogdanm 0:9b334a45a8ff 1227 /* Set injected channel 3 offset */
bogdanm 0:9b334a45a8ff 1228 MODIFY_REG(hadc->Instance->JOFR3,
bogdanm 0:9b334a45a8ff 1229 ADC_JOFR3_JOFFSET3,
bogdanm 0:9b334a45a8ff 1230 sConfigInjected->InjectedOffset);
bogdanm 0:9b334a45a8ff 1231 break;
bogdanm 0:9b334a45a8ff 1232 case 4:
bogdanm 0:9b334a45a8ff 1233 default:
bogdanm 0:9b334a45a8ff 1234 MODIFY_REG(hadc->Instance->JOFR4,
bogdanm 0:9b334a45a8ff 1235 ADC_JOFR4_JOFFSET4,
bogdanm 0:9b334a45a8ff 1236 sConfigInjected->InjectedOffset);
bogdanm 0:9b334a45a8ff 1237 break;
bogdanm 0:9b334a45a8ff 1238 }
bogdanm 0:9b334a45a8ff 1239
bogdanm 0:9b334a45a8ff 1240 /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
bogdanm 0:9b334a45a8ff 1241 /* and VREFINT measurement path. */
bogdanm 0:9b334a45a8ff 1242 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
bogdanm 0:9b334a45a8ff 1243 (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) )
bogdanm 0:9b334a45a8ff 1244 {
bogdanm 0:9b334a45a8ff 1245 /* For STM32F1 devices with several ADC: Only ADC1 can access internal */
bogdanm 0:9b334a45a8ff 1246 /* measurement channels (VrefInt/TempSensor). If these channels are */
bogdanm 0:9b334a45a8ff 1247 /* intended to be set on other ADC instances, an error is reported. */
bogdanm 0:9b334a45a8ff 1248 if (hadc->Instance == ADC1)
bogdanm 0:9b334a45a8ff 1249 {
bogdanm 0:9b334a45a8ff 1250 if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
bogdanm 0:9b334a45a8ff 1251 {
bogdanm 0:9b334a45a8ff 1252 SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
bogdanm 0:9b334a45a8ff 1253
bogdanm 0:9b334a45a8ff 1254 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
bogdanm 0:9b334a45a8ff 1255 {
bogdanm 0:9b334a45a8ff 1256 /* Delay for temperature sensor stabilization time */
bogdanm 0:9b334a45a8ff 1257 /* Compute number of CPU cycles to wait for */
bogdanm 0:9b334a45a8ff 1258 wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
bogdanm 0:9b334a45a8ff 1259 while(wait_loop_index != 0)
bogdanm 0:9b334a45a8ff 1260 {
bogdanm 0:9b334a45a8ff 1261 wait_loop_index--;
bogdanm 0:9b334a45a8ff 1262 }
bogdanm 0:9b334a45a8ff 1263 }
bogdanm 0:9b334a45a8ff 1264 }
bogdanm 0:9b334a45a8ff 1265 }
bogdanm 0:9b334a45a8ff 1266 else
bogdanm 0:9b334a45a8ff 1267 {
bogdanm 0:9b334a45a8ff 1268 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 1269 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 1270
bogdanm 0:9b334a45a8ff 1271 tmp_hal_status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 1272 }
bogdanm 0:9b334a45a8ff 1273 }
bogdanm 0:9b334a45a8ff 1274
bogdanm 0:9b334a45a8ff 1275 /* Process unlocked */
bogdanm 0:9b334a45a8ff 1276 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 1277
bogdanm 0:9b334a45a8ff 1278 /* Return function status */
bogdanm 0:9b334a45a8ff 1279 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 1280 }
bogdanm 0:9b334a45a8ff 1281
bogdanm 0:9b334a45a8ff 1282 #if defined (STM32F101xG) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
bogdanm 0:9b334a45a8ff 1283 /**
bogdanm 0:9b334a45a8ff 1284 * @brief Enable ADC multimode and configure multimode parameters
bogdanm 0:9b334a45a8ff 1285 * @note Possibility to update parameters on the fly:
bogdanm 0:9b334a45a8ff 1286 * This function initializes multimode parameters, following
bogdanm 0:9b334a45a8ff 1287 * calls to this function can be used to reconfigure some parameters
bogdanm 0:9b334a45a8ff 1288 * of structure "ADC_MultiModeTypeDef" on the fly, without reseting
bogdanm 0:9b334a45a8ff 1289 * the ADCs (both ADCs of the common group).
bogdanm 0:9b334a45a8ff 1290 * The setting of these parameters is conditioned to ADC state.
bogdanm 0:9b334a45a8ff 1291 * For parameters constraints, see comments of structure
bogdanm 0:9b334a45a8ff 1292 * "ADC_MultiModeTypeDef".
bogdanm 0:9b334a45a8ff 1293 * @note To change back configuration from multimode to single mode, ADC must
bogdanm 0:9b334a45a8ff 1294 * be reset (using function HAL_ADC_Init() ).
bogdanm 0:9b334a45a8ff 1295 * @param hadc: ADC handle
bogdanm 0:9b334a45a8ff 1296 * @param multimode: Structure of ADC multimode configuration
bogdanm 0:9b334a45a8ff 1297 * @retval HAL status
bogdanm 0:9b334a45a8ff 1298 */
bogdanm 0:9b334a45a8ff 1299 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
bogdanm 0:9b334a45a8ff 1300 {
bogdanm 0:9b334a45a8ff 1301 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
bogdanm 0:9b334a45a8ff 1302 ADC_HandleTypeDef tmphadcSlave;
bogdanm 0:9b334a45a8ff 1303
bogdanm 0:9b334a45a8ff 1304 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1305 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
bogdanm 0:9b334a45a8ff 1306 assert_param(IS_ADC_MODE(multimode->Mode));
mbed_official 124:6a4a5b7d7324 1307
bogdanm 0:9b334a45a8ff 1308 /* Process locked */
bogdanm 0:9b334a45a8ff 1309 __HAL_LOCK(hadc);
bogdanm 0:9b334a45a8ff 1310
bogdanm 0:9b334a45a8ff 1311 /* Set a temporary handle of the ADC slave associated to the ADC master */
bogdanm 0:9b334a45a8ff 1312 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
bogdanm 0:9b334a45a8ff 1313
bogdanm 0:9b334a45a8ff 1314 /* Parameters update conditioned to ADC state: */
bogdanm 0:9b334a45a8ff 1315 /* Parameters that can be updated when ADC is disabled or enabled without */
bogdanm 0:9b334a45a8ff 1316 /* conversion on going on regular group: */
bogdanm 0:9b334a45a8ff 1317 /* - ADC master and ADC slave DMA configuration */
bogdanm 0:9b334a45a8ff 1318 /* Parameters that can be updated only when ADC is disabled: */
bogdanm 0:9b334a45a8ff 1319 /* - Multimode mode selection */
bogdanm 0:9b334a45a8ff 1320 /* To optimize code, all multimode settings can be set when both ADCs of */
bogdanm 0:9b334a45a8ff 1321 /* the common group are in state: disabled. */
bogdanm 0:9b334a45a8ff 1322 if ((ADC_IS_ENABLE(hadc) == RESET) &&
bogdanm 0:9b334a45a8ff 1323 (ADC_IS_ENABLE(&tmphadcSlave) == RESET) &&
bogdanm 0:9b334a45a8ff 1324 (IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)) )
bogdanm 0:9b334a45a8ff 1325 {
bogdanm 0:9b334a45a8ff 1326 MODIFY_REG(hadc->Instance->CR1,
bogdanm 0:9b334a45a8ff 1327 ADC_CR1_DUALMOD ,
bogdanm 0:9b334a45a8ff 1328 multimode->Mode );
bogdanm 0:9b334a45a8ff 1329 }
bogdanm 0:9b334a45a8ff 1330 /* If one of the ADC sharing the same common group is enabled, no update */
bogdanm 0:9b334a45a8ff 1331 /* could be done on neither of the multimode structure parameters. */
bogdanm 0:9b334a45a8ff 1332 else
bogdanm 0:9b334a45a8ff 1333 {
bogdanm 0:9b334a45a8ff 1334 /* Update ADC state machine to error */
mbed_official 124:6a4a5b7d7324 1335 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
bogdanm 0:9b334a45a8ff 1336
bogdanm 0:9b334a45a8ff 1337 tmp_hal_status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 1338 }
bogdanm 0:9b334a45a8ff 1339
bogdanm 0:9b334a45a8ff 1340
bogdanm 0:9b334a45a8ff 1341 /* Process unlocked */
bogdanm 0:9b334a45a8ff 1342 __HAL_UNLOCK(hadc);
bogdanm 0:9b334a45a8ff 1343
bogdanm 0:9b334a45a8ff 1344 /* Return function status */
bogdanm 0:9b334a45a8ff 1345 return tmp_hal_status;
bogdanm 0:9b334a45a8ff 1346 }
bogdanm 0:9b334a45a8ff 1347 #endif /* STM32F101xG || defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
bogdanm 0:9b334a45a8ff 1348 /**
bogdanm 0:9b334a45a8ff 1349 * @}
bogdanm 0:9b334a45a8ff 1350 */
bogdanm 0:9b334a45a8ff 1351
bogdanm 0:9b334a45a8ff 1352 /**
bogdanm 0:9b334a45a8ff 1353 * @}
bogdanm 0:9b334a45a8ff 1354 */
bogdanm 0:9b334a45a8ff 1355
bogdanm 0:9b334a45a8ff 1356 #endif /* HAL_ADC_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1357 /**
bogdanm 0:9b334a45a8ff 1358 * @}
bogdanm 0:9b334a45a8ff 1359 */
bogdanm 0:9b334a45a8ff 1360
bogdanm 0:9b334a45a8ff 1361 /**
bogdanm 0:9b334a45a8ff 1362 * @}
bogdanm 0:9b334a45a8ff 1363 */
bogdanm 0:9b334a45a8ff 1364
bogdanm 0:9b334a45a8ff 1365 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/