mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:: nameless129
Date:: Mon May 16 16:50:30 2016 +0000
Revision:: 129:2e517c56bcfb
Parent:: 19:112740acecfa

PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f4xx_hal_flash_ex.h
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	19:112740acecfa	5	* @version V1.4.1
mbed_official	19:112740acecfa	6	* @date 09-October-2015
bogdanm	0:9b334a45a8ff	7	* @brief Header file of FLASH HAL Extension module.
bogdanm	0:9b334a45a8ff	8	******************************************************************************
bogdanm	0:9b334a45a8ff	9	* @attention
bogdanm	0:9b334a45a8ff	10	*
bogdanm	0:9b334a45a8ff	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	12	*
bogdanm	0:9b334a45a8ff	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	14	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	16	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	19	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	21	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	22	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	23	*
bogdanm	0:9b334a45a8ff	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	34	*
bogdanm	0:9b334a45a8ff	35	******************************************************************************
bogdanm	0:9b334a45a8ff	36	*/
bogdanm	0:9b334a45a8ff	37
bogdanm	0:9b334a45a8ff	38	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	0:9b334a45a8ff	39	#ifndef __STM32F4xx_HAL_FLASH_EX_H
bogdanm	0:9b334a45a8ff	40	#define __STM32F4xx_HAL_FLASH_EX_H
bogdanm	0:9b334a45a8ff	41
bogdanm	0:9b334a45a8ff	42	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	43	extern "C" {
bogdanm	0:9b334a45a8ff	44	#endif
bogdanm	0:9b334a45a8ff	45
bogdanm	0:9b334a45a8ff	46	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	47	#include "stm32f4xx_hal_def.h"
bogdanm	0:9b334a45a8ff	48
bogdanm	0:9b334a45a8ff	49	/** @addtogroup STM32F4xx_HAL_Driver
bogdanm	0:9b334a45a8ff	50	* @{
bogdanm	0:9b334a45a8ff	51	*/
bogdanm	0:9b334a45a8ff	52
bogdanm	0:9b334a45a8ff	53	/** @addtogroup FLASHEx
bogdanm	0:9b334a45a8ff	54	* @{
bogdanm	0:9b334a45a8ff	55	*/
bogdanm	0:9b334a45a8ff	56
bogdanm	0:9b334a45a8ff	57	/* Exported types ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	58	/** @defgroup FLASHEx_Exported_Types FLASH Exported Types
bogdanm	0:9b334a45a8ff	59	* @{
bogdanm	0:9b334a45a8ff	60	*/
bogdanm	0:9b334a45a8ff	61
bogdanm	0:9b334a45a8ff	62	/**
bogdanm	0:9b334a45a8ff	63	* @brief FLASH Erase structure definition
bogdanm	0:9b334a45a8ff	64	*/
bogdanm	0:9b334a45a8ff	65	typedef struct
bogdanm	0:9b334a45a8ff	66	{
bogdanm	0:9b334a45a8ff	67	uint32_t TypeErase; /*!< Mass erase or sector Erase.
bogdanm	0:9b334a45a8ff	68	This parameter can be a value of @ref FLASHEx_Type_Erase */
bogdanm	0:9b334a45a8ff	69
bogdanm	0:9b334a45a8ff	70	uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
bogdanm	0:9b334a45a8ff	71	This parameter must be a value of @ref FLASHEx_Banks */
bogdanm	0:9b334a45a8ff	72
bogdanm	0:9b334a45a8ff	73	uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
bogdanm	0:9b334a45a8ff	74	This parameter must be a value of @ref FLASHEx_Sectors */
bogdanm	0:9b334a45a8ff	75
bogdanm	0:9b334a45a8ff	76	uint32_t NbSectors; /*!< Number of sectors to be erased.
bogdanm	0:9b334a45a8ff	77	This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
bogdanm	0:9b334a45a8ff	78
bogdanm	0:9b334a45a8ff	79	uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
bogdanm	0:9b334a45a8ff	80	This parameter must be a value of @ref FLASHEx_Voltage_Range */
bogdanm	0:9b334a45a8ff	81
bogdanm	0:9b334a45a8ff	82	} FLASH_EraseInitTypeDef;
bogdanm	0:9b334a45a8ff	83
bogdanm	0:9b334a45a8ff	84	/**
bogdanm	0:9b334a45a8ff	85	* @brief FLASH Option Bytes Program structure definition
bogdanm	0:9b334a45a8ff	86	*/
bogdanm	0:9b334a45a8ff	87	typedef struct
bogdanm	0:9b334a45a8ff	88	{
bogdanm	0:9b334a45a8ff	89	uint32_t OptionType; /*!< Option byte to be configured.
bogdanm	0:9b334a45a8ff	90	This parameter can be a value of @ref FLASHEx_Option_Type */
bogdanm	0:9b334a45a8ff	91
bogdanm	0:9b334a45a8ff	92	uint32_t WRPState; /*!< Write protection activation or deactivation.
bogdanm	0:9b334a45a8ff	93	This parameter can be a value of @ref FLASHEx_WRP_State */
bogdanm	0:9b334a45a8ff	94
bogdanm	0:9b334a45a8ff	95	uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
bogdanm	0:9b334a45a8ff	96	The value of this parameter depend on device used within the same series */
bogdanm	0:9b334a45a8ff	97
bogdanm	0:9b334a45a8ff	98	uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
bogdanm	0:9b334a45a8ff	99	This parameter must be a value of @ref FLASHEx_Banks */
bogdanm	0:9b334a45a8ff	100
bogdanm	0:9b334a45a8ff	101	uint32_t RDPLevel; /*!< Set the read protection level.
bogdanm	0:9b334a45a8ff	102	This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
bogdanm	0:9b334a45a8ff	103
bogdanm	0:9b334a45a8ff	104	uint32_t BORLevel; /*!< Set the BOR Level.
bogdanm	0:9b334a45a8ff	105	This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
bogdanm	0:9b334a45a8ff	106
bogdanm	0:9b334a45a8ff	107	uint8_t USERConfig; /!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. /
bogdanm	0:9b334a45a8ff	108
bogdanm	0:9b334a45a8ff	109	} FLASH_OBProgramInitTypeDef;
bogdanm	0:9b334a45a8ff	110
bogdanm	0:9b334a45a8ff	111	/**
bogdanm	0:9b334a45a8ff	112	* @brief FLASH Advanced Option Bytes Program structure definition
bogdanm	0:9b334a45a8ff	113	*/
mbed_official	19:112740acecfa	114	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	115	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	116	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
mbed_official	19:112740acecfa	117	defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	118	typedef struct
bogdanm	0:9b334a45a8ff	119	{
bogdanm	0:9b334a45a8ff	120	uint32_t OptionType; /*!< Option byte to be configured for extension.
bogdanm	0:9b334a45a8ff	121	This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */
bogdanm	0:9b334a45a8ff	122
bogdanm	0:9b334a45a8ff	123	uint32_t PCROPState; /*!< PCROP activation or deactivation.
bogdanm	0:9b334a45a8ff	124	This parameter can be a value of @ref FLASHEx_PCROP_State */
bogdanm	0:9b334a45a8ff	125
mbed_official	19:112740acecfa	126	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	127	uint16_t Sectors; /*!< specifies the sector(s) set for PCROP.
bogdanm	0:9b334a45a8ff	128	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
mbed_official	19:112740acecfa	129	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	130
mbed_official	19:112740acecfa	131	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	132	uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors.
bogdanm	0:9b334a45a8ff	133	This parameter must be a value of @ref FLASHEx_Banks */
bogdanm	0:9b334a45a8ff	134
bogdanm	0:9b334a45a8ff	135	uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1.
bogdanm	0:9b334a45a8ff	136	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
bogdanm	0:9b334a45a8ff	137
bogdanm	0:9b334a45a8ff	138	uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2.
bogdanm	0:9b334a45a8ff	139	This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */
bogdanm	0:9b334a45a8ff	140
bogdanm	0:9b334a45a8ff	141	uint8_t BootConfig; /*!< Specifies Option bytes for boot config.
bogdanm	0:9b334a45a8ff	142	This parameter can be a value of @ref FLASHEx_Dual_Boot */
bogdanm	0:9b334a45a8ff	143
mbed_official	19:112740acecfa	144	#endif /STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx /
bogdanm	0:9b334a45a8ff	145	} FLASH_AdvOBProgramInitTypeDef;
mbed_official	19:112740acecfa	146	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	147	/**
bogdanm	0:9b334a45a8ff	148	* @}
bogdanm	0:9b334a45a8ff	149	*/
bogdanm	0:9b334a45a8ff	150
bogdanm	0:9b334a45a8ff	151	/* Exported constants --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	152
bogdanm	0:9b334a45a8ff	153	/** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
bogdanm	0:9b334a45a8ff	154	* @{
bogdanm	0:9b334a45a8ff	155	*/
bogdanm	0:9b334a45a8ff	156
bogdanm	0:9b334a45a8ff	157	/** @defgroup FLASHEx_Type_Erase FLASH Type Erase
bogdanm	0:9b334a45a8ff	158	* @{
bogdanm	0:9b334a45a8ff	159	*/
bogdanm	0:9b334a45a8ff	160	#define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00) /!< Sectors erase only /
bogdanm	0:9b334a45a8ff	161	#define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /!< Flash Mass erase activation /
bogdanm	0:9b334a45a8ff	162	/**
bogdanm	0:9b334a45a8ff	163	* @}
bogdanm	0:9b334a45a8ff	164	*/
bogdanm	0:9b334a45a8ff	165
bogdanm	0:9b334a45a8ff	166	/** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
bogdanm	0:9b334a45a8ff	167	* @{
bogdanm	0:9b334a45a8ff	168	*/
bogdanm	0:9b334a45a8ff	169	#define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00) /!< Device operating range: 1.8V to 2.1V /
bogdanm	0:9b334a45a8ff	170	#define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01) /!< Device operating range: 2.1V to 2.7V /
bogdanm	0:9b334a45a8ff	171	#define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02) /!< Device operating range: 2.7V to 3.6V /
bogdanm	0:9b334a45a8ff	172	#define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03) /!< Device operating range: 2.7V to 3.6V + External Vpp /
bogdanm	0:9b334a45a8ff	173	/**
bogdanm	0:9b334a45a8ff	174	* @}
bogdanm	0:9b334a45a8ff	175	*/
bogdanm	0:9b334a45a8ff	176
bogdanm	0:9b334a45a8ff	177	/** @defgroup FLASHEx_WRP_State FLASH WRP State
bogdanm	0:9b334a45a8ff	178	* @{
bogdanm	0:9b334a45a8ff	179	*/
bogdanm	0:9b334a45a8ff	180	#define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /!< Disable the write protection of the desired bank 1 sectors /
bogdanm	0:9b334a45a8ff	181	#define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /!< Enable the write protection of the desired bank 1 sectors /
bogdanm	0:9b334a45a8ff	182	/**
bogdanm	0:9b334a45a8ff	183	* @}
bogdanm	0:9b334a45a8ff	184	*/
bogdanm	0:9b334a45a8ff	185
bogdanm	0:9b334a45a8ff	186	/** @defgroup FLASHEx_Option_Type FLASH Option Type
bogdanm	0:9b334a45a8ff	187	* @{
bogdanm	0:9b334a45a8ff	188	*/
bogdanm	0:9b334a45a8ff	189	#define OPTIONBYTE_WRP ((uint32_t)0x01) /!< WRP option byte configuration /
bogdanm	0:9b334a45a8ff	190	#define OPTIONBYTE_RDP ((uint32_t)0x02) /!< RDP option byte configuration /
bogdanm	0:9b334a45a8ff	191	#define OPTIONBYTE_USER ((uint32_t)0x04) /!< USER option byte configuration /
bogdanm	0:9b334a45a8ff	192	#define OPTIONBYTE_BOR ((uint32_t)0x08) /!< BOR option byte configuration /
bogdanm	0:9b334a45a8ff	193	/**
bogdanm	0:9b334a45a8ff	194	* @}
bogdanm	0:9b334a45a8ff	195	*/
bogdanm	0:9b334a45a8ff	196
bogdanm	0:9b334a45a8ff	197	/** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
bogdanm	0:9b334a45a8ff	198	* @{
bogdanm	0:9b334a45a8ff	199	*/
bogdanm	0:9b334a45a8ff	200	#define OB_RDP_LEVEL_0 ((uint8_t)0xAA)
bogdanm	0:9b334a45a8ff	201	#define OB_RDP_LEVEL_1 ((uint8_t)0x55)
bogdanm	0:9b334a45a8ff	202	#define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2
bogdanm	0:9b334a45a8ff	203	it s no more possible to go back to level 1 or 0 */
bogdanm	0:9b334a45a8ff	204	/**
bogdanm	0:9b334a45a8ff	205	* @}
bogdanm	0:9b334a45a8ff	206	*/
bogdanm	0:9b334a45a8ff	207
bogdanm	0:9b334a45a8ff	208	/** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
bogdanm	0:9b334a45a8ff	209	* @{
bogdanm	0:9b334a45a8ff	210	*/
bogdanm	0:9b334a45a8ff	211	#define OB_IWDG_SW ((uint8_t)0x20) /!< Software IWDG selected /
bogdanm	0:9b334a45a8ff	212	#define OB_IWDG_HW ((uint8_t)0x00) /!< Hardware IWDG selected /
bogdanm	0:9b334a45a8ff	213	/**
bogdanm	0:9b334a45a8ff	214	* @}
bogdanm	0:9b334a45a8ff	215	*/
bogdanm	0:9b334a45a8ff	216
bogdanm	0:9b334a45a8ff	217	/** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
bogdanm	0:9b334a45a8ff	218	* @{
bogdanm	0:9b334a45a8ff	219	*/
bogdanm	0:9b334a45a8ff	220	#define OB_STOP_NO_RST ((uint8_t)0x40) /!< No reset generated when entering in STOP /
bogdanm	0:9b334a45a8ff	221	#define OB_STOP_RST ((uint8_t)0x00) /!< Reset generated when entering in STOP /
bogdanm	0:9b334a45a8ff	222	/**
bogdanm	0:9b334a45a8ff	223	* @}
bogdanm	0:9b334a45a8ff	224	*/
bogdanm	0:9b334a45a8ff	225
bogdanm	0:9b334a45a8ff	226
bogdanm	0:9b334a45a8ff	227	/** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
bogdanm	0:9b334a45a8ff	228	* @{
bogdanm	0:9b334a45a8ff	229	*/
bogdanm	0:9b334a45a8ff	230	#define OB_STDBY_NO_RST ((uint8_t)0x80) /!< No reset generated when entering in STANDBY /
bogdanm	0:9b334a45a8ff	231	#define OB_STDBY_RST ((uint8_t)0x00) /!< Reset generated when entering in STANDBY /
bogdanm	0:9b334a45a8ff	232	/**
bogdanm	0:9b334a45a8ff	233	* @}
bogdanm	0:9b334a45a8ff	234	*/
bogdanm	0:9b334a45a8ff	235
bogdanm	0:9b334a45a8ff	236	/** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
bogdanm	0:9b334a45a8ff	237	* @{
bogdanm	0:9b334a45a8ff	238	*/
bogdanm	0:9b334a45a8ff	239	#define OB_BOR_LEVEL3 ((uint8_t)0x00) /!< Supply voltage ranges from 2.70 to 3.60 V /
bogdanm	0:9b334a45a8ff	240	#define OB_BOR_LEVEL2 ((uint8_t)0x04) /!< Supply voltage ranges from 2.40 to 2.70 V /
bogdanm	0:9b334a45a8ff	241	#define OB_BOR_LEVEL1 ((uint8_t)0x08) /!< Supply voltage ranges from 2.10 to 2.40 V /
bogdanm	0:9b334a45a8ff	242	#define OB_BOR_OFF ((uint8_t)0x0C) /!< Supply voltage ranges from 1.62 to 2.10 V /
bogdanm	0:9b334a45a8ff	243	/**
bogdanm	0:9b334a45a8ff	244	* @}
bogdanm	0:9b334a45a8ff	245	*/
bogdanm	0:9b334a45a8ff	246
bogdanm	0:9b334a45a8ff	247	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	248	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	249	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
mbed_official	19:112740acecfa	250	defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	251	/** @defgroup FLASHEx_PCROP_State FLASH PCROP State
bogdanm	0:9b334a45a8ff	252	* @{
bogdanm	0:9b334a45a8ff	253	*/
bogdanm	0:9b334a45a8ff	254	#define OB_PCROP_STATE_DISABLE ((uint32_t)0x00) /!< Disable PCROP /
bogdanm	0:9b334a45a8ff	255	#define OB_PCROP_STATE_ENABLE ((uint32_t)0x01) /!< Enable PCROP /
bogdanm	0:9b334a45a8ff	256	/**
bogdanm	0:9b334a45a8ff	257	* @}
bogdanm	0:9b334a45a8ff	258	*/
mbed_official	19:112740acecfa	259	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
mbed_official	19:112740acecfa	260	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	261
bogdanm	0:9b334a45a8ff	262	/** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type
bogdanm	0:9b334a45a8ff	263	* @{
bogdanm	0:9b334a45a8ff	264	*/
mbed_official	19:112740acecfa	265	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	266	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	267	#define OPTIONBYTE_PCROP ((uint32_t)0x01) /!< PCROP option byte configuration /
bogdanm	0:9b334a45a8ff	268	#define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02) /!< BOOTConfig option byte configuration /
mbed_official	19:112740acecfa	269	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	270
mbed_official	19:112740acecfa	271	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	272	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	273	#define OPTIONBYTE_PCROP ((uint32_t)0x01) /!<PCROP option byte configuration /
mbed_official	19:112740acecfa	274	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	275	/**
bogdanm	0:9b334a45a8ff	276	* @}
bogdanm	0:9b334a45a8ff	277	*/
bogdanm	0:9b334a45a8ff	278
bogdanm	0:9b334a45a8ff	279	/** @defgroup FLASH_Latency FLASH Latency
bogdanm	0:9b334a45a8ff	280	* @{
bogdanm	0:9b334a45a8ff	281	*/
mbed_official	19:112740acecfa	282	/------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ----------------------/
mbed_official	19:112740acecfa	283	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	284	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	285	#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /!< FLASH Zero Latency cycle /
bogdanm	0:9b334a45a8ff	286	#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /!< FLASH One Latency cycle /
bogdanm	0:9b334a45a8ff	287	#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /!< FLASH Two Latency cycles /
bogdanm	0:9b334a45a8ff	288	#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /!< FLASH Three Latency cycles /
bogdanm	0:9b334a45a8ff	289	#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /!< FLASH Four Latency cycles /
bogdanm	0:9b334a45a8ff	290	#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /!< FLASH Five Latency cycles /
bogdanm	0:9b334a45a8ff	291	#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /!< FLASH Six Latency cycles /
bogdanm	0:9b334a45a8ff	292	#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /!< FLASH Seven Latency cycles /
bogdanm	0:9b334a45a8ff	293	#define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /!< FLASH Eight Latency cycles /
bogdanm	0:9b334a45a8ff	294	#define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /!< FLASH Nine Latency cycles /
bogdanm	0:9b334a45a8ff	295	#define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /!< FLASH Ten Latency cycles /
bogdanm	0:9b334a45a8ff	296	#define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /!< FLASH Eleven Latency cycles /
bogdanm	0:9b334a45a8ff	297	#define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /!< FLASH Twelve Latency cycles /
bogdanm	0:9b334a45a8ff	298	#define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /!< FLASH Thirteen Latency cycles /
bogdanm	0:9b334a45a8ff	299	#define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /!< FLASH Fourteen Latency cycles /
bogdanm	0:9b334a45a8ff	300	#define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /!< FLASH Fifteen Latency cycles /
mbed_official	19:112740acecfa	301	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	302	/--------------------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	303
bogdanm	0:9b334a45a8ff	304	/-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx -----------------------------------/
mbed_official	19:112740acecfa	305	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
mbed_official	19:112740acecfa	306	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	307	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	308
bogdanm	0:9b334a45a8ff	309	#define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /!< FLASH Zero Latency cycle /
bogdanm	0:9b334a45a8ff	310	#define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /!< FLASH One Latency cycle /
bogdanm	0:9b334a45a8ff	311	#define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /!< FLASH Two Latency cycles /
bogdanm	0:9b334a45a8ff	312	#define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /!< FLASH Three Latency cycles /
bogdanm	0:9b334a45a8ff	313	#define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /!< FLASH Four Latency cycles /
bogdanm	0:9b334a45a8ff	314	#define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /!< FLASH Five Latency cycles /
bogdanm	0:9b334a45a8ff	315	#define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /!< FLASH Six Latency cycles /
bogdanm	0:9b334a45a8ff	316	#define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /!< FLASH Seven Latency cycles /
mbed_official	19:112740acecfa	317	#endif /* STM32F40xxx \|\| STM32F41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	318	/--------------------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	319
bogdanm	0:9b334a45a8ff	320	/**
bogdanm	0:9b334a45a8ff	321	* @}
bogdanm	0:9b334a45a8ff	322	*/
bogdanm	0:9b334a45a8ff	323
bogdanm	0:9b334a45a8ff	324
bogdanm	0:9b334a45a8ff	325	/** @defgroup FLASHEx_Banks FLASH Banks
bogdanm	0:9b334a45a8ff	326	* @{
bogdanm	0:9b334a45a8ff	327	*/
mbed_official	19:112740acecfa	328	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	329	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	330	#define FLASH_BANK_1 ((uint32_t)1) /!< Bank 1 /
bogdanm	0:9b334a45a8ff	331	#define FLASH_BANK_2 ((uint32_t)2) /!< Bank 2 /
bogdanm	0:9b334a45a8ff	332	#define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 \| FLASH_BANK_2) /!< Bank1 and Bank2 /
mbed_official	19:112740acecfa	333	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	334
bogdanm	0:9b334a45a8ff	335	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
mbed_official	19:112740acecfa	336	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	337	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	338	#define FLASH_BANK_1 ((uint32_t)1) /!< Bank 1 /
mbed_official	19:112740acecfa	339	#endif /* STM32F40xxx \|\| STM32F41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	340	/**
bogdanm	0:9b334a45a8ff	341	* @}
bogdanm	0:9b334a45a8ff	342	*/
bogdanm	0:9b334a45a8ff	343
bogdanm	0:9b334a45a8ff	344	/** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
bogdanm	0:9b334a45a8ff	345	* @{
bogdanm	0:9b334a45a8ff	346	*/
mbed_official	19:112740acecfa	347	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	348	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	349	#define FLASH_MER_BIT (FLASH_CR_MER1 \| FLASH_CR_MER2) /!< 2 MER bits here to clear /
mbed_official	19:112740acecfa	350	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	351
bogdanm	0:9b334a45a8ff	352	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
mbed_official	19:112740acecfa	353	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	354	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	355	#define FLASH_MER_BIT (FLASH_CR_MER) /!< only 1 MER Bit /
mbed_official	19:112740acecfa	356	#endif /* STM32F40xxx \|\| STM32F41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	357	/**
bogdanm	0:9b334a45a8ff	358	* @}
bogdanm	0:9b334a45a8ff	359	*/
bogdanm	0:9b334a45a8ff	360
bogdanm	0:9b334a45a8ff	361	/** @defgroup FLASHEx_Sectors FLASH Sectors
bogdanm	0:9b334a45a8ff	362	* @{
bogdanm	0:9b334a45a8ff	363	*/
mbed_official	19:112740acecfa	364	/-------------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx ------------------------------------/
mbed_official	19:112740acecfa	365	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	366	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	367	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
bogdanm	0:9b334a45a8ff	368	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
bogdanm	0:9b334a45a8ff	369	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
bogdanm	0:9b334a45a8ff	370	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
bogdanm	0:9b334a45a8ff	371	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
bogdanm	0:9b334a45a8ff	372	#define FLASH_SECTOR_5 ((uint32_t)5) /!< Sector Number 5 /
bogdanm	0:9b334a45a8ff	373	#define FLASH_SECTOR_6 ((uint32_t)6) /!< Sector Number 6 /
bogdanm	0:9b334a45a8ff	374	#define FLASH_SECTOR_7 ((uint32_t)7) /!< Sector Number 7 /
bogdanm	0:9b334a45a8ff	375	#define FLASH_SECTOR_8 ((uint32_t)8) /!< Sector Number 8 /
bogdanm	0:9b334a45a8ff	376	#define FLASH_SECTOR_9 ((uint32_t)9) /!< Sector Number 9 /
bogdanm	0:9b334a45a8ff	377	#define FLASH_SECTOR_10 ((uint32_t)10) /!< Sector Number 10 /
bogdanm	0:9b334a45a8ff	378	#define FLASH_SECTOR_11 ((uint32_t)11) /!< Sector Number 11 /
bogdanm	0:9b334a45a8ff	379	#define FLASH_SECTOR_12 ((uint32_t)12) /!< Sector Number 12 /
bogdanm	0:9b334a45a8ff	380	#define FLASH_SECTOR_13 ((uint32_t)13) /!< Sector Number 13 /
bogdanm	0:9b334a45a8ff	381	#define FLASH_SECTOR_14 ((uint32_t)14) /!< Sector Number 14 /
bogdanm	0:9b334a45a8ff	382	#define FLASH_SECTOR_15 ((uint32_t)15) /!< Sector Number 15 /
bogdanm	0:9b334a45a8ff	383	#define FLASH_SECTOR_16 ((uint32_t)16) /!< Sector Number 16 /
bogdanm	0:9b334a45a8ff	384	#define FLASH_SECTOR_17 ((uint32_t)17) /!< Sector Number 17 /
bogdanm	0:9b334a45a8ff	385	#define FLASH_SECTOR_18 ((uint32_t)18) /!< Sector Number 18 /
bogdanm	0:9b334a45a8ff	386	#define FLASH_SECTOR_19 ((uint32_t)19) /!< Sector Number 19 /
bogdanm	0:9b334a45a8ff	387	#define FLASH_SECTOR_20 ((uint32_t)20) /!< Sector Number 20 /
bogdanm	0:9b334a45a8ff	388	#define FLASH_SECTOR_21 ((uint32_t)21) /!< Sector Number 21 /
bogdanm	0:9b334a45a8ff	389	#define FLASH_SECTOR_22 ((uint32_t)22) /!< Sector Number 22 /
bogdanm	0:9b334a45a8ff	390	#define FLASH_SECTOR_23 ((uint32_t)23) /!< Sector Number 23 /
mbed_official	19:112740acecfa	391	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	392	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	393
bogdanm	0:9b334a45a8ff	394	/--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------/
mbed_official	19:112740acecfa	395	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx)
bogdanm	0:9b334a45a8ff	396	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
bogdanm	0:9b334a45a8ff	397	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
bogdanm	0:9b334a45a8ff	398	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
bogdanm	0:9b334a45a8ff	399	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
bogdanm	0:9b334a45a8ff	400	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
bogdanm	0:9b334a45a8ff	401	#define FLASH_SECTOR_5 ((uint32_t)5) /!< Sector Number 5 /
bogdanm	0:9b334a45a8ff	402	#define FLASH_SECTOR_6 ((uint32_t)6) /!< Sector Number 6 /
bogdanm	0:9b334a45a8ff	403	#define FLASH_SECTOR_7 ((uint32_t)7) /!< Sector Number 7 /
bogdanm	0:9b334a45a8ff	404	#define FLASH_SECTOR_8 ((uint32_t)8) /!< Sector Number 8 /
bogdanm	0:9b334a45a8ff	405	#define FLASH_SECTOR_9 ((uint32_t)9) /!< Sector Number 9 /
bogdanm	0:9b334a45a8ff	406	#define FLASH_SECTOR_10 ((uint32_t)10) /!< Sector Number 10 /
bogdanm	0:9b334a45a8ff	407	#define FLASH_SECTOR_11 ((uint32_t)11) /!< Sector Number 11 /
mbed_official	19:112740acecfa	408	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx */
bogdanm	0:9b334a45a8ff	409	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	410
bogdanm	0:9b334a45a8ff	411	/--------------------------------------------- STM32F401xC -------------------------------------------/
bogdanm	0:9b334a45a8ff	412	#if defined(STM32F401xC)
bogdanm	0:9b334a45a8ff	413	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
bogdanm	0:9b334a45a8ff	414	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
bogdanm	0:9b334a45a8ff	415	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
bogdanm	0:9b334a45a8ff	416	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
bogdanm	0:9b334a45a8ff	417	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
bogdanm	0:9b334a45a8ff	418	#define FLASH_SECTOR_5 ((uint32_t)5) /!< Sector Number 5 /
bogdanm	0:9b334a45a8ff	419	#endif /* STM32F401xC */
bogdanm	0:9b334a45a8ff	420	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	421
mbed_official	19:112740acecfa	422	/--------------------------------------------- STM32F410xx -------------------------------------------/
mbed_official	19:112740acecfa	423	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
mbed_official	19:112740acecfa	424	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
mbed_official	19:112740acecfa	425	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
mbed_official	19:112740acecfa	426	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
mbed_official	19:112740acecfa	427	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
mbed_official	19:112740acecfa	428	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
mbed_official	19:112740acecfa	429	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
mbed_official	19:112740acecfa	430	/-----------------------------------------------------------------------------------------------------/
mbed_official	19:112740acecfa	431
bogdanm	0:9b334a45a8ff	432	/---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------/
mbed_official	19:112740acecfa	433	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	434	#define FLASH_SECTOR_0 ((uint32_t)0) /!< Sector Number 0 /
bogdanm	0:9b334a45a8ff	435	#define FLASH_SECTOR_1 ((uint32_t)1) /!< Sector Number 1 /
bogdanm	0:9b334a45a8ff	436	#define FLASH_SECTOR_2 ((uint32_t)2) /!< Sector Number 2 /
bogdanm	0:9b334a45a8ff	437	#define FLASH_SECTOR_3 ((uint32_t)3) /!< Sector Number 3 /
bogdanm	0:9b334a45a8ff	438	#define FLASH_SECTOR_4 ((uint32_t)4) /!< Sector Number 4 /
bogdanm	0:9b334a45a8ff	439	#define FLASH_SECTOR_5 ((uint32_t)5) /!< Sector Number 5 /
bogdanm	0:9b334a45a8ff	440	#define FLASH_SECTOR_6 ((uint32_t)6) /!< Sector Number 6 /
bogdanm	0:9b334a45a8ff	441	#define FLASH_SECTOR_7 ((uint32_t)7) /!< Sector Number 7 /
bogdanm	0:9b334a45a8ff	442	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	443	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	444
bogdanm	0:9b334a45a8ff	445	/**
bogdanm	0:9b334a45a8ff	446	* @}
bogdanm	0:9b334a45a8ff	447	*/
bogdanm	0:9b334a45a8ff	448
bogdanm	0:9b334a45a8ff	449	/** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
bogdanm	0:9b334a45a8ff	450	* @{
bogdanm	0:9b334a45a8ff	451	*/
mbed_official	19:112740acecfa	452	/--------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx -------------------------/
mbed_official	19:112740acecfa	453	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	454	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	455	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
bogdanm	0:9b334a45a8ff	456	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
bogdanm	0:9b334a45a8ff	457	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
bogdanm	0:9b334a45a8ff	458	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
bogdanm	0:9b334a45a8ff	459	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
bogdanm	0:9b334a45a8ff	460	#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /!< Write protection of Sector5 /
bogdanm	0:9b334a45a8ff	461	#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /!< Write protection of Sector6 /
bogdanm	0:9b334a45a8ff	462	#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /!< Write protection of Sector7 /
bogdanm	0:9b334a45a8ff	463	#define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /!< Write protection of Sector8 /
bogdanm	0:9b334a45a8ff	464	#define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /!< Write protection of Sector9 /
bogdanm	0:9b334a45a8ff	465	#define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /!< Write protection of Sector10 /
bogdanm	0:9b334a45a8ff	466	#define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /!< Write protection of Sector11 /
bogdanm	0:9b334a45a8ff	467	#define OB_WRP_SECTOR_12 ((uint32_t)0x00000001 << 12) /!< Write protection of Sector12 /
bogdanm	0:9b334a45a8ff	468	#define OB_WRP_SECTOR_13 ((uint32_t)0x00000002 << 12) /!< Write protection of Sector13 /
bogdanm	0:9b334a45a8ff	469	#define OB_WRP_SECTOR_14 ((uint32_t)0x00000004 << 12) /!< Write protection of Sector14 /
bogdanm	0:9b334a45a8ff	470	#define OB_WRP_SECTOR_15 ((uint32_t)0x00000008 << 12) /!< Write protection of Sector15 /
bogdanm	0:9b334a45a8ff	471	#define OB_WRP_SECTOR_16 ((uint32_t)0x00000010 << 12) /!< Write protection of Sector16 /
bogdanm	0:9b334a45a8ff	472	#define OB_WRP_SECTOR_17 ((uint32_t)0x00000020 << 12) /!< Write protection of Sector17 /
bogdanm	0:9b334a45a8ff	473	#define OB_WRP_SECTOR_18 ((uint32_t)0x00000040 << 12) /!< Write protection of Sector18 /
bogdanm	0:9b334a45a8ff	474	#define OB_WRP_SECTOR_19 ((uint32_t)0x00000080 << 12) /!< Write protection of Sector19 /
bogdanm	0:9b334a45a8ff	475	#define OB_WRP_SECTOR_20 ((uint32_t)0x00000100 << 12) /!< Write protection of Sector20 /
bogdanm	0:9b334a45a8ff	476	#define OB_WRP_SECTOR_21 ((uint32_t)0x00000200 << 12) /!< Write protection of Sector21 /
bogdanm	0:9b334a45a8ff	477	#define OB_WRP_SECTOR_22 ((uint32_t)0x00000400 << 12) /!< Write protection of Sector22 /
bogdanm	0:9b334a45a8ff	478	#define OB_WRP_SECTOR_23 ((uint32_t)0x00000800 << 12) /!< Write protection of Sector23 /
bogdanm	0:9b334a45a8ff	479	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF << 12) /!< Write protection of all Sectors /
mbed_official	19:112740acecfa	480	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	481	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	482
bogdanm	0:9b334a45a8ff	483	/--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------/
mbed_official	19:112740acecfa	484	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx)
bogdanm	0:9b334a45a8ff	485	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
bogdanm	0:9b334a45a8ff	486	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
bogdanm	0:9b334a45a8ff	487	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
bogdanm	0:9b334a45a8ff	488	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
bogdanm	0:9b334a45a8ff	489	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
bogdanm	0:9b334a45a8ff	490	#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /!< Write protection of Sector5 /
bogdanm	0:9b334a45a8ff	491	#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /!< Write protection of Sector6 /
bogdanm	0:9b334a45a8ff	492	#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /!< Write protection of Sector7 /
bogdanm	0:9b334a45a8ff	493	#define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /!< Write protection of Sector8 /
bogdanm	0:9b334a45a8ff	494	#define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /!< Write protection of Sector9 /
bogdanm	0:9b334a45a8ff	495	#define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /!< Write protection of Sector10 /
bogdanm	0:9b334a45a8ff	496	#define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /!< Write protection of Sector11 /
bogdanm	0:9b334a45a8ff	497	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /!< Write protection of all Sectors /
mbed_official	19:112740acecfa	498	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx */
bogdanm	0:9b334a45a8ff	499	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	500
bogdanm	0:9b334a45a8ff	501	/--------------------------------------------- STM32F401xC -------------------------------------------/
bogdanm	0:9b334a45a8ff	502	#if defined(STM32F401xC)
bogdanm	0:9b334a45a8ff	503	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
bogdanm	0:9b334a45a8ff	504	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
bogdanm	0:9b334a45a8ff	505	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
bogdanm	0:9b334a45a8ff	506	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
bogdanm	0:9b334a45a8ff	507	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
bogdanm	0:9b334a45a8ff	508	#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /!< Write protection of Sector5 /
bogdanm	0:9b334a45a8ff	509	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /!< Write protection of all Sectors /
bogdanm	0:9b334a45a8ff	510	#endif /* STM32F401xC */
bogdanm	0:9b334a45a8ff	511	/-----------------------------------------------------------------------------------------------------/
mbed_official	19:112740acecfa	512
mbed_official	19:112740acecfa	513	/--------------------------------------------- STM32F410xx -------------------------------------------/
mbed_official	19:112740acecfa	514	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
mbed_official	19:112740acecfa	515	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
mbed_official	19:112740acecfa	516	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
mbed_official	19:112740acecfa	517	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
mbed_official	19:112740acecfa	518	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
mbed_official	19:112740acecfa	519	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
mbed_official	19:112740acecfa	520	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /!< Write protection of all Sectors /
mbed_official	19:112740acecfa	521	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
mbed_official	19:112740acecfa	522	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	523
bogdanm	0:9b334a45a8ff	524	/---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------/
bogdanm	0:9b334a45a8ff	525	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	526	#define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /!< Write protection of Sector0 /
bogdanm	0:9b334a45a8ff	527	#define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /!< Write protection of Sector1 /
bogdanm	0:9b334a45a8ff	528	#define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /!< Write protection of Sector2 /
bogdanm	0:9b334a45a8ff	529	#define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /!< Write protection of Sector3 /
bogdanm	0:9b334a45a8ff	530	#define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /!< Write protection of Sector4 /
bogdanm	0:9b334a45a8ff	531	#define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /!< Write protection of Sector5 /
bogdanm	0:9b334a45a8ff	532	#define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /!< Write protection of Sector6 /
bogdanm	0:9b334a45a8ff	533	#define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /!< Write protection of Sector7 /
bogdanm	0:9b334a45a8ff	534	#define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /!< Write protection of all Sectors /
bogdanm	0:9b334a45a8ff	535	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	536	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	537	/**
bogdanm	0:9b334a45a8ff	538	* @}
bogdanm	0:9b334a45a8ff	539	*/
bogdanm	0:9b334a45a8ff	540
bogdanm	0:9b334a45a8ff	541	/** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection
bogdanm	0:9b334a45a8ff	542	* @{
bogdanm	0:9b334a45a8ff	543	*/
mbed_official	19:112740acecfa	544	/-------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx ---------------------------/
mbed_official	19:112740acecfa	545	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	546	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	547	#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector0 /
bogdanm	0:9b334a45a8ff	548	#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector1 /
bogdanm	0:9b334a45a8ff	549	#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector2 /
bogdanm	0:9b334a45a8ff	550	#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector3 /
bogdanm	0:9b334a45a8ff	551	#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector4 /
bogdanm	0:9b334a45a8ff	552	#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /!< PC Read/Write protection of Sector5 /
bogdanm	0:9b334a45a8ff	553	#define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /!< PC Read/Write protection of Sector6 /
bogdanm	0:9b334a45a8ff	554	#define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /!< PC Read/Write protection of Sector7 /
bogdanm	0:9b334a45a8ff	555	#define OB_PCROP_SECTOR_8 ((uint32_t)0x00000100) /!< PC Read/Write protection of Sector8 /
bogdanm	0:9b334a45a8ff	556	#define OB_PCROP_SECTOR_9 ((uint32_t)0x00000200) /!< PC Read/Write protection of Sector9 /
bogdanm	0:9b334a45a8ff	557	#define OB_PCROP_SECTOR_10 ((uint32_t)0x00000400) /!< PC Read/Write protection of Sector10 /
bogdanm	0:9b334a45a8ff	558	#define OB_PCROP_SECTOR_11 ((uint32_t)0x00000800) /!< PC Read/Write protection of Sector11 /
bogdanm	0:9b334a45a8ff	559	#define OB_PCROP_SECTOR_12 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector12 /
bogdanm	0:9b334a45a8ff	560	#define OB_PCROP_SECTOR_13 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector13 /
bogdanm	0:9b334a45a8ff	561	#define OB_PCROP_SECTOR_14 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector14 /
bogdanm	0:9b334a45a8ff	562	#define OB_PCROP_SECTOR_15 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector15 /
bogdanm	0:9b334a45a8ff	563	#define OB_PCROP_SECTOR_16 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector16 /
bogdanm	0:9b334a45a8ff	564	#define OB_PCROP_SECTOR_17 ((uint32_t)0x00000020) /!< PC Read/Write protection of Sector17 /
bogdanm	0:9b334a45a8ff	565	#define OB_PCROP_SECTOR_18 ((uint32_t)0x00000040) /!< PC Read/Write protection of Sector18 /
bogdanm	0:9b334a45a8ff	566	#define OB_PCROP_SECTOR_19 ((uint32_t)0x00000080) /!< PC Read/Write protection of Sector19 /
bogdanm	0:9b334a45a8ff	567	#define OB_PCROP_SECTOR_20 ((uint32_t)0x00000100) /!< PC Read/Write protection of Sector20 /
bogdanm	0:9b334a45a8ff	568	#define OB_PCROP_SECTOR_21 ((uint32_t)0x00000200) /!< PC Read/Write protection of Sector21 /
bogdanm	0:9b334a45a8ff	569	#define OB_PCROP_SECTOR_22 ((uint32_t)0x00000400) /!< PC Read/Write protection of Sector22 /
bogdanm	0:9b334a45a8ff	570	#define OB_PCROP_SECTOR_23 ((uint32_t)0x00000800) /!< PC Read/Write protection of Sector23 /
bogdanm	0:9b334a45a8ff	571	#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /!< PC Read/Write protection of all Sectors /
mbed_official	19:112740acecfa	572	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	573	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	574
bogdanm	0:9b334a45a8ff	575	/--------------------------------------------- STM32F401xC -------------------------------------------/
bogdanm	0:9b334a45a8ff	576	#if defined(STM32F401xC)
bogdanm	0:9b334a45a8ff	577	#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector0 /
bogdanm	0:9b334a45a8ff	578	#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector1 /
bogdanm	0:9b334a45a8ff	579	#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector2 /
bogdanm	0:9b334a45a8ff	580	#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector3 /
bogdanm	0:9b334a45a8ff	581	#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector4 /
bogdanm	0:9b334a45a8ff	582	#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /!< PC Read/Write protection of Sector5 /
bogdanm	0:9b334a45a8ff	583	#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /!< PC Read/Write protection of all Sectors /
bogdanm	0:9b334a45a8ff	584	#endif /* STM32F401xC */
bogdanm	0:9b334a45a8ff	585	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	586
mbed_official	19:112740acecfa	587	/--------------------------------------------- STM32F410xx -------------------------------------------/
mbed_official	19:112740acecfa	588	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
mbed_official	19:112740acecfa	589	#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector0 /
mbed_official	19:112740acecfa	590	#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector1 /
mbed_official	19:112740acecfa	591	#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector2 /
mbed_official	19:112740acecfa	592	#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector3 /
mbed_official	19:112740acecfa	593	#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector4 /
mbed_official	19:112740acecfa	594	#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /!< PC Read/Write protection of all Sectors /
mbed_official	19:112740acecfa	595	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
mbed_official	19:112740acecfa	596	/-----------------------------------------------------------------------------------------------------/
mbed_official	19:112740acecfa	597
mbed_official	19:112740acecfa	598	/------------------------------ STM32F401xE/STM32F411xE/STM32F446xx ----------------------/
mbed_official	19:112740acecfa	599	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	600	#define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /!< PC Read/Write protection of Sector0 /
bogdanm	0:9b334a45a8ff	601	#define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /!< PC Read/Write protection of Sector1 /
bogdanm	0:9b334a45a8ff	602	#define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /!< PC Read/Write protection of Sector2 /
bogdanm	0:9b334a45a8ff	603	#define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /!< PC Read/Write protection of Sector3 /
bogdanm	0:9b334a45a8ff	604	#define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /!< PC Read/Write protection of Sector4 /
bogdanm	0:9b334a45a8ff	605	#define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /!< PC Read/Write protection of Sector5 /
bogdanm	0:9b334a45a8ff	606	#define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /!< PC Read/Write protection of Sector6 /
bogdanm	0:9b334a45a8ff	607	#define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /!< PC Read/Write protection of Sector7 /
bogdanm	0:9b334a45a8ff	608	#define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /!< PC Read/Write protection of all Sectors /
mbed_official	19:112740acecfa	609	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	610	/-----------------------------------------------------------------------------------------------------/
bogdanm	0:9b334a45a8ff	611
bogdanm	0:9b334a45a8ff	612	/**
bogdanm	0:9b334a45a8ff	613	* @}
bogdanm	0:9b334a45a8ff	614	*/
bogdanm	0:9b334a45a8ff	615
bogdanm	0:9b334a45a8ff	616	/** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot
bogdanm	0:9b334a45a8ff	617	* @{
bogdanm	0:9b334a45a8ff	618	*/
mbed_official	19:112740acecfa	619	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	620	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	621	#define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /!< Dual Bank Boot Enable /
bogdanm	0:9b334a45a8ff	622	#define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /!< Dual Bank Boot Disable, always boot on User Flash /
mbed_official	19:112740acecfa	623	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	624	/**
bogdanm	0:9b334a45a8ff	625	* @}
bogdanm	0:9b334a45a8ff	626	*/
bogdanm	0:9b334a45a8ff	627
bogdanm	0:9b334a45a8ff	628	/** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode
bogdanm	0:9b334a45a8ff	629	* @{
bogdanm	0:9b334a45a8ff	630	*/
bogdanm	0:9b334a45a8ff	631	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	632	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	633	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
mbed_official	19:112740acecfa	634	defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	635	#define OB_PCROP_DESELECTED ((uint8_t)0x00) /!< Disabled PcROP, nWPRi bits used for Write Protection on sector i /
bogdanm	0:9b334a45a8ff	636	#define OB_PCROP_SELECTED ((uint8_t)0x80) /!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i /
mbed_official	19:112740acecfa	637	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
mbed_official	19:112740acecfa	638	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	639	/**
bogdanm	0:9b334a45a8ff	640	* @}
bogdanm	0:9b334a45a8ff	641	*/
bogdanm	0:9b334a45a8ff	642
bogdanm	0:9b334a45a8ff	643	/**
bogdanm	0:9b334a45a8ff	644	* @}
bogdanm	0:9b334a45a8ff	645	*/
bogdanm	0:9b334a45a8ff	646
bogdanm	0:9b334a45a8ff	647	/* Exported macro ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	648
bogdanm	0:9b334a45a8ff	649	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	650	/** @addtogroup FLASHEx_Exported_Functions
bogdanm	0:9b334a45a8ff	651	* @{
bogdanm	0:9b334a45a8ff	652	*/
bogdanm	0:9b334a45a8ff	653
bogdanm	0:9b334a45a8ff	654	/** @addtogroup FLASHEx_Exported_Functions_Group1
bogdanm	0:9b334a45a8ff	655	* @{
bogdanm	0:9b334a45a8ff	656	*/
bogdanm	0:9b334a45a8ff	657	/* Extension Program operation functions *************************************/
bogdanm	0:9b334a45a8ff	658	HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef pEraseInit, uint32_t SectorError);
bogdanm	0:9b334a45a8ff	659	HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
bogdanm	0:9b334a45a8ff	660	HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
bogdanm	0:9b334a45a8ff	661	void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
bogdanm	0:9b334a45a8ff	662
bogdanm	0:9b334a45a8ff	663	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	664	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	665	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
mbed_official	19:112740acecfa	666	defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	667	HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
bogdanm	0:9b334a45a8ff	668	void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
bogdanm	0:9b334a45a8ff	669	HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
bogdanm	0:9b334a45a8ff	670	HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
mbed_official	19:112740acecfa	671	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
mbed_official	19:112740acecfa	672	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	673
mbed_official	19:112740acecfa	674	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	675	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	676	uint16_t HAL_FLASHEx_OB_GetBank2WRP(void);
mbed_official	19:112740acecfa	677	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	678	/**
bogdanm	0:9b334a45a8ff	679	* @}
bogdanm	0:9b334a45a8ff	680	*/
bogdanm	0:9b334a45a8ff	681
bogdanm	0:9b334a45a8ff	682	/**
bogdanm	0:9b334a45a8ff	683	* @}
bogdanm	0:9b334a45a8ff	684	*/
bogdanm	0:9b334a45a8ff	685	/* Private types -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	686	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	687	/* Private constants ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	688	/** @defgroup FLASHEx_Private_Constants FLASH Private Constants
bogdanm	0:9b334a45a8ff	689	* @{
bogdanm	0:9b334a45a8ff	690	*/
mbed_official	19:112740acecfa	691	/--------------------------------- STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx---------------------/
mbed_official	19:112740acecfa	692	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	693	#define FLASH_SECTOR_TOTAL 24
mbed_official	19:112740acecfa	694	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	695
bogdanm	0:9b334a45a8ff	696	/--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------/
mbed_official	19:112740acecfa	697	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx)
bogdanm	0:9b334a45a8ff	698	#define FLASH_SECTOR_TOTAL 12
mbed_official	19:112740acecfa	699	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx */
bogdanm	0:9b334a45a8ff	700
bogdanm	0:9b334a45a8ff	701	/--------------------------------------------- STM32F401xC -------------------------------------------/
bogdanm	0:9b334a45a8ff	702	#if defined(STM32F401xC)
bogdanm	0:9b334a45a8ff	703	#define FLASH_SECTOR_TOTAL 6
bogdanm	0:9b334a45a8ff	704	#endif /* STM32F401xC */
bogdanm	0:9b334a45a8ff	705
mbed_official	19:112740acecfa	706	/--------------------------------------------- STM32F410xx -------------------------------------------/
mbed_official	19:112740acecfa	707	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
mbed_official	19:112740acecfa	708	#define FLASH_SECTOR_TOTAL 5
mbed_official	19:112740acecfa	709	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
mbed_official	19:112740acecfa	710
mbed_official	19:112740acecfa	711	/--------------------------------- STM32F401xE/STM32F411xE/STM32F446xx -------------------/
bogdanm	0:9b334a45a8ff	712	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	713	#define FLASH_SECTOR_TOTAL 8
bogdanm	0:9b334a45a8ff	714	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	715
bogdanm	0:9b334a45a8ff	716	/**
bogdanm	0:9b334a45a8ff	717	* @brief OPTCR1 register byte 2 (Bits[23:16]) base address
bogdanm	0:9b334a45a8ff	718	*/
mbed_official	19:112740acecfa	719	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	720	#define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
mbed_official	19:112740acecfa	721	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	722
bogdanm	0:9b334a45a8ff	723	/**
bogdanm	0:9b334a45a8ff	724	* @}
bogdanm	0:9b334a45a8ff	725	*/
bogdanm	0:9b334a45a8ff	726
bogdanm	0:9b334a45a8ff	727	/* Private macros ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	728	/** @defgroup FLASHEx_Private_Macros FLASH Private Macros
bogdanm	0:9b334a45a8ff	729	* @{
bogdanm	0:9b334a45a8ff	730	*/
bogdanm	0:9b334a45a8ff	731
bogdanm	0:9b334a45a8ff	732	/** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
bogdanm	0:9b334a45a8ff	733	* @{
bogdanm	0:9b334a45a8ff	734	*/
bogdanm	0:9b334a45a8ff	735
bogdanm	0:9b334a45a8ff	736	#define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) \|\| \
bogdanm	0:9b334a45a8ff	737	((VALUE) == FLASH_TYPEERASE_MASSERASE))
bogdanm	0:9b334a45a8ff	738
bogdanm	0:9b334a45a8ff	739	#define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) \|\| \
bogdanm	0:9b334a45a8ff	740	((RANGE) == FLASH_VOLTAGE_RANGE_2) \|\| \
bogdanm	0:9b334a45a8ff	741	((RANGE) == FLASH_VOLTAGE_RANGE_3) \|\| \
bogdanm	0:9b334a45a8ff	742	((RANGE) == FLASH_VOLTAGE_RANGE_4))
bogdanm	0:9b334a45a8ff	743
bogdanm	0:9b334a45a8ff	744	#define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	745	((VALUE) == OB_WRPSTATE_ENABLE))
bogdanm	0:9b334a45a8ff	746
bogdanm	0:9b334a45a8ff	747	#define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP\|OPTIONBYTE_RDP\|OPTIONBYTE_USER\|OPTIONBYTE_BOR)))
bogdanm	0:9b334a45a8ff	748
bogdanm	0:9b334a45a8ff	749	#define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) \|\|\
bogdanm	0:9b334a45a8ff	750	((LEVEL) == OB_RDP_LEVEL_1) \|\|\
bogdanm	0:9b334a45a8ff	751	((LEVEL) == OB_RDP_LEVEL_2))
bogdanm	0:9b334a45a8ff	752
bogdanm	0:9b334a45a8ff	753	#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) \|\| ((SOURCE) == OB_IWDG_HW))
bogdanm	0:9b334a45a8ff	754
bogdanm	0:9b334a45a8ff	755	#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) \|\| ((SOURCE) == OB_STOP_RST))
bogdanm	0:9b334a45a8ff	756
bogdanm	0:9b334a45a8ff	757	#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) \|\| ((SOURCE) == OB_STDBY_RST))
bogdanm	0:9b334a45a8ff	758
bogdanm	0:9b334a45a8ff	759	#define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) \|\| ((LEVEL) == OB_BOR_LEVEL2) \|\|\
bogdanm	0:9b334a45a8ff	760	((LEVEL) == OB_BOR_LEVEL3) \|\| ((LEVEL) == OB_BOR_OFF))
bogdanm	0:9b334a45a8ff	761
bogdanm	0:9b334a45a8ff	762	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	763	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	764	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
mbed_official	19:112740acecfa	765	defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	766	#define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	767	((VALUE) == OB_PCROP_STATE_ENABLE))
mbed_official	19:112740acecfa	768	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
mbed_official	19:112740acecfa	769	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	770
mbed_official	19:112740acecfa	771	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	772	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	773	#define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) \|\| \
bogdanm	0:9b334a45a8ff	774	((VALUE) == OPTIONBYTE_BOOTCONFIG))
mbed_official	19:112740acecfa	775	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	776
mbed_official	19:112740acecfa	777	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	778	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	779	#define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP))
mbed_official	19:112740acecfa	780	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	781
mbed_official	19:112740acecfa	782	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	783	defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	784	#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) \|\| \
bogdanm	0:9b334a45a8ff	785	((LATENCY) == FLASH_LATENCY_1) \|\| \
bogdanm	0:9b334a45a8ff	786	((LATENCY) == FLASH_LATENCY_2) \|\| \
bogdanm	0:9b334a45a8ff	787	((LATENCY) == FLASH_LATENCY_3) \|\| \
bogdanm	0:9b334a45a8ff	788	((LATENCY) == FLASH_LATENCY_4) \|\| \
bogdanm	0:9b334a45a8ff	789	((LATENCY) == FLASH_LATENCY_5) \|\| \
bogdanm	0:9b334a45a8ff	790	((LATENCY) == FLASH_LATENCY_6) \|\| \
bogdanm	0:9b334a45a8ff	791	((LATENCY) == FLASH_LATENCY_7) \|\| \
bogdanm	0:9b334a45a8ff	792	((LATENCY) == FLASH_LATENCY_8) \|\| \
bogdanm	0:9b334a45a8ff	793	((LATENCY) == FLASH_LATENCY_9) \|\| \
bogdanm	0:9b334a45a8ff	794	((LATENCY) == FLASH_LATENCY_10) \|\| \
bogdanm	0:9b334a45a8ff	795	((LATENCY) == FLASH_LATENCY_11) \|\| \
bogdanm	0:9b334a45a8ff	796	((LATENCY) == FLASH_LATENCY_12) \|\| \
bogdanm	0:9b334a45a8ff	797	((LATENCY) == FLASH_LATENCY_13) \|\| \
bogdanm	0:9b334a45a8ff	798	((LATENCY) == FLASH_LATENCY_14) \|\| \
bogdanm	0:9b334a45a8ff	799	((LATENCY) == FLASH_LATENCY_15))
mbed_official	19:112740acecfa	800	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	801
mbed_official	19:112740acecfa	802	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
mbed_official	19:112740acecfa	803	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	804	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	805	#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) \|\| \
bogdanm	0:9b334a45a8ff	806	((LATENCY) == FLASH_LATENCY_1) \|\| \
bogdanm	0:9b334a45a8ff	807	((LATENCY) == FLASH_LATENCY_2) \|\| \
bogdanm	0:9b334a45a8ff	808	((LATENCY) == FLASH_LATENCY_3) \|\| \
bogdanm	0:9b334a45a8ff	809	((LATENCY) == FLASH_LATENCY_4) \|\| \
bogdanm	0:9b334a45a8ff	810	((LATENCY) == FLASH_LATENCY_5) \|\| \
bogdanm	0:9b334a45a8ff	811	((LATENCY) == FLASH_LATENCY_6) \|\| \
bogdanm	0:9b334a45a8ff	812	((LATENCY) == FLASH_LATENCY_7))
mbed_official	19:112740acecfa	813	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	814
mbed_official	19:112740acecfa	815	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	816	#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) \|\| \
bogdanm	0:9b334a45a8ff	817	((BANK) == FLASH_BANK_2) \|\| \
bogdanm	0:9b334a45a8ff	818	((BANK) == FLASH_BANK_BOTH))
mbed_official	19:112740acecfa	819	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	820
bogdanm	0:9b334a45a8ff	821	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
mbed_official	19:112740acecfa	822	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	823	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	824	#define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
mbed_official	19:112740acecfa	825	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	826
bogdanm	0:9b334a45a8ff	827
mbed_official	19:112740acecfa	828	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	829	#define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
bogdanm	0:9b334a45a8ff	830	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
bogdanm	0:9b334a45a8ff	831	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
bogdanm	0:9b334a45a8ff	832	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7) \|\|\
bogdanm	0:9b334a45a8ff	833	((SECTOR) == FLASH_SECTOR_8) \|\| ((SECTOR) == FLASH_SECTOR_9) \|\|\
bogdanm	0:9b334a45a8ff	834	((SECTOR) == FLASH_SECTOR_10) \|\| ((SECTOR) == FLASH_SECTOR_11) \|\|\
bogdanm	0:9b334a45a8ff	835	((SECTOR) == FLASH_SECTOR_12) \|\| ((SECTOR) == FLASH_SECTOR_13) \|\|\
bogdanm	0:9b334a45a8ff	836	((SECTOR) == FLASH_SECTOR_14) \|\| ((SECTOR) == FLASH_SECTOR_15) \|\|\
bogdanm	0:9b334a45a8ff	837	((SECTOR) == FLASH_SECTOR_16) \|\| ((SECTOR) == FLASH_SECTOR_17) \|\|\
bogdanm	0:9b334a45a8ff	838	((SECTOR) == FLASH_SECTOR_18) \|\| ((SECTOR) == FLASH_SECTOR_19) \|\|\
bogdanm	0:9b334a45a8ff	839	((SECTOR) == FLASH_SECTOR_20) \|\| ((SECTOR) == FLASH_SECTOR_21) \|\|\
bogdanm	0:9b334a45a8ff	840	((SECTOR) == FLASH_SECTOR_22) \|\| ((SECTOR) == FLASH_SECTOR_23))
mbed_official	19:112740acecfa	841	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	842
mbed_official	19:112740acecfa	843	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx)
bogdanm	0:9b334a45a8ff	844	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
bogdanm	0:9b334a45a8ff	845	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
bogdanm	0:9b334a45a8ff	846	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
bogdanm	0:9b334a45a8ff	847	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7) \|\|\
bogdanm	0:9b334a45a8ff	848	((SECTOR) == FLASH_SECTOR_8) \|\| ((SECTOR) == FLASH_SECTOR_9) \|\|\
bogdanm	0:9b334a45a8ff	849	((SECTOR) == FLASH_SECTOR_10) \|\| ((SECTOR) == FLASH_SECTOR_11))
mbed_official	19:112740acecfa	850	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx */
bogdanm	0:9b334a45a8ff	851
bogdanm	0:9b334a45a8ff	852	#if defined(STM32F401xC)
bogdanm	0:9b334a45a8ff	853	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
bogdanm	0:9b334a45a8ff	854	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
bogdanm	0:9b334a45a8ff	855	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5))
bogdanm	0:9b334a45a8ff	856	#endif /* STM32F401xC */
bogdanm	0:9b334a45a8ff	857
mbed_official	19:112740acecfa	858	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
mbed_official	19:112740acecfa	859	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
mbed_official	19:112740acecfa	860	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
mbed_official	19:112740acecfa	861	((SECTOR) == FLASH_SECTOR_4))
mbed_official	19:112740acecfa	862	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
mbed_official	19:112740acecfa	863
bogdanm	0:9b334a45a8ff	864	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	865	#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) \|\| ((SECTOR) == FLASH_SECTOR_1) \|\|\
bogdanm	0:9b334a45a8ff	866	((SECTOR) == FLASH_SECTOR_2) \|\| ((SECTOR) == FLASH_SECTOR_3) \|\|\
bogdanm	0:9b334a45a8ff	867	((SECTOR) == FLASH_SECTOR_4) \|\| ((SECTOR) == FLASH_SECTOR_5) \|\|\
bogdanm	0:9b334a45a8ff	868	((SECTOR) == FLASH_SECTOR_6) \|\| ((SECTOR) == FLASH_SECTOR_7))
bogdanm	0:9b334a45a8ff	869	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	870
bogdanm	0:9b334a45a8ff	871	#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END))
bogdanm	0:9b334a45a8ff	872	#define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
bogdanm	0:9b334a45a8ff	873
mbed_official	19:112740acecfa	874	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	875	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFF000000) == 0x00000000) && ((SECTOR) != 0x00000000))
mbed_official	19:112740acecfa	876	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	877
bogdanm	0:9b334a45a8ff	878	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx)
bogdanm	0:9b334a45a8ff	879	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	0:9b334a45a8ff	880	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx */
bogdanm	0:9b334a45a8ff	881
bogdanm	0:9b334a45a8ff	882	#if defined(STM32F401xC)
bogdanm	0:9b334a45a8ff	883	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	0:9b334a45a8ff	884	#endif /* STM32F401xC */
bogdanm	0:9b334a45a8ff	885
mbed_official	19:112740acecfa	886	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
bogdanm	0:9b334a45a8ff	887	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
mbed_official	19:112740acecfa	888	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
mbed_official	19:112740acecfa	889
mbed_official	19:112740acecfa	890	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
mbed_official	19:112740acecfa	891	#define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
mbed_official	19:112740acecfa	892	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	893
mbed_official	19:112740acecfa	894	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	895	#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
mbed_official	19:112740acecfa	896	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	897
bogdanm	0:9b334a45a8ff	898	#if defined(STM32F401xC)
bogdanm	0:9b334a45a8ff	899	#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
bogdanm	0:9b334a45a8ff	900	#endif /* STM32F401xC */
bogdanm	0:9b334a45a8ff	901
mbed_official	19:112740acecfa	902	#if defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx)
bogdanm	0:9b334a45a8ff	903	#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
mbed_official	19:112740acecfa	904	#endif /* STM32F410Tx \|\| STM32F410Cx \|\| STM32F410Rx */
bogdanm	0:9b334a45a8ff	905
mbed_official	19:112740acecfa	906	#if defined(STM32F401xE) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
mbed_official	19:112740acecfa	907	#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
mbed_official	19:112740acecfa	908	#endif /* STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	909
bogdanm	0:9b334a45a8ff	910	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	911	defined(STM32F469xx) \|\| defined(STM32F479xx)
mbed_official	19:112740acecfa	912	#define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) \|\| ((BOOT) == OB_DUAL_BOOT_DISABLE))
mbed_official	19:112740acecfa	913	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
mbed_official	19:112740acecfa	914
mbed_official	19:112740acecfa	915	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	916	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	917	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
mbed_official	19:112740acecfa	918	defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	919	#define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) \|\| ((PCROP) == OB_PCROP_DESELECTED))
mbed_official	19:112740acecfa	920	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\|\
mbed_official	19:112740acecfa	921	STM32F410xx \|\| STM32F411xE \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	922	/**
bogdanm	0:9b334a45a8ff	923	* @}
bogdanm	0:9b334a45a8ff	924	*/
bogdanm	0:9b334a45a8ff	925
bogdanm	0:9b334a45a8ff	926	/**
bogdanm	0:9b334a45a8ff	927	* @}
bogdanm	0:9b334a45a8ff	928	*/
bogdanm	0:9b334a45a8ff	929
bogdanm	0:9b334a45a8ff	930	/* Private functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	931	/** @defgroup FLASHEx_Private_Functions FLASH Private Functions
bogdanm	0:9b334a45a8ff	932	* @{
bogdanm	0:9b334a45a8ff	933	*/
bogdanm	0:9b334a45a8ff	934	void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
bogdanm	0:9b334a45a8ff	935	/**
bogdanm	0:9b334a45a8ff	936	* @}
bogdanm	0:9b334a45a8ff	937	*/
bogdanm	0:9b334a45a8ff	938
bogdanm	0:9b334a45a8ff	939	/**
bogdanm	0:9b334a45a8ff	940	* @}
bogdanm	0:9b334a45a8ff	941	*/
bogdanm	0:9b334a45a8ff	942
bogdanm	0:9b334a45a8ff	943	/**
bogdanm	0:9b334a45a8ff	944	* @}
bogdanm	0:9b334a45a8ff	945	*/
bogdanm	0:9b334a45a8ff	946
bogdanm	0:9b334a45a8ff	947	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	948	}
bogdanm	0:9b334a45a8ff	949	#endif
bogdanm	0:9b334a45a8ff	950
bogdanm	0:9b334a45a8ff	951	#endif /* __STM32F4xx_HAL_FLASH_EX_H */
bogdanm	0:9b334a45a8ff	952
bogdanm	0:9b334a45a8ff	953	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.h@129:2e517c56bcfb, 2016-05-16 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning