en 129
fix LPC812 PWM
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targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.h@0:9b334a45a8ff, 2015-10-01 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Oct 01 15:25:22 2015 +0300
- Revision:
- 0:9b334a45a8ff
- Child:
- 19:112740acecfa
Initial commit on mbed-dev
Replaces mbed-src (now inactive)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 0:9b334a45a8ff | 1 | /** |
| bogdanm | 0:9b334a45a8ff | 2 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 3 | * @file stm32f4xx_hal_flash_ex.h |
| bogdanm | 0:9b334a45a8ff | 4 | * @author MCD Application Team |
| bogdanm | 0:9b334a45a8ff | 5 | * @version V1.3.2 |
| bogdanm | 0:9b334a45a8ff | 6 | * @date 26-June-2015 |
| bogdanm | 0:9b334a45a8ff | 7 | * @brief Header file of FLASH HAL Extension module. |
| bogdanm | 0:9b334a45a8ff | 8 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 9 | * @attention |
| bogdanm | 0:9b334a45a8ff | 10 | * |
| bogdanm | 0:9b334a45a8ff | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| bogdanm | 0:9b334a45a8ff | 12 | * |
| bogdanm | 0:9b334a45a8ff | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 0:9b334a45a8ff | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 0:9b334a45a8ff | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 0:9b334a45a8ff | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 0:9b334a45a8ff | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 0:9b334a45a8ff | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 0:9b334a45a8ff | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 0:9b334a45a8ff | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 0:9b334a45a8ff | 22 | * without specific prior written permission. |
| bogdanm | 0:9b334a45a8ff | 23 | * |
| bogdanm | 0:9b334a45a8ff | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 0:9b334a45a8ff | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 0:9b334a45a8ff | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 0:9b334a45a8ff | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 0:9b334a45a8ff | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 0:9b334a45a8ff | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 0:9b334a45a8ff | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 0:9b334a45a8ff | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 0:9b334a45a8ff | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 0:9b334a45a8ff | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 0:9b334a45a8ff | 34 | * |
| bogdanm | 0:9b334a45a8ff | 35 | ****************************************************************************** |
| bogdanm | 0:9b334a45a8ff | 36 | */ |
| bogdanm | 0:9b334a45a8ff | 37 | |
| bogdanm | 0:9b334a45a8ff | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 39 | #ifndef __STM32F4xx_HAL_FLASH_EX_H |
| bogdanm | 0:9b334a45a8ff | 40 | #define __STM32F4xx_HAL_FLASH_EX_H |
| bogdanm | 0:9b334a45a8ff | 41 | |
| bogdanm | 0:9b334a45a8ff | 42 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 43 | extern "C" { |
| bogdanm | 0:9b334a45a8ff | 44 | #endif |
| bogdanm | 0:9b334a45a8ff | 45 | |
| bogdanm | 0:9b334a45a8ff | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 47 | #include "stm32f4xx_hal_def.h" |
| bogdanm | 0:9b334a45a8ff | 48 | |
| bogdanm | 0:9b334a45a8ff | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
| bogdanm | 0:9b334a45a8ff | 50 | * @{ |
| bogdanm | 0:9b334a45a8ff | 51 | */ |
| bogdanm | 0:9b334a45a8ff | 52 | |
| bogdanm | 0:9b334a45a8ff | 53 | /** @addtogroup FLASHEx |
| bogdanm | 0:9b334a45a8ff | 54 | * @{ |
| bogdanm | 0:9b334a45a8ff | 55 | */ |
| bogdanm | 0:9b334a45a8ff | 56 | |
| bogdanm | 0:9b334a45a8ff | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 58 | /** @defgroup FLASHEx_Exported_Types FLASH Exported Types |
| bogdanm | 0:9b334a45a8ff | 59 | * @{ |
| bogdanm | 0:9b334a45a8ff | 60 | */ |
| bogdanm | 0:9b334a45a8ff | 61 | |
| bogdanm | 0:9b334a45a8ff | 62 | /** |
| bogdanm | 0:9b334a45a8ff | 63 | * @brief FLASH Erase structure definition |
| bogdanm | 0:9b334a45a8ff | 64 | */ |
| bogdanm | 0:9b334a45a8ff | 65 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 66 | { |
| bogdanm | 0:9b334a45a8ff | 67 | uint32_t TypeErase; /*!< Mass erase or sector Erase. |
| bogdanm | 0:9b334a45a8ff | 68 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| bogdanm | 0:9b334a45a8ff | 69 | |
| bogdanm | 0:9b334a45a8ff | 70 | uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled. |
| bogdanm | 0:9b334a45a8ff | 71 | This parameter must be a value of @ref FLASHEx_Banks */ |
| bogdanm | 0:9b334a45a8ff | 72 | |
| bogdanm | 0:9b334a45a8ff | 73 | uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled |
| bogdanm | 0:9b334a45a8ff | 74 | This parameter must be a value of @ref FLASHEx_Sectors */ |
| bogdanm | 0:9b334a45a8ff | 75 | |
| bogdanm | 0:9b334a45a8ff | 76 | uint32_t NbSectors; /*!< Number of sectors to be erased. |
| bogdanm | 0:9b334a45a8ff | 77 | This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/ |
| bogdanm | 0:9b334a45a8ff | 78 | |
| bogdanm | 0:9b334a45a8ff | 79 | uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism |
| bogdanm | 0:9b334a45a8ff | 80 | This parameter must be a value of @ref FLASHEx_Voltage_Range */ |
| bogdanm | 0:9b334a45a8ff | 81 | |
| bogdanm | 0:9b334a45a8ff | 82 | } FLASH_EraseInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 83 | |
| bogdanm | 0:9b334a45a8ff | 84 | /** |
| bogdanm | 0:9b334a45a8ff | 85 | * @brief FLASH Option Bytes Program structure definition |
| bogdanm | 0:9b334a45a8ff | 86 | */ |
| bogdanm | 0:9b334a45a8ff | 87 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 88 | { |
| bogdanm | 0:9b334a45a8ff | 89 | uint32_t OptionType; /*!< Option byte to be configured. |
| bogdanm | 0:9b334a45a8ff | 90 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
| bogdanm | 0:9b334a45a8ff | 91 | |
| bogdanm | 0:9b334a45a8ff | 92 | uint32_t WRPState; /*!< Write protection activation or deactivation. |
| bogdanm | 0:9b334a45a8ff | 93 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
| bogdanm | 0:9b334a45a8ff | 94 | |
| bogdanm | 0:9b334a45a8ff | 95 | uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected. |
| bogdanm | 0:9b334a45a8ff | 96 | The value of this parameter depend on device used within the same series */ |
| bogdanm | 0:9b334a45a8ff | 97 | |
| bogdanm | 0:9b334a45a8ff | 98 | uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors. |
| bogdanm | 0:9b334a45a8ff | 99 | This parameter must be a value of @ref FLASHEx_Banks */ |
| bogdanm | 0:9b334a45a8ff | 100 | |
| bogdanm | 0:9b334a45a8ff | 101 | uint32_t RDPLevel; /*!< Set the read protection level. |
| bogdanm | 0:9b334a45a8ff | 102 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
| bogdanm | 0:9b334a45a8ff | 103 | |
| bogdanm | 0:9b334a45a8ff | 104 | uint32_t BORLevel; /*!< Set the BOR Level. |
| bogdanm | 0:9b334a45a8ff | 105 | This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */ |
| bogdanm | 0:9b334a45a8ff | 106 | |
| bogdanm | 0:9b334a45a8ff | 107 | uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */ |
| bogdanm | 0:9b334a45a8ff | 108 | |
| bogdanm | 0:9b334a45a8ff | 109 | } FLASH_OBProgramInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 110 | |
| bogdanm | 0:9b334a45a8ff | 111 | /** |
| bogdanm | 0:9b334a45a8ff | 112 | * @brief FLASH Advanced Option Bytes Program structure definition |
| bogdanm | 0:9b334a45a8ff | 113 | */ |
| bogdanm | 0:9b334a45a8ff | 114 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
| bogdanm | 0:9b334a45a8ff | 115 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 116 | typedef struct |
| bogdanm | 0:9b334a45a8ff | 117 | { |
| bogdanm | 0:9b334a45a8ff | 118 | uint32_t OptionType; /*!< Option byte to be configured for extension. |
| bogdanm | 0:9b334a45a8ff | 119 | This parameter can be a value of @ref FLASHEx_Advanced_Option_Type */ |
| bogdanm | 0:9b334a45a8ff | 120 | |
| bogdanm | 0:9b334a45a8ff | 121 | uint32_t PCROPState; /*!< PCROP activation or deactivation. |
| bogdanm | 0:9b334a45a8ff | 122 | This parameter can be a value of @ref FLASHEx_PCROP_State */ |
| bogdanm | 0:9b334a45a8ff | 123 | |
| bogdanm | 0:9b334a45a8ff | 124 | #if defined (STM32F401xC) || defined (STM32F401xE) || defined (STM32F411xE) || defined (STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 125 | uint16_t Sectors; /*!< specifies the sector(s) set for PCROP. |
| bogdanm | 0:9b334a45a8ff | 126 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| bogdanm | 0:9b334a45a8ff | 127 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 128 | |
| bogdanm | 0:9b334a45a8ff | 129 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 130 | uint32_t Banks; /*!< Select banks for PCROP activation/deactivation of all sectors. |
| bogdanm | 0:9b334a45a8ff | 131 | This parameter must be a value of @ref FLASHEx_Banks */ |
| bogdanm | 0:9b334a45a8ff | 132 | |
| bogdanm | 0:9b334a45a8ff | 133 | uint16_t SectorsBank1; /*!< Specifies the sector(s) set for PCROP for Bank1. |
| bogdanm | 0:9b334a45a8ff | 134 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| bogdanm | 0:9b334a45a8ff | 135 | |
| bogdanm | 0:9b334a45a8ff | 136 | uint16_t SectorsBank2; /*!< Specifies the sector(s) set for PCROP for Bank2. |
| bogdanm | 0:9b334a45a8ff | 137 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
| bogdanm | 0:9b334a45a8ff | 138 | |
| bogdanm | 0:9b334a45a8ff | 139 | uint8_t BootConfig; /*!< Specifies Option bytes for boot config. |
| bogdanm | 0:9b334a45a8ff | 140 | This parameter can be a value of @ref FLASHEx_Dual_Boot */ |
| bogdanm | 0:9b334a45a8ff | 141 | |
| bogdanm | 0:9b334a45a8ff | 142 | #endif /*STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 143 | } FLASH_AdvOBProgramInitTypeDef; |
| bogdanm | 0:9b334a45a8ff | 144 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 145 | /** |
| bogdanm | 0:9b334a45a8ff | 146 | * @} |
| bogdanm | 0:9b334a45a8ff | 147 | */ |
| bogdanm | 0:9b334a45a8ff | 148 | |
| bogdanm | 0:9b334a45a8ff | 149 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 150 | |
| bogdanm | 0:9b334a45a8ff | 151 | /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants |
| bogdanm | 0:9b334a45a8ff | 152 | * @{ |
| bogdanm | 0:9b334a45a8ff | 153 | */ |
| bogdanm | 0:9b334a45a8ff | 154 | |
| bogdanm | 0:9b334a45a8ff | 155 | /** @defgroup FLASHEx_Type_Erase FLASH Type Erase |
| bogdanm | 0:9b334a45a8ff | 156 | * @{ |
| bogdanm | 0:9b334a45a8ff | 157 | */ |
| bogdanm | 0:9b334a45a8ff | 158 | #define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00) /*!< Sectors erase only */ |
| bogdanm | 0:9b334a45a8ff | 159 | #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01) /*!< Flash Mass erase activation */ |
| bogdanm | 0:9b334a45a8ff | 160 | /** |
| bogdanm | 0:9b334a45a8ff | 161 | * @} |
| bogdanm | 0:9b334a45a8ff | 162 | */ |
| bogdanm | 0:9b334a45a8ff | 163 | |
| bogdanm | 0:9b334a45a8ff | 164 | /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range |
| bogdanm | 0:9b334a45a8ff | 165 | * @{ |
| bogdanm | 0:9b334a45a8ff | 166 | */ |
| bogdanm | 0:9b334a45a8ff | 167 | #define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00) /*!< Device operating range: 1.8V to 2.1V */ |
| bogdanm | 0:9b334a45a8ff | 168 | #define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01) /*!< Device operating range: 2.1V to 2.7V */ |
| bogdanm | 0:9b334a45a8ff | 169 | #define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02) /*!< Device operating range: 2.7V to 3.6V */ |
| bogdanm | 0:9b334a45a8ff | 170 | #define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03) /*!< Device operating range: 2.7V to 3.6V + External Vpp */ |
| bogdanm | 0:9b334a45a8ff | 171 | /** |
| bogdanm | 0:9b334a45a8ff | 172 | * @} |
| bogdanm | 0:9b334a45a8ff | 173 | */ |
| bogdanm | 0:9b334a45a8ff | 174 | |
| bogdanm | 0:9b334a45a8ff | 175 | /** @defgroup FLASHEx_WRP_State FLASH WRP State |
| bogdanm | 0:9b334a45a8ff | 176 | * @{ |
| bogdanm | 0:9b334a45a8ff | 177 | */ |
| bogdanm | 0:9b334a45a8ff | 178 | #define OB_WRPSTATE_DISABLE ((uint32_t)0x00) /*!< Disable the write protection of the desired bank 1 sectors */ |
| bogdanm | 0:9b334a45a8ff | 179 | #define OB_WRPSTATE_ENABLE ((uint32_t)0x01) /*!< Enable the write protection of the desired bank 1 sectors */ |
| bogdanm | 0:9b334a45a8ff | 180 | /** |
| bogdanm | 0:9b334a45a8ff | 181 | * @} |
| bogdanm | 0:9b334a45a8ff | 182 | */ |
| bogdanm | 0:9b334a45a8ff | 183 | |
| bogdanm | 0:9b334a45a8ff | 184 | /** @defgroup FLASHEx_Option_Type FLASH Option Type |
| bogdanm | 0:9b334a45a8ff | 185 | * @{ |
| bogdanm | 0:9b334a45a8ff | 186 | */ |
| bogdanm | 0:9b334a45a8ff | 187 | #define OPTIONBYTE_WRP ((uint32_t)0x01) /*!< WRP option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 188 | #define OPTIONBYTE_RDP ((uint32_t)0x02) /*!< RDP option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 189 | #define OPTIONBYTE_USER ((uint32_t)0x04) /*!< USER option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 190 | #define OPTIONBYTE_BOR ((uint32_t)0x08) /*!< BOR option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 191 | /** |
| bogdanm | 0:9b334a45a8ff | 192 | * @} |
| bogdanm | 0:9b334a45a8ff | 193 | */ |
| bogdanm | 0:9b334a45a8ff | 194 | |
| bogdanm | 0:9b334a45a8ff | 195 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection |
| bogdanm | 0:9b334a45a8ff | 196 | * @{ |
| bogdanm | 0:9b334a45a8ff | 197 | */ |
| bogdanm | 0:9b334a45a8ff | 198 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAA) |
| bogdanm | 0:9b334a45a8ff | 199 | #define OB_RDP_LEVEL_1 ((uint8_t)0x55) |
| bogdanm | 0:9b334a45a8ff | 200 | #define OB_RDP_LEVEL_2 ((uint8_t)0xCC) /*!< Warning: When enabling read protection level 2 |
| bogdanm | 0:9b334a45a8ff | 201 | it s no more possible to go back to level 1 or 0 */ |
| bogdanm | 0:9b334a45a8ff | 202 | /** |
| bogdanm | 0:9b334a45a8ff | 203 | * @} |
| bogdanm | 0:9b334a45a8ff | 204 | */ |
| bogdanm | 0:9b334a45a8ff | 205 | |
| bogdanm | 0:9b334a45a8ff | 206 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog |
| bogdanm | 0:9b334a45a8ff | 207 | * @{ |
| bogdanm | 0:9b334a45a8ff | 208 | */ |
| bogdanm | 0:9b334a45a8ff | 209 | #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */ |
| bogdanm | 0:9b334a45a8ff | 210 | #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */ |
| bogdanm | 0:9b334a45a8ff | 211 | /** |
| bogdanm | 0:9b334a45a8ff | 212 | * @} |
| bogdanm | 0:9b334a45a8ff | 213 | */ |
| bogdanm | 0:9b334a45a8ff | 214 | |
| bogdanm | 0:9b334a45a8ff | 215 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP |
| bogdanm | 0:9b334a45a8ff | 216 | * @{ |
| bogdanm | 0:9b334a45a8ff | 217 | */ |
| bogdanm | 0:9b334a45a8ff | 218 | #define OB_STOP_NO_RST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */ |
| bogdanm | 0:9b334a45a8ff | 219 | #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ |
| bogdanm | 0:9b334a45a8ff | 220 | /** |
| bogdanm | 0:9b334a45a8ff | 221 | * @} |
| bogdanm | 0:9b334a45a8ff | 222 | */ |
| bogdanm | 0:9b334a45a8ff | 223 | |
| bogdanm | 0:9b334a45a8ff | 224 | |
| bogdanm | 0:9b334a45a8ff | 225 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY |
| bogdanm | 0:9b334a45a8ff | 226 | * @{ |
| bogdanm | 0:9b334a45a8ff | 227 | */ |
| bogdanm | 0:9b334a45a8ff | 228 | #define OB_STDBY_NO_RST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */ |
| bogdanm | 0:9b334a45a8ff | 229 | #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ |
| bogdanm | 0:9b334a45a8ff | 230 | /** |
| bogdanm | 0:9b334a45a8ff | 231 | * @} |
| bogdanm | 0:9b334a45a8ff | 232 | */ |
| bogdanm | 0:9b334a45a8ff | 233 | |
| bogdanm | 0:9b334a45a8ff | 234 | /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level |
| bogdanm | 0:9b334a45a8ff | 235 | * @{ |
| bogdanm | 0:9b334a45a8ff | 236 | */ |
| bogdanm | 0:9b334a45a8ff | 237 | #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */ |
| bogdanm | 0:9b334a45a8ff | 238 | #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */ |
| bogdanm | 0:9b334a45a8ff | 239 | #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */ |
| bogdanm | 0:9b334a45a8ff | 240 | #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */ |
| bogdanm | 0:9b334a45a8ff | 241 | /** |
| bogdanm | 0:9b334a45a8ff | 242 | * @} |
| bogdanm | 0:9b334a45a8ff | 243 | */ |
| bogdanm | 0:9b334a45a8ff | 244 | |
| bogdanm | 0:9b334a45a8ff | 245 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| bogdanm | 0:9b334a45a8ff | 246 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 247 | /** @defgroup FLASHEx_PCROP_State FLASH PCROP State |
| bogdanm | 0:9b334a45a8ff | 248 | * @{ |
| bogdanm | 0:9b334a45a8ff | 249 | */ |
| bogdanm | 0:9b334a45a8ff | 250 | #define OB_PCROP_STATE_DISABLE ((uint32_t)0x00) /*!< Disable PCROP */ |
| bogdanm | 0:9b334a45a8ff | 251 | #define OB_PCROP_STATE_ENABLE ((uint32_t)0x01) /*!< Enable PCROP */ |
| bogdanm | 0:9b334a45a8ff | 252 | /** |
| bogdanm | 0:9b334a45a8ff | 253 | * @} |
| bogdanm | 0:9b334a45a8ff | 254 | */ |
| bogdanm | 0:9b334a45a8ff | 255 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */ |
| bogdanm | 0:9b334a45a8ff | 256 | |
| bogdanm | 0:9b334a45a8ff | 257 | /** @defgroup FLASHEx_Advanced_Option_Type FLASH Advanced Option Type |
| bogdanm | 0:9b334a45a8ff | 258 | * @{ |
| bogdanm | 0:9b334a45a8ff | 259 | */ |
| bogdanm | 0:9b334a45a8ff | 260 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 261 | #define OPTIONBYTE_PCROP ((uint32_t)0x01) /*!< PCROP option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 262 | #define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02) /*!< BOOTConfig option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 263 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 264 | |
| bogdanm | 0:9b334a45a8ff | 265 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 266 | #define OPTIONBYTE_PCROP ((uint32_t)0x01) /*!<PCROP option byte configuration */ |
| bogdanm | 0:9b334a45a8ff | 267 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 268 | /** |
| bogdanm | 0:9b334a45a8ff | 269 | * @} |
| bogdanm | 0:9b334a45a8ff | 270 | */ |
| bogdanm | 0:9b334a45a8ff | 271 | |
| bogdanm | 0:9b334a45a8ff | 272 | /** @defgroup FLASH_Latency FLASH Latency |
| bogdanm | 0:9b334a45a8ff | 273 | * @{ |
| bogdanm | 0:9b334a45a8ff | 274 | */ |
| bogdanm | 0:9b334a45a8ff | 275 | /*------------------------------------------- STM32F42xxx/STM32F43xxx------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 276 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 277 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ |
| bogdanm | 0:9b334a45a8ff | 278 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ |
| bogdanm | 0:9b334a45a8ff | 279 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 280 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 281 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 282 | #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 283 | #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 284 | #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 285 | #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_8WS /*!< FLASH Eight Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 286 | #define FLASH_LATENCY_9 FLASH_ACR_LATENCY_9WS /*!< FLASH Nine Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 287 | #define FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH Ten Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 288 | #define FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH Eleven Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 289 | #define FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH Twelve Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 290 | #define FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH Thirteen Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 291 | #define FLASH_LATENCY_14 FLASH_ACR_LATENCY_14WS /*!< FLASH Fourteen Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 292 | #define FLASH_LATENCY_15 FLASH_ACR_LATENCY_15WS /*!< FLASH Fifteen Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 293 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 294 | /*--------------------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 295 | |
| bogdanm | 0:9b334a45a8ff | 296 | /*-------------------------- STM32F40xxx/STM32F41xxx/STM32F401xx/STM32F411xx -----------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 297 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
| bogdanm | 0:9b334a45a8ff | 298 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 299 | |
| bogdanm | 0:9b334a45a8ff | 300 | #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */ |
| bogdanm | 0:9b334a45a8ff | 301 | #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */ |
| bogdanm | 0:9b334a45a8ff | 302 | #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 303 | #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 304 | #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 305 | #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 306 | #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 307 | #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */ |
| bogdanm | 0:9b334a45a8ff | 308 | #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 309 | /*--------------------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 310 | |
| bogdanm | 0:9b334a45a8ff | 311 | /** |
| bogdanm | 0:9b334a45a8ff | 312 | * @} |
| bogdanm | 0:9b334a45a8ff | 313 | */ |
| bogdanm | 0:9b334a45a8ff | 314 | |
| bogdanm | 0:9b334a45a8ff | 315 | |
| bogdanm | 0:9b334a45a8ff | 316 | /** @defgroup FLASHEx_Banks FLASH Banks |
| bogdanm | 0:9b334a45a8ff | 317 | * @{ |
| bogdanm | 0:9b334a45a8ff | 318 | */ |
| bogdanm | 0:9b334a45a8ff | 319 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 320 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| bogdanm | 0:9b334a45a8ff | 321 | #define FLASH_BANK_2 ((uint32_t)2) /*!< Bank 2 */ |
| bogdanm | 0:9b334a45a8ff | 322 | #define FLASH_BANK_BOTH ((uint32_t)FLASH_BANK_1 | FLASH_BANK_2) /*!< Bank1 and Bank2 */ |
| bogdanm | 0:9b334a45a8ff | 323 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 324 | |
| bogdanm | 0:9b334a45a8ff | 325 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
| bogdanm | 0:9b334a45a8ff | 326 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 327 | #define FLASH_BANK_1 ((uint32_t)1) /*!< Bank 1 */ |
| bogdanm | 0:9b334a45a8ff | 328 | #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 329 | /** |
| bogdanm | 0:9b334a45a8ff | 330 | * @} |
| bogdanm | 0:9b334a45a8ff | 331 | */ |
| bogdanm | 0:9b334a45a8ff | 332 | |
| bogdanm | 0:9b334a45a8ff | 333 | /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit |
| bogdanm | 0:9b334a45a8ff | 334 | * @{ |
| bogdanm | 0:9b334a45a8ff | 335 | */ |
| bogdanm | 0:9b334a45a8ff | 336 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 337 | #define FLASH_MER_BIT (FLASH_CR_MER1 | FLASH_CR_MER2) /*!< 2 MER bits here to clear */ |
| bogdanm | 0:9b334a45a8ff | 338 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 339 | |
| bogdanm | 0:9b334a45a8ff | 340 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
| bogdanm | 0:9b334a45a8ff | 341 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 342 | #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */ |
| bogdanm | 0:9b334a45a8ff | 343 | #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 344 | /** |
| bogdanm | 0:9b334a45a8ff | 345 | * @} |
| bogdanm | 0:9b334a45a8ff | 346 | */ |
| bogdanm | 0:9b334a45a8ff | 347 | |
| bogdanm | 0:9b334a45a8ff | 348 | /** @defgroup FLASHEx_Sectors FLASH Sectors |
| bogdanm | 0:9b334a45a8ff | 349 | * @{ |
| bogdanm | 0:9b334a45a8ff | 350 | */ |
| bogdanm | 0:9b334a45a8ff | 351 | /*------------------------------------------ STM32F42xxx/STM32F43xxx--------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 352 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 353 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| bogdanm | 0:9b334a45a8ff | 354 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| bogdanm | 0:9b334a45a8ff | 355 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| bogdanm | 0:9b334a45a8ff | 356 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| bogdanm | 0:9b334a45a8ff | 357 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| bogdanm | 0:9b334a45a8ff | 358 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| bogdanm | 0:9b334a45a8ff | 359 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| bogdanm | 0:9b334a45a8ff | 360 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| bogdanm | 0:9b334a45a8ff | 361 | #define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */ |
| bogdanm | 0:9b334a45a8ff | 362 | #define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */ |
| bogdanm | 0:9b334a45a8ff | 363 | #define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */ |
| bogdanm | 0:9b334a45a8ff | 364 | #define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */ |
| bogdanm | 0:9b334a45a8ff | 365 | #define FLASH_SECTOR_12 ((uint32_t)12) /*!< Sector Number 12 */ |
| bogdanm | 0:9b334a45a8ff | 366 | #define FLASH_SECTOR_13 ((uint32_t)13) /*!< Sector Number 13 */ |
| bogdanm | 0:9b334a45a8ff | 367 | #define FLASH_SECTOR_14 ((uint32_t)14) /*!< Sector Number 14 */ |
| bogdanm | 0:9b334a45a8ff | 368 | #define FLASH_SECTOR_15 ((uint32_t)15) /*!< Sector Number 15 */ |
| bogdanm | 0:9b334a45a8ff | 369 | #define FLASH_SECTOR_16 ((uint32_t)16) /*!< Sector Number 16 */ |
| bogdanm | 0:9b334a45a8ff | 370 | #define FLASH_SECTOR_17 ((uint32_t)17) /*!< Sector Number 17 */ |
| bogdanm | 0:9b334a45a8ff | 371 | #define FLASH_SECTOR_18 ((uint32_t)18) /*!< Sector Number 18 */ |
| bogdanm | 0:9b334a45a8ff | 372 | #define FLASH_SECTOR_19 ((uint32_t)19) /*!< Sector Number 19 */ |
| bogdanm | 0:9b334a45a8ff | 373 | #define FLASH_SECTOR_20 ((uint32_t)20) /*!< Sector Number 20 */ |
| bogdanm | 0:9b334a45a8ff | 374 | #define FLASH_SECTOR_21 ((uint32_t)21) /*!< Sector Number 21 */ |
| bogdanm | 0:9b334a45a8ff | 375 | #define FLASH_SECTOR_22 ((uint32_t)22) /*!< Sector Number 22 */ |
| bogdanm | 0:9b334a45a8ff | 376 | #define FLASH_SECTOR_23 ((uint32_t)23) /*!< Sector Number 23 */ |
| bogdanm | 0:9b334a45a8ff | 377 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 378 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 379 | |
| bogdanm | 0:9b334a45a8ff | 380 | /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 381 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| bogdanm | 0:9b334a45a8ff | 382 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| bogdanm | 0:9b334a45a8ff | 383 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| bogdanm | 0:9b334a45a8ff | 384 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| bogdanm | 0:9b334a45a8ff | 385 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| bogdanm | 0:9b334a45a8ff | 386 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| bogdanm | 0:9b334a45a8ff | 387 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| bogdanm | 0:9b334a45a8ff | 388 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| bogdanm | 0:9b334a45a8ff | 389 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| bogdanm | 0:9b334a45a8ff | 390 | #define FLASH_SECTOR_8 ((uint32_t)8) /*!< Sector Number 8 */ |
| bogdanm | 0:9b334a45a8ff | 391 | #define FLASH_SECTOR_9 ((uint32_t)9) /*!< Sector Number 9 */ |
| bogdanm | 0:9b334a45a8ff | 392 | #define FLASH_SECTOR_10 ((uint32_t)10) /*!< Sector Number 10 */ |
| bogdanm | 0:9b334a45a8ff | 393 | #define FLASH_SECTOR_11 ((uint32_t)11) /*!< Sector Number 11 */ |
| bogdanm | 0:9b334a45a8ff | 394 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| bogdanm | 0:9b334a45a8ff | 395 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 396 | |
| bogdanm | 0:9b334a45a8ff | 397 | /*--------------------------------------------- STM32F401xC -------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 398 | #if defined(STM32F401xC) |
| bogdanm | 0:9b334a45a8ff | 399 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| bogdanm | 0:9b334a45a8ff | 400 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| bogdanm | 0:9b334a45a8ff | 401 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| bogdanm | 0:9b334a45a8ff | 402 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| bogdanm | 0:9b334a45a8ff | 403 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| bogdanm | 0:9b334a45a8ff | 404 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| bogdanm | 0:9b334a45a8ff | 405 | #endif /* STM32F401xC */ |
| bogdanm | 0:9b334a45a8ff | 406 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 407 | |
| bogdanm | 0:9b334a45a8ff | 408 | /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 409 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 410 | #define FLASH_SECTOR_0 ((uint32_t)0) /*!< Sector Number 0 */ |
| bogdanm | 0:9b334a45a8ff | 411 | #define FLASH_SECTOR_1 ((uint32_t)1) /*!< Sector Number 1 */ |
| bogdanm | 0:9b334a45a8ff | 412 | #define FLASH_SECTOR_2 ((uint32_t)2) /*!< Sector Number 2 */ |
| bogdanm | 0:9b334a45a8ff | 413 | #define FLASH_SECTOR_3 ((uint32_t)3) /*!< Sector Number 3 */ |
| bogdanm | 0:9b334a45a8ff | 414 | #define FLASH_SECTOR_4 ((uint32_t)4) /*!< Sector Number 4 */ |
| bogdanm | 0:9b334a45a8ff | 415 | #define FLASH_SECTOR_5 ((uint32_t)5) /*!< Sector Number 5 */ |
| bogdanm | 0:9b334a45a8ff | 416 | #define FLASH_SECTOR_6 ((uint32_t)6) /*!< Sector Number 6 */ |
| bogdanm | 0:9b334a45a8ff | 417 | #define FLASH_SECTOR_7 ((uint32_t)7) /*!< Sector Number 7 */ |
| bogdanm | 0:9b334a45a8ff | 418 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 419 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 420 | |
| bogdanm | 0:9b334a45a8ff | 421 | /** |
| bogdanm | 0:9b334a45a8ff | 422 | * @} |
| bogdanm | 0:9b334a45a8ff | 423 | */ |
| bogdanm | 0:9b334a45a8ff | 424 | |
| bogdanm | 0:9b334a45a8ff | 425 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection |
| bogdanm | 0:9b334a45a8ff | 426 | * @{ |
| bogdanm | 0:9b334a45a8ff | 427 | */ |
| bogdanm | 0:9b334a45a8ff | 428 | /*----------------------------------------- STM32F42xxx/STM32F43xxx-------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 429 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 430 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 431 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 432 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 433 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 434 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 435 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 436 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| bogdanm | 0:9b334a45a8ff | 437 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| bogdanm | 0:9b334a45a8ff | 438 | #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ |
| bogdanm | 0:9b334a45a8ff | 439 | #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ |
| bogdanm | 0:9b334a45a8ff | 440 | #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ |
| bogdanm | 0:9b334a45a8ff | 441 | #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ |
| bogdanm | 0:9b334a45a8ff | 442 | #define OB_WRP_SECTOR_12 ((uint32_t)0x00000001 << 12) /*!< Write protection of Sector12 */ |
| bogdanm | 0:9b334a45a8ff | 443 | #define OB_WRP_SECTOR_13 ((uint32_t)0x00000002 << 12) /*!< Write protection of Sector13 */ |
| bogdanm | 0:9b334a45a8ff | 444 | #define OB_WRP_SECTOR_14 ((uint32_t)0x00000004 << 12) /*!< Write protection of Sector14 */ |
| bogdanm | 0:9b334a45a8ff | 445 | #define OB_WRP_SECTOR_15 ((uint32_t)0x00000008 << 12) /*!< Write protection of Sector15 */ |
| bogdanm | 0:9b334a45a8ff | 446 | #define OB_WRP_SECTOR_16 ((uint32_t)0x00000010 << 12) /*!< Write protection of Sector16 */ |
| bogdanm | 0:9b334a45a8ff | 447 | #define OB_WRP_SECTOR_17 ((uint32_t)0x00000020 << 12) /*!< Write protection of Sector17 */ |
| bogdanm | 0:9b334a45a8ff | 448 | #define OB_WRP_SECTOR_18 ((uint32_t)0x00000040 << 12) /*!< Write protection of Sector18 */ |
| bogdanm | 0:9b334a45a8ff | 449 | #define OB_WRP_SECTOR_19 ((uint32_t)0x00000080 << 12) /*!< Write protection of Sector19 */ |
| bogdanm | 0:9b334a45a8ff | 450 | #define OB_WRP_SECTOR_20 ((uint32_t)0x00000100 << 12) /*!< Write protection of Sector20 */ |
| bogdanm | 0:9b334a45a8ff | 451 | #define OB_WRP_SECTOR_21 ((uint32_t)0x00000200 << 12) /*!< Write protection of Sector21 */ |
| bogdanm | 0:9b334a45a8ff | 452 | #define OB_WRP_SECTOR_22 ((uint32_t)0x00000400 << 12) /*!< Write protection of Sector22 */ |
| bogdanm | 0:9b334a45a8ff | 453 | #define OB_WRP_SECTOR_23 ((uint32_t)0x00000800 << 12) /*!< Write protection of Sector23 */ |
| bogdanm | 0:9b334a45a8ff | 454 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF << 12) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 455 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 456 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 457 | |
| bogdanm | 0:9b334a45a8ff | 458 | /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 459 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| bogdanm | 0:9b334a45a8ff | 460 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 461 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 462 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 463 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 464 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 465 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 466 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| bogdanm | 0:9b334a45a8ff | 467 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| bogdanm | 0:9b334a45a8ff | 468 | #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */ |
| bogdanm | 0:9b334a45a8ff | 469 | #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */ |
| bogdanm | 0:9b334a45a8ff | 470 | #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */ |
| bogdanm | 0:9b334a45a8ff | 471 | #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */ |
| bogdanm | 0:9b334a45a8ff | 472 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 473 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| bogdanm | 0:9b334a45a8ff | 474 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 475 | |
| bogdanm | 0:9b334a45a8ff | 476 | /*--------------------------------------------- STM32F401xC -------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 477 | #if defined(STM32F401xC) |
| bogdanm | 0:9b334a45a8ff | 478 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 479 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 480 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 481 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 482 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 483 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 484 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 485 | #endif /* STM32F401xC */ |
| bogdanm | 0:9b334a45a8ff | 486 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 487 | |
| bogdanm | 0:9b334a45a8ff | 488 | /*---------------------------------- STM32F401xE/STM32F411xE/STM32F446xx ------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 489 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 490 | #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 491 | #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 492 | #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 493 | #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 494 | #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 495 | #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 496 | #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */ |
| bogdanm | 0:9b334a45a8ff | 497 | #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */ |
| bogdanm | 0:9b334a45a8ff | 498 | #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 499 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 500 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 501 | /** |
| bogdanm | 0:9b334a45a8ff | 502 | * @} |
| bogdanm | 0:9b334a45a8ff | 503 | */ |
| bogdanm | 0:9b334a45a8ff | 504 | |
| bogdanm | 0:9b334a45a8ff | 505 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC ReadWrite Protection |
| bogdanm | 0:9b334a45a8ff | 506 | * @{ |
| bogdanm | 0:9b334a45a8ff | 507 | */ |
| bogdanm | 0:9b334a45a8ff | 508 | /*----------------------------------------- STM32F42xxx/STM32F43xxx-------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 509 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 510 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 511 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 512 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 513 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 514 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 515 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 516 | #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ |
| bogdanm | 0:9b334a45a8ff | 517 | #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ |
| bogdanm | 0:9b334a45a8ff | 518 | #define OB_PCROP_SECTOR_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */ |
| bogdanm | 0:9b334a45a8ff | 519 | #define OB_PCROP_SECTOR_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */ |
| bogdanm | 0:9b334a45a8ff | 520 | #define OB_PCROP_SECTOR_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */ |
| bogdanm | 0:9b334a45a8ff | 521 | #define OB_PCROP_SECTOR_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */ |
| bogdanm | 0:9b334a45a8ff | 522 | #define OB_PCROP_SECTOR_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */ |
| bogdanm | 0:9b334a45a8ff | 523 | #define OB_PCROP_SECTOR_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */ |
| bogdanm | 0:9b334a45a8ff | 524 | #define OB_PCROP_SECTOR_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */ |
| bogdanm | 0:9b334a45a8ff | 525 | #define OB_PCROP_SECTOR_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */ |
| bogdanm | 0:9b334a45a8ff | 526 | #define OB_PCROP_SECTOR_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */ |
| bogdanm | 0:9b334a45a8ff | 527 | #define OB_PCROP_SECTOR_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */ |
| bogdanm | 0:9b334a45a8ff | 528 | #define OB_PCROP_SECTOR_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */ |
| bogdanm | 0:9b334a45a8ff | 529 | #define OB_PCROP_SECTOR_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */ |
| bogdanm | 0:9b334a45a8ff | 530 | #define OB_PCROP_SECTOR_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */ |
| bogdanm | 0:9b334a45a8ff | 531 | #define OB_PCROP_SECTOR_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */ |
| bogdanm | 0:9b334a45a8ff | 532 | #define OB_PCROP_SECTOR_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */ |
| bogdanm | 0:9b334a45a8ff | 533 | #define OB_PCROP_SECTOR_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */ |
| bogdanm | 0:9b334a45a8ff | 534 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 535 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 536 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 537 | |
| bogdanm | 0:9b334a45a8ff | 538 | /*--------------------------------------------- STM32F401xC -------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 539 | #if defined(STM32F401xC) |
| bogdanm | 0:9b334a45a8ff | 540 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 541 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 542 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 543 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 544 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 545 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 546 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 547 | #endif /* STM32F401xC */ |
| bogdanm | 0:9b334a45a8ff | 548 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 549 | |
| bogdanm | 0:9b334a45a8ff | 550 | /*------------------------------ STM32F401xE/STM32F411xE/STM32F446xx ----------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 551 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 552 | #define OB_PCROP_SECTOR_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */ |
| bogdanm | 0:9b334a45a8ff | 553 | #define OB_PCROP_SECTOR_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */ |
| bogdanm | 0:9b334a45a8ff | 554 | #define OB_PCROP_SECTOR_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */ |
| bogdanm | 0:9b334a45a8ff | 555 | #define OB_PCROP_SECTOR_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */ |
| bogdanm | 0:9b334a45a8ff | 556 | #define OB_PCROP_SECTOR_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */ |
| bogdanm | 0:9b334a45a8ff | 557 | #define OB_PCROP_SECTOR_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */ |
| bogdanm | 0:9b334a45a8ff | 558 | #define OB_PCROP_SECTOR_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */ |
| bogdanm | 0:9b334a45a8ff | 559 | #define OB_PCROP_SECTOR_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */ |
| bogdanm | 0:9b334a45a8ff | 560 | #define OB_PCROP_SECTOR_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */ |
| bogdanm | 0:9b334a45a8ff | 561 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 562 | /*-----------------------------------------------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 563 | |
| bogdanm | 0:9b334a45a8ff | 564 | /** |
| bogdanm | 0:9b334a45a8ff | 565 | * @} |
| bogdanm | 0:9b334a45a8ff | 566 | */ |
| bogdanm | 0:9b334a45a8ff | 567 | |
| bogdanm | 0:9b334a45a8ff | 568 | /** @defgroup FLASHEx_Dual_Boot FLASH Dual Boot |
| bogdanm | 0:9b334a45a8ff | 569 | * @{ |
| bogdanm | 0:9b334a45a8ff | 570 | */ |
| bogdanm | 0:9b334a45a8ff | 571 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 572 | #define OB_DUAL_BOOT_ENABLE ((uint8_t)0x10) /*!< Dual Bank Boot Enable */ |
| bogdanm | 0:9b334a45a8ff | 573 | #define OB_DUAL_BOOT_DISABLE ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */ |
| bogdanm | 0:9b334a45a8ff | 574 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 575 | /** |
| bogdanm | 0:9b334a45a8ff | 576 | * @} |
| bogdanm | 0:9b334a45a8ff | 577 | */ |
| bogdanm | 0:9b334a45a8ff | 578 | |
| bogdanm | 0:9b334a45a8ff | 579 | /** @defgroup FLASHEx_Selection_Protection_Mode FLASH Selection Protection Mode |
| bogdanm | 0:9b334a45a8ff | 580 | * @{ |
| bogdanm | 0:9b334a45a8ff | 581 | */ |
| bogdanm | 0:9b334a45a8ff | 582 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| bogdanm | 0:9b334a45a8ff | 583 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 584 | #define OB_PCROP_DESELECTED ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */ |
| bogdanm | 0:9b334a45a8ff | 585 | #define OB_PCROP_SELECTED ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */ |
| bogdanm | 0:9b334a45a8ff | 586 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 587 | /** |
| bogdanm | 0:9b334a45a8ff | 588 | * @} |
| bogdanm | 0:9b334a45a8ff | 589 | */ |
| bogdanm | 0:9b334a45a8ff | 590 | |
| bogdanm | 0:9b334a45a8ff | 591 | /** |
| bogdanm | 0:9b334a45a8ff | 592 | * @} |
| bogdanm | 0:9b334a45a8ff | 593 | */ |
| bogdanm | 0:9b334a45a8ff | 594 | |
| bogdanm | 0:9b334a45a8ff | 595 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 596 | |
| bogdanm | 0:9b334a45a8ff | 597 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 598 | /** @addtogroup FLASHEx_Exported_Functions |
| bogdanm | 0:9b334a45a8ff | 599 | * @{ |
| bogdanm | 0:9b334a45a8ff | 600 | */ |
| bogdanm | 0:9b334a45a8ff | 601 | |
| bogdanm | 0:9b334a45a8ff | 602 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
| bogdanm | 0:9b334a45a8ff | 603 | * @{ |
| bogdanm | 0:9b334a45a8ff | 604 | */ |
| bogdanm | 0:9b334a45a8ff | 605 | /* Extension Program operation functions *************************************/ |
| bogdanm | 0:9b334a45a8ff | 606 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError); |
| bogdanm | 0:9b334a45a8ff | 607 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| bogdanm | 0:9b334a45a8ff | 608 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| bogdanm | 0:9b334a45a8ff | 609 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| bogdanm | 0:9b334a45a8ff | 610 | |
| bogdanm | 0:9b334a45a8ff | 611 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| bogdanm | 0:9b334a45a8ff | 612 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 613 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
| bogdanm | 0:9b334a45a8ff | 614 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
| bogdanm | 0:9b334a45a8ff | 615 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); |
| bogdanm | 0:9b334a45a8ff | 616 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); |
| bogdanm | 0:9b334a45a8ff | 617 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 618 | |
| bogdanm | 0:9b334a45a8ff | 619 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 620 | uint16_t HAL_FLASHEx_OB_GetBank2WRP(void); |
| bogdanm | 0:9b334a45a8ff | 621 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 622 | /** |
| bogdanm | 0:9b334a45a8ff | 623 | * @} |
| bogdanm | 0:9b334a45a8ff | 624 | */ |
| bogdanm | 0:9b334a45a8ff | 625 | |
| bogdanm | 0:9b334a45a8ff | 626 | /** |
| bogdanm | 0:9b334a45a8ff | 627 | * @} |
| bogdanm | 0:9b334a45a8ff | 628 | */ |
| bogdanm | 0:9b334a45a8ff | 629 | /* Private types -------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 630 | /* Private variables ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 631 | /* Private constants ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 632 | /** @defgroup FLASHEx_Private_Constants FLASH Private Constants |
| bogdanm | 0:9b334a45a8ff | 633 | * @{ |
| bogdanm | 0:9b334a45a8ff | 634 | */ |
| bogdanm | 0:9b334a45a8ff | 635 | /*--------------------------------------- STM32F42xxx/STM32F43xxx--------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 636 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 637 | #define FLASH_SECTOR_TOTAL 24 |
| bogdanm | 0:9b334a45a8ff | 638 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 639 | |
| bogdanm | 0:9b334a45a8ff | 640 | /*--------------------------------------- STM32F40xxx/STM32F41xxx -------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 641 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| bogdanm | 0:9b334a45a8ff | 642 | #define FLASH_SECTOR_TOTAL 12 |
| bogdanm | 0:9b334a45a8ff | 643 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| bogdanm | 0:9b334a45a8ff | 644 | |
| bogdanm | 0:9b334a45a8ff | 645 | /*--------------------------------------------- STM32F401xC -------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 646 | #if defined(STM32F401xC) |
| bogdanm | 0:9b334a45a8ff | 647 | #define FLASH_SECTOR_TOTAL 6 |
| bogdanm | 0:9b334a45a8ff | 648 | #endif /* STM32F401xC */ |
| bogdanm | 0:9b334a45a8ff | 649 | |
| bogdanm | 0:9b334a45a8ff | 650 | /*--------------------------------- STM32F401xE/STM32F411xE/STM32F446xx -------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 651 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 652 | #define FLASH_SECTOR_TOTAL 8 |
| bogdanm | 0:9b334a45a8ff | 653 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 654 | |
| bogdanm | 0:9b334a45a8ff | 655 | /** |
| bogdanm | 0:9b334a45a8ff | 656 | * @brief OPTCR1 register byte 2 (Bits[23:16]) base address |
| bogdanm | 0:9b334a45a8ff | 657 | */ |
| bogdanm | 0:9b334a45a8ff | 658 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 659 | #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A) |
| bogdanm | 0:9b334a45a8ff | 660 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 661 | |
| bogdanm | 0:9b334a45a8ff | 662 | /** |
| bogdanm | 0:9b334a45a8ff | 663 | * @} |
| bogdanm | 0:9b334a45a8ff | 664 | */ |
| bogdanm | 0:9b334a45a8ff | 665 | |
| bogdanm | 0:9b334a45a8ff | 666 | /* Private macros ------------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 667 | /** @defgroup FLASHEx_Private_Macros FLASH Private Macros |
| bogdanm | 0:9b334a45a8ff | 668 | * @{ |
| bogdanm | 0:9b334a45a8ff | 669 | */ |
| bogdanm | 0:9b334a45a8ff | 670 | |
| bogdanm | 0:9b334a45a8ff | 671 | /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters |
| bogdanm | 0:9b334a45a8ff | 672 | * @{ |
| bogdanm | 0:9b334a45a8ff | 673 | */ |
| bogdanm | 0:9b334a45a8ff | 674 | |
| bogdanm | 0:9b334a45a8ff | 675 | #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \ |
| bogdanm | 0:9b334a45a8ff | 676 | ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
| bogdanm | 0:9b334a45a8ff | 677 | |
| bogdanm | 0:9b334a45a8ff | 678 | #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \ |
| bogdanm | 0:9b334a45a8ff | 679 | ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \ |
| bogdanm | 0:9b334a45a8ff | 680 | ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \ |
| bogdanm | 0:9b334a45a8ff | 681 | ((RANGE) == FLASH_VOLTAGE_RANGE_4)) |
| bogdanm | 0:9b334a45a8ff | 682 | |
| bogdanm | 0:9b334a45a8ff | 683 | #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 684 | ((VALUE) == OB_WRPSTATE_ENABLE)) |
| bogdanm | 0:9b334a45a8ff | 685 | |
| bogdanm | 0:9b334a45a8ff | 686 | #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) |
| bogdanm | 0:9b334a45a8ff | 687 | |
| bogdanm | 0:9b334a45a8ff | 688 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ |
| bogdanm | 0:9b334a45a8ff | 689 | ((LEVEL) == OB_RDP_LEVEL_1) ||\ |
| bogdanm | 0:9b334a45a8ff | 690 | ((LEVEL) == OB_RDP_LEVEL_2)) |
| bogdanm | 0:9b334a45a8ff | 691 | |
| bogdanm | 0:9b334a45a8ff | 692 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| bogdanm | 0:9b334a45a8ff | 693 | |
| bogdanm | 0:9b334a45a8ff | 694 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
| bogdanm | 0:9b334a45a8ff | 695 | |
| bogdanm | 0:9b334a45a8ff | 696 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
| bogdanm | 0:9b334a45a8ff | 697 | |
| bogdanm | 0:9b334a45a8ff | 698 | #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\ |
| bogdanm | 0:9b334a45a8ff | 699 | ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF)) |
| bogdanm | 0:9b334a45a8ff | 700 | |
| bogdanm | 0:9b334a45a8ff | 701 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| bogdanm | 0:9b334a45a8ff | 702 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 703 | #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \ |
| bogdanm | 0:9b334a45a8ff | 704 | ((VALUE) == OB_PCROP_STATE_ENABLE)) |
| bogdanm | 0:9b334a45a8ff | 705 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 706 | |
| bogdanm | 0:9b334a45a8ff | 707 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 708 | #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP) || \ |
| bogdanm | 0:9b334a45a8ff | 709 | ((VALUE) == OPTIONBYTE_BOOTCONFIG)) |
| bogdanm | 0:9b334a45a8ff | 710 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 711 | |
| bogdanm | 0:9b334a45a8ff | 712 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 713 | #define IS_OBEX(VALUE)(((VALUE) == OPTIONBYTE_PCROP)) |
| bogdanm | 0:9b334a45a8ff | 714 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 715 | |
| bogdanm | 0:9b334a45a8ff | 716 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 717 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
| bogdanm | 0:9b334a45a8ff | 718 | ((LATENCY) == FLASH_LATENCY_1) || \ |
| bogdanm | 0:9b334a45a8ff | 719 | ((LATENCY) == FLASH_LATENCY_2) || \ |
| bogdanm | 0:9b334a45a8ff | 720 | ((LATENCY) == FLASH_LATENCY_3) || \ |
| bogdanm | 0:9b334a45a8ff | 721 | ((LATENCY) == FLASH_LATENCY_4) || \ |
| bogdanm | 0:9b334a45a8ff | 722 | ((LATENCY) == FLASH_LATENCY_5) || \ |
| bogdanm | 0:9b334a45a8ff | 723 | ((LATENCY) == FLASH_LATENCY_6) || \ |
| bogdanm | 0:9b334a45a8ff | 724 | ((LATENCY) == FLASH_LATENCY_7) || \ |
| bogdanm | 0:9b334a45a8ff | 725 | ((LATENCY) == FLASH_LATENCY_8) || \ |
| bogdanm | 0:9b334a45a8ff | 726 | ((LATENCY) == FLASH_LATENCY_9) || \ |
| bogdanm | 0:9b334a45a8ff | 727 | ((LATENCY) == FLASH_LATENCY_10) || \ |
| bogdanm | 0:9b334a45a8ff | 728 | ((LATENCY) == FLASH_LATENCY_11) || \ |
| bogdanm | 0:9b334a45a8ff | 729 | ((LATENCY) == FLASH_LATENCY_12) || \ |
| bogdanm | 0:9b334a45a8ff | 730 | ((LATENCY) == FLASH_LATENCY_13) || \ |
| bogdanm | 0:9b334a45a8ff | 731 | ((LATENCY) == FLASH_LATENCY_14) || \ |
| bogdanm | 0:9b334a45a8ff | 732 | ((LATENCY) == FLASH_LATENCY_15)) |
| bogdanm | 0:9b334a45a8ff | 733 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 734 | |
| bogdanm | 0:9b334a45a8ff | 735 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
| bogdanm | 0:9b334a45a8ff | 736 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 737 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \ |
| bogdanm | 0:9b334a45a8ff | 738 | ((LATENCY) == FLASH_LATENCY_1) || \ |
| bogdanm | 0:9b334a45a8ff | 739 | ((LATENCY) == FLASH_LATENCY_2) || \ |
| bogdanm | 0:9b334a45a8ff | 740 | ((LATENCY) == FLASH_LATENCY_3) || \ |
| bogdanm | 0:9b334a45a8ff | 741 | ((LATENCY) == FLASH_LATENCY_4) || \ |
| bogdanm | 0:9b334a45a8ff | 742 | ((LATENCY) == FLASH_LATENCY_5) || \ |
| bogdanm | 0:9b334a45a8ff | 743 | ((LATENCY) == FLASH_LATENCY_6) || \ |
| bogdanm | 0:9b334a45a8ff | 744 | ((LATENCY) == FLASH_LATENCY_7)) |
| bogdanm | 0:9b334a45a8ff | 745 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 746 | |
| bogdanm | 0:9b334a45a8ff | 747 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 748 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
| bogdanm | 0:9b334a45a8ff | 749 | ((BANK) == FLASH_BANK_2) || \ |
| bogdanm | 0:9b334a45a8ff | 750 | ((BANK) == FLASH_BANK_BOTH)) |
| bogdanm | 0:9b334a45a8ff | 751 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 752 | |
| bogdanm | 0:9b334a45a8ff | 753 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
| bogdanm | 0:9b334a45a8ff | 754 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 755 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1)) |
| bogdanm | 0:9b334a45a8ff | 756 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 757 | |
| bogdanm | 0:9b334a45a8ff | 758 | |
| bogdanm | 0:9b334a45a8ff | 759 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 760 | #define IS_FLASH_SECTOR(SECTOR) ( ((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| bogdanm | 0:9b334a45a8ff | 761 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| bogdanm | 0:9b334a45a8ff | 762 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| bogdanm | 0:9b334a45a8ff | 763 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ |
| bogdanm | 0:9b334a45a8ff | 764 | ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ |
| bogdanm | 0:9b334a45a8ff | 765 | ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11) ||\ |
| bogdanm | 0:9b334a45a8ff | 766 | ((SECTOR) == FLASH_SECTOR_12) || ((SECTOR) == FLASH_SECTOR_13) ||\ |
| bogdanm | 0:9b334a45a8ff | 767 | ((SECTOR) == FLASH_SECTOR_14) || ((SECTOR) == FLASH_SECTOR_15) ||\ |
| bogdanm | 0:9b334a45a8ff | 768 | ((SECTOR) == FLASH_SECTOR_16) || ((SECTOR) == FLASH_SECTOR_17) ||\ |
| bogdanm | 0:9b334a45a8ff | 769 | ((SECTOR) == FLASH_SECTOR_18) || ((SECTOR) == FLASH_SECTOR_19) ||\ |
| bogdanm | 0:9b334a45a8ff | 770 | ((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\ |
| bogdanm | 0:9b334a45a8ff | 771 | ((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23)) |
| bogdanm | 0:9b334a45a8ff | 772 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 773 | |
| bogdanm | 0:9b334a45a8ff | 774 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| bogdanm | 0:9b334a45a8ff | 775 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| bogdanm | 0:9b334a45a8ff | 776 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| bogdanm | 0:9b334a45a8ff | 777 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| bogdanm | 0:9b334a45a8ff | 778 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\ |
| bogdanm | 0:9b334a45a8ff | 779 | ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\ |
| bogdanm | 0:9b334a45a8ff | 780 | ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11)) |
| bogdanm | 0:9b334a45a8ff | 781 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| bogdanm | 0:9b334a45a8ff | 782 | |
| bogdanm | 0:9b334a45a8ff | 783 | #if defined(STM32F401xC) |
| bogdanm | 0:9b334a45a8ff | 784 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| bogdanm | 0:9b334a45a8ff | 785 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| bogdanm | 0:9b334a45a8ff | 786 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5)) |
| bogdanm | 0:9b334a45a8ff | 787 | #endif /* STM32F401xC */ |
| bogdanm | 0:9b334a45a8ff | 788 | |
| bogdanm | 0:9b334a45a8ff | 789 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 790 | #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\ |
| bogdanm | 0:9b334a45a8ff | 791 | ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\ |
| bogdanm | 0:9b334a45a8ff | 792 | ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\ |
| bogdanm | 0:9b334a45a8ff | 793 | ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7)) |
| bogdanm | 0:9b334a45a8ff | 794 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 795 | |
| bogdanm | 0:9b334a45a8ff | 796 | #define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END)) |
| bogdanm | 0:9b334a45a8ff | 797 | #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL)) |
| bogdanm | 0:9b334a45a8ff | 798 | |
| bogdanm | 0:9b334a45a8ff | 799 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 800 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFF000000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 801 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 802 | |
| bogdanm | 0:9b334a45a8ff | 803 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| bogdanm | 0:9b334a45a8ff | 804 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 805 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| bogdanm | 0:9b334a45a8ff | 806 | |
| bogdanm | 0:9b334a45a8ff | 807 | #if defined(STM32F401xC) |
| bogdanm | 0:9b334a45a8ff | 808 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 809 | #endif /* STM32F401xC */ |
| bogdanm | 0:9b334a45a8ff | 810 | |
| bogdanm | 0:9b334a45a8ff | 811 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 812 | #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 813 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 814 | |
| bogdanm | 0:9b334a45a8ff | 815 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 816 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 817 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 818 | |
| bogdanm | 0:9b334a45a8ff | 819 | #if defined(STM32F401xC) |
| bogdanm | 0:9b334a45a8ff | 820 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 821 | #endif /* STM32F401xC */ |
| bogdanm | 0:9b334a45a8ff | 822 | |
| bogdanm | 0:9b334a45a8ff | 823 | #if defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 824 | #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000)) |
| bogdanm | 0:9b334a45a8ff | 825 | #endif /* STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 826 | |
| bogdanm | 0:9b334a45a8ff | 827 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) |
| bogdanm | 0:9b334a45a8ff | 828 | #define IS_OB_BOOT(BOOT) (((BOOT) == OB_DUAL_BOOT_ENABLE) || ((BOOT) == OB_DUAL_BOOT_DISABLE)) |
| bogdanm | 0:9b334a45a8ff | 829 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */ |
| bogdanm | 0:9b334a45a8ff | 830 | |
| bogdanm | 0:9b334a45a8ff | 831 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
| bogdanm | 0:9b334a45a8ff | 832 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| bogdanm | 0:9b334a45a8ff | 833 | #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PCROP_SELECTED) || ((PCROP) == OB_PCROP_DESELECTED)) |
| bogdanm | 0:9b334a45a8ff | 834 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */ |
| bogdanm | 0:9b334a45a8ff | 835 | /** |
| bogdanm | 0:9b334a45a8ff | 836 | * @} |
| bogdanm | 0:9b334a45a8ff | 837 | */ |
| bogdanm | 0:9b334a45a8ff | 838 | |
| bogdanm | 0:9b334a45a8ff | 839 | /** |
| bogdanm | 0:9b334a45a8ff | 840 | * @} |
| bogdanm | 0:9b334a45a8ff | 841 | */ |
| bogdanm | 0:9b334a45a8ff | 842 | |
| bogdanm | 0:9b334a45a8ff | 843 | /* Private functions ---------------------------------------------------------*/ |
| bogdanm | 0:9b334a45a8ff | 844 | /** @defgroup FLASHEx_Private_Functions FLASH Private Functions |
| bogdanm | 0:9b334a45a8ff | 845 | * @{ |
| bogdanm | 0:9b334a45a8ff | 846 | */ |
| bogdanm | 0:9b334a45a8ff | 847 | void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange); |
| bogdanm | 0:9b334a45a8ff | 848 | /** |
| bogdanm | 0:9b334a45a8ff | 849 | * @} |
| bogdanm | 0:9b334a45a8ff | 850 | */ |
| bogdanm | 0:9b334a45a8ff | 851 | |
| bogdanm | 0:9b334a45a8ff | 852 | /** |
| bogdanm | 0:9b334a45a8ff | 853 | * @} |
| bogdanm | 0:9b334a45a8ff | 854 | */ |
| bogdanm | 0:9b334a45a8ff | 855 | |
| bogdanm | 0:9b334a45a8ff | 856 | /** |
| bogdanm | 0:9b334a45a8ff | 857 | * @} |
| bogdanm | 0:9b334a45a8ff | 858 | */ |
| bogdanm | 0:9b334a45a8ff | 859 | |
| bogdanm | 0:9b334a45a8ff | 860 | #ifdef __cplusplus |
| bogdanm | 0:9b334a45a8ff | 861 | } |
| bogdanm | 0:9b334a45a8ff | 862 | #endif |
| bogdanm | 0:9b334a45a8ff | 863 | |
| bogdanm | 0:9b334a45a8ff | 864 | #endif /* __STM32F4xx_HAL_FLASH_EX_H */ |
| bogdanm | 0:9b334a45a8ff | 865 | |
| bogdanm | 0:9b334a45a8ff | 866 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |