mbed-dev - fix LPC812 PWM

Users » nameless129 » Code » mbed-dev

fix LPC812 PWM

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)

Committer:: nameless129
Date:: Mon May 16 16:50:30 2016 +0000
Revision:: 129:2e517c56bcfb
Parent:: 19:112740acecfa

PWM Fix:Duty 0%??H???????????????

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f4xx_hal_flash_ex.c
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
mbed_official	19:112740acecfa	5	* @version V1.4.1
mbed_official	19:112740acecfa	6	* @date 09-October-2015
bogdanm	0:9b334a45a8ff	7	* @brief Extended FLASH HAL module driver.
bogdanm	0:9b334a45a8ff	8	* This file provides firmware functions to manage the following
bogdanm	0:9b334a45a8ff	9	* functionalities of the FLASH extension peripheral:
bogdanm	0:9b334a45a8ff	10	* + Extended programming operations functions
bogdanm	0:9b334a45a8ff	11	*
bogdanm	0:9b334a45a8ff	12	@verbatim
bogdanm	0:9b334a45a8ff	13	==============================================================================
bogdanm	0:9b334a45a8ff	14	##### Flash Extension features #####
bogdanm	0:9b334a45a8ff	15	==============================================================================
bogdanm	0:9b334a45a8ff	16
bogdanm	0:9b334a45a8ff	17	[..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
bogdanm	0:9b334a45a8ff	18	STM32F429xx/439xx devices contains the following additional features
bogdanm	0:9b334a45a8ff	19
bogdanm	0:9b334a45a8ff	20	(+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
bogdanm	0:9b334a45a8ff	21	capability (RWW)
bogdanm	0:9b334a45a8ff	22	(+) Dual bank memory organization
bogdanm	0:9b334a45a8ff	23	(+) PCROP protection for all banks
bogdanm	0:9b334a45a8ff	24
bogdanm	0:9b334a45a8ff	25	##### How to use this driver #####
bogdanm	0:9b334a45a8ff	26	==============================================================================
bogdanm	0:9b334a45a8ff	27	[..] This driver provides functions to configure and program the FLASH memory
mbed_official	19:112740acecfa	28	of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
mbed_official	19:112740acecfa	29	devices. It includes
bogdanm	0:9b334a45a8ff	30	(#) FLASH Memory Erase functions:
bogdanm	0:9b334a45a8ff	31	(++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
bogdanm	0:9b334a45a8ff	32	HAL_FLASH_Lock() functions
bogdanm	0:9b334a45a8ff	33	(++) Erase function: Erase sector, erase all sectors
bogdanm	0:9b334a45a8ff	34	(++) There are two modes of erase :
bogdanm	0:9b334a45a8ff	35	(+++) Polling Mode using HAL_FLASHEx_Erase()
bogdanm	0:9b334a45a8ff	36	(+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
bogdanm	0:9b334a45a8ff	37
bogdanm	0:9b334a45a8ff	38	(#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
bogdanm	0:9b334a45a8ff	39	(++) Set/Reset the write protection
bogdanm	0:9b334a45a8ff	40	(++) Set the Read protection Level
bogdanm	0:9b334a45a8ff	41	(++) Set the BOR level
bogdanm	0:9b334a45a8ff	42	(++) Program the user Option Bytes
bogdanm	0:9b334a45a8ff	43	(#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
bogdanm	0:9b334a45a8ff	44	(++) Extended space (bank 2) erase function
bogdanm	0:9b334a45a8ff	45	(++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
bogdanm	0:9b334a45a8ff	46	(++) Dual Boot activation
bogdanm	0:9b334a45a8ff	47	(++) Write protection configuration for bank 2
bogdanm	0:9b334a45a8ff	48	(++) PCROP protection configuration and control for both banks
bogdanm	0:9b334a45a8ff	49
bogdanm	0:9b334a45a8ff	50	@endverbatim
bogdanm	0:9b334a45a8ff	51	******************************************************************************
bogdanm	0:9b334a45a8ff	52	* @attention
bogdanm	0:9b334a45a8ff	53	*
bogdanm	0:9b334a45a8ff	54	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	55	*
bogdanm	0:9b334a45a8ff	56	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	57	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	58	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	59	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	60	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	61	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	62	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	63	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	64	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	65	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	66	*
bogdanm	0:9b334a45a8ff	67	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	68	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	69	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	70	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	71	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	72	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	73	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	74	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	75	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	76	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	77	*
bogdanm	0:9b334a45a8ff	78	******************************************************************************
bogdanm	0:9b334a45a8ff	79	*/
bogdanm	0:9b334a45a8ff	80
bogdanm	0:9b334a45a8ff	81	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	82	#include "stm32f4xx_hal.h"
bogdanm	0:9b334a45a8ff	83
bogdanm	0:9b334a45a8ff	84	/** @addtogroup STM32F4xx_HAL_Driver
bogdanm	0:9b334a45a8ff	85	* @{
bogdanm	0:9b334a45a8ff	86	*/
bogdanm	0:9b334a45a8ff	87
bogdanm	0:9b334a45a8ff	88	/** @defgroup FLASHEx FLASHEx
bogdanm	0:9b334a45a8ff	89	* @brief FLASH HAL Extension module driver
bogdanm	0:9b334a45a8ff	90	* @{
bogdanm	0:9b334a45a8ff	91	*/
bogdanm	0:9b334a45a8ff	92
bogdanm	0:9b334a45a8ff	93	#ifdef HAL_FLASH_MODULE_ENABLED
bogdanm	0:9b334a45a8ff	94
bogdanm	0:9b334a45a8ff	95	/* Private typedef -----------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	96	/* Private define ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	97	/** @addtogroup FLASHEx_Private_Constants
bogdanm	0:9b334a45a8ff	98	* @{
bogdanm	0:9b334a45a8ff	99	*/
bogdanm	0:9b334a45a8ff	100	#define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
bogdanm	0:9b334a45a8ff	101	/**
bogdanm	0:9b334a45a8ff	102	* @}
bogdanm	0:9b334a45a8ff	103	*/
bogdanm	0:9b334a45a8ff	104
bogdanm	0:9b334a45a8ff	105	/* Private macro -------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	106	/* Private variables ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	107	/** @addtogroup FLASHEx_Private_Variables
bogdanm	0:9b334a45a8ff	108	* @{
bogdanm	0:9b334a45a8ff	109	*/
bogdanm	0:9b334a45a8ff	110	extern FLASH_ProcessTypeDef pFlash;
bogdanm	0:9b334a45a8ff	111	/**
bogdanm	0:9b334a45a8ff	112	* @}
bogdanm	0:9b334a45a8ff	113	*/
bogdanm	0:9b334a45a8ff	114
bogdanm	0:9b334a45a8ff	115	/* Private function prototypes -----------------------------------------------*/
bogdanm	0:9b334a45a8ff	116	/** @addtogroup FLASHEx_Private_Functions
bogdanm	0:9b334a45a8ff	117	* @{
bogdanm	0:9b334a45a8ff	118	*/
bogdanm	0:9b334a45a8ff	119	/* Option bytes control */
bogdanm	0:9b334a45a8ff	120	static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
mbed_official	19:112740acecfa	121	void FLASH_FlushCaches(void);
bogdanm	0:9b334a45a8ff	122	static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
bogdanm	0:9b334a45a8ff	123	static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
bogdanm	0:9b334a45a8ff	124	static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
bogdanm	0:9b334a45a8ff	125	static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
bogdanm	0:9b334a45a8ff	126	static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
bogdanm	0:9b334a45a8ff	127	static uint8_t FLASH_OB_GetUser(void);
bogdanm	0:9b334a45a8ff	128	static uint16_t FLASH_OB_GetWRP(void);
bogdanm	0:9b334a45a8ff	129	static uint8_t FLASH_OB_GetRDP(void);
bogdanm	0:9b334a45a8ff	130	static uint8_t FLASH_OB_GetBOR(void);
bogdanm	0:9b334a45a8ff	131
mbed_official	19:112740acecfa	132	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\|\
mbed_official	19:112740acecfa	133	defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	134	static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
bogdanm	0:9b334a45a8ff	135	static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
mbed_official	19:112740acecfa	136	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	137
mbed_official	19:112740acecfa	138	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	139	static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
bogdanm	0:9b334a45a8ff	140	static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
mbed_official	19:112740acecfa	141	static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
mbed_official	19:112740acecfa	142	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	143
bogdanm	0:9b334a45a8ff	144	extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
bogdanm	0:9b334a45a8ff	145	/**
bogdanm	0:9b334a45a8ff	146	* @}
bogdanm	0:9b334a45a8ff	147	*/
bogdanm	0:9b334a45a8ff	148
bogdanm	0:9b334a45a8ff	149	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	150	/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
bogdanm	0:9b334a45a8ff	151	* @{
bogdanm	0:9b334a45a8ff	152	*/
bogdanm	0:9b334a45a8ff	153
bogdanm	0:9b334a45a8ff	154	/** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
bogdanm	0:9b334a45a8ff	155	* @brief Extended IO operation functions
bogdanm	0:9b334a45a8ff	156	*
bogdanm	0:9b334a45a8ff	157	@verbatim
bogdanm	0:9b334a45a8ff	158	===============================================================================
bogdanm	0:9b334a45a8ff	159	##### Extended programming operation functions #####
bogdanm	0:9b334a45a8ff	160	===============================================================================
bogdanm	0:9b334a45a8ff	161	[..]
bogdanm	0:9b334a45a8ff	162	This subsection provides a set of functions allowing to manage the Extension FLASH
mbed_official	19:112740acecfa	163	programming operations.
bogdanm	0:9b334a45a8ff	164
bogdanm	0:9b334a45a8ff	165	@endverbatim
bogdanm	0:9b334a45a8ff	166	* @{
bogdanm	0:9b334a45a8ff	167	*/
bogdanm	0:9b334a45a8ff	168	/**
bogdanm	0:9b334a45a8ff	169	* @brief Perform a mass erase or erase the specified FLASH memory sectors
bogdanm	0:9b334a45a8ff	170	* @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
bogdanm	0:9b334a45a8ff	171	* contains the configuration information for the erasing.
bogdanm	0:9b334a45a8ff	172	*
bogdanm	0:9b334a45a8ff	173	* @param[out] SectorError: pointer to variable that
bogdanm	0:9b334a45a8ff	174	* contains the configuration information on faulty sector in case of error
bogdanm	0:9b334a45a8ff	175	* (0xFFFFFFFF means that all the sectors have been correctly erased)
bogdanm	0:9b334a45a8ff	176	*
bogdanm	0:9b334a45a8ff	177	* @retval HAL Status
bogdanm	0:9b334a45a8ff	178	*/
bogdanm	0:9b334a45a8ff	179	HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef pEraseInit, uint32_t SectorError)
bogdanm	0:9b334a45a8ff	180	{
bogdanm	0:9b334a45a8ff	181	HAL_StatusTypeDef status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	182	uint32_t index = 0;
bogdanm	0:9b334a45a8ff	183
bogdanm	0:9b334a45a8ff	184	/* Process Locked */
bogdanm	0:9b334a45a8ff	185	__HAL_LOCK(&pFlash);
bogdanm	0:9b334a45a8ff	186
bogdanm	0:9b334a45a8ff	187	/* Check the parameters */
bogdanm	0:9b334a45a8ff	188	assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
bogdanm	0:9b334a45a8ff	189
bogdanm	0:9b334a45a8ff	190	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	191	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	192
bogdanm	0:9b334a45a8ff	193	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	194	{
bogdanm	0:9b334a45a8ff	195	/Initialization of SectorError variable/
bogdanm	0:9b334a45a8ff	196	*SectorError = 0xFFFFFFFF;
bogdanm	0:9b334a45a8ff	197
bogdanm	0:9b334a45a8ff	198	if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm	0:9b334a45a8ff	199	{
bogdanm	0:9b334a45a8ff	200	/Mass erase to be done/
bogdanm	0:9b334a45a8ff	201	FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
bogdanm	0:9b334a45a8ff	202
bogdanm	0:9b334a45a8ff	203	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	204	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	205
bogdanm	0:9b334a45a8ff	206	/* if the erase operation is completed, disable the MER Bit */
bogdanm	0:9b334a45a8ff	207	FLASH->CR &= (~FLASH_MER_BIT);
bogdanm	0:9b334a45a8ff	208	}
bogdanm	0:9b334a45a8ff	209	else
bogdanm	0:9b334a45a8ff	210	{
bogdanm	0:9b334a45a8ff	211	/* Check the parameters */
bogdanm	0:9b334a45a8ff	212	assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
bogdanm	0:9b334a45a8ff	213
bogdanm	0:9b334a45a8ff	214	/* Erase by sector by sector to be done*/
bogdanm	0:9b334a45a8ff	215	for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
bogdanm	0:9b334a45a8ff	216	{
bogdanm	0:9b334a45a8ff	217	FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
bogdanm	0:9b334a45a8ff	218
bogdanm	0:9b334a45a8ff	219	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	220	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	221
mbed_official	19:112740acecfa	222	/* If the erase operation is completed, disable the SER and SNB Bits */
mbed_official	19:112740acecfa	223	CLEAR_BIT(FLASH->CR, (FLASH_CR_SER \| FLASH_CR_SNB));
bogdanm	0:9b334a45a8ff	224
bogdanm	0:9b334a45a8ff	225	if(status != HAL_OK)
bogdanm	0:9b334a45a8ff	226	{
bogdanm	0:9b334a45a8ff	227	/* In case of error, stop erase procedure and return the faulty sector*/
bogdanm	0:9b334a45a8ff	228	*SectorError = index;
bogdanm	0:9b334a45a8ff	229	break;
bogdanm	0:9b334a45a8ff	230	}
bogdanm	0:9b334a45a8ff	231	}
bogdanm	0:9b334a45a8ff	232	}
mbed_official	19:112740acecfa	233	/* Flush the caches to be sure of the data consistency */
mbed_official	19:112740acecfa	234	FLASH_FlushCaches();
bogdanm	0:9b334a45a8ff	235	}
bogdanm	0:9b334a45a8ff	236
bogdanm	0:9b334a45a8ff	237	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	238	__HAL_UNLOCK(&pFlash);
bogdanm	0:9b334a45a8ff	239
bogdanm	0:9b334a45a8ff	240	return status;
bogdanm	0:9b334a45a8ff	241	}
bogdanm	0:9b334a45a8ff	242
bogdanm	0:9b334a45a8ff	243	/**
bogdanm	0:9b334a45a8ff	244	* @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
bogdanm	0:9b334a45a8ff	245	* @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
bogdanm	0:9b334a45a8ff	246	* contains the configuration information for the erasing.
bogdanm	0:9b334a45a8ff	247	*
bogdanm	0:9b334a45a8ff	248	* @retval HAL Status
bogdanm	0:9b334a45a8ff	249	*/
bogdanm	0:9b334a45a8ff	250	HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
bogdanm	0:9b334a45a8ff	251	{
bogdanm	0:9b334a45a8ff	252	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	253
bogdanm	0:9b334a45a8ff	254	/* Process Locked */
bogdanm	0:9b334a45a8ff	255	__HAL_LOCK(&pFlash);
bogdanm	0:9b334a45a8ff	256
bogdanm	0:9b334a45a8ff	257	/* Check the parameters */
bogdanm	0:9b334a45a8ff	258	assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
bogdanm	0:9b334a45a8ff	259
bogdanm	0:9b334a45a8ff	260	/* Enable End of FLASH Operation interrupt */
bogdanm	0:9b334a45a8ff	261	__HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
bogdanm	0:9b334a45a8ff	262
bogdanm	0:9b334a45a8ff	263	/* Enable Error source interrupt */
bogdanm	0:9b334a45a8ff	264	__HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
bogdanm	0:9b334a45a8ff	265
bogdanm	0:9b334a45a8ff	266	/* Clear pending flags (if any) */
bogdanm	0:9b334a45a8ff	267	__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP \| FLASH_FLAG_OPERR \| FLASH_FLAG_WRPERR \|\
bogdanm	0:9b334a45a8ff	268	FLASH_FLAG_PGAERR \| FLASH_FLAG_PGPERR\| FLASH_FLAG_PGSERR);
bogdanm	0:9b334a45a8ff	269
bogdanm	0:9b334a45a8ff	270	if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm	0:9b334a45a8ff	271	{
bogdanm	0:9b334a45a8ff	272	/Mass erase to be done/
bogdanm	0:9b334a45a8ff	273	pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
bogdanm	0:9b334a45a8ff	274	pFlash.Bank = pEraseInit->Banks;
bogdanm	0:9b334a45a8ff	275	FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
bogdanm	0:9b334a45a8ff	276	}
bogdanm	0:9b334a45a8ff	277	else
bogdanm	0:9b334a45a8ff	278	{
bogdanm	0:9b334a45a8ff	279	/* Erase by sector to be done*/
bogdanm	0:9b334a45a8ff	280
bogdanm	0:9b334a45a8ff	281	/* Check the parameters */
bogdanm	0:9b334a45a8ff	282	assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
bogdanm	0:9b334a45a8ff	283
bogdanm	0:9b334a45a8ff	284	pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
bogdanm	0:9b334a45a8ff	285	pFlash.NbSectorsToErase = pEraseInit->NbSectors;
bogdanm	0:9b334a45a8ff	286	pFlash.Sector = pEraseInit->Sector;
bogdanm	0:9b334a45a8ff	287	pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
bogdanm	0:9b334a45a8ff	288
bogdanm	0:9b334a45a8ff	289	/Erase 1st sector and wait for IT/
bogdanm	0:9b334a45a8ff	290	FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
bogdanm	0:9b334a45a8ff	291	}
bogdanm	0:9b334a45a8ff	292
bogdanm	0:9b334a45a8ff	293	return status;
bogdanm	0:9b334a45a8ff	294	}
bogdanm	0:9b334a45a8ff	295
bogdanm	0:9b334a45a8ff	296	/**
bogdanm	0:9b334a45a8ff	297	* @brief Program option bytes
bogdanm	0:9b334a45a8ff	298	* @param pOBInit: pointer to an FLASH_OBInitStruct structure that
bogdanm	0:9b334a45a8ff	299	* contains the configuration information for the programming.
bogdanm	0:9b334a45a8ff	300	*
bogdanm	0:9b334a45a8ff	301	* @retval HAL Status
bogdanm	0:9b334a45a8ff	302	*/
bogdanm	0:9b334a45a8ff	303	HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
bogdanm	0:9b334a45a8ff	304	{
bogdanm	0:9b334a45a8ff	305	HAL_StatusTypeDef status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	306
bogdanm	0:9b334a45a8ff	307	/* Process Locked */
bogdanm	0:9b334a45a8ff	308	__HAL_LOCK(&pFlash);
bogdanm	0:9b334a45a8ff	309
bogdanm	0:9b334a45a8ff	310	/* Check the parameters */
bogdanm	0:9b334a45a8ff	311	assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
bogdanm	0:9b334a45a8ff	312
bogdanm	0:9b334a45a8ff	313	/Write protection configuration/
bogdanm	0:9b334a45a8ff	314	if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
bogdanm	0:9b334a45a8ff	315	{
bogdanm	0:9b334a45a8ff	316	assert_param(IS_WRPSTATE(pOBInit->WRPState));
bogdanm	0:9b334a45a8ff	317	if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
bogdanm	0:9b334a45a8ff	318	{
bogdanm	0:9b334a45a8ff	319	/Enable of Write protection on the selected Sector/
bogdanm	0:9b334a45a8ff	320	status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
bogdanm	0:9b334a45a8ff	321	}
bogdanm	0:9b334a45a8ff	322	else
bogdanm	0:9b334a45a8ff	323	{
bogdanm	0:9b334a45a8ff	324	/Disable of Write protection on the selected Sector/
bogdanm	0:9b334a45a8ff	325	status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
bogdanm	0:9b334a45a8ff	326	}
bogdanm	0:9b334a45a8ff	327	}
bogdanm	0:9b334a45a8ff	328
bogdanm	0:9b334a45a8ff	329	/Read protection configuration/
bogdanm	0:9b334a45a8ff	330	if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
bogdanm	0:9b334a45a8ff	331	{
bogdanm	0:9b334a45a8ff	332	status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
bogdanm	0:9b334a45a8ff	333	}
bogdanm	0:9b334a45a8ff	334
bogdanm	0:9b334a45a8ff	335	/USER configuration/
bogdanm	0:9b334a45a8ff	336	if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
bogdanm	0:9b334a45a8ff	337	{
bogdanm	0:9b334a45a8ff	338	status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
bogdanm	0:9b334a45a8ff	339	pOBInit->USERConfig&OB_STOP_NO_RST,
bogdanm	0:9b334a45a8ff	340	pOBInit->USERConfig&OB_STDBY_NO_RST);
bogdanm	0:9b334a45a8ff	341	}
bogdanm	0:9b334a45a8ff	342
bogdanm	0:9b334a45a8ff	343	/BOR Level configuration/
bogdanm	0:9b334a45a8ff	344	if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
bogdanm	0:9b334a45a8ff	345	{
bogdanm	0:9b334a45a8ff	346	status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
bogdanm	0:9b334a45a8ff	347	}
bogdanm	0:9b334a45a8ff	348
bogdanm	0:9b334a45a8ff	349	/* Process Unlocked */
bogdanm	0:9b334a45a8ff	350	__HAL_UNLOCK(&pFlash);
bogdanm	0:9b334a45a8ff	351
bogdanm	0:9b334a45a8ff	352	return status;
bogdanm	0:9b334a45a8ff	353	}
bogdanm	0:9b334a45a8ff	354
bogdanm	0:9b334a45a8ff	355	/**
mbed_official	19:112740acecfa	356	* @brief Flush the instruction and data caches
mbed_official	19:112740acecfa	357	* @retval None
mbed_official	19:112740acecfa	358	*/
mbed_official	19:112740acecfa	359	void FLASH_FlushCaches(void)
mbed_official	19:112740acecfa	360	{
mbed_official	19:112740acecfa	361	/* Flush instruction cache */
mbed_official	19:112740acecfa	362	if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN))
mbed_official	19:112740acecfa	363	{
mbed_official	19:112740acecfa	364	/* Disable instruction cache */
mbed_official	19:112740acecfa	365	__HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
mbed_official	19:112740acecfa	366	/* Reset instruction cache */
mbed_official	19:112740acecfa	367	__HAL_FLASH_INSTRUCTION_CACHE_RESET();
mbed_official	19:112740acecfa	368	/* Enable instruction cache */
mbed_official	19:112740acecfa	369	__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
mbed_official	19:112740acecfa	370	}
mbed_official	19:112740acecfa	371
mbed_official	19:112740acecfa	372	/* Flush data cache */
mbed_official	19:112740acecfa	373	if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN))
mbed_official	19:112740acecfa	374	{
mbed_official	19:112740acecfa	375	/* Disable data cache */
mbed_official	19:112740acecfa	376	__HAL_FLASH_DATA_CACHE_DISABLE();
mbed_official	19:112740acecfa	377	/* Reset data cache */
mbed_official	19:112740acecfa	378	__HAL_FLASH_DATA_CACHE_RESET();
mbed_official	19:112740acecfa	379	/* Enable data cache */
mbed_official	19:112740acecfa	380	__HAL_FLASH_DATA_CACHE_ENABLE();
mbed_official	19:112740acecfa	381	}
mbed_official	19:112740acecfa	382	}
mbed_official	19:112740acecfa	383
mbed_official	19:112740acecfa	384	/**
bogdanm	0:9b334a45a8ff	385	* @brief Get the Option byte configuration
bogdanm	0:9b334a45a8ff	386	* @param pOBInit: pointer to an FLASH_OBInitStruct structure that
bogdanm	0:9b334a45a8ff	387	* contains the configuration information for the programming.
bogdanm	0:9b334a45a8ff	388	*
bogdanm	0:9b334a45a8ff	389	* @retval None
bogdanm	0:9b334a45a8ff	390	*/
bogdanm	0:9b334a45a8ff	391	void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
bogdanm	0:9b334a45a8ff	392	{
bogdanm	0:9b334a45a8ff	393	pOBInit->OptionType = OPTIONBYTE_WRP \| OPTIONBYTE_RDP \| OPTIONBYTE_USER \| OPTIONBYTE_BOR;
bogdanm	0:9b334a45a8ff	394
bogdanm	0:9b334a45a8ff	395	/Get WRP/
bogdanm	0:9b334a45a8ff	396	pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
mbed_official	19:112740acecfa	397
bogdanm	0:9b334a45a8ff	398	/Get RDP Level/
bogdanm	0:9b334a45a8ff	399	pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
mbed_official	19:112740acecfa	400
bogdanm	0:9b334a45a8ff	401	/Get USER/
bogdanm	0:9b334a45a8ff	402	pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
bogdanm	0:9b334a45a8ff	403
bogdanm	0:9b334a45a8ff	404	/Get BOR Level/
bogdanm	0:9b334a45a8ff	405	pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
bogdanm	0:9b334a45a8ff	406	}
bogdanm	0:9b334a45a8ff	407
mbed_official	19:112740acecfa	408	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
mbed_official	19:112740acecfa	409	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	410	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx) \|\| defined(STM32F469xx) \|\|\
mbed_official	19:112740acecfa	411	defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	412	/**
bogdanm	0:9b334a45a8ff	413	* @brief Program option bytes
bogdanm	0:9b334a45a8ff	414	* @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
bogdanm	0:9b334a45a8ff	415	* contains the configuration information for the programming.
bogdanm	0:9b334a45a8ff	416	*
bogdanm	0:9b334a45a8ff	417	* @retval HAL Status
bogdanm	0:9b334a45a8ff	418	*/
bogdanm	0:9b334a45a8ff	419	HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
bogdanm	0:9b334a45a8ff	420	{
bogdanm	0:9b334a45a8ff	421	HAL_StatusTypeDef status = HAL_ERROR;
bogdanm	0:9b334a45a8ff	422
bogdanm	0:9b334a45a8ff	423	/* Check the parameters */
bogdanm	0:9b334a45a8ff	424	assert_param(IS_OBEX(pAdvOBInit->OptionType));
bogdanm	0:9b334a45a8ff	425
bogdanm	0:9b334a45a8ff	426	/Program PCROP option byte/
bogdanm	0:9b334a45a8ff	427	if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
bogdanm	0:9b334a45a8ff	428	{
bogdanm	0:9b334a45a8ff	429	/* Check the parameters */
bogdanm	0:9b334a45a8ff	430	assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
bogdanm	0:9b334a45a8ff	431	if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
bogdanm	0:9b334a45a8ff	432	{
bogdanm	0:9b334a45a8ff	433	/Enable of Write protection on the selected Sector/
mbed_official	19:112740acecfa	434	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\|\
mbed_official	19:112740acecfa	435	defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	436	status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
mbed_official	19:112740acecfa	437	#else /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	438	status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
mbed_official	19:112740acecfa	439	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	440	}
bogdanm	0:9b334a45a8ff	441	else
bogdanm	0:9b334a45a8ff	442	{
bogdanm	0:9b334a45a8ff	443	/Disable of Write protection on the selected Sector/
mbed_official	19:112740acecfa	444	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\|\
mbed_official	19:112740acecfa	445	defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	446	status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
mbed_official	19:112740acecfa	447	#else /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	448	status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
mbed_official	19:112740acecfa	449	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	450	}
bogdanm	0:9b334a45a8ff	451	}
bogdanm	0:9b334a45a8ff	452
mbed_official	19:112740acecfa	453	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	454	/Program BOOT config option byte/
bogdanm	0:9b334a45a8ff	455	if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
bogdanm	0:9b334a45a8ff	456	{
bogdanm	0:9b334a45a8ff	457	status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
bogdanm	0:9b334a45a8ff	458	}
mbed_official	19:112740acecfa	459	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	460
bogdanm	0:9b334a45a8ff	461	return status;
bogdanm	0:9b334a45a8ff	462	}
bogdanm	0:9b334a45a8ff	463
bogdanm	0:9b334a45a8ff	464	/**
bogdanm	0:9b334a45a8ff	465	* @brief Get the OBEX byte configuration
bogdanm	0:9b334a45a8ff	466	* @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
bogdanm	0:9b334a45a8ff	467	* contains the configuration information for the programming.
bogdanm	0:9b334a45a8ff	468	*
bogdanm	0:9b334a45a8ff	469	* @retval None
bogdanm	0:9b334a45a8ff	470	*/
bogdanm	0:9b334a45a8ff	471	void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
bogdanm	0:9b334a45a8ff	472	{
mbed_official	19:112740acecfa	473	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\|\
mbed_official	19:112740acecfa	474	defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	475	/Get Sector/
bogdanm	0:9b334a45a8ff	476	pAdvOBInit->Sectors = ((__IO uint16_t )(OPTCR_BYTE2_ADDRESS));
mbed_official	19:112740acecfa	477	#else /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx\|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	478	/Get Sector for Bank1/
bogdanm	0:9b334a45a8ff	479	pAdvOBInit->SectorsBank1 = ((__IO uint16_t )(OPTCR_BYTE2_ADDRESS));
bogdanm	0:9b334a45a8ff	480
bogdanm	0:9b334a45a8ff	481	/Get Sector for Bank2/
bogdanm	0:9b334a45a8ff	482	pAdvOBInit->SectorsBank2 = ((__IO uint16_t )(OPTCR1_BYTE2_ADDRESS));
bogdanm	0:9b334a45a8ff	483
bogdanm	0:9b334a45a8ff	484	/Get Boot config OB/
bogdanm	0:9b334a45a8ff	485	pAdvOBInit->BootConfig = (__IO uint8_t )OPTCR_BYTE0_ADDRESS;
mbed_official	19:112740acecfa	486	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	487	}
bogdanm	0:9b334a45a8ff	488
bogdanm	0:9b334a45a8ff	489	/**
bogdanm	0:9b334a45a8ff	490	* @brief Select the Protection Mode
bogdanm	0:9b334a45a8ff	491	*
bogdanm	0:9b334a45a8ff	492	* @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
bogdanm	0:9b334a45a8ff	493	* Global Read Out Protection modification (from level1 to level0)
bogdanm	0:9b334a45a8ff	494	* @note Once SPRMOD bit is active unprotection of a protected sector is not possible
bogdanm	0:9b334a45a8ff	495	* @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
mbed_official	19:112740acecfa	496	* @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
mbed_official	19:112740acecfa	497	* STM32F469xx/STM32F479xx devices.
bogdanm	0:9b334a45a8ff	498	*
bogdanm	0:9b334a45a8ff	499	* @retval HAL Status
bogdanm	0:9b334a45a8ff	500	*/
bogdanm	0:9b334a45a8ff	501	HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
bogdanm	0:9b334a45a8ff	502	{
bogdanm	0:9b334a45a8ff	503	uint8_t optiontmp = 0xFF;
bogdanm	0:9b334a45a8ff	504
bogdanm	0:9b334a45a8ff	505	/* Mask SPRMOD bit */
bogdanm	0:9b334a45a8ff	506	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
bogdanm	0:9b334a45a8ff	507
bogdanm	0:9b334a45a8ff	508	/* Update Option Byte */
bogdanm	0:9b334a45a8ff	509	(__IO uint8_t )OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED \| optiontmp);
bogdanm	0:9b334a45a8ff	510
bogdanm	0:9b334a45a8ff	511	return HAL_OK;
bogdanm	0:9b334a45a8ff	512	}
bogdanm	0:9b334a45a8ff	513
bogdanm	0:9b334a45a8ff	514	/**
bogdanm	0:9b334a45a8ff	515	* @brief Deselect the Protection Mode
bogdanm	0:9b334a45a8ff	516	*
bogdanm	0:9b334a45a8ff	517	* @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
bogdanm	0:9b334a45a8ff	518	* Global Read Out Protection modification (from level1 to level0)
bogdanm	0:9b334a45a8ff	519	* @note Once SPRMOD bit is active unprotection of a protected sector is not possible
bogdanm	0:9b334a45a8ff	520	* @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
mbed_official	19:112740acecfa	521	* @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
mbed_official	19:112740acecfa	522	* STM32F469xx/STM32F479xx devices.
bogdanm	0:9b334a45a8ff	523	*
bogdanm	0:9b334a45a8ff	524	* @retval HAL Status
bogdanm	0:9b334a45a8ff	525	*/
bogdanm	0:9b334a45a8ff	526	HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
bogdanm	0:9b334a45a8ff	527	{
bogdanm	0:9b334a45a8ff	528	uint8_t optiontmp = 0xFF;
bogdanm	0:9b334a45a8ff	529
bogdanm	0:9b334a45a8ff	530	/* Mask SPRMOD bit */
bogdanm	0:9b334a45a8ff	531	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
bogdanm	0:9b334a45a8ff	532
bogdanm	0:9b334a45a8ff	533	/* Update Option Byte */
bogdanm	0:9b334a45a8ff	534	(__IO uint8_t )OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED \| optiontmp);
bogdanm	0:9b334a45a8ff	535
bogdanm	0:9b334a45a8ff	536	return HAL_OK;
bogdanm	0:9b334a45a8ff	537	}
mbed_official	19:112740acecfa	538	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F401xC \|\| STM32F401xE \|\| STM32F410xx \|\|\
mbed_official	19:112740acecfa	539	STM32F411xE \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	540
mbed_official	19:112740acecfa	541	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx)\|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	542	/**
bogdanm	0:9b334a45a8ff	543	* @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
mbed_official	19:112740acecfa	544	* @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
bogdanm	0:9b334a45a8ff	545	* @retval The FLASH Write Protection Option Bytes value
bogdanm	0:9b334a45a8ff	546	*/
bogdanm	0:9b334a45a8ff	547	uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
bogdanm	0:9b334a45a8ff	548	{
bogdanm	0:9b334a45a8ff	549	/* Return the FLASH write protection Register value */
bogdanm	0:9b334a45a8ff	550	return ((__IO uint16_t )(OPTCR1_BYTE2_ADDRESS));
bogdanm	0:9b334a45a8ff	551	}
mbed_official	19:112740acecfa	552	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	553
bogdanm	0:9b334a45a8ff	554	/**
bogdanm	0:9b334a45a8ff	555	* @}
bogdanm	0:9b334a45a8ff	556	*/
bogdanm	0:9b334a45a8ff	557
mbed_official	19:112740acecfa	558	#if defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
bogdanm	0:9b334a45a8ff	559	/**
bogdanm	0:9b334a45a8ff	560	* @brief Full erase of FLASH memory sectors
bogdanm	0:9b334a45a8ff	561	* @param VoltageRange: The device voltage range which defines the erase parallelism.
bogdanm	0:9b334a45a8ff	562	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	563	* @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
bogdanm	0:9b334a45a8ff	564	* the operation will be done by byte (8-bit)
bogdanm	0:9b334a45a8ff	565	* @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
bogdanm	0:9b334a45a8ff	566	* the operation will be done by half word (16-bit)
bogdanm	0:9b334a45a8ff	567	* @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
bogdanm	0:9b334a45a8ff	568	* the operation will be done by word (32-bit)
bogdanm	0:9b334a45a8ff	569	* @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bogdanm	0:9b334a45a8ff	570	* the operation will be done by double word (64-bit)
bogdanm	0:9b334a45a8ff	571	*
bogdanm	0:9b334a45a8ff	572	* @param Banks: Banks to be erased
bogdanm	0:9b334a45a8ff	573	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	574	* @arg FLASH_BANK_1: Bank1 to be erased
bogdanm	0:9b334a45a8ff	575	* @arg FLASH_BANK_2: Bank2 to be erased
bogdanm	0:9b334a45a8ff	576	* @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
bogdanm	0:9b334a45a8ff	577	*
bogdanm	0:9b334a45a8ff	578	* @retval HAL Status
bogdanm	0:9b334a45a8ff	579	*/
bogdanm	0:9b334a45a8ff	580	static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
bogdanm	0:9b334a45a8ff	581	{
bogdanm	0:9b334a45a8ff	582	uint32_t tmp_psize = 0;
bogdanm	0:9b334a45a8ff	583
bogdanm	0:9b334a45a8ff	584	/* Check the parameters */
bogdanm	0:9b334a45a8ff	585	assert_param(IS_VOLTAGERANGE(VoltageRange));
bogdanm	0:9b334a45a8ff	586	assert_param(IS_FLASH_BANK(Banks));
bogdanm	0:9b334a45a8ff	587
bogdanm	0:9b334a45a8ff	588	/* if the previous operation is completed, proceed to erase all sectors */
mbed_official	19:112740acecfa	589	CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
bogdanm	0:9b334a45a8ff	590	FLASH->CR \|= tmp_psize;
bogdanm	0:9b334a45a8ff	591	if(Banks == FLASH_BANK_BOTH)
bogdanm	0:9b334a45a8ff	592	{
bogdanm	0:9b334a45a8ff	593	/* bank1 & bank2 will be erased*/
bogdanm	0:9b334a45a8ff	594	FLASH->CR \|= FLASH_MER_BIT;
bogdanm	0:9b334a45a8ff	595	}
bogdanm	0:9b334a45a8ff	596	else if(Banks == FLASH_BANK_1)
bogdanm	0:9b334a45a8ff	597	{
bogdanm	0:9b334a45a8ff	598	/Only bank1 will be erased/
bogdanm	0:9b334a45a8ff	599	FLASH->CR \|= FLASH_CR_MER1;
bogdanm	0:9b334a45a8ff	600	}
bogdanm	0:9b334a45a8ff	601	else
bogdanm	0:9b334a45a8ff	602	{
bogdanm	0:9b334a45a8ff	603	/Only bank2 will be erased/
bogdanm	0:9b334a45a8ff	604	FLASH->CR \|= FLASH_CR_MER2;
bogdanm	0:9b334a45a8ff	605	}
bogdanm	0:9b334a45a8ff	606	FLASH->CR \|= FLASH_CR_STRT;
bogdanm	0:9b334a45a8ff	607	}
bogdanm	0:9b334a45a8ff	608
bogdanm	0:9b334a45a8ff	609	/**
bogdanm	0:9b334a45a8ff	610	* @brief Erase the specified FLASH memory sector
bogdanm	0:9b334a45a8ff	611	* @param Sector: FLASH sector to erase
bogdanm	0:9b334a45a8ff	612	* The value of this parameter depend on device used within the same series
bogdanm	0:9b334a45a8ff	613	* @param VoltageRange: The device voltage range which defines the erase parallelism.
bogdanm	0:9b334a45a8ff	614	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	615	* @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
bogdanm	0:9b334a45a8ff	616	* the operation will be done by byte (8-bit)
bogdanm	0:9b334a45a8ff	617	* @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
bogdanm	0:9b334a45a8ff	618	* the operation will be done by half word (16-bit)
bogdanm	0:9b334a45a8ff	619	* @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
bogdanm	0:9b334a45a8ff	620	* the operation will be done by word (32-bit)
bogdanm	0:9b334a45a8ff	621	* @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bogdanm	0:9b334a45a8ff	622	* the operation will be done by double word (64-bit)
bogdanm	0:9b334a45a8ff	623	*
bogdanm	0:9b334a45a8ff	624	* @retval None
bogdanm	0:9b334a45a8ff	625	*/
bogdanm	0:9b334a45a8ff	626	void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
bogdanm	0:9b334a45a8ff	627	{
bogdanm	0:9b334a45a8ff	628	uint32_t tmp_psize = 0;
bogdanm	0:9b334a45a8ff	629
bogdanm	0:9b334a45a8ff	630	/* Check the parameters */
bogdanm	0:9b334a45a8ff	631	assert_param(IS_FLASH_SECTOR(Sector));
bogdanm	0:9b334a45a8ff	632	assert_param(IS_VOLTAGERANGE(VoltageRange));
bogdanm	0:9b334a45a8ff	633
bogdanm	0:9b334a45a8ff	634	if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
bogdanm	0:9b334a45a8ff	635	{
bogdanm	0:9b334a45a8ff	636	tmp_psize = FLASH_PSIZE_BYTE;
bogdanm	0:9b334a45a8ff	637	}
bogdanm	0:9b334a45a8ff	638	else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
bogdanm	0:9b334a45a8ff	639	{
bogdanm	0:9b334a45a8ff	640	tmp_psize = FLASH_PSIZE_HALF_WORD;
bogdanm	0:9b334a45a8ff	641	}
bogdanm	0:9b334a45a8ff	642	else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
bogdanm	0:9b334a45a8ff	643	{
bogdanm	0:9b334a45a8ff	644	tmp_psize = FLASH_PSIZE_WORD;
bogdanm	0:9b334a45a8ff	645	}
bogdanm	0:9b334a45a8ff	646	else
bogdanm	0:9b334a45a8ff	647	{
bogdanm	0:9b334a45a8ff	648	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bogdanm	0:9b334a45a8ff	649	}
bogdanm	0:9b334a45a8ff	650
bogdanm	0:9b334a45a8ff	651	/* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
bogdanm	0:9b334a45a8ff	652	if(Sector > FLASH_SECTOR_11)
bogdanm	0:9b334a45a8ff	653	{
bogdanm	0:9b334a45a8ff	654	Sector += 4;
bogdanm	0:9b334a45a8ff	655	}
bogdanm	0:9b334a45a8ff	656	/* If the previous operation is completed, proceed to erase the sector */
mbed_official	19:112740acecfa	657	CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
bogdanm	0:9b334a45a8ff	658	FLASH->CR \|= tmp_psize;
mbed_official	19:112740acecfa	659	CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
bogdanm	0:9b334a45a8ff	660	FLASH->CR \|= FLASH_CR_SER \| (Sector << POSITION_VAL(FLASH_CR_SNB));
bogdanm	0:9b334a45a8ff	661	FLASH->CR \|= FLASH_CR_STRT;
bogdanm	0:9b334a45a8ff	662	}
bogdanm	0:9b334a45a8ff	663
bogdanm	0:9b334a45a8ff	664	/**
bogdanm	0:9b334a45a8ff	665	* @brief Enable the write protection of the desired bank1 or bank 2 sectors
bogdanm	0:9b334a45a8ff	666	*
bogdanm	0:9b334a45a8ff	667	* @note When the memory read protection level is selected (RDP level = 1),
bogdanm	0:9b334a45a8ff	668	* it is not possible to program or erase the flash sector i if CortexM4
bogdanm	0:9b334a45a8ff	669	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm	0:9b334a45a8ff	670	* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bogdanm	0:9b334a45a8ff	671	*
bogdanm	0:9b334a45a8ff	672	* @param WRPSector: specifies the sector(s) to be write protected.
bogdanm	0:9b334a45a8ff	673	* This parameter can be one of the following values:
mbed_official	19:112740acecfa	674	* @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
bogdanm	0:9b334a45a8ff	675	* @arg OB_WRP_SECTOR_All
bogdanm	0:9b334a45a8ff	676	* @note BANK2 starts from OB_WRP_SECTOR_12
bogdanm	0:9b334a45a8ff	677	*
bogdanm	0:9b334a45a8ff	678	* @param Banks: Enable write protection on all the sectors for the specific bank
bogdanm	0:9b334a45a8ff	679	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	680	* @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm	0:9b334a45a8ff	681	* @arg FLASH_BANK_2: WRP on all sectors of bank2
bogdanm	0:9b334a45a8ff	682	* @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
bogdanm	0:9b334a45a8ff	683	*
bogdanm	0:9b334a45a8ff	684	* @retval HAL FLASH State
bogdanm	0:9b334a45a8ff	685	*/
bogdanm	0:9b334a45a8ff	686	static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
bogdanm	0:9b334a45a8ff	687	{
bogdanm	0:9b334a45a8ff	688	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	689
bogdanm	0:9b334a45a8ff	690	/* Check the parameters */
bogdanm	0:9b334a45a8ff	691	assert_param(IS_OB_WRP_SECTOR(WRPSector));
bogdanm	0:9b334a45a8ff	692	assert_param(IS_FLASH_BANK(Banks));
bogdanm	0:9b334a45a8ff	693
bogdanm	0:9b334a45a8ff	694	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	695	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	696
bogdanm	0:9b334a45a8ff	697	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	698	{
bogdanm	0:9b334a45a8ff	699	if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) \|\| (Banks == FLASH_BANK_BOTH))) \|\|
bogdanm	0:9b334a45a8ff	700	(WRPSector < OB_WRP_SECTOR_12))
bogdanm	0:9b334a45a8ff	701	{
bogdanm	0:9b334a45a8ff	702	if(WRPSector == OB_WRP_SECTOR_All)
bogdanm	0:9b334a45a8ff	703	{
bogdanm	0:9b334a45a8ff	704	/Write protection on all sector of BANK1/
bogdanm	0:9b334a45a8ff	705	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
bogdanm	0:9b334a45a8ff	706	}
bogdanm	0:9b334a45a8ff	707	else
bogdanm	0:9b334a45a8ff	708	{
bogdanm	0:9b334a45a8ff	709	/Write protection done on sectors of BANK1/
bogdanm	0:9b334a45a8ff	710	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
bogdanm	0:9b334a45a8ff	711	}
bogdanm	0:9b334a45a8ff	712	}
bogdanm	0:9b334a45a8ff	713	else
bogdanm	0:9b334a45a8ff	714	{
bogdanm	0:9b334a45a8ff	715	/Write protection done on sectors of BANK2/
bogdanm	0:9b334a45a8ff	716	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
bogdanm	0:9b334a45a8ff	717	}
bogdanm	0:9b334a45a8ff	718
bogdanm	0:9b334a45a8ff	719	/Write protection on all sector of BANK2/
bogdanm	0:9b334a45a8ff	720	if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
bogdanm	0:9b334a45a8ff	721	{
bogdanm	0:9b334a45a8ff	722	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	723	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	724
bogdanm	0:9b334a45a8ff	725	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	726	{
bogdanm	0:9b334a45a8ff	727	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
bogdanm	0:9b334a45a8ff	728	}
bogdanm	0:9b334a45a8ff	729	}
bogdanm	0:9b334a45a8ff	730
bogdanm	0:9b334a45a8ff	731	}
bogdanm	0:9b334a45a8ff	732	return status;
bogdanm	0:9b334a45a8ff	733	}
bogdanm	0:9b334a45a8ff	734
bogdanm	0:9b334a45a8ff	735	/**
bogdanm	0:9b334a45a8ff	736	* @brief Disable the write protection of the desired bank1 or bank 2 sectors
bogdanm	0:9b334a45a8ff	737	*
bogdanm	0:9b334a45a8ff	738	* @note When the memory read protection level is selected (RDP level = 1),
bogdanm	0:9b334a45a8ff	739	* it is not possible to program or erase the flash sector i if CortexM4
bogdanm	0:9b334a45a8ff	740	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm	0:9b334a45a8ff	741	* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bogdanm	0:9b334a45a8ff	742	*
bogdanm	0:9b334a45a8ff	743	* @param WRPSector: specifies the sector(s) to be write protected.
bogdanm	0:9b334a45a8ff	744	* This parameter can be one of the following values:
mbed_official	19:112740acecfa	745	* @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
bogdanm	0:9b334a45a8ff	746	* @arg OB_WRP_Sector_All
bogdanm	0:9b334a45a8ff	747	* @note BANK2 starts from OB_WRP_SECTOR_12
bogdanm	0:9b334a45a8ff	748	*
bogdanm	0:9b334a45a8ff	749	* @param Banks: Disable write protection on all the sectors for the specific bank
bogdanm	0:9b334a45a8ff	750	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	751	* @arg FLASH_BANK_1: Bank1 to be erased
bogdanm	0:9b334a45a8ff	752	* @arg FLASH_BANK_2: Bank2 to be erased
bogdanm	0:9b334a45a8ff	753	* @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
bogdanm	0:9b334a45a8ff	754	*
bogdanm	0:9b334a45a8ff	755	* @retval HAL Status
bogdanm	0:9b334a45a8ff	756	*/
bogdanm	0:9b334a45a8ff	757	static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
bogdanm	0:9b334a45a8ff	758	{
bogdanm	0:9b334a45a8ff	759	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	760
bogdanm	0:9b334a45a8ff	761	/* Check the parameters */
bogdanm	0:9b334a45a8ff	762	assert_param(IS_OB_WRP_SECTOR(WRPSector));
bogdanm	0:9b334a45a8ff	763	assert_param(IS_FLASH_BANK(Banks));
bogdanm	0:9b334a45a8ff	764
bogdanm	0:9b334a45a8ff	765	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	766	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	767
bogdanm	0:9b334a45a8ff	768	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	769	{
bogdanm	0:9b334a45a8ff	770	if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) \|\| (Banks == FLASH_BANK_BOTH))) \|\|
bogdanm	0:9b334a45a8ff	771	(WRPSector < OB_WRP_SECTOR_12))
bogdanm	0:9b334a45a8ff	772	{
bogdanm	0:9b334a45a8ff	773	if(WRPSector == OB_WRP_SECTOR_All)
bogdanm	0:9b334a45a8ff	774	{
bogdanm	0:9b334a45a8ff	775	/Write protection on all sector of BANK1/
bogdanm	0:9b334a45a8ff	776	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)(WRPSector>>12);
bogdanm	0:9b334a45a8ff	777	}
bogdanm	0:9b334a45a8ff	778	else
bogdanm	0:9b334a45a8ff	779	{
bogdanm	0:9b334a45a8ff	780	/Write protection done on sectors of BANK1/
bogdanm	0:9b334a45a8ff	781	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)WRPSector;
bogdanm	0:9b334a45a8ff	782	}
bogdanm	0:9b334a45a8ff	783	}
bogdanm	0:9b334a45a8ff	784	else
bogdanm	0:9b334a45a8ff	785	{
bogdanm	0:9b334a45a8ff	786	/Write protection done on sectors of BANK2/
bogdanm	0:9b334a45a8ff	787	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS \|= (uint16_t)(WRPSector>>12);
bogdanm	0:9b334a45a8ff	788	}
bogdanm	0:9b334a45a8ff	789
bogdanm	0:9b334a45a8ff	790	/Write protection on all sector of BANK2/
bogdanm	0:9b334a45a8ff	791	if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
bogdanm	0:9b334a45a8ff	792	{
bogdanm	0:9b334a45a8ff	793	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	794	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	795
bogdanm	0:9b334a45a8ff	796	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	797	{
bogdanm	0:9b334a45a8ff	798	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS \|= (uint16_t)(WRPSector>>12);
bogdanm	0:9b334a45a8ff	799	}
bogdanm	0:9b334a45a8ff	800	}
bogdanm	0:9b334a45a8ff	801
bogdanm	0:9b334a45a8ff	802	}
bogdanm	0:9b334a45a8ff	803
bogdanm	0:9b334a45a8ff	804	return status;
bogdanm	0:9b334a45a8ff	805	}
bogdanm	0:9b334a45a8ff	806
bogdanm	0:9b334a45a8ff	807	/**
bogdanm	0:9b334a45a8ff	808	* @brief Configure the Dual Bank Boot.
bogdanm	0:9b334a45a8ff	809	*
bogdanm	0:9b334a45a8ff	810	* @note This function can be used only for STM32F42xxx/43xxx devices.
bogdanm	0:9b334a45a8ff	811	*
bogdanm	0:9b334a45a8ff	812	* @param BootConfig specifies the Dual Bank Boot Option byte.
bogdanm	0:9b334a45a8ff	813	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	814	* @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
bogdanm	0:9b334a45a8ff	815	* @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
bogdanm	0:9b334a45a8ff	816	* @retval None
bogdanm	0:9b334a45a8ff	817	*/
bogdanm	0:9b334a45a8ff	818	static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
bogdanm	0:9b334a45a8ff	819	{
bogdanm	0:9b334a45a8ff	820	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	821
bogdanm	0:9b334a45a8ff	822	/* Check the parameters */
bogdanm	0:9b334a45a8ff	823	assert_param(IS_OB_BOOT(BootConfig));
bogdanm	0:9b334a45a8ff	824
bogdanm	0:9b334a45a8ff	825	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	826	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	827
bogdanm	0:9b334a45a8ff	828	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	829	{
bogdanm	0:9b334a45a8ff	830	/* Set Dual Bank Boot */
bogdanm	0:9b334a45a8ff	831	(__IO uint8_t )OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
bogdanm	0:9b334a45a8ff	832	(__IO uint8_t )OPTCR_BYTE0_ADDRESS \|= BootConfig;
bogdanm	0:9b334a45a8ff	833	}
bogdanm	0:9b334a45a8ff	834
bogdanm	0:9b334a45a8ff	835	return status;
bogdanm	0:9b334a45a8ff	836	}
bogdanm	0:9b334a45a8ff	837
bogdanm	0:9b334a45a8ff	838	/**
bogdanm	0:9b334a45a8ff	839	* @brief Enable the read/write protection (PCROP) of the desired
bogdanm	0:9b334a45a8ff	840	* sectors of Bank 1 and/or Bank 2.
bogdanm	0:9b334a45a8ff	841	* @note This function can be used only for STM32F42xxx/43xxx devices.
bogdanm	0:9b334a45a8ff	842	* @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
bogdanm	0:9b334a45a8ff	843	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	844	* @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
bogdanm	0:9b334a45a8ff	845	* @arg OB_PCROP_SECTOR__All
bogdanm	0:9b334a45a8ff	846	* @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
bogdanm	0:9b334a45a8ff	847	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	848	* @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
bogdanm	0:9b334a45a8ff	849	* @arg OB_PCROP_SECTOR__All
bogdanm	0:9b334a45a8ff	850	* @param Banks Enable PCROP protection on all the sectors for the specific bank
bogdanm	0:9b334a45a8ff	851	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	852	* @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm	0:9b334a45a8ff	853	* @arg FLASH_BANK_2: WRP on all sectors of bank2
bogdanm	0:9b334a45a8ff	854	* @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
bogdanm	0:9b334a45a8ff	855	*
bogdanm	0:9b334a45a8ff	856	* @retval HAL Status
bogdanm	0:9b334a45a8ff	857	*/
bogdanm	0:9b334a45a8ff	858	static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
bogdanm	0:9b334a45a8ff	859	{
bogdanm	0:9b334a45a8ff	860	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	861
bogdanm	0:9b334a45a8ff	862	assert_param(IS_FLASH_BANK(Banks));
bogdanm	0:9b334a45a8ff	863
bogdanm	0:9b334a45a8ff	864	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	865	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	866
bogdanm	0:9b334a45a8ff	867	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	868	{
bogdanm	0:9b334a45a8ff	869	if((Banks == FLASH_BANK_1) \|\| (Banks == FLASH_BANK_BOTH))
bogdanm	0:9b334a45a8ff	870	{
bogdanm	0:9b334a45a8ff	871	assert_param(IS_OB_PCROP(SectorBank1));
bogdanm	0:9b334a45a8ff	872	/Write protection done on sectors of BANK1/
bogdanm	0:9b334a45a8ff	873	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)SectorBank1;
bogdanm	0:9b334a45a8ff	874	}
bogdanm	0:9b334a45a8ff	875	else
bogdanm	0:9b334a45a8ff	876	{
bogdanm	0:9b334a45a8ff	877	assert_param(IS_OB_PCROP(SectorBank2));
bogdanm	0:9b334a45a8ff	878	/Write protection done on sectors of BANK2/
bogdanm	0:9b334a45a8ff	879	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS \|= (uint16_t)SectorBank2;
bogdanm	0:9b334a45a8ff	880	}
bogdanm	0:9b334a45a8ff	881
bogdanm	0:9b334a45a8ff	882	/Write protection on all sector of BANK2/
bogdanm	0:9b334a45a8ff	883	if(Banks == FLASH_BANK_BOTH)
bogdanm	0:9b334a45a8ff	884	{
bogdanm	0:9b334a45a8ff	885	assert_param(IS_OB_PCROP(SectorBank2));
bogdanm	0:9b334a45a8ff	886	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	887	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	888
bogdanm	0:9b334a45a8ff	889	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	890	{
bogdanm	0:9b334a45a8ff	891	/Write protection done on sectors of BANK2/
bogdanm	0:9b334a45a8ff	892	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS \|= (uint16_t)SectorBank2;
bogdanm	0:9b334a45a8ff	893	}
bogdanm	0:9b334a45a8ff	894	}
bogdanm	0:9b334a45a8ff	895
bogdanm	0:9b334a45a8ff	896	}
bogdanm	0:9b334a45a8ff	897
bogdanm	0:9b334a45a8ff	898	return status;
bogdanm	0:9b334a45a8ff	899	}
bogdanm	0:9b334a45a8ff	900
bogdanm	0:9b334a45a8ff	901
bogdanm	0:9b334a45a8ff	902	/**
bogdanm	0:9b334a45a8ff	903	* @brief Disable the read/write protection (PCROP) of the desired
bogdanm	0:9b334a45a8ff	904	* sectors of Bank 1 and/or Bank 2.
bogdanm	0:9b334a45a8ff	905	* @note This function can be used only for STM32F42xxx/43xxx devices.
bogdanm	0:9b334a45a8ff	906	* @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
bogdanm	0:9b334a45a8ff	907	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	908	* @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
bogdanm	0:9b334a45a8ff	909	* @arg OB_PCROP_SECTOR__All
bogdanm	0:9b334a45a8ff	910	* @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
bogdanm	0:9b334a45a8ff	911	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	912	* @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
bogdanm	0:9b334a45a8ff	913	* @arg OB_PCROP_SECTOR__All
bogdanm	0:9b334a45a8ff	914	* @param Banks Disable PCROP protection on all the sectors for the specific bank
bogdanm	0:9b334a45a8ff	915	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	916	* @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm	0:9b334a45a8ff	917	* @arg FLASH_BANK_2: WRP on all sectors of bank2
bogdanm	0:9b334a45a8ff	918	* @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
bogdanm	0:9b334a45a8ff	919	*
bogdanm	0:9b334a45a8ff	920	* @retval HAL Status
bogdanm	0:9b334a45a8ff	921	*/
bogdanm	0:9b334a45a8ff	922	static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
bogdanm	0:9b334a45a8ff	923	{
bogdanm	0:9b334a45a8ff	924	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	925
bogdanm	0:9b334a45a8ff	926	/* Check the parameters */
bogdanm	0:9b334a45a8ff	927	assert_param(IS_FLASH_BANK(Banks));
bogdanm	0:9b334a45a8ff	928
bogdanm	0:9b334a45a8ff	929	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	930	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	931
bogdanm	0:9b334a45a8ff	932	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	933	{
bogdanm	0:9b334a45a8ff	934	if((Banks == FLASH_BANK_1) \|\| (Banks == FLASH_BANK_BOTH))
bogdanm	0:9b334a45a8ff	935	{
bogdanm	0:9b334a45a8ff	936	assert_param(IS_OB_PCROP(SectorBank1));
bogdanm	0:9b334a45a8ff	937	/Write protection done on sectors of BANK1/
bogdanm	0:9b334a45a8ff	938	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
bogdanm	0:9b334a45a8ff	939	}
bogdanm	0:9b334a45a8ff	940	else
bogdanm	0:9b334a45a8ff	941	{
bogdanm	0:9b334a45a8ff	942	/Write protection done on sectors of BANK2/
bogdanm	0:9b334a45a8ff	943	assert_param(IS_OB_PCROP(SectorBank2));
bogdanm	0:9b334a45a8ff	944	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
bogdanm	0:9b334a45a8ff	945	}
bogdanm	0:9b334a45a8ff	946
bogdanm	0:9b334a45a8ff	947	/Write protection on all sector of BANK2/
bogdanm	0:9b334a45a8ff	948	if(Banks == FLASH_BANK_BOTH)
bogdanm	0:9b334a45a8ff	949	{
bogdanm	0:9b334a45a8ff	950	assert_param(IS_OB_PCROP(SectorBank2));
bogdanm	0:9b334a45a8ff	951	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	952	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	953
bogdanm	0:9b334a45a8ff	954	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	955	{
bogdanm	0:9b334a45a8ff	956	/Write protection done on sectors of BANK2/
bogdanm	0:9b334a45a8ff	957	(__IO uint16_t)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
bogdanm	0:9b334a45a8ff	958	}
bogdanm	0:9b334a45a8ff	959	}
bogdanm	0:9b334a45a8ff	960
bogdanm	0:9b334a45a8ff	961	}
bogdanm	0:9b334a45a8ff	962
bogdanm	0:9b334a45a8ff	963	return status;
bogdanm	0:9b334a45a8ff	964
bogdanm	0:9b334a45a8ff	965	}
bogdanm	0:9b334a45a8ff	966
mbed_official	19:112740acecfa	967	#endif /* STM32F427xx \|\| STM32F437xx \|\| STM32F429xx \|\| STM32F439xx \|\| STM32F469xx \|\| STM32F479xx */
bogdanm	0:9b334a45a8ff	968
mbed_official	19:112740acecfa	969	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
mbed_official	19:112740acecfa	970	defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\|\
mbed_official	19:112740acecfa	971	defined(STM32F410Rx) \|\| defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	972	/**
bogdanm	0:9b334a45a8ff	973	* @brief Mass erase of FLASH memory
bogdanm	0:9b334a45a8ff	974	* @param VoltageRange: The device voltage range which defines the erase parallelism.
bogdanm	0:9b334a45a8ff	975	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	976	* @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
bogdanm	0:9b334a45a8ff	977	* the operation will be done by byte (8-bit)
bogdanm	0:9b334a45a8ff	978	* @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
bogdanm	0:9b334a45a8ff	979	* the operation will be done by half word (16-bit)
bogdanm	0:9b334a45a8ff	980	* @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
bogdanm	0:9b334a45a8ff	981	* the operation will be done by word (32-bit)
bogdanm	0:9b334a45a8ff	982	* @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bogdanm	0:9b334a45a8ff	983	* the operation will be done by double word (64-bit)
bogdanm	0:9b334a45a8ff	984	*
bogdanm	0:9b334a45a8ff	985	* @param Banks: Banks to be erased
bogdanm	0:9b334a45a8ff	986	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	987	* @arg FLASH_BANK_1: Bank1 to be erased
bogdanm	0:9b334a45a8ff	988	*
bogdanm	0:9b334a45a8ff	989	* @retval None
bogdanm	0:9b334a45a8ff	990	*/
bogdanm	0:9b334a45a8ff	991	static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
bogdanm	0:9b334a45a8ff	992	{
bogdanm	0:9b334a45a8ff	993	uint32_t tmp_psize = 0;
bogdanm	0:9b334a45a8ff	994
bogdanm	0:9b334a45a8ff	995	/* Check the parameters */
bogdanm	0:9b334a45a8ff	996	assert_param(IS_VOLTAGERANGE(VoltageRange));
bogdanm	0:9b334a45a8ff	997	assert_param(IS_FLASH_BANK(Banks));
mbed_official	19:112740acecfa	998
bogdanm	0:9b334a45a8ff	999	/* If the previous operation is completed, proceed to erase all sectors */
mbed_official	19:112740acecfa	1000	CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
mbed_official	19:112740acecfa	1001	FLASH->CR \|= tmp_psize;
mbed_official	19:112740acecfa	1002	FLASH->CR \|= FLASH_CR_MER;
mbed_official	19:112740acecfa	1003	FLASH->CR \|= FLASH_CR_STRT;
bogdanm	0:9b334a45a8ff	1004	}
bogdanm	0:9b334a45a8ff	1005
bogdanm	0:9b334a45a8ff	1006	/**
bogdanm	0:9b334a45a8ff	1007	* @brief Erase the specified FLASH memory sector
bogdanm	0:9b334a45a8ff	1008	* @param Sector: FLASH sector to erase
bogdanm	0:9b334a45a8ff	1009	* The value of this parameter depend on device used within the same series
bogdanm	0:9b334a45a8ff	1010	* @param VoltageRange: The device voltage range which defines the erase parallelism.
bogdanm	0:9b334a45a8ff	1011	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1012	* @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
bogdanm	0:9b334a45a8ff	1013	* the operation will be done by byte (8-bit)
bogdanm	0:9b334a45a8ff	1014	* @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
bogdanm	0:9b334a45a8ff	1015	* the operation will be done by half word (16-bit)
bogdanm	0:9b334a45a8ff	1016	* @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
bogdanm	0:9b334a45a8ff	1017	* the operation will be done by word (32-bit)
bogdanm	0:9b334a45a8ff	1018	* @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bogdanm	0:9b334a45a8ff	1019	* the operation will be done by double word (64-bit)
bogdanm	0:9b334a45a8ff	1020	*
bogdanm	0:9b334a45a8ff	1021	* @retval None
bogdanm	0:9b334a45a8ff	1022	*/
bogdanm	0:9b334a45a8ff	1023	void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
bogdanm	0:9b334a45a8ff	1024	{
bogdanm	0:9b334a45a8ff	1025	uint32_t tmp_psize = 0;
bogdanm	0:9b334a45a8ff	1026
bogdanm	0:9b334a45a8ff	1027	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1028	assert_param(IS_FLASH_SECTOR(Sector));
bogdanm	0:9b334a45a8ff	1029	assert_param(IS_VOLTAGERANGE(VoltageRange));
bogdanm	0:9b334a45a8ff	1030
bogdanm	0:9b334a45a8ff	1031	if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
bogdanm	0:9b334a45a8ff	1032	{
bogdanm	0:9b334a45a8ff	1033	tmp_psize = FLASH_PSIZE_BYTE;
bogdanm	0:9b334a45a8ff	1034	}
bogdanm	0:9b334a45a8ff	1035	else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
bogdanm	0:9b334a45a8ff	1036	{
bogdanm	0:9b334a45a8ff	1037	tmp_psize = FLASH_PSIZE_HALF_WORD;
bogdanm	0:9b334a45a8ff	1038	}
bogdanm	0:9b334a45a8ff	1039	else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
bogdanm	0:9b334a45a8ff	1040	{
bogdanm	0:9b334a45a8ff	1041	tmp_psize = FLASH_PSIZE_WORD;
bogdanm	0:9b334a45a8ff	1042	}
bogdanm	0:9b334a45a8ff	1043	else
bogdanm	0:9b334a45a8ff	1044	{
bogdanm	0:9b334a45a8ff	1045	tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bogdanm	0:9b334a45a8ff	1046	}
bogdanm	0:9b334a45a8ff	1047
bogdanm	0:9b334a45a8ff	1048	/* If the previous operation is completed, proceed to erase the sector */
mbed_official	19:112740acecfa	1049	CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
bogdanm	0:9b334a45a8ff	1050	FLASH->CR \|= tmp_psize;
mbed_official	19:112740acecfa	1051	CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
bogdanm	0:9b334a45a8ff	1052	FLASH->CR \|= FLASH_CR_SER \| (Sector << POSITION_VAL(FLASH_CR_SNB));
bogdanm	0:9b334a45a8ff	1053	FLASH->CR \|= FLASH_CR_STRT;
bogdanm	0:9b334a45a8ff	1054	}
bogdanm	0:9b334a45a8ff	1055
bogdanm	0:9b334a45a8ff	1056	/**
bogdanm	0:9b334a45a8ff	1057	* @brief Enable the write protection of the desired bank 1 sectors
bogdanm	0:9b334a45a8ff	1058	*
bogdanm	0:9b334a45a8ff	1059	* @note When the memory read protection level is selected (RDP level = 1),
bogdanm	0:9b334a45a8ff	1060	* it is not possible to program or erase the flash sector i if CortexM4
bogdanm	0:9b334a45a8ff	1061	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm	0:9b334a45a8ff	1062	* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bogdanm	0:9b334a45a8ff	1063	*
bogdanm	0:9b334a45a8ff	1064	* @param WRPSector: specifies the sector(s) to be write protected.
bogdanm	0:9b334a45a8ff	1065	* The value of this parameter depend on device used within the same series
bogdanm	0:9b334a45a8ff	1066	*
bogdanm	0:9b334a45a8ff	1067	* @param Banks: Enable write protection on all the sectors for the specific bank
bogdanm	0:9b334a45a8ff	1068	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1069	* @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm	0:9b334a45a8ff	1070	*
bogdanm	0:9b334a45a8ff	1071	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1072	*/
bogdanm	0:9b334a45a8ff	1073	static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
bogdanm	0:9b334a45a8ff	1074	{
bogdanm	0:9b334a45a8ff	1075	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1076
bogdanm	0:9b334a45a8ff	1077	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1078	assert_param(IS_OB_WRP_SECTOR(WRPSector));
bogdanm	0:9b334a45a8ff	1079	assert_param(IS_FLASH_BANK(Banks));
bogdanm	0:9b334a45a8ff	1080
bogdanm	0:9b334a45a8ff	1081	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1082	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1083
bogdanm	0:9b334a45a8ff	1084	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	1085	{
bogdanm	0:9b334a45a8ff	1086	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
bogdanm	0:9b334a45a8ff	1087	}
bogdanm	0:9b334a45a8ff	1088
bogdanm	0:9b334a45a8ff	1089	return status;
bogdanm	0:9b334a45a8ff	1090	}
bogdanm	0:9b334a45a8ff	1091
bogdanm	0:9b334a45a8ff	1092	/**
bogdanm	0:9b334a45a8ff	1093	* @brief Disable the write protection of the desired bank 1 sectors
bogdanm	0:9b334a45a8ff	1094	*
bogdanm	0:9b334a45a8ff	1095	* @note When the memory read protection level is selected (RDP level = 1),
bogdanm	0:9b334a45a8ff	1096	* it is not possible to program or erase the flash sector i if CortexM4
bogdanm	0:9b334a45a8ff	1097	* debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm	0:9b334a45a8ff	1098	* @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bogdanm	0:9b334a45a8ff	1099	*
bogdanm	0:9b334a45a8ff	1100	* @param WRPSector: specifies the sector(s) to be write protected.
bogdanm	0:9b334a45a8ff	1101	* The value of this parameter depend on device used within the same series
bogdanm	0:9b334a45a8ff	1102	*
bogdanm	0:9b334a45a8ff	1103	* @param Banks: Enable write protection on all the sectors for the specific bank
bogdanm	0:9b334a45a8ff	1104	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1105	* @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm	0:9b334a45a8ff	1106	*
bogdanm	0:9b334a45a8ff	1107	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1108	*/
bogdanm	0:9b334a45a8ff	1109	static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
bogdanm	0:9b334a45a8ff	1110	{
bogdanm	0:9b334a45a8ff	1111	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1112
bogdanm	0:9b334a45a8ff	1113	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1114	assert_param(IS_OB_WRP_SECTOR(WRPSector));
bogdanm	0:9b334a45a8ff	1115	assert_param(IS_FLASH_BANK(Banks));
bogdanm	0:9b334a45a8ff	1116
bogdanm	0:9b334a45a8ff	1117	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1118	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1119
bogdanm	0:9b334a45a8ff	1120	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	1121	{
bogdanm	0:9b334a45a8ff	1122	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)WRPSector;
bogdanm	0:9b334a45a8ff	1123	}
bogdanm	0:9b334a45a8ff	1124
bogdanm	0:9b334a45a8ff	1125	return status;
bogdanm	0:9b334a45a8ff	1126	}
mbed_official	19:112740acecfa	1127	#endif /* STM32F40xxx \|\| STM32F41xxx \|\| STM32F401xx \|\| STM32F410xx \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	1128
mbed_official	19:112740acecfa	1129	#if defined(STM32F401xC) \|\| defined(STM32F401xE) \|\| defined(STM32F410Tx) \|\| defined(STM32F410Cx) \|\| defined(STM32F410Rx) \|\|\
mbed_official	19:112740acecfa	1130	defined(STM32F411xE) \|\| defined(STM32F446xx)
bogdanm	0:9b334a45a8ff	1131	/**
bogdanm	0:9b334a45a8ff	1132	* @brief Enable the read/write protection (PCROP) of the desired sectors.
bogdanm	0:9b334a45a8ff	1133	* @note This function can be used only for STM32F401xx devices.
bogdanm	0:9b334a45a8ff	1134	* @param Sector specifies the sector(s) to be read/write protected or unprotected.
bogdanm	0:9b334a45a8ff	1135	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1136	* @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
bogdanm	0:9b334a45a8ff	1137	* @arg OB_PCROP_Sector_All
bogdanm	0:9b334a45a8ff	1138	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1139	*/
bogdanm	0:9b334a45a8ff	1140	static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
bogdanm	0:9b334a45a8ff	1141	{
bogdanm	0:9b334a45a8ff	1142	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1143
bogdanm	0:9b334a45a8ff	1144	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1145	assert_param(IS_OB_PCROP(Sector));
bogdanm	0:9b334a45a8ff	1146
bogdanm	0:9b334a45a8ff	1147	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1148	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1149
bogdanm	0:9b334a45a8ff	1150	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	1151	{
bogdanm	0:9b334a45a8ff	1152	(__IO uint16_t)OPTCR_BYTE2_ADDRESS \|= (uint16_t)Sector;
bogdanm	0:9b334a45a8ff	1153	}
bogdanm	0:9b334a45a8ff	1154
bogdanm	0:9b334a45a8ff	1155	return status;
bogdanm	0:9b334a45a8ff	1156	}
bogdanm	0:9b334a45a8ff	1157
bogdanm	0:9b334a45a8ff	1158
bogdanm	0:9b334a45a8ff	1159	/**
bogdanm	0:9b334a45a8ff	1160	* @brief Disable the read/write protection (PCROP) of the desired sectors.
bogdanm	0:9b334a45a8ff	1161	* @note This function can be used only for STM32F401xx devices.
bogdanm	0:9b334a45a8ff	1162	* @param Sector specifies the sector(s) to be read/write protected or unprotected.
bogdanm	0:9b334a45a8ff	1163	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1164	* @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
bogdanm	0:9b334a45a8ff	1165	* @arg OB_PCROP_Sector_All
bogdanm	0:9b334a45a8ff	1166	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1167	*/
bogdanm	0:9b334a45a8ff	1168	static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
bogdanm	0:9b334a45a8ff	1169	{
bogdanm	0:9b334a45a8ff	1170	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1171
bogdanm	0:9b334a45a8ff	1172	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1173	assert_param(IS_OB_PCROP(Sector));
bogdanm	0:9b334a45a8ff	1174
bogdanm	0:9b334a45a8ff	1175	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1176	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1177
bogdanm	0:9b334a45a8ff	1178	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	1179	{
bogdanm	0:9b334a45a8ff	1180	(__IO uint16_t)OPTCR_BYTE2_ADDRESS &= (~Sector);
bogdanm	0:9b334a45a8ff	1181	}
bogdanm	0:9b334a45a8ff	1182
bogdanm	0:9b334a45a8ff	1183	return status;
bogdanm	0:9b334a45a8ff	1184
bogdanm	0:9b334a45a8ff	1185	}
mbed_official	19:112740acecfa	1186	#endif /* STM32F401xC \|\| STM32F401xE \|\| STM32F411xE \|\| STM32F446xx */
bogdanm	0:9b334a45a8ff	1187
bogdanm	0:9b334a45a8ff	1188	/**
bogdanm	0:9b334a45a8ff	1189	* @brief Set the read protection level.
bogdanm	0:9b334a45a8ff	1190	* @param Level: specifies the read protection level.
bogdanm	0:9b334a45a8ff	1191	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1192	* @arg OB_RDP_LEVEL_0: No protection
bogdanm	0:9b334a45a8ff	1193	* @arg OB_RDP_LEVEL_1: Read protection of the memory
bogdanm	0:9b334a45a8ff	1194	* @arg OB_RDP_LEVEL_2: Full chip protection
bogdanm	0:9b334a45a8ff	1195	*
bogdanm	0:9b334a45a8ff	1196	* @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
bogdanm	0:9b334a45a8ff	1197	*
bogdanm	0:9b334a45a8ff	1198	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1199	*/
bogdanm	0:9b334a45a8ff	1200	static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
bogdanm	0:9b334a45a8ff	1201	{
bogdanm	0:9b334a45a8ff	1202	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1203
bogdanm	0:9b334a45a8ff	1204	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1205	assert_param(IS_OB_RDP_LEVEL(Level));
bogdanm	0:9b334a45a8ff	1206
bogdanm	0:9b334a45a8ff	1207	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1208	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1209
bogdanm	0:9b334a45a8ff	1210	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	1211	{
bogdanm	0:9b334a45a8ff	1212	(__IO uint8_t)OPTCR_BYTE1_ADDRESS = Level;
bogdanm	0:9b334a45a8ff	1213	}
bogdanm	0:9b334a45a8ff	1214
bogdanm	0:9b334a45a8ff	1215	return status;
bogdanm	0:9b334a45a8ff	1216	}
bogdanm	0:9b334a45a8ff	1217
bogdanm	0:9b334a45a8ff	1218	/**
bogdanm	0:9b334a45a8ff	1219	* @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
bogdanm	0:9b334a45a8ff	1220	* @param Iwdg: Selects the IWDG mode
bogdanm	0:9b334a45a8ff	1221	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1222	* @arg OB_IWDG_SW: Software IWDG selected
bogdanm	0:9b334a45a8ff	1223	* @arg OB_IWDG_HW: Hardware IWDG selected
bogdanm	0:9b334a45a8ff	1224	* @param Stop: Reset event when entering STOP mode.
bogdanm	0:9b334a45a8ff	1225	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1226	* @arg OB_STOP_NO_RST: No reset generated when entering in STOP
bogdanm	0:9b334a45a8ff	1227	* @arg OB_STOP_RST: Reset generated when entering in STOP
bogdanm	0:9b334a45a8ff	1228	* @param Stdby: Reset event when entering Standby mode.
bogdanm	0:9b334a45a8ff	1229	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1230	* @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
bogdanm	0:9b334a45a8ff	1231	* @arg OB_STDBY_RST: Reset generated when entering in STANDBY
bogdanm	0:9b334a45a8ff	1232	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1233	*/
bogdanm	0:9b334a45a8ff	1234	static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
bogdanm	0:9b334a45a8ff	1235	{
bogdanm	0:9b334a45a8ff	1236	uint8_t optiontmp = 0xFF;
bogdanm	0:9b334a45a8ff	1237	HAL_StatusTypeDef status = HAL_OK;
bogdanm	0:9b334a45a8ff	1238
bogdanm	0:9b334a45a8ff	1239	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1240	assert_param(IS_OB_IWDG_SOURCE(Iwdg));
bogdanm	0:9b334a45a8ff	1241	assert_param(IS_OB_STOP_SOURCE(Stop));
bogdanm	0:9b334a45a8ff	1242	assert_param(IS_OB_STDBY_SOURCE(Stdby));
bogdanm	0:9b334a45a8ff	1243
bogdanm	0:9b334a45a8ff	1244	/* Wait for last operation to be completed */
bogdanm	0:9b334a45a8ff	1245	status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm	0:9b334a45a8ff	1246
bogdanm	0:9b334a45a8ff	1247	if(status == HAL_OK)
bogdanm	0:9b334a45a8ff	1248	{
bogdanm	0:9b334a45a8ff	1249	/* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
bogdanm	0:9b334a45a8ff	1250	optiontmp = (uint8_t)(((__IO uint8_t )OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
bogdanm	0:9b334a45a8ff	1251
bogdanm	0:9b334a45a8ff	1252	/* Update User Option Byte */
bogdanm	0:9b334a45a8ff	1253	(__IO uint8_t )OPTCR_BYTE0_ADDRESS = Iwdg \| (uint8_t)(Stdby \| (uint8_t)(Stop \| ((uint8_t)optiontmp)));
bogdanm	0:9b334a45a8ff	1254	}
bogdanm	0:9b334a45a8ff	1255
bogdanm	0:9b334a45a8ff	1256	return status;
bogdanm	0:9b334a45a8ff	1257	}
bogdanm	0:9b334a45a8ff	1258
bogdanm	0:9b334a45a8ff	1259	/**
bogdanm	0:9b334a45a8ff	1260	* @brief Set the BOR Level.
bogdanm	0:9b334a45a8ff	1261	* @param Level: specifies the Option Bytes BOR Reset Level.
bogdanm	0:9b334a45a8ff	1262	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1263	* @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
bogdanm	0:9b334a45a8ff	1264	* @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
bogdanm	0:9b334a45a8ff	1265	* @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
bogdanm	0:9b334a45a8ff	1266	* @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
bogdanm	0:9b334a45a8ff	1267	* @retval HAL Status
bogdanm	0:9b334a45a8ff	1268	*/
bogdanm	0:9b334a45a8ff	1269	static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
bogdanm	0:9b334a45a8ff	1270	{
bogdanm	0:9b334a45a8ff	1271	/* Check the parameters */
bogdanm	0:9b334a45a8ff	1272	assert_param(IS_OB_BOR_LEVEL(Level));
bogdanm	0:9b334a45a8ff	1273
bogdanm	0:9b334a45a8ff	1274	/* Set the BOR Level */
bogdanm	0:9b334a45a8ff	1275	(__IO uint8_t )OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
bogdanm	0:9b334a45a8ff	1276	(__IO uint8_t )OPTCR_BYTE0_ADDRESS \|= Level;
bogdanm	0:9b334a45a8ff	1277
mbed_official	19:112740acecfa	1278	return HAL_OK;
mbed_official	19:112740acecfa	1279
bogdanm	0:9b334a45a8ff	1280	}
bogdanm	0:9b334a45a8ff	1281
bogdanm	0:9b334a45a8ff	1282	/**
bogdanm	0:9b334a45a8ff	1283	* @brief Return the FLASH User Option Byte value.
bogdanm	0:9b334a45a8ff	1284	* @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
bogdanm	0:9b334a45a8ff	1285	* and RST_STDBY(Bit2).
bogdanm	0:9b334a45a8ff	1286	*/
bogdanm	0:9b334a45a8ff	1287	static uint8_t FLASH_OB_GetUser(void)
bogdanm	0:9b334a45a8ff	1288	{
bogdanm	0:9b334a45a8ff	1289	/* Return the User Option Byte */
bogdanm	0:9b334a45a8ff	1290	return ((uint8_t)(FLASH->OPTCR & 0xE0));
bogdanm	0:9b334a45a8ff	1291	}
bogdanm	0:9b334a45a8ff	1292
bogdanm	0:9b334a45a8ff	1293	/**
bogdanm	0:9b334a45a8ff	1294	* @brief Return the FLASH Write Protection Option Bytes value.
bogdanm	0:9b334a45a8ff	1295	* @retval uint16_t FLASH Write Protection Option Bytes value
bogdanm	0:9b334a45a8ff	1296	*/
bogdanm	0:9b334a45a8ff	1297	static uint16_t FLASH_OB_GetWRP(void)
bogdanm	0:9b334a45a8ff	1298	{
bogdanm	0:9b334a45a8ff	1299	/* Return the FLASH write protection Register value */
bogdanm	0:9b334a45a8ff	1300	return ((__IO uint16_t )(OPTCR_BYTE2_ADDRESS));
bogdanm	0:9b334a45a8ff	1301	}
bogdanm	0:9b334a45a8ff	1302
bogdanm	0:9b334a45a8ff	1303	/**
bogdanm	0:9b334a45a8ff	1304	* @brief Returns the FLASH Read Protection level.
bogdanm	0:9b334a45a8ff	1305	* @retval FLASH ReadOut Protection Status:
bogdanm	0:9b334a45a8ff	1306	* This parameter can be one of the following values:
bogdanm	0:9b334a45a8ff	1307	* @arg OB_RDP_LEVEL_0: No protection
bogdanm	0:9b334a45a8ff	1308	* @arg OB_RDP_LEVEL_1: Read protection of the memory
bogdanm	0:9b334a45a8ff	1309	* @arg OB_RDP_LEVEL_2: Full chip protection
bogdanm	0:9b334a45a8ff	1310	*/
bogdanm	0:9b334a45a8ff	1311	static uint8_t FLASH_OB_GetRDP(void)
bogdanm	0:9b334a45a8ff	1312	{
bogdanm	0:9b334a45a8ff	1313	uint8_t readstatus = OB_RDP_LEVEL_0;
bogdanm	0:9b334a45a8ff	1314
bogdanm	0:9b334a45a8ff	1315	if(((__IO uint8_t)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
bogdanm	0:9b334a45a8ff	1316	{
bogdanm	0:9b334a45a8ff	1317	readstatus = OB_RDP_LEVEL_2;
bogdanm	0:9b334a45a8ff	1318	}
bogdanm	0:9b334a45a8ff	1319	else if(((__IO uint8_t)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
bogdanm	0:9b334a45a8ff	1320	{
bogdanm	0:9b334a45a8ff	1321	readstatus = OB_RDP_LEVEL_1;
bogdanm	0:9b334a45a8ff	1322	}
bogdanm	0:9b334a45a8ff	1323	else
bogdanm	0:9b334a45a8ff	1324	{
bogdanm	0:9b334a45a8ff	1325	readstatus = OB_RDP_LEVEL_0;
bogdanm	0:9b334a45a8ff	1326	}
mbed_official	19:112740acecfa	1327
bogdanm	0:9b334a45a8ff	1328	return readstatus;
bogdanm	0:9b334a45a8ff	1329	}
bogdanm	0:9b334a45a8ff	1330
bogdanm	0:9b334a45a8ff	1331	/**
bogdanm	0:9b334a45a8ff	1332	* @brief Returns the FLASH BOR level.
bogdanm	0:9b334a45a8ff	1333	* @retval uint8_t The FLASH BOR level:
bogdanm	0:9b334a45a8ff	1334	* - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
bogdanm	0:9b334a45a8ff	1335	* - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
bogdanm	0:9b334a45a8ff	1336	* - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
bogdanm	0:9b334a45a8ff	1337	* - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
bogdanm	0:9b334a45a8ff	1338	*/
bogdanm	0:9b334a45a8ff	1339	static uint8_t FLASH_OB_GetBOR(void)
bogdanm	0:9b334a45a8ff	1340	{
bogdanm	0:9b334a45a8ff	1341	/* Return the FLASH BOR level */
bogdanm	0:9b334a45a8ff	1342	return (uint8_t)((__IO uint8_t )(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
bogdanm	0:9b334a45a8ff	1343	}
bogdanm	0:9b334a45a8ff	1344
bogdanm	0:9b334a45a8ff	1345	/**
bogdanm	0:9b334a45a8ff	1346	* @}
bogdanm	0:9b334a45a8ff	1347	*/
bogdanm	0:9b334a45a8ff	1348
bogdanm	0:9b334a45a8ff	1349	#endif /* HAL_FLASH_MODULE_ENABLED */
bogdanm	0:9b334a45a8ff	1350
bogdanm	0:9b334a45a8ff	1351	/**
bogdanm	0:9b334a45a8ff	1352	* @}
bogdanm	0:9b334a45a8ff	1353	*/
bogdanm	0:9b334a45a8ff	1354
bogdanm	0:9b334a45a8ff	1355	/**
bogdanm	0:9b334a45a8ff	1356	* @}
bogdanm	0:9b334a45a8ff	1357	*/
bogdanm	0:9b334a45a8ff	1358
bogdanm	0:9b334a45a8ff	1359	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	16 May 2016
Imports:	1
Forks:	0
Commits:	130
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_flash_ex.c@129:2e517c56bcfb, 2016-05-16 (annotated)

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