fix LPC812 PWM

Dependents:   IR_LED_Send

Fork of mbed-dev by mbed official

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
19:112740acecfa
Initial commit on mbed-dev

Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f4xx_hal_flash_ex.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.3.2
bogdanm 0:9b334a45a8ff 6 * @date 26-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief Extended FLASH HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the FLASH extension peripheral:
bogdanm 0:9b334a45a8ff 10 * + Extended programming operations functions
bogdanm 0:9b334a45a8ff 11 *
bogdanm 0:9b334a45a8ff 12 @verbatim
bogdanm 0:9b334a45a8ff 13 ==============================================================================
bogdanm 0:9b334a45a8ff 14 ##### Flash Extension features #####
bogdanm 0:9b334a45a8ff 15 ==============================================================================
bogdanm 0:9b334a45a8ff 16
bogdanm 0:9b334a45a8ff 17 [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
bogdanm 0:9b334a45a8ff 18 STM32F429xx/439xx devices contains the following additional features
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
bogdanm 0:9b334a45a8ff 21 capability (RWW)
bogdanm 0:9b334a45a8ff 22 (+) Dual bank memory organization
bogdanm 0:9b334a45a8ff 23 (+) PCROP protection for all banks
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 26 ==============================================================================
bogdanm 0:9b334a45a8ff 27 [..] This driver provides functions to configure and program the FLASH memory
bogdanm 0:9b334a45a8ff 28 of all STM32F427xx/437xx andSTM32F429xx/439xx devices. It includes
bogdanm 0:9b334a45a8ff 29 (#) FLASH Memory Erase functions:
bogdanm 0:9b334a45a8ff 30 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
bogdanm 0:9b334a45a8ff 31 HAL_FLASH_Lock() functions
bogdanm 0:9b334a45a8ff 32 (++) Erase function: Erase sector, erase all sectors
bogdanm 0:9b334a45a8ff 33 (++) There are two modes of erase :
bogdanm 0:9b334a45a8ff 34 (+++) Polling Mode using HAL_FLASHEx_Erase()
bogdanm 0:9b334a45a8ff 35 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
bogdanm 0:9b334a45a8ff 38 (++) Set/Reset the write protection
bogdanm 0:9b334a45a8ff 39 (++) Set the Read protection Level
bogdanm 0:9b334a45a8ff 40 (++) Set the BOR level
bogdanm 0:9b334a45a8ff 41 (++) Program the user Option Bytes
bogdanm 0:9b334a45a8ff 42 (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
bogdanm 0:9b334a45a8ff 43 (++) Extended space (bank 2) erase function
bogdanm 0:9b334a45a8ff 44 (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
bogdanm 0:9b334a45a8ff 45 (++) Dual Boot activation
bogdanm 0:9b334a45a8ff 46 (++) Write protection configuration for bank 2
bogdanm 0:9b334a45a8ff 47 (++) PCROP protection configuration and control for both banks
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 @endverbatim
bogdanm 0:9b334a45a8ff 50 ******************************************************************************
bogdanm 0:9b334a45a8ff 51 * @attention
bogdanm 0:9b334a45a8ff 52 *
bogdanm 0:9b334a45a8ff 53 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 54 *
bogdanm 0:9b334a45a8ff 55 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 56 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 57 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 58 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 59 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 60 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 61 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 62 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 63 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 64 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 65 *
bogdanm 0:9b334a45a8ff 66 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 67 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 69 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 72 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 73 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 74 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 75 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 76 *
bogdanm 0:9b334a45a8ff 77 ******************************************************************************
bogdanm 0:9b334a45a8ff 78 */
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 81 #include "stm32f4xx_hal.h"
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 0:9b334a45a8ff 84 * @{
bogdanm 0:9b334a45a8ff 85 */
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87 /** @defgroup FLASHEx FLASHEx
bogdanm 0:9b334a45a8ff 88 * @brief FLASH HAL Extension module driver
bogdanm 0:9b334a45a8ff 89 * @{
bogdanm 0:9b334a45a8ff 90 */
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 #ifdef HAL_FLASH_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 93
bogdanm 0:9b334a45a8ff 94 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 95 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 96 /** @addtogroup FLASHEx_Private_Constants
bogdanm 0:9b334a45a8ff 97 * @{
bogdanm 0:9b334a45a8ff 98 */
bogdanm 0:9b334a45a8ff 99 #define SECTOR_MASK ((uint32_t)0xFFFFFF07)
bogdanm 0:9b334a45a8ff 100 #define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
bogdanm 0:9b334a45a8ff 101 /**
bogdanm 0:9b334a45a8ff 102 * @}
bogdanm 0:9b334a45a8ff 103 */
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 106 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 107 /** @addtogroup FLASHEx_Private_Variables
bogdanm 0:9b334a45a8ff 108 * @{
bogdanm 0:9b334a45a8ff 109 */
bogdanm 0:9b334a45a8ff 110 extern FLASH_ProcessTypeDef pFlash;
bogdanm 0:9b334a45a8ff 111 /**
bogdanm 0:9b334a45a8ff 112 * @}
bogdanm 0:9b334a45a8ff 113 */
bogdanm 0:9b334a45a8ff 114
bogdanm 0:9b334a45a8ff 115 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 116 /** @addtogroup FLASHEx_Private_Functions
bogdanm 0:9b334a45a8ff 117 * @{
bogdanm 0:9b334a45a8ff 118 */
bogdanm 0:9b334a45a8ff 119 /* Option bytes control */
bogdanm 0:9b334a45a8ff 120 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
bogdanm 0:9b334a45a8ff 121 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
bogdanm 0:9b334a45a8ff 122 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
bogdanm 0:9b334a45a8ff 123 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
bogdanm 0:9b334a45a8ff 124 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
bogdanm 0:9b334a45a8ff 125 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
bogdanm 0:9b334a45a8ff 126 static uint8_t FLASH_OB_GetUser(void);
bogdanm 0:9b334a45a8ff 127 static uint16_t FLASH_OB_GetWRP(void);
bogdanm 0:9b334a45a8ff 128 static uint8_t FLASH_OB_GetRDP(void);
bogdanm 0:9b334a45a8ff 129 static uint8_t FLASH_OB_GetBOR(void);
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
bogdanm 0:9b334a45a8ff 132 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
bogdanm 0:9b334a45a8ff 133 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
bogdanm 0:9b334a45a8ff 134 #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
bogdanm 0:9b334a45a8ff 135
bogdanm 0:9b334a45a8ff 136 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
bogdanm 0:9b334a45a8ff 137 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
bogdanm 0:9b334a45a8ff 138 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
bogdanm 0:9b334a45a8ff 139 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
bogdanm 0:9b334a45a8ff 140 #endif /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
bogdanm 0:9b334a45a8ff 143 /**
bogdanm 0:9b334a45a8ff 144 * @}
bogdanm 0:9b334a45a8ff 145 */
bogdanm 0:9b334a45a8ff 146
bogdanm 0:9b334a45a8ff 147 /* Exported functions --------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 148 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
bogdanm 0:9b334a45a8ff 149 * @{
bogdanm 0:9b334a45a8ff 150 */
bogdanm 0:9b334a45a8ff 151
bogdanm 0:9b334a45a8ff 152 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
bogdanm 0:9b334a45a8ff 153 * @brief Extended IO operation functions
bogdanm 0:9b334a45a8ff 154 *
bogdanm 0:9b334a45a8ff 155 @verbatim
bogdanm 0:9b334a45a8ff 156 ===============================================================================
bogdanm 0:9b334a45a8ff 157 ##### Extended programming operation functions #####
bogdanm 0:9b334a45a8ff 158 ===============================================================================
bogdanm 0:9b334a45a8ff 159 [..]
bogdanm 0:9b334a45a8ff 160 This subsection provides a set of functions allowing to manage the Extension FLASH
bogdanm 0:9b334a45a8ff 161 programming operations Operations.
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 @endverbatim
bogdanm 0:9b334a45a8ff 164 * @{
bogdanm 0:9b334a45a8ff 165 */
bogdanm 0:9b334a45a8ff 166 /**
bogdanm 0:9b334a45a8ff 167 * @brief Perform a mass erase or erase the specified FLASH memory sectors
bogdanm 0:9b334a45a8ff 168 * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
bogdanm 0:9b334a45a8ff 169 * contains the configuration information for the erasing.
bogdanm 0:9b334a45a8ff 170 *
bogdanm 0:9b334a45a8ff 171 * @param[out] SectorError: pointer to variable that
bogdanm 0:9b334a45a8ff 172 * contains the configuration information on faulty sector in case of error
bogdanm 0:9b334a45a8ff 173 * (0xFFFFFFFF means that all the sectors have been correctly erased)
bogdanm 0:9b334a45a8ff 174 *
bogdanm 0:9b334a45a8ff 175 * @retval HAL Status
bogdanm 0:9b334a45a8ff 176 */
bogdanm 0:9b334a45a8ff 177 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
bogdanm 0:9b334a45a8ff 178 {
bogdanm 0:9b334a45a8ff 179 HAL_StatusTypeDef status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 180 uint32_t index = 0;
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 /* Process Locked */
bogdanm 0:9b334a45a8ff 183 __HAL_LOCK(&pFlash);
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 /* Check the parameters */
bogdanm 0:9b334a45a8ff 186 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 189 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 192 {
bogdanm 0:9b334a45a8ff 193 /*Initialization of SectorError variable*/
bogdanm 0:9b334a45a8ff 194 *SectorError = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm 0:9b334a45a8ff 197 {
bogdanm 0:9b334a45a8ff 198 /*Mass erase to be done*/
bogdanm 0:9b334a45a8ff 199 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
bogdanm 0:9b334a45a8ff 200
bogdanm 0:9b334a45a8ff 201 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 202 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 /* if the erase operation is completed, disable the MER Bit */
bogdanm 0:9b334a45a8ff 205 FLASH->CR &= (~FLASH_MER_BIT);
bogdanm 0:9b334a45a8ff 206 }
bogdanm 0:9b334a45a8ff 207 else
bogdanm 0:9b334a45a8ff 208 {
bogdanm 0:9b334a45a8ff 209 /* Check the parameters */
bogdanm 0:9b334a45a8ff 210 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 /* Erase by sector by sector to be done*/
bogdanm 0:9b334a45a8ff 213 for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
bogdanm 0:9b334a45a8ff 214 {
bogdanm 0:9b334a45a8ff 215 FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 218 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 /* If the erase operation is completed, disable the SER Bit */
bogdanm 0:9b334a45a8ff 221 FLASH->CR &= (~FLASH_CR_SER);
bogdanm 0:9b334a45a8ff 222 FLASH->CR &= SECTOR_MASK;
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 if(status != HAL_OK)
bogdanm 0:9b334a45a8ff 225 {
bogdanm 0:9b334a45a8ff 226 /* In case of error, stop erase procedure and return the faulty sector*/
bogdanm 0:9b334a45a8ff 227 *SectorError = index;
bogdanm 0:9b334a45a8ff 228 break;
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230 }
bogdanm 0:9b334a45a8ff 231 }
bogdanm 0:9b334a45a8ff 232 }
bogdanm 0:9b334a45a8ff 233
bogdanm 0:9b334a45a8ff 234 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 235 __HAL_UNLOCK(&pFlash);
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 return status;
bogdanm 0:9b334a45a8ff 238 }
bogdanm 0:9b334a45a8ff 239
bogdanm 0:9b334a45a8ff 240 /**
bogdanm 0:9b334a45a8ff 241 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
bogdanm 0:9b334a45a8ff 242 * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
bogdanm 0:9b334a45a8ff 243 * contains the configuration information for the erasing.
bogdanm 0:9b334a45a8ff 244 *
bogdanm 0:9b334a45a8ff 245 * @retval HAL Status
bogdanm 0:9b334a45a8ff 246 */
bogdanm 0:9b334a45a8ff 247 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
bogdanm 0:9b334a45a8ff 248 {
bogdanm 0:9b334a45a8ff 249 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /* Process Locked */
bogdanm 0:9b334a45a8ff 252 __HAL_LOCK(&pFlash);
bogdanm 0:9b334a45a8ff 253
bogdanm 0:9b334a45a8ff 254 /* Check the parameters */
bogdanm 0:9b334a45a8ff 255 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
bogdanm 0:9b334a45a8ff 256
bogdanm 0:9b334a45a8ff 257 /* Enable End of FLASH Operation interrupt */
bogdanm 0:9b334a45a8ff 258 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /* Enable Error source interrupt */
bogdanm 0:9b334a45a8ff 261 __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /* Clear pending flags (if any) */
bogdanm 0:9b334a45a8ff 264 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
bogdanm 0:9b334a45a8ff 265 FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
bogdanm 0:9b334a45a8ff 266
bogdanm 0:9b334a45a8ff 267 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
bogdanm 0:9b334a45a8ff 268 {
bogdanm 0:9b334a45a8ff 269 /*Mass erase to be done*/
bogdanm 0:9b334a45a8ff 270 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
bogdanm 0:9b334a45a8ff 271 pFlash.Bank = pEraseInit->Banks;
bogdanm 0:9b334a45a8ff 272 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
bogdanm 0:9b334a45a8ff 273 }
bogdanm 0:9b334a45a8ff 274 else
bogdanm 0:9b334a45a8ff 275 {
bogdanm 0:9b334a45a8ff 276 /* Erase by sector to be done*/
bogdanm 0:9b334a45a8ff 277
bogdanm 0:9b334a45a8ff 278 /* Check the parameters */
bogdanm 0:9b334a45a8ff 279 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
bogdanm 0:9b334a45a8ff 280
bogdanm 0:9b334a45a8ff 281 pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
bogdanm 0:9b334a45a8ff 282 pFlash.NbSectorsToErase = pEraseInit->NbSectors;
bogdanm 0:9b334a45a8ff 283 pFlash.Sector = pEraseInit->Sector;
bogdanm 0:9b334a45a8ff 284 pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286 /*Erase 1st sector and wait for IT*/
bogdanm 0:9b334a45a8ff 287 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
bogdanm 0:9b334a45a8ff 288 }
bogdanm 0:9b334a45a8ff 289
bogdanm 0:9b334a45a8ff 290 return status;
bogdanm 0:9b334a45a8ff 291 }
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293 /**
bogdanm 0:9b334a45a8ff 294 * @brief Program option bytes
bogdanm 0:9b334a45a8ff 295 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
bogdanm 0:9b334a45a8ff 296 * contains the configuration information for the programming.
bogdanm 0:9b334a45a8ff 297 *
bogdanm 0:9b334a45a8ff 298 * @retval HAL Status
bogdanm 0:9b334a45a8ff 299 */
bogdanm 0:9b334a45a8ff 300 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
bogdanm 0:9b334a45a8ff 301 {
bogdanm 0:9b334a45a8ff 302 HAL_StatusTypeDef status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 /* Process Locked */
bogdanm 0:9b334a45a8ff 305 __HAL_LOCK(&pFlash);
bogdanm 0:9b334a45a8ff 306
bogdanm 0:9b334a45a8ff 307 /* Check the parameters */
bogdanm 0:9b334a45a8ff 308 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
bogdanm 0:9b334a45a8ff 309
bogdanm 0:9b334a45a8ff 310 /*Write protection configuration*/
bogdanm 0:9b334a45a8ff 311 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
bogdanm 0:9b334a45a8ff 312 {
bogdanm 0:9b334a45a8ff 313 assert_param(IS_WRPSTATE(pOBInit->WRPState));
bogdanm 0:9b334a45a8ff 314 if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
bogdanm 0:9b334a45a8ff 315 {
bogdanm 0:9b334a45a8ff 316 /*Enable of Write protection on the selected Sector*/
bogdanm 0:9b334a45a8ff 317 status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
bogdanm 0:9b334a45a8ff 318 }
bogdanm 0:9b334a45a8ff 319 else
bogdanm 0:9b334a45a8ff 320 {
bogdanm 0:9b334a45a8ff 321 /*Disable of Write protection on the selected Sector*/
bogdanm 0:9b334a45a8ff 322 status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
bogdanm 0:9b334a45a8ff 323 }
bogdanm 0:9b334a45a8ff 324 }
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 /*Read protection configuration*/
bogdanm 0:9b334a45a8ff 327 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
bogdanm 0:9b334a45a8ff 328 {
bogdanm 0:9b334a45a8ff 329 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
bogdanm 0:9b334a45a8ff 330 }
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 /*USER configuration*/
bogdanm 0:9b334a45a8ff 333 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
bogdanm 0:9b334a45a8ff 334 {
bogdanm 0:9b334a45a8ff 335 status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
bogdanm 0:9b334a45a8ff 336 pOBInit->USERConfig&OB_STOP_NO_RST,
bogdanm 0:9b334a45a8ff 337 pOBInit->USERConfig&OB_STDBY_NO_RST);
bogdanm 0:9b334a45a8ff 338 }
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 /*BOR Level configuration*/
bogdanm 0:9b334a45a8ff 341 if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
bogdanm 0:9b334a45a8ff 342 {
bogdanm 0:9b334a45a8ff 343 status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
bogdanm 0:9b334a45a8ff 344 }
bogdanm 0:9b334a45a8ff 345
bogdanm 0:9b334a45a8ff 346 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 347 __HAL_UNLOCK(&pFlash);
bogdanm 0:9b334a45a8ff 348
bogdanm 0:9b334a45a8ff 349 return status;
bogdanm 0:9b334a45a8ff 350 }
bogdanm 0:9b334a45a8ff 351
bogdanm 0:9b334a45a8ff 352 /**
bogdanm 0:9b334a45a8ff 353 * @brief Get the Option byte configuration
bogdanm 0:9b334a45a8ff 354 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
bogdanm 0:9b334a45a8ff 355 * contains the configuration information for the programming.
bogdanm 0:9b334a45a8ff 356 *
bogdanm 0:9b334a45a8ff 357 * @retval None
bogdanm 0:9b334a45a8ff 358 */
bogdanm 0:9b334a45a8ff 359 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
bogdanm 0:9b334a45a8ff 360 {
bogdanm 0:9b334a45a8ff 361 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
bogdanm 0:9b334a45a8ff 362
bogdanm 0:9b334a45a8ff 363 /*Get WRP*/
bogdanm 0:9b334a45a8ff 364 pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 /*Get RDP Level*/
bogdanm 0:9b334a45a8ff 367 pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 /*Get USER*/
bogdanm 0:9b334a45a8ff 370 pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 /*Get BOR Level*/
bogdanm 0:9b334a45a8ff 373 pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
bogdanm 0:9b334a45a8ff 374 }
bogdanm 0:9b334a45a8ff 375
bogdanm 0:9b334a45a8ff 376 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
bogdanm 0:9b334a45a8ff 377 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
bogdanm 0:9b334a45a8ff 378 /**
bogdanm 0:9b334a45a8ff 379 * @brief Program option bytes
bogdanm 0:9b334a45a8ff 380 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
bogdanm 0:9b334a45a8ff 381 * contains the configuration information for the programming.
bogdanm 0:9b334a45a8ff 382 *
bogdanm 0:9b334a45a8ff 383 * @retval HAL Status
bogdanm 0:9b334a45a8ff 384 */
bogdanm 0:9b334a45a8ff 385 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
bogdanm 0:9b334a45a8ff 386 {
bogdanm 0:9b334a45a8ff 387 HAL_StatusTypeDef status = HAL_ERROR;
bogdanm 0:9b334a45a8ff 388
bogdanm 0:9b334a45a8ff 389 /* Check the parameters */
bogdanm 0:9b334a45a8ff 390 assert_param(IS_OBEX(pAdvOBInit->OptionType));
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /*Program PCROP option byte*/
bogdanm 0:9b334a45a8ff 393 if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
bogdanm 0:9b334a45a8ff 394 {
bogdanm 0:9b334a45a8ff 395 /* Check the parameters */
bogdanm 0:9b334a45a8ff 396 assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
bogdanm 0:9b334a45a8ff 397 if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
bogdanm 0:9b334a45a8ff 398 {
bogdanm 0:9b334a45a8ff 399 /*Enable of Write protection on the selected Sector*/
bogdanm 0:9b334a45a8ff 400 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
bogdanm 0:9b334a45a8ff 401 status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
bogdanm 0:9b334a45a8ff 402 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
bogdanm 0:9b334a45a8ff 403 status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
bogdanm 0:9b334a45a8ff 404 #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
bogdanm 0:9b334a45a8ff 405 }
bogdanm 0:9b334a45a8ff 406 else
bogdanm 0:9b334a45a8ff 407 {
bogdanm 0:9b334a45a8ff 408 /*Disable of Write protection on the selected Sector*/
bogdanm 0:9b334a45a8ff 409 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
bogdanm 0:9b334a45a8ff 410 status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
bogdanm 0:9b334a45a8ff 411 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
bogdanm 0:9b334a45a8ff 412 status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
bogdanm 0:9b334a45a8ff 413 #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
bogdanm 0:9b334a45a8ff 414 }
bogdanm 0:9b334a45a8ff 415 }
bogdanm 0:9b334a45a8ff 416
bogdanm 0:9b334a45a8ff 417 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
bogdanm 0:9b334a45a8ff 418 /*Program BOOT config option byte*/
bogdanm 0:9b334a45a8ff 419 if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
bogdanm 0:9b334a45a8ff 420 {
bogdanm 0:9b334a45a8ff 421 status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
bogdanm 0:9b334a45a8ff 422 }
bogdanm 0:9b334a45a8ff 423 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 0:9b334a45a8ff 424
bogdanm 0:9b334a45a8ff 425 return status;
bogdanm 0:9b334a45a8ff 426 }
bogdanm 0:9b334a45a8ff 427
bogdanm 0:9b334a45a8ff 428 /**
bogdanm 0:9b334a45a8ff 429 * @brief Get the OBEX byte configuration
bogdanm 0:9b334a45a8ff 430 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
bogdanm 0:9b334a45a8ff 431 * contains the configuration information for the programming.
bogdanm 0:9b334a45a8ff 432 *
bogdanm 0:9b334a45a8ff 433 * @retval None
bogdanm 0:9b334a45a8ff 434 */
bogdanm 0:9b334a45a8ff 435 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
bogdanm 0:9b334a45a8ff 436 {
bogdanm 0:9b334a45a8ff 437 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
bogdanm 0:9b334a45a8ff 438 /*Get Sector*/
bogdanm 0:9b334a45a8ff 439 pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
bogdanm 0:9b334a45a8ff 440 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx */
bogdanm 0:9b334a45a8ff 441 /*Get Sector for Bank1*/
bogdanm 0:9b334a45a8ff 442 pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
bogdanm 0:9b334a45a8ff 443
bogdanm 0:9b334a45a8ff 444 /*Get Sector for Bank2*/
bogdanm 0:9b334a45a8ff 445 pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
bogdanm 0:9b334a45a8ff 446
bogdanm 0:9b334a45a8ff 447 /*Get Boot config OB*/
bogdanm 0:9b334a45a8ff 448 pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
bogdanm 0:9b334a45a8ff 449 #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
bogdanm 0:9b334a45a8ff 450 }
bogdanm 0:9b334a45a8ff 451
bogdanm 0:9b334a45a8ff 452 /**
bogdanm 0:9b334a45a8ff 453 * @brief Select the Protection Mode
bogdanm 0:9b334a45a8ff 454 *
bogdanm 0:9b334a45a8ff 455 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
bogdanm 0:9b334a45a8ff 456 * Global Read Out Protection modification (from level1 to level0)
bogdanm 0:9b334a45a8ff 457 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
bogdanm 0:9b334a45a8ff 458 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
bogdanm 0:9b334a45a8ff 459 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx devices.
bogdanm 0:9b334a45a8ff 460 *
bogdanm 0:9b334a45a8ff 461 * @retval HAL Status
bogdanm 0:9b334a45a8ff 462 */
bogdanm 0:9b334a45a8ff 463 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
bogdanm 0:9b334a45a8ff 464 {
bogdanm 0:9b334a45a8ff 465 uint8_t optiontmp = 0xFF;
bogdanm 0:9b334a45a8ff 466
bogdanm 0:9b334a45a8ff 467 /* Mask SPRMOD bit */
bogdanm 0:9b334a45a8ff 468 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
bogdanm 0:9b334a45a8ff 469
bogdanm 0:9b334a45a8ff 470 /* Update Option Byte */
bogdanm 0:9b334a45a8ff 471 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473 return HAL_OK;
bogdanm 0:9b334a45a8ff 474 }
bogdanm 0:9b334a45a8ff 475
bogdanm 0:9b334a45a8ff 476 /**
bogdanm 0:9b334a45a8ff 477 * @brief Deselect the Protection Mode
bogdanm 0:9b334a45a8ff 478 *
bogdanm 0:9b334a45a8ff 479 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
bogdanm 0:9b334a45a8ff 480 * Global Read Out Protection modification (from level1 to level0)
bogdanm 0:9b334a45a8ff 481 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
bogdanm 0:9b334a45a8ff 482 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
bogdanm 0:9b334a45a8ff 483 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx devices.
bogdanm 0:9b334a45a8ff 484 *
bogdanm 0:9b334a45a8ff 485 * @retval HAL Status
bogdanm 0:9b334a45a8ff 486 */
bogdanm 0:9b334a45a8ff 487 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
bogdanm 0:9b334a45a8ff 488 {
bogdanm 0:9b334a45a8ff 489 uint8_t optiontmp = 0xFF;
bogdanm 0:9b334a45a8ff 490
bogdanm 0:9b334a45a8ff 491 /* Mask SPRMOD bit */
bogdanm 0:9b334a45a8ff 492 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
bogdanm 0:9b334a45a8ff 493
bogdanm 0:9b334a45a8ff 494 /* Update Option Byte */
bogdanm 0:9b334a45a8ff 495 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
bogdanm 0:9b334a45a8ff 496
bogdanm 0:9b334a45a8ff 497 return HAL_OK;
bogdanm 0:9b334a45a8ff 498 }
bogdanm 0:9b334a45a8ff 499 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F411xE */
bogdanm 0:9b334a45a8ff 500
bogdanm 0:9b334a45a8ff 501 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
bogdanm 0:9b334a45a8ff 502 /**
bogdanm 0:9b334a45a8ff 503 * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
bogdanm 0:9b334a45a8ff 504 * @note This function can be used only for STM32F427X and STM32F429X devices.
bogdanm 0:9b334a45a8ff 505 * @retval The FLASH Write Protection Option Bytes value
bogdanm 0:9b334a45a8ff 506 */
bogdanm 0:9b334a45a8ff 507 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
bogdanm 0:9b334a45a8ff 508 {
bogdanm 0:9b334a45a8ff 509 /* Return the FLASH write protection Register value */
bogdanm 0:9b334a45a8ff 510 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
bogdanm 0:9b334a45a8ff 511 }
bogdanm 0:9b334a45a8ff 512 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 0:9b334a45a8ff 513
bogdanm 0:9b334a45a8ff 514 /**
bogdanm 0:9b334a45a8ff 515 * @}
bogdanm 0:9b334a45a8ff 516 */
bogdanm 0:9b334a45a8ff 517
bogdanm 0:9b334a45a8ff 518 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
bogdanm 0:9b334a45a8ff 519 /**
bogdanm 0:9b334a45a8ff 520 * @brief Full erase of FLASH memory sectors
bogdanm 0:9b334a45a8ff 521 * @param VoltageRange: The device voltage range which defines the erase parallelism.
bogdanm 0:9b334a45a8ff 522 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 523 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
bogdanm 0:9b334a45a8ff 524 * the operation will be done by byte (8-bit)
bogdanm 0:9b334a45a8ff 525 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
bogdanm 0:9b334a45a8ff 526 * the operation will be done by half word (16-bit)
bogdanm 0:9b334a45a8ff 527 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
bogdanm 0:9b334a45a8ff 528 * the operation will be done by word (32-bit)
bogdanm 0:9b334a45a8ff 529 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bogdanm 0:9b334a45a8ff 530 * the operation will be done by double word (64-bit)
bogdanm 0:9b334a45a8ff 531 *
bogdanm 0:9b334a45a8ff 532 * @param Banks: Banks to be erased
bogdanm 0:9b334a45a8ff 533 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 534 * @arg FLASH_BANK_1: Bank1 to be erased
bogdanm 0:9b334a45a8ff 535 * @arg FLASH_BANK_2: Bank2 to be erased
bogdanm 0:9b334a45a8ff 536 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
bogdanm 0:9b334a45a8ff 537 *
bogdanm 0:9b334a45a8ff 538 * @retval HAL Status
bogdanm 0:9b334a45a8ff 539 */
bogdanm 0:9b334a45a8ff 540 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
bogdanm 0:9b334a45a8ff 541 {
bogdanm 0:9b334a45a8ff 542 uint32_t tmp_psize = 0;
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544 /* Check the parameters */
bogdanm 0:9b334a45a8ff 545 assert_param(IS_VOLTAGERANGE(VoltageRange));
bogdanm 0:9b334a45a8ff 546 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 547
bogdanm 0:9b334a45a8ff 548 /* if the previous operation is completed, proceed to erase all sectors */
bogdanm 0:9b334a45a8ff 549 FLASH->CR &= CR_PSIZE_MASK;
bogdanm 0:9b334a45a8ff 550 FLASH->CR |= tmp_psize;
bogdanm 0:9b334a45a8ff 551 if(Banks == FLASH_BANK_BOTH)
bogdanm 0:9b334a45a8ff 552 {
bogdanm 0:9b334a45a8ff 553 /* bank1 & bank2 will be erased*/
bogdanm 0:9b334a45a8ff 554 FLASH->CR |= FLASH_MER_BIT;
bogdanm 0:9b334a45a8ff 555 }
bogdanm 0:9b334a45a8ff 556 else if(Banks == FLASH_BANK_1)
bogdanm 0:9b334a45a8ff 557 {
bogdanm 0:9b334a45a8ff 558 /*Only bank1 will be erased*/
bogdanm 0:9b334a45a8ff 559 FLASH->CR |= FLASH_CR_MER1;
bogdanm 0:9b334a45a8ff 560 }
bogdanm 0:9b334a45a8ff 561 else
bogdanm 0:9b334a45a8ff 562 {
bogdanm 0:9b334a45a8ff 563 /*Only bank2 will be erased*/
bogdanm 0:9b334a45a8ff 564 FLASH->CR |= FLASH_CR_MER2;
bogdanm 0:9b334a45a8ff 565 }
bogdanm 0:9b334a45a8ff 566 FLASH->CR |= FLASH_CR_STRT;
bogdanm 0:9b334a45a8ff 567 }
bogdanm 0:9b334a45a8ff 568
bogdanm 0:9b334a45a8ff 569 /**
bogdanm 0:9b334a45a8ff 570 * @brief Erase the specified FLASH memory sector
bogdanm 0:9b334a45a8ff 571 * @param Sector: FLASH sector to erase
bogdanm 0:9b334a45a8ff 572 * The value of this parameter depend on device used within the same series
bogdanm 0:9b334a45a8ff 573 * @param VoltageRange: The device voltage range which defines the erase parallelism.
bogdanm 0:9b334a45a8ff 574 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 575 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
bogdanm 0:9b334a45a8ff 576 * the operation will be done by byte (8-bit)
bogdanm 0:9b334a45a8ff 577 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
bogdanm 0:9b334a45a8ff 578 * the operation will be done by half word (16-bit)
bogdanm 0:9b334a45a8ff 579 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
bogdanm 0:9b334a45a8ff 580 * the operation will be done by word (32-bit)
bogdanm 0:9b334a45a8ff 581 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bogdanm 0:9b334a45a8ff 582 * the operation will be done by double word (64-bit)
bogdanm 0:9b334a45a8ff 583 *
bogdanm 0:9b334a45a8ff 584 * @retval None
bogdanm 0:9b334a45a8ff 585 */
bogdanm 0:9b334a45a8ff 586 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
bogdanm 0:9b334a45a8ff 587 {
bogdanm 0:9b334a45a8ff 588 uint32_t tmp_psize = 0;
bogdanm 0:9b334a45a8ff 589
bogdanm 0:9b334a45a8ff 590 /* Check the parameters */
bogdanm 0:9b334a45a8ff 591 assert_param(IS_FLASH_SECTOR(Sector));
bogdanm 0:9b334a45a8ff 592 assert_param(IS_VOLTAGERANGE(VoltageRange));
bogdanm 0:9b334a45a8ff 593
bogdanm 0:9b334a45a8ff 594 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
bogdanm 0:9b334a45a8ff 595 {
bogdanm 0:9b334a45a8ff 596 tmp_psize = FLASH_PSIZE_BYTE;
bogdanm 0:9b334a45a8ff 597 }
bogdanm 0:9b334a45a8ff 598 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
bogdanm 0:9b334a45a8ff 599 {
bogdanm 0:9b334a45a8ff 600 tmp_psize = FLASH_PSIZE_HALF_WORD;
bogdanm 0:9b334a45a8ff 601 }
bogdanm 0:9b334a45a8ff 602 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
bogdanm 0:9b334a45a8ff 603 {
bogdanm 0:9b334a45a8ff 604 tmp_psize = FLASH_PSIZE_WORD;
bogdanm 0:9b334a45a8ff 605 }
bogdanm 0:9b334a45a8ff 606 else
bogdanm 0:9b334a45a8ff 607 {
bogdanm 0:9b334a45a8ff 608 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bogdanm 0:9b334a45a8ff 609 }
bogdanm 0:9b334a45a8ff 610
bogdanm 0:9b334a45a8ff 611 /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
bogdanm 0:9b334a45a8ff 612 if(Sector > FLASH_SECTOR_11)
bogdanm 0:9b334a45a8ff 613 {
bogdanm 0:9b334a45a8ff 614 Sector += 4;
bogdanm 0:9b334a45a8ff 615 }
bogdanm 0:9b334a45a8ff 616 /* If the previous operation is completed, proceed to erase the sector */
bogdanm 0:9b334a45a8ff 617 FLASH->CR &= CR_PSIZE_MASK;
bogdanm 0:9b334a45a8ff 618 FLASH->CR |= tmp_psize;
bogdanm 0:9b334a45a8ff 619 FLASH->CR &= SECTOR_MASK;
bogdanm 0:9b334a45a8ff 620 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
bogdanm 0:9b334a45a8ff 621 FLASH->CR |= FLASH_CR_STRT;
bogdanm 0:9b334a45a8ff 622 }
bogdanm 0:9b334a45a8ff 623
bogdanm 0:9b334a45a8ff 624 /**
bogdanm 0:9b334a45a8ff 625 * @brief Enable the write protection of the desired bank1 or bank 2 sectors
bogdanm 0:9b334a45a8ff 626 *
bogdanm 0:9b334a45a8ff 627 * @note When the memory read protection level is selected (RDP level = 1),
bogdanm 0:9b334a45a8ff 628 * it is not possible to program or erase the flash sector i if CortexM4
bogdanm 0:9b334a45a8ff 629 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm 0:9b334a45a8ff 630 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bogdanm 0:9b334a45a8ff 631 *
bogdanm 0:9b334a45a8ff 632 * @param WRPSector: specifies the sector(s) to be write protected.
bogdanm 0:9b334a45a8ff 633 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 634 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
bogdanm 0:9b334a45a8ff 635 * @arg OB_WRP_SECTOR_All
bogdanm 0:9b334a45a8ff 636 * @note BANK2 starts from OB_WRP_SECTOR_12
bogdanm 0:9b334a45a8ff 637 *
bogdanm 0:9b334a45a8ff 638 * @param Banks: Enable write protection on all the sectors for the specific bank
bogdanm 0:9b334a45a8ff 639 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 640 * @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm 0:9b334a45a8ff 641 * @arg FLASH_BANK_2: WRP on all sectors of bank2
bogdanm 0:9b334a45a8ff 642 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
bogdanm 0:9b334a45a8ff 643 *
bogdanm 0:9b334a45a8ff 644 * @retval HAL FLASH State
bogdanm 0:9b334a45a8ff 645 */
bogdanm 0:9b334a45a8ff 646 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
bogdanm 0:9b334a45a8ff 647 {
bogdanm 0:9b334a45a8ff 648 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 649
bogdanm 0:9b334a45a8ff 650 /* Check the parameters */
bogdanm 0:9b334a45a8ff 651 assert_param(IS_OB_WRP_SECTOR(WRPSector));
bogdanm 0:9b334a45a8ff 652 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 653
bogdanm 0:9b334a45a8ff 654 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 655 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 656
bogdanm 0:9b334a45a8ff 657 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 658 {
bogdanm 0:9b334a45a8ff 659 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
bogdanm 0:9b334a45a8ff 660 (WRPSector < OB_WRP_SECTOR_12))
bogdanm 0:9b334a45a8ff 661 {
bogdanm 0:9b334a45a8ff 662 if(WRPSector == OB_WRP_SECTOR_All)
bogdanm 0:9b334a45a8ff 663 {
bogdanm 0:9b334a45a8ff 664 /*Write protection on all sector of BANK1*/
bogdanm 0:9b334a45a8ff 665 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
bogdanm 0:9b334a45a8ff 666 }
bogdanm 0:9b334a45a8ff 667 else
bogdanm 0:9b334a45a8ff 668 {
bogdanm 0:9b334a45a8ff 669 /*Write protection done on sectors of BANK1*/
bogdanm 0:9b334a45a8ff 670 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
bogdanm 0:9b334a45a8ff 671 }
bogdanm 0:9b334a45a8ff 672 }
bogdanm 0:9b334a45a8ff 673 else
bogdanm 0:9b334a45a8ff 674 {
bogdanm 0:9b334a45a8ff 675 /*Write protection done on sectors of BANK2*/
bogdanm 0:9b334a45a8ff 676 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
bogdanm 0:9b334a45a8ff 677 }
bogdanm 0:9b334a45a8ff 678
bogdanm 0:9b334a45a8ff 679 /*Write protection on all sector of BANK2*/
bogdanm 0:9b334a45a8ff 680 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
bogdanm 0:9b334a45a8ff 681 {
bogdanm 0:9b334a45a8ff 682 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 683 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 684
bogdanm 0:9b334a45a8ff 685 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 686 {
bogdanm 0:9b334a45a8ff 687 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
bogdanm 0:9b334a45a8ff 688 }
bogdanm 0:9b334a45a8ff 689 }
bogdanm 0:9b334a45a8ff 690
bogdanm 0:9b334a45a8ff 691 }
bogdanm 0:9b334a45a8ff 692 return status;
bogdanm 0:9b334a45a8ff 693 }
bogdanm 0:9b334a45a8ff 694
bogdanm 0:9b334a45a8ff 695 /**
bogdanm 0:9b334a45a8ff 696 * @brief Disable the write protection of the desired bank1 or bank 2 sectors
bogdanm 0:9b334a45a8ff 697 *
bogdanm 0:9b334a45a8ff 698 * @note When the memory read protection level is selected (RDP level = 1),
bogdanm 0:9b334a45a8ff 699 * it is not possible to program or erase the flash sector i if CortexM4
bogdanm 0:9b334a45a8ff 700 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm 0:9b334a45a8ff 701 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bogdanm 0:9b334a45a8ff 702 *
bogdanm 0:9b334a45a8ff 703 * @param WRPSector: specifies the sector(s) to be write protected.
bogdanm 0:9b334a45a8ff 704 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 705 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
bogdanm 0:9b334a45a8ff 706 * @arg OB_WRP_Sector_All
bogdanm 0:9b334a45a8ff 707 * @note BANK2 starts from OB_WRP_SECTOR_12
bogdanm 0:9b334a45a8ff 708 *
bogdanm 0:9b334a45a8ff 709 * @param Banks: Disable write protection on all the sectors for the specific bank
bogdanm 0:9b334a45a8ff 710 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 711 * @arg FLASH_BANK_1: Bank1 to be erased
bogdanm 0:9b334a45a8ff 712 * @arg FLASH_BANK_2: Bank2 to be erased
bogdanm 0:9b334a45a8ff 713 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
bogdanm 0:9b334a45a8ff 714 *
bogdanm 0:9b334a45a8ff 715 * @retval HAL Status
bogdanm 0:9b334a45a8ff 716 */
bogdanm 0:9b334a45a8ff 717 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
bogdanm 0:9b334a45a8ff 718 {
bogdanm 0:9b334a45a8ff 719 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 720
bogdanm 0:9b334a45a8ff 721 /* Check the parameters */
bogdanm 0:9b334a45a8ff 722 assert_param(IS_OB_WRP_SECTOR(WRPSector));
bogdanm 0:9b334a45a8ff 723 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 724
bogdanm 0:9b334a45a8ff 725 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 726 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 727
bogdanm 0:9b334a45a8ff 728 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 729 {
bogdanm 0:9b334a45a8ff 730 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
bogdanm 0:9b334a45a8ff 731 (WRPSector < OB_WRP_SECTOR_12))
bogdanm 0:9b334a45a8ff 732 {
bogdanm 0:9b334a45a8ff 733 if(WRPSector == OB_WRP_SECTOR_All)
bogdanm 0:9b334a45a8ff 734 {
bogdanm 0:9b334a45a8ff 735 /*Write protection on all sector of BANK1*/
bogdanm 0:9b334a45a8ff 736 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
bogdanm 0:9b334a45a8ff 737 }
bogdanm 0:9b334a45a8ff 738 else
bogdanm 0:9b334a45a8ff 739 {
bogdanm 0:9b334a45a8ff 740 /*Write protection done on sectors of BANK1*/
bogdanm 0:9b334a45a8ff 741 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
bogdanm 0:9b334a45a8ff 742 }
bogdanm 0:9b334a45a8ff 743 }
bogdanm 0:9b334a45a8ff 744 else
bogdanm 0:9b334a45a8ff 745 {
bogdanm 0:9b334a45a8ff 746 /*Write protection done on sectors of BANK2*/
bogdanm 0:9b334a45a8ff 747 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
bogdanm 0:9b334a45a8ff 748 }
bogdanm 0:9b334a45a8ff 749
bogdanm 0:9b334a45a8ff 750 /*Write protection on all sector of BANK2*/
bogdanm 0:9b334a45a8ff 751 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
bogdanm 0:9b334a45a8ff 752 {
bogdanm 0:9b334a45a8ff 753 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 754 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 755
bogdanm 0:9b334a45a8ff 756 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 757 {
bogdanm 0:9b334a45a8ff 758 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
bogdanm 0:9b334a45a8ff 759 }
bogdanm 0:9b334a45a8ff 760 }
bogdanm 0:9b334a45a8ff 761
bogdanm 0:9b334a45a8ff 762 }
bogdanm 0:9b334a45a8ff 763
bogdanm 0:9b334a45a8ff 764 return status;
bogdanm 0:9b334a45a8ff 765 }
bogdanm 0:9b334a45a8ff 766
bogdanm 0:9b334a45a8ff 767 /**
bogdanm 0:9b334a45a8ff 768 * @brief Configure the Dual Bank Boot.
bogdanm 0:9b334a45a8ff 769 *
bogdanm 0:9b334a45a8ff 770 * @note This function can be used only for STM32F42xxx/43xxx devices.
bogdanm 0:9b334a45a8ff 771 *
bogdanm 0:9b334a45a8ff 772 * @param BootConfig specifies the Dual Bank Boot Option byte.
bogdanm 0:9b334a45a8ff 773 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 774 * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
bogdanm 0:9b334a45a8ff 775 * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
bogdanm 0:9b334a45a8ff 776 * @retval None
bogdanm 0:9b334a45a8ff 777 */
bogdanm 0:9b334a45a8ff 778 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
bogdanm 0:9b334a45a8ff 779 {
bogdanm 0:9b334a45a8ff 780 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 781
bogdanm 0:9b334a45a8ff 782 /* Check the parameters */
bogdanm 0:9b334a45a8ff 783 assert_param(IS_OB_BOOT(BootConfig));
bogdanm 0:9b334a45a8ff 784
bogdanm 0:9b334a45a8ff 785 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 786 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 787
bogdanm 0:9b334a45a8ff 788 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 789 {
bogdanm 0:9b334a45a8ff 790 /* Set Dual Bank Boot */
bogdanm 0:9b334a45a8ff 791 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
bogdanm 0:9b334a45a8ff 792 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
bogdanm 0:9b334a45a8ff 793 }
bogdanm 0:9b334a45a8ff 794
bogdanm 0:9b334a45a8ff 795 return status;
bogdanm 0:9b334a45a8ff 796 }
bogdanm 0:9b334a45a8ff 797
bogdanm 0:9b334a45a8ff 798 /**
bogdanm 0:9b334a45a8ff 799 * @brief Enable the read/write protection (PCROP) of the desired
bogdanm 0:9b334a45a8ff 800 * sectors of Bank 1 and/or Bank 2.
bogdanm 0:9b334a45a8ff 801 * @note This function can be used only for STM32F42xxx/43xxx devices.
bogdanm 0:9b334a45a8ff 802 * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
bogdanm 0:9b334a45a8ff 803 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 804 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
bogdanm 0:9b334a45a8ff 805 * @arg OB_PCROP_SECTOR__All
bogdanm 0:9b334a45a8ff 806 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
bogdanm 0:9b334a45a8ff 807 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 808 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
bogdanm 0:9b334a45a8ff 809 * @arg OB_PCROP_SECTOR__All
bogdanm 0:9b334a45a8ff 810 * @param Banks Enable PCROP protection on all the sectors for the specific bank
bogdanm 0:9b334a45a8ff 811 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 812 * @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm 0:9b334a45a8ff 813 * @arg FLASH_BANK_2: WRP on all sectors of bank2
bogdanm 0:9b334a45a8ff 814 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
bogdanm 0:9b334a45a8ff 815 *
bogdanm 0:9b334a45a8ff 816 * @retval HAL Status
bogdanm 0:9b334a45a8ff 817 */
bogdanm 0:9b334a45a8ff 818 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
bogdanm 0:9b334a45a8ff 819 {
bogdanm 0:9b334a45a8ff 820 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 821
bogdanm 0:9b334a45a8ff 822 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 823
bogdanm 0:9b334a45a8ff 824 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 825 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 826
bogdanm 0:9b334a45a8ff 827 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 828 {
bogdanm 0:9b334a45a8ff 829 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
bogdanm 0:9b334a45a8ff 830 {
bogdanm 0:9b334a45a8ff 831 assert_param(IS_OB_PCROP(SectorBank1));
bogdanm 0:9b334a45a8ff 832 /*Write protection done on sectors of BANK1*/
bogdanm 0:9b334a45a8ff 833 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
bogdanm 0:9b334a45a8ff 834 }
bogdanm 0:9b334a45a8ff 835 else
bogdanm 0:9b334a45a8ff 836 {
bogdanm 0:9b334a45a8ff 837 assert_param(IS_OB_PCROP(SectorBank2));
bogdanm 0:9b334a45a8ff 838 /*Write protection done on sectors of BANK2*/
bogdanm 0:9b334a45a8ff 839 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
bogdanm 0:9b334a45a8ff 840 }
bogdanm 0:9b334a45a8ff 841
bogdanm 0:9b334a45a8ff 842 /*Write protection on all sector of BANK2*/
bogdanm 0:9b334a45a8ff 843 if(Banks == FLASH_BANK_BOTH)
bogdanm 0:9b334a45a8ff 844 {
bogdanm 0:9b334a45a8ff 845 assert_param(IS_OB_PCROP(SectorBank2));
bogdanm 0:9b334a45a8ff 846 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 847 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 848
bogdanm 0:9b334a45a8ff 849 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 850 {
bogdanm 0:9b334a45a8ff 851 /*Write protection done on sectors of BANK2*/
bogdanm 0:9b334a45a8ff 852 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
bogdanm 0:9b334a45a8ff 853 }
bogdanm 0:9b334a45a8ff 854 }
bogdanm 0:9b334a45a8ff 855
bogdanm 0:9b334a45a8ff 856 }
bogdanm 0:9b334a45a8ff 857
bogdanm 0:9b334a45a8ff 858 return status;
bogdanm 0:9b334a45a8ff 859 }
bogdanm 0:9b334a45a8ff 860
bogdanm 0:9b334a45a8ff 861
bogdanm 0:9b334a45a8ff 862 /**
bogdanm 0:9b334a45a8ff 863 * @brief Disable the read/write protection (PCROP) of the desired
bogdanm 0:9b334a45a8ff 864 * sectors of Bank 1 and/or Bank 2.
bogdanm 0:9b334a45a8ff 865 * @note This function can be used only for STM32F42xxx/43xxx devices.
bogdanm 0:9b334a45a8ff 866 * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
bogdanm 0:9b334a45a8ff 867 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 868 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
bogdanm 0:9b334a45a8ff 869 * @arg OB_PCROP_SECTOR__All
bogdanm 0:9b334a45a8ff 870 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
bogdanm 0:9b334a45a8ff 871 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 872 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
bogdanm 0:9b334a45a8ff 873 * @arg OB_PCROP_SECTOR__All
bogdanm 0:9b334a45a8ff 874 * @param Banks Disable PCROP protection on all the sectors for the specific bank
bogdanm 0:9b334a45a8ff 875 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 876 * @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm 0:9b334a45a8ff 877 * @arg FLASH_BANK_2: WRP on all sectors of bank2
bogdanm 0:9b334a45a8ff 878 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
bogdanm 0:9b334a45a8ff 879 *
bogdanm 0:9b334a45a8ff 880 * @retval HAL Status
bogdanm 0:9b334a45a8ff 881 */
bogdanm 0:9b334a45a8ff 882 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
bogdanm 0:9b334a45a8ff 883 {
bogdanm 0:9b334a45a8ff 884 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 885
bogdanm 0:9b334a45a8ff 886 /* Check the parameters */
bogdanm 0:9b334a45a8ff 887 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 888
bogdanm 0:9b334a45a8ff 889 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 890 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 891
bogdanm 0:9b334a45a8ff 892 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 893 {
bogdanm 0:9b334a45a8ff 894 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
bogdanm 0:9b334a45a8ff 895 {
bogdanm 0:9b334a45a8ff 896 assert_param(IS_OB_PCROP(SectorBank1));
bogdanm 0:9b334a45a8ff 897 /*Write protection done on sectors of BANK1*/
bogdanm 0:9b334a45a8ff 898 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
bogdanm 0:9b334a45a8ff 899 }
bogdanm 0:9b334a45a8ff 900 else
bogdanm 0:9b334a45a8ff 901 {
bogdanm 0:9b334a45a8ff 902 /*Write protection done on sectors of BANK2*/
bogdanm 0:9b334a45a8ff 903 assert_param(IS_OB_PCROP(SectorBank2));
bogdanm 0:9b334a45a8ff 904 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
bogdanm 0:9b334a45a8ff 905 }
bogdanm 0:9b334a45a8ff 906
bogdanm 0:9b334a45a8ff 907 /*Write protection on all sector of BANK2*/
bogdanm 0:9b334a45a8ff 908 if(Banks == FLASH_BANK_BOTH)
bogdanm 0:9b334a45a8ff 909 {
bogdanm 0:9b334a45a8ff 910 assert_param(IS_OB_PCROP(SectorBank2));
bogdanm 0:9b334a45a8ff 911 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 912 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 913
bogdanm 0:9b334a45a8ff 914 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 915 {
bogdanm 0:9b334a45a8ff 916 /*Write protection done on sectors of BANK2*/
bogdanm 0:9b334a45a8ff 917 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
bogdanm 0:9b334a45a8ff 918 }
bogdanm 0:9b334a45a8ff 919 }
bogdanm 0:9b334a45a8ff 920
bogdanm 0:9b334a45a8ff 921 }
bogdanm 0:9b334a45a8ff 922
bogdanm 0:9b334a45a8ff 923 return status;
bogdanm 0:9b334a45a8ff 924
bogdanm 0:9b334a45a8ff 925 }
bogdanm 0:9b334a45a8ff 926
bogdanm 0:9b334a45a8ff 927 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 0:9b334a45a8ff 928
bogdanm 0:9b334a45a8ff 929 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) ||\
bogdanm 0:9b334a45a8ff 930 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
bogdanm 0:9b334a45a8ff 931 /**
bogdanm 0:9b334a45a8ff 932 * @brief Mass erase of FLASH memory
bogdanm 0:9b334a45a8ff 933 * @param VoltageRange: The device voltage range which defines the erase parallelism.
bogdanm 0:9b334a45a8ff 934 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 935 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
bogdanm 0:9b334a45a8ff 936 * the operation will be done by byte (8-bit)
bogdanm 0:9b334a45a8ff 937 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
bogdanm 0:9b334a45a8ff 938 * the operation will be done by half word (16-bit)
bogdanm 0:9b334a45a8ff 939 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
bogdanm 0:9b334a45a8ff 940 * the operation will be done by word (32-bit)
bogdanm 0:9b334a45a8ff 941 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bogdanm 0:9b334a45a8ff 942 * the operation will be done by double word (64-bit)
bogdanm 0:9b334a45a8ff 943 *
bogdanm 0:9b334a45a8ff 944 * @param Banks: Banks to be erased
bogdanm 0:9b334a45a8ff 945 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 946 * @arg FLASH_BANK_1: Bank1 to be erased
bogdanm 0:9b334a45a8ff 947 *
bogdanm 0:9b334a45a8ff 948 * @retval None
bogdanm 0:9b334a45a8ff 949 */
bogdanm 0:9b334a45a8ff 950 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
bogdanm 0:9b334a45a8ff 951 {
bogdanm 0:9b334a45a8ff 952 uint32_t tmp_psize = 0;
bogdanm 0:9b334a45a8ff 953
bogdanm 0:9b334a45a8ff 954 /* Check the parameters */
bogdanm 0:9b334a45a8ff 955 assert_param(IS_VOLTAGERANGE(VoltageRange));
bogdanm 0:9b334a45a8ff 956 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 957
bogdanm 0:9b334a45a8ff 958 /* If the previous operation is completed, proceed to erase all sectors */
bogdanm 0:9b334a45a8ff 959 FLASH->CR &= CR_PSIZE_MASK;
bogdanm 0:9b334a45a8ff 960 FLASH->CR |= tmp_psize;
bogdanm 0:9b334a45a8ff 961 FLASH->CR |= FLASH_CR_MER;
bogdanm 0:9b334a45a8ff 962 FLASH->CR |= FLASH_CR_STRT;
bogdanm 0:9b334a45a8ff 963 }
bogdanm 0:9b334a45a8ff 964
bogdanm 0:9b334a45a8ff 965 /**
bogdanm 0:9b334a45a8ff 966 * @brief Erase the specified FLASH memory sector
bogdanm 0:9b334a45a8ff 967 * @param Sector: FLASH sector to erase
bogdanm 0:9b334a45a8ff 968 * The value of this parameter depend on device used within the same series
bogdanm 0:9b334a45a8ff 969 * @param VoltageRange: The device voltage range which defines the erase parallelism.
bogdanm 0:9b334a45a8ff 970 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 971 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
bogdanm 0:9b334a45a8ff 972 * the operation will be done by byte (8-bit)
bogdanm 0:9b334a45a8ff 973 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
bogdanm 0:9b334a45a8ff 974 * the operation will be done by half word (16-bit)
bogdanm 0:9b334a45a8ff 975 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
bogdanm 0:9b334a45a8ff 976 * the operation will be done by word (32-bit)
bogdanm 0:9b334a45a8ff 977 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
bogdanm 0:9b334a45a8ff 978 * the operation will be done by double word (64-bit)
bogdanm 0:9b334a45a8ff 979 *
bogdanm 0:9b334a45a8ff 980 * @retval None
bogdanm 0:9b334a45a8ff 981 */
bogdanm 0:9b334a45a8ff 982 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
bogdanm 0:9b334a45a8ff 983 {
bogdanm 0:9b334a45a8ff 984 uint32_t tmp_psize = 0;
bogdanm 0:9b334a45a8ff 985
bogdanm 0:9b334a45a8ff 986 /* Check the parameters */
bogdanm 0:9b334a45a8ff 987 assert_param(IS_FLASH_SECTOR(Sector));
bogdanm 0:9b334a45a8ff 988 assert_param(IS_VOLTAGERANGE(VoltageRange));
bogdanm 0:9b334a45a8ff 989
bogdanm 0:9b334a45a8ff 990 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
bogdanm 0:9b334a45a8ff 991 {
bogdanm 0:9b334a45a8ff 992 tmp_psize = FLASH_PSIZE_BYTE;
bogdanm 0:9b334a45a8ff 993 }
bogdanm 0:9b334a45a8ff 994 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
bogdanm 0:9b334a45a8ff 995 {
bogdanm 0:9b334a45a8ff 996 tmp_psize = FLASH_PSIZE_HALF_WORD;
bogdanm 0:9b334a45a8ff 997 }
bogdanm 0:9b334a45a8ff 998 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
bogdanm 0:9b334a45a8ff 999 {
bogdanm 0:9b334a45a8ff 1000 tmp_psize = FLASH_PSIZE_WORD;
bogdanm 0:9b334a45a8ff 1001 }
bogdanm 0:9b334a45a8ff 1002 else
bogdanm 0:9b334a45a8ff 1003 {
bogdanm 0:9b334a45a8ff 1004 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
bogdanm 0:9b334a45a8ff 1005 }
bogdanm 0:9b334a45a8ff 1006
bogdanm 0:9b334a45a8ff 1007 /* If the previous operation is completed, proceed to erase the sector */
bogdanm 0:9b334a45a8ff 1008 FLASH->CR &= CR_PSIZE_MASK;
bogdanm 0:9b334a45a8ff 1009 FLASH->CR |= tmp_psize;
bogdanm 0:9b334a45a8ff 1010 FLASH->CR &= SECTOR_MASK;
bogdanm 0:9b334a45a8ff 1011 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
bogdanm 0:9b334a45a8ff 1012 FLASH->CR |= FLASH_CR_STRT;
bogdanm 0:9b334a45a8ff 1013 }
bogdanm 0:9b334a45a8ff 1014
bogdanm 0:9b334a45a8ff 1015 /**
bogdanm 0:9b334a45a8ff 1016 * @brief Enable the write protection of the desired bank 1 sectors
bogdanm 0:9b334a45a8ff 1017 *
bogdanm 0:9b334a45a8ff 1018 * @note When the memory read protection level is selected (RDP level = 1),
bogdanm 0:9b334a45a8ff 1019 * it is not possible to program or erase the flash sector i if CortexM4
bogdanm 0:9b334a45a8ff 1020 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm 0:9b334a45a8ff 1021 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bogdanm 0:9b334a45a8ff 1022 *
bogdanm 0:9b334a45a8ff 1023 * @param WRPSector: specifies the sector(s) to be write protected.
bogdanm 0:9b334a45a8ff 1024 * The value of this parameter depend on device used within the same series
bogdanm 0:9b334a45a8ff 1025 *
bogdanm 0:9b334a45a8ff 1026 * @param Banks: Enable write protection on all the sectors for the specific bank
bogdanm 0:9b334a45a8ff 1027 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1028 * @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm 0:9b334a45a8ff 1029 *
bogdanm 0:9b334a45a8ff 1030 * @retval HAL Status
bogdanm 0:9b334a45a8ff 1031 */
bogdanm 0:9b334a45a8ff 1032 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
bogdanm 0:9b334a45a8ff 1033 {
bogdanm 0:9b334a45a8ff 1034 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1035
bogdanm 0:9b334a45a8ff 1036 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1037 assert_param(IS_OB_WRP_SECTOR(WRPSector));
bogdanm 0:9b334a45a8ff 1038 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 1039
bogdanm 0:9b334a45a8ff 1040 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 1041 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 1042
bogdanm 0:9b334a45a8ff 1043 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 1044 {
bogdanm 0:9b334a45a8ff 1045 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
bogdanm 0:9b334a45a8ff 1046 }
bogdanm 0:9b334a45a8ff 1047
bogdanm 0:9b334a45a8ff 1048 return status;
bogdanm 0:9b334a45a8ff 1049 }
bogdanm 0:9b334a45a8ff 1050
bogdanm 0:9b334a45a8ff 1051 /**
bogdanm 0:9b334a45a8ff 1052 * @brief Disable the write protection of the desired bank 1 sectors
bogdanm 0:9b334a45a8ff 1053 *
bogdanm 0:9b334a45a8ff 1054 * @note When the memory read protection level is selected (RDP level = 1),
bogdanm 0:9b334a45a8ff 1055 * it is not possible to program or erase the flash sector i if CortexM4
bogdanm 0:9b334a45a8ff 1056 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
bogdanm 0:9b334a45a8ff 1057 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
bogdanm 0:9b334a45a8ff 1058 *
bogdanm 0:9b334a45a8ff 1059 * @param WRPSector: specifies the sector(s) to be write protected.
bogdanm 0:9b334a45a8ff 1060 * The value of this parameter depend on device used within the same series
bogdanm 0:9b334a45a8ff 1061 *
bogdanm 0:9b334a45a8ff 1062 * @param Banks: Enable write protection on all the sectors for the specific bank
bogdanm 0:9b334a45a8ff 1063 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1064 * @arg FLASH_BANK_1: WRP on all sectors of bank1
bogdanm 0:9b334a45a8ff 1065 *
bogdanm 0:9b334a45a8ff 1066 * @retval HAL Status
bogdanm 0:9b334a45a8ff 1067 */
bogdanm 0:9b334a45a8ff 1068 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
bogdanm 0:9b334a45a8ff 1069 {
bogdanm 0:9b334a45a8ff 1070 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1071
bogdanm 0:9b334a45a8ff 1072 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1073 assert_param(IS_OB_WRP_SECTOR(WRPSector));
bogdanm 0:9b334a45a8ff 1074 assert_param(IS_FLASH_BANK(Banks));
bogdanm 0:9b334a45a8ff 1075
bogdanm 0:9b334a45a8ff 1076 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 1077 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 1078
bogdanm 0:9b334a45a8ff 1079 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 1080 {
bogdanm 0:9b334a45a8ff 1081 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
bogdanm 0:9b334a45a8ff 1082 }
bogdanm 0:9b334a45a8ff 1083
bogdanm 0:9b334a45a8ff 1084 return status;
bogdanm 0:9b334a45a8ff 1085 }
bogdanm 0:9b334a45a8ff 1086 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F411xE || STM32F446xx */
bogdanm 0:9b334a45a8ff 1087
bogdanm 0:9b334a45a8ff 1088 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx)
bogdanm 0:9b334a45a8ff 1089 /**
bogdanm 0:9b334a45a8ff 1090 * @brief Enable the read/write protection (PCROP) of the desired sectors.
bogdanm 0:9b334a45a8ff 1091 * @note This function can be used only for STM32F401xx devices.
bogdanm 0:9b334a45a8ff 1092 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
bogdanm 0:9b334a45a8ff 1093 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1094 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
bogdanm 0:9b334a45a8ff 1095 * @arg OB_PCROP_Sector_All
bogdanm 0:9b334a45a8ff 1096 * @retval HAL Status
bogdanm 0:9b334a45a8ff 1097 */
bogdanm 0:9b334a45a8ff 1098 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
bogdanm 0:9b334a45a8ff 1099 {
bogdanm 0:9b334a45a8ff 1100 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1101
bogdanm 0:9b334a45a8ff 1102 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1103 assert_param(IS_OB_PCROP(Sector));
bogdanm 0:9b334a45a8ff 1104
bogdanm 0:9b334a45a8ff 1105 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 1106 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 1107
bogdanm 0:9b334a45a8ff 1108 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 1109 {
bogdanm 0:9b334a45a8ff 1110 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
bogdanm 0:9b334a45a8ff 1111 }
bogdanm 0:9b334a45a8ff 1112
bogdanm 0:9b334a45a8ff 1113 return status;
bogdanm 0:9b334a45a8ff 1114 }
bogdanm 0:9b334a45a8ff 1115
bogdanm 0:9b334a45a8ff 1116
bogdanm 0:9b334a45a8ff 1117 /**
bogdanm 0:9b334a45a8ff 1118 * @brief Disable the read/write protection (PCROP) of the desired sectors.
bogdanm 0:9b334a45a8ff 1119 * @note This function can be used only for STM32F401xx devices.
bogdanm 0:9b334a45a8ff 1120 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
bogdanm 0:9b334a45a8ff 1121 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1122 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
bogdanm 0:9b334a45a8ff 1123 * @arg OB_PCROP_Sector_All
bogdanm 0:9b334a45a8ff 1124 * @retval HAL Status
bogdanm 0:9b334a45a8ff 1125 */
bogdanm 0:9b334a45a8ff 1126 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
bogdanm 0:9b334a45a8ff 1127 {
bogdanm 0:9b334a45a8ff 1128 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1129
bogdanm 0:9b334a45a8ff 1130 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1131 assert_param(IS_OB_PCROP(Sector));
bogdanm 0:9b334a45a8ff 1132
bogdanm 0:9b334a45a8ff 1133 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 1134 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 1135
bogdanm 0:9b334a45a8ff 1136 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 1137 {
bogdanm 0:9b334a45a8ff 1138 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
bogdanm 0:9b334a45a8ff 1139 }
bogdanm 0:9b334a45a8ff 1140
bogdanm 0:9b334a45a8ff 1141 return status;
bogdanm 0:9b334a45a8ff 1142
bogdanm 0:9b334a45a8ff 1143 }
bogdanm 0:9b334a45a8ff 1144 #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
bogdanm 0:9b334a45a8ff 1145
bogdanm 0:9b334a45a8ff 1146 /**
bogdanm 0:9b334a45a8ff 1147 * @brief Set the read protection level.
bogdanm 0:9b334a45a8ff 1148 * @param Level: specifies the read protection level.
bogdanm 0:9b334a45a8ff 1149 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1150 * @arg OB_RDP_LEVEL_0: No protection
bogdanm 0:9b334a45a8ff 1151 * @arg OB_RDP_LEVEL_1: Read protection of the memory
bogdanm 0:9b334a45a8ff 1152 * @arg OB_RDP_LEVEL_2: Full chip protection
bogdanm 0:9b334a45a8ff 1153 *
bogdanm 0:9b334a45a8ff 1154 * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
bogdanm 0:9b334a45a8ff 1155 *
bogdanm 0:9b334a45a8ff 1156 * @retval HAL Status
bogdanm 0:9b334a45a8ff 1157 */
bogdanm 0:9b334a45a8ff 1158 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
bogdanm 0:9b334a45a8ff 1159 {
bogdanm 0:9b334a45a8ff 1160 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1161
bogdanm 0:9b334a45a8ff 1162 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1163 assert_param(IS_OB_RDP_LEVEL(Level));
bogdanm 0:9b334a45a8ff 1164
bogdanm 0:9b334a45a8ff 1165 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 1166 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 1167
bogdanm 0:9b334a45a8ff 1168 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 1169 {
bogdanm 0:9b334a45a8ff 1170 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
bogdanm 0:9b334a45a8ff 1171 }
bogdanm 0:9b334a45a8ff 1172
bogdanm 0:9b334a45a8ff 1173 return status;
bogdanm 0:9b334a45a8ff 1174 }
bogdanm 0:9b334a45a8ff 1175
bogdanm 0:9b334a45a8ff 1176 /**
bogdanm 0:9b334a45a8ff 1177 * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
bogdanm 0:9b334a45a8ff 1178 * @param Iwdg: Selects the IWDG mode
bogdanm 0:9b334a45a8ff 1179 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1180 * @arg OB_IWDG_SW: Software IWDG selected
bogdanm 0:9b334a45a8ff 1181 * @arg OB_IWDG_HW: Hardware IWDG selected
bogdanm 0:9b334a45a8ff 1182 * @param Stop: Reset event when entering STOP mode.
bogdanm 0:9b334a45a8ff 1183 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1184 * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
bogdanm 0:9b334a45a8ff 1185 * @arg OB_STOP_RST: Reset generated when entering in STOP
bogdanm 0:9b334a45a8ff 1186 * @param Stdby: Reset event when entering Standby mode.
bogdanm 0:9b334a45a8ff 1187 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1188 * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
bogdanm 0:9b334a45a8ff 1189 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
bogdanm 0:9b334a45a8ff 1190 * @retval HAL Status
bogdanm 0:9b334a45a8ff 1191 */
bogdanm 0:9b334a45a8ff 1192 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
bogdanm 0:9b334a45a8ff 1193 {
bogdanm 0:9b334a45a8ff 1194 uint8_t optiontmp = 0xFF;
bogdanm 0:9b334a45a8ff 1195 HAL_StatusTypeDef status = HAL_OK;
bogdanm 0:9b334a45a8ff 1196
bogdanm 0:9b334a45a8ff 1197 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1198 assert_param(IS_OB_IWDG_SOURCE(Iwdg));
bogdanm 0:9b334a45a8ff 1199 assert_param(IS_OB_STOP_SOURCE(Stop));
bogdanm 0:9b334a45a8ff 1200 assert_param(IS_OB_STDBY_SOURCE(Stdby));
bogdanm 0:9b334a45a8ff 1201
bogdanm 0:9b334a45a8ff 1202 /* Wait for last operation to be completed */
bogdanm 0:9b334a45a8ff 1203 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
bogdanm 0:9b334a45a8ff 1204
bogdanm 0:9b334a45a8ff 1205 if(status == HAL_OK)
bogdanm 0:9b334a45a8ff 1206 {
bogdanm 0:9b334a45a8ff 1207 /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
bogdanm 0:9b334a45a8ff 1208 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
bogdanm 0:9b334a45a8ff 1209
bogdanm 0:9b334a45a8ff 1210 /* Update User Option Byte */
bogdanm 0:9b334a45a8ff 1211 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
bogdanm 0:9b334a45a8ff 1212 }
bogdanm 0:9b334a45a8ff 1213
bogdanm 0:9b334a45a8ff 1214 return status;
bogdanm 0:9b334a45a8ff 1215 }
bogdanm 0:9b334a45a8ff 1216
bogdanm 0:9b334a45a8ff 1217 /**
bogdanm 0:9b334a45a8ff 1218 * @brief Set the BOR Level.
bogdanm 0:9b334a45a8ff 1219 * @param Level: specifies the Option Bytes BOR Reset Level.
bogdanm 0:9b334a45a8ff 1220 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1221 * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
bogdanm 0:9b334a45a8ff 1222 * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
bogdanm 0:9b334a45a8ff 1223 * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
bogdanm 0:9b334a45a8ff 1224 * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
bogdanm 0:9b334a45a8ff 1225 * @retval HAL Status
bogdanm 0:9b334a45a8ff 1226 */
bogdanm 0:9b334a45a8ff 1227 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
bogdanm 0:9b334a45a8ff 1228 {
bogdanm 0:9b334a45a8ff 1229 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1230 assert_param(IS_OB_BOR_LEVEL(Level));
bogdanm 0:9b334a45a8ff 1231
bogdanm 0:9b334a45a8ff 1232 /* Set the BOR Level */
bogdanm 0:9b334a45a8ff 1233 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
bogdanm 0:9b334a45a8ff 1234 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
bogdanm 0:9b334a45a8ff 1235
bogdanm 0:9b334a45a8ff 1236 return HAL_OK;
bogdanm 0:9b334a45a8ff 1237 }
bogdanm 0:9b334a45a8ff 1238
bogdanm 0:9b334a45a8ff 1239 /**
bogdanm 0:9b334a45a8ff 1240 * @brief Return the FLASH User Option Byte value.
bogdanm 0:9b334a45a8ff 1241 * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
bogdanm 0:9b334a45a8ff 1242 * and RST_STDBY(Bit2).
bogdanm 0:9b334a45a8ff 1243 */
bogdanm 0:9b334a45a8ff 1244 static uint8_t FLASH_OB_GetUser(void)
bogdanm 0:9b334a45a8ff 1245 {
bogdanm 0:9b334a45a8ff 1246 /* Return the User Option Byte */
bogdanm 0:9b334a45a8ff 1247 return ((uint8_t)(FLASH->OPTCR & 0xE0));
bogdanm 0:9b334a45a8ff 1248 }
bogdanm 0:9b334a45a8ff 1249
bogdanm 0:9b334a45a8ff 1250 /**
bogdanm 0:9b334a45a8ff 1251 * @brief Return the FLASH Write Protection Option Bytes value.
bogdanm 0:9b334a45a8ff 1252 * @retval uint16_t FLASH Write Protection Option Bytes value
bogdanm 0:9b334a45a8ff 1253 */
bogdanm 0:9b334a45a8ff 1254 static uint16_t FLASH_OB_GetWRP(void)
bogdanm 0:9b334a45a8ff 1255 {
bogdanm 0:9b334a45a8ff 1256 /* Return the FLASH write protection Register value */
bogdanm 0:9b334a45a8ff 1257 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
bogdanm 0:9b334a45a8ff 1258 }
bogdanm 0:9b334a45a8ff 1259
bogdanm 0:9b334a45a8ff 1260 /**
bogdanm 0:9b334a45a8ff 1261 * @brief Returns the FLASH Read Protection level.
bogdanm 0:9b334a45a8ff 1262 * @retval FLASH ReadOut Protection Status:
bogdanm 0:9b334a45a8ff 1263 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 1264 * @arg OB_RDP_LEVEL_0: No protection
bogdanm 0:9b334a45a8ff 1265 * @arg OB_RDP_LEVEL_1: Read protection of the memory
bogdanm 0:9b334a45a8ff 1266 * @arg OB_RDP_LEVEL_2: Full chip protection
bogdanm 0:9b334a45a8ff 1267 */
bogdanm 0:9b334a45a8ff 1268 static uint8_t FLASH_OB_GetRDP(void)
bogdanm 0:9b334a45a8ff 1269 {
bogdanm 0:9b334a45a8ff 1270 uint8_t readstatus = OB_RDP_LEVEL_0;
bogdanm 0:9b334a45a8ff 1271
bogdanm 0:9b334a45a8ff 1272 if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
bogdanm 0:9b334a45a8ff 1273 {
bogdanm 0:9b334a45a8ff 1274 readstatus = OB_RDP_LEVEL_2;
bogdanm 0:9b334a45a8ff 1275 }
bogdanm 0:9b334a45a8ff 1276 else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
bogdanm 0:9b334a45a8ff 1277 {
bogdanm 0:9b334a45a8ff 1278 readstatus = OB_RDP_LEVEL_1;
bogdanm 0:9b334a45a8ff 1279 }
bogdanm 0:9b334a45a8ff 1280 else
bogdanm 0:9b334a45a8ff 1281 {
bogdanm 0:9b334a45a8ff 1282 readstatus = OB_RDP_LEVEL_0;
bogdanm 0:9b334a45a8ff 1283 }
bogdanm 0:9b334a45a8ff 1284
bogdanm 0:9b334a45a8ff 1285 return readstatus;
bogdanm 0:9b334a45a8ff 1286 }
bogdanm 0:9b334a45a8ff 1287
bogdanm 0:9b334a45a8ff 1288 /**
bogdanm 0:9b334a45a8ff 1289 * @brief Returns the FLASH BOR level.
bogdanm 0:9b334a45a8ff 1290 * @retval uint8_t The FLASH BOR level:
bogdanm 0:9b334a45a8ff 1291 * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
bogdanm 0:9b334a45a8ff 1292 * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
bogdanm 0:9b334a45a8ff 1293 * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
bogdanm 0:9b334a45a8ff 1294 * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
bogdanm 0:9b334a45a8ff 1295 */
bogdanm 0:9b334a45a8ff 1296 static uint8_t FLASH_OB_GetBOR(void)
bogdanm 0:9b334a45a8ff 1297 {
bogdanm 0:9b334a45a8ff 1298 /* Return the FLASH BOR level */
bogdanm 0:9b334a45a8ff 1299 return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
bogdanm 0:9b334a45a8ff 1300 }
bogdanm 0:9b334a45a8ff 1301
bogdanm 0:9b334a45a8ff 1302 /**
bogdanm 0:9b334a45a8ff 1303 * @}
bogdanm 0:9b334a45a8ff 1304 */
bogdanm 0:9b334a45a8ff 1305
bogdanm 0:9b334a45a8ff 1306 #endif /* HAL_FLASH_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1307
bogdanm 0:9b334a45a8ff 1308 /**
bogdanm 0:9b334a45a8ff 1309 * @}
bogdanm 0:9b334a45a8ff 1310 */
bogdanm 0:9b334a45a8ff 1311
bogdanm 0:9b334a45a8ff 1312 /**
bogdanm 0:9b334a45a8ff 1313 * @}
bogdanm 0:9b334a45a8ff 1314 */
bogdanm 0:9b334a45a8ff 1315
bogdanm 0:9b334a45a8ff 1316 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/