Tobias Naegeli / Mbed 2 deprecated AIT_UWB_Range

Tobi's ubw test branch

Dependencies:   mavlink_bridge mbed

Fork of AIT_UWB_Range by Benjamin Hepp

DW1000/DW1000.h@48:5999e510f154, 2015-11-24 (annotated)

Committer:
bhepp
Date:
Tue Nov 24 16:41:23 2015 +0000
Revision:
48:5999e510f154
Parent:
44:2e0045042a59
Child:
54:a59803fcce58
Multiple Receivers implemented

Who changed what in which revision?

UserRevisionLine numberNew contents of line
manumaet 24:6f25ba679490 1 // by Matthias Grob & Manuel Stalder - ETH Zürich - 2015
manumaet 0:f50e671ffff7 2
manumaet 0:f50e671ffff7 3 #ifndef DW1000_H
manumaet 0:f50e671ffff7 4 #define DW1000_H
manumaet 0:f50e671ffff7 5
manumaet 0:f50e671ffff7 6 #include "mbed.h"
bhepp 48:5999e510f154 7 #include "InterruptMultiplexer.h"
manumaet 0:f50e671ffff7 8
manumaet 0:f50e671ffff7 9 // register addresses
manumaet 17:8afa5f9122da 10 // Mnemonic Address Bytes Description
manumaet 17:8afa5f9122da 11 #define DW1000_DEV_ID 0x00 // 4 Device Identifier – includes device type and revision information
manumaet 17:8afa5f9122da 12 #define DW1000_EUI 0x01 // 8 Extended Unique Identifier
manumaet 17:8afa5f9122da 13 #define DW1000_PANADR 0x03 // 4 PAN Identifier and Short Address
manumaet 17:8afa5f9122da 14 #define DW1000_SYS_CFG 0x04 // 4 System Configuration bitmap
manumaet 17:8afa5f9122da 15 #define DW1000_SYS_TIME 0x06 // 5 System Time Counter (40-bit)
manumaet 17:8afa5f9122da 16 #define DW1000_TX_FCTRL 0x08 // 5 Transmit Frame Control
manumaet 17:8afa5f9122da 17 #define DW1000_TX_BUFFER 0x09 // 1024 Transmit Data Buffer
manumaet 17:8afa5f9122da 18 #define DW1000_DX_TIME 0x0A // 5 Delayed Send or Receive Time (40-bit)
manumaet 17:8afa5f9122da 19 #define DW1000_RX_FWTO 0x0C // 2 Receive Frame Wait Timeout Period
manumaet 17:8afa5f9122da 20 #define DW1000_SYS_CTRL 0x0D // 4 System Control Register
manumaet 17:8afa5f9122da 21 #define DW1000_SYS_MASK 0x0E // 4 System Event Mask Register
manumaet 17:8afa5f9122da 22 #define DW1000_SYS_STATUS 0x0F // 5 System Event Status Register
manumaet 17:8afa5f9122da 23 #define DW1000_RX_FINFO 0x10 // 4 RX Frame Information (in double buffer set)
manumaet 17:8afa5f9122da 24 #define DW1000_RX_BUFFER 0x11 // 1024 Receive Data Buffer (in double buffer set)
manumaet 17:8afa5f9122da 25 #define DW1000_RX_FQUAL 0x12 // 8 Rx Frame Quality information (in double buffer set)
manumaet 17:8afa5f9122da 26 #define DW1000_RX_TTCKI 0x13 // 4 Receiver Time Tracking Interval (in double buffer set)
manumaet 17:8afa5f9122da 27 #define DW1000_RX_TTCKO 0x14 // 5 Receiver Time Tracking Offset (in double buffer set)
manumaet 17:8afa5f9122da 28 #define DW1000_RX_TIME 0x15 // 14 Receive Message Time of Arrival (in double buffer set)
manumaet 17:8afa5f9122da 29 #define DW1000_TX_TIME 0x17 // 10 Transmit Message Time of Sending (in double buffer set)
manumaet 17:8afa5f9122da 30 #define DW1000_TX_ANTD 0x18 // 2 16-bit Delay from Transmit to Antenna
manumaet 17:8afa5f9122da 31 #define DW1000_SYS_STATE 0x19 // 5 System State information
manumaet 17:8afa5f9122da 32 #define DW1000_ACK_RESP_T 0x1A // 4 Acknowledgement Time and Response Time
manumaet 17:8afa5f9122da 33 #define DW1000_RX_SNIFF 0x1D // 4 Pulsed Preamble Reception Configuration
manumaet 17:8afa5f9122da 34 #define DW1000_TX_POWER 0x1E // 4 TX Power Control
manumaet 17:8afa5f9122da 35 #define DW1000_CHAN_CTRL 0x1F // 4 Channel Control
manumaet 17:8afa5f9122da 36 #define DW1000_USR_SFD 0x21 // 41 User-specified short/long TX/RX SFD sequences
manumaet 17:8afa5f9122da 37 #define DW1000_AGC_CTRL 0x23 // 32 Automatic Gain Control configuration
manumaet 17:8afa5f9122da 38 #define DW1000_EXT_SYNC 0x24 // 12 External synchronisation control.
manumaet 17:8afa5f9122da 39 #define DW1000_ACC_MEM 0x25 // 4064 Read access to accumulator data
manumaet 17:8afa5f9122da 40 #define DW1000_GPIO_CTRL 0x26 // 44 Peripheral register bus 1 access - GPIO control
manumaet 17:8afa5f9122da 41 #define DW1000_DRX_CONF 0x27 // 44 Digital Receiver configuration
manumaet 17:8afa5f9122da 42 #define DW1000_RF_CONF 0x28 // 58 Analog RF Configuration
manumaet 17:8afa5f9122da 43 #define DW1000_TX_CAL 0x2A // 52 Transmitter calibration block
manumaet 17:8afa5f9122da 44 #define DW1000_FS_CTRL 0x2B // 21 Frequency synthesiser control block
manumaet 17:8afa5f9122da 45 #define DW1000_AON 0x2C // 12 Always-On register set
manumaet 17:8afa5f9122da 46 #define DW1000_OTP_IF 0x2D // 18 One Time Programmable Memory Interface
manumaet 17:8afa5f9122da 47 #define DW1000_LDE_CTRL 0x2E // - Leading edge detection control block
manumaet 17:8afa5f9122da 48 #define DW1000_DIG_DIAG 0x2F // 41 Digital Diagnostics Interface
manumaet 17:8afa5f9122da 49 #define DW1000_PMSC 0x36 // 48 Power Management System Control Block
manumaet 0:f50e671ffff7 50
manumaet 0:f50e671ffff7 51 #define DW1000_WRITE_FLAG 0x80 // First Bit of the address has to be 1 to indicate we want to write
manumaet 0:f50e671ffff7 52 #define DW1000_SUBADDRESS_FLAG 0x40 // if we have a sub address second Bit has to be 1
manumaet 0:f50e671ffff7 53 #define DW1000_2_SUBADDRESS_FLAG 0x80 // if we have a long sub adress (more than 7 Bit) we set this Bit in the first part
manumaet 0:f50e671ffff7 54
manumaet 8:7a9c61242e2f 55 class DW1000 {
manumaet 0:f50e671ffff7 56 public:
bhepp 48:5999e510f154 57 DW1000(SPI& spi, InterruptMultiplexer& irq_mp, PinName CS, PinName RESET = NC); // constructor, uses SPI class
bhepp 48:5999e510f154 58
manumaet 29:019ff388ed76 59 void setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)); // setter for callback functions, automatically enables interrupt, if NULL is passed the coresponding interrupt gets disabled
manumaet 29:019ff388ed76 60 template<typename T>
manumaet 29:019ff388ed76 61 void setCallbacks(T* tptr, void (T::*mptrRX)(void), void (T::*mptrTX)(void)) { // overloaded setter to treat member function pointers of objects
manumaet 29:019ff388ed76 62 callbackRX.attach(tptr, mptrRX); // possible client code: dw.setCallbacks(this, &A::callbackRX, &A::callbackTX);
manumaet 29:019ff388ed76 63 callbackTX.attach(tptr, mptrTX); // concept seen in line 100 of http://developer.mbed.org/users/mbed_official/code/mbed/docs/4fc01daae5a5/InterruptIn_8h_source.html
manumaet 29:019ff388ed76 64 setInterrupt(true,true);
manumaet 29:019ff388ed76 65 }
manumaet 0:f50e671ffff7 66
manumaet 0:f50e671ffff7 67 // Device API
manumaet 17:8afa5f9122da 68 uint32_t getDeviceID(); // gets the Device ID which should be 0xDECA0130 (good for testing SPI!)
manumaet 17:8afa5f9122da 69 uint64_t getEUI(); // gets 64 bit Extended Unique Identifier according to IEEE standard
manumaet 17:8afa5f9122da 70 void setEUI(uint64_t EUI); // sets 64 bit Extended Unique Identifier according to IEEE standard
manumaet 17:8afa5f9122da 71 float getVoltage(); // gets the current chip voltage measurement form the A/D converter
manumaet 18:bbc7ca7d3a95 72 uint64_t getStatus(); // get the 40 bit device status
manumaet 26:a65c6f26c458 73 uint64_t getRXTimestamp();
manumaet 26:a65c6f26c458 74 uint64_t getTXTimestamp();
bhepp 48:5999e510f154 75
bhepp 48:5999e510f154 76 uint16_t DW1000::getStdNoise();
bhepp 48:5999e510f154 77 uint16_t DW1000::getPACC();
bhepp 48:5999e510f154 78 uint16_t DW1000::getFPINDEX();
bhepp 48:5999e510f154 79 uint16_t DW1000::getFPAMPL1();
bhepp 48:5999e510f154 80 uint16_t DW1000::getFPAMPL2();
bhepp 48:5999e510f154 81 uint16_t DW1000::getFPAMPL3();
bhepp 48:5999e510f154 82 uint16_t DW1000::getCIRPWR();
bhepp 48:5999e510f154 83 uint8_t DW1000::getPRF();
manumaet 0:f50e671ffff7 84
manumaet 10:d077bb12d259 85 void sendString(char* message); // to send String with arbitrary length
manumaet 24:6f25ba679490 86 void receiveString(char* message); // to receive char string (length of the buffer must be 1021 to be safe)
manumaet 17:8afa5f9122da 87 void sendFrame(uint8_t* message, uint16_t length); // send a raw frame (length in bytes)
manumaet 44:2e0045042a59 88 void sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp);
manumaet 17:8afa5f9122da 89 void startRX(); // start listening for frames
manumaet 25:d58b0595b300 90 void stopTRX(); // disable tranceiver go back to idle mode
manumaet 4:6240b9c7a033 91
manumaet 32:041dd02e0e3b 92 //private:
manumaet 17:8afa5f9122da 93 void loadLDE(); // load the leading edge detection algorithm to RAM, [IMPORTANT because receiving malfunction may occur] see User Manual LDELOAD on p22 & p158
manumaet 17:8afa5f9122da 94 void resetRX(); // soft reset only the tranciever part of DW1000
bhepp 48:5999e510f154 95 static void hardwareReset(PinName reset_pin);
manumaet 17:8afa5f9122da 96 void resetAll(); // soft reset the entire DW1000 (some registers stay as they were see User Manual)
manumaet 17:8afa5f9122da 97
manumaet 17:8afa5f9122da 98 // Interrupt
bhepp 48:5999e510f154 99 InterruptMultiplexer& irq_mp;
bhepp 48:5999e510f154 100 int irq_index;
manumaet 29:019ff388ed76 101 FunctionPointer callbackRX; // function pointer to callback which is called when successfull RX took place
manumaet 29:019ff388ed76 102 FunctionPointer callbackTX; // function pointer to callback which is called when successfull TX took place
manumaet 29:019ff388ed76 103 void setInterrupt(bool RX, bool TX); // set Interrupt for received a good frame (CRC ok) or transmission done
manumaet 17:8afa5f9122da 104 void ISR(); // interrupt handling method (also calls according callback methods)
manumaet 18:bbc7ca7d3a95 105 uint16_t getFramelength(); // to get the framelength of the received frame from the PHY header
manumaet 0:f50e671ffff7 106
manumaet 0:f50e671ffff7 107 // SPI Inteface
bhepp 48:5999e510f154 108 SPI& spi; // SPI Bus
manumaet 0:f50e671ffff7 109 DigitalOut cs; // Slave selector for SPI-Bus (here explicitly needed to start and end SPI transactions also usable to wake up DW1000)
bhepp 48:5999e510f154 110 DigitalOut reset;
manumaet 0:f50e671ffff7 111
manumaet 18:bbc7ca7d3a95 112 uint8_t readRegister8(uint8_t reg, uint16_t subaddress); // expressive methods to read or write the number of bits written in the name
manumaet 18:bbc7ca7d3a95 113 uint16_t readRegister16(uint8_t reg, uint16_t subaddress);
bhepp 48:5999e510f154 114 uint32_t readRegister32(uint8_t reg, uint16_t subaddress);
manumaet 18:bbc7ca7d3a95 115 uint64_t readRegister40(uint8_t reg, uint16_t subaddress);
manumaet 18:bbc7ca7d3a95 116 void writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer);
manumaet 18:bbc7ca7d3a95 117 void writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer);
manumaet 42:83931678c4de 118 void writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer);
manumaet 44:2e0045042a59 119 void writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer);
manumaet 44:2e0045042a59 120
manumaet 26:a65c6f26c458 121 void readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // reads the selected part of a slave register into the buffer memory
manumaet 26:a65c6f26c458 122 void writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // writes the buffer memory to the selected slave register
manumaet 26:a65c6f26c458 123 void setupTransaction(uint8_t reg, uint16_t subaddress, bool write); // sets up an SPI read or write transaction with correct register address and offset
manumaet 0:f50e671ffff7 124 void select(); // selects the only slave for a transaction
manumaet 0:f50e671ffff7 125 void deselect(); // deselects the only slave after transaction
bhepp 48:5999e510f154 126 void enable_irq();
bhepp 48:5999e510f154 127 void disable_irq();
manumaet 0:f50e671ffff7 128 };
manumaet 0:f50e671ffff7 129
manumaet 7:e634eeafc4d2 130 #endif