Tomonori Kuroki / MuWatchdog

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Fork of Watchdog by David Smart

Watchdog.cpp@30:c02c2a15ce8f, 2020-01-15 (annotated)

Committer:
mutech
Date:
Wed Jan 15 01:22:53 2020 +0000
Revision:
30:c02c2a15ce8f
Parent:
29:d84c025e8c8e 
This provides a basic Watchdog service, and includes a startup detection to determine if the reset was caused by the WD.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mutech 27:b16166a526a2 1 /// @file Watchdog.cpp provides the interface to the Watchdog module
WiredHome 2:2873f068f325 2 ///
WiredHome 2:2873f068f325 3 /// This provides basic Watchdog service for the mbed. You can configure
WiredHome 2:2873f068f325 4 /// various timeout intervals that meet your system needs. Additionally,
WiredHome 2:2873f068f325 5 /// it is possible to identify if the Watchdog was the cause of any
WiredHome 2:2873f068f325 6 /// system restart.
WiredHome 2:2873f068f325 7 ///
WiredHome 2:2873f068f325 8 /// Adapted from Simon's Watchdog code from http://mbed.org/forum/mbed/topic/508/
WiredHome 2:2873f068f325 9 ///
WiredHome 2:2873f068f325 10 /// @note Copyright © 2011 by Smartware Computing, all rights reserved.
WiredHome 2:2873f068f325 11 /// This software may be used to derive new software, as long as
WiredHome 2:2873f068f325 12 /// this copyright statement remains in the source file.
WiredHome 2:2873f068f325 13 /// @author David Smart
WiredHome 2:2873f068f325 14 ///
mutech 7:3814d72b8166 15 /// \li v2.10 - 20160914: Changed TARGET_STM by mutech, t.kuroki
mutech 7:3814d72b8166 16
mutech 30:c02c2a15ce8f 17 /// 2020-01-15 mbed-os5 compatible routones added. by mutech, t.luroki
mutech 30:c02c2a15ce8f 18
WiredHome 0:7a316f14da9c 19 #include "Watchdog.h"
WiredHome 0:7a316f14da9c 20
mutech 30:c02c2a15ce8f 21 //------------------------------------------------------------------------------
WiredHome 5:2dad2a78ffbd 22 #if defined( TARGET_LPC1768 )
WiredHome 0:7a316f14da9c 23 /// Watchdog gets instantiated at the module level
mutech 27:b16166a526a2 24 Watchdog::Watchdog()
mutech 27:b16166a526a2 25 {
mutech 15:e0e4c2268558 26 _wdreset = (LPC_WDT->WDMOD >> 2) & 1; // capture the cause of the previous reset
WiredHome 0:7a316f14da9c 27 }
WiredHome 0:7a316f14da9c 28
mutech 30:c02c2a15ce8f 29 // mbed-os5 compatible routines
mutech 30:c02c2a15ce8f 30 bool Watchdog::start(uint32_t timeout_ms)
mutech 27:b16166a526a2 31 {
mutech 7:3814d72b8166 32 LPC_WDT->WDCLKSEL = 0x1; // Set CLK src to PCLK
mutech 7:3814d72b8166 33 uint32_t clk = SystemCoreClock / 1000; //
mutech 30:c02c2a15ce8f 34 LPC_WDT->WDTC = (timeout_ms * clk) / 16; // WD has a fixed /4 prescaler, PCLK default is /4
mutech 7:3814d72b8166 35 LPC_WDT->WDMOD = 0x3; // Enabled and Reset
mutech 30:c02c2a15ce8f 36 kick();
mutech 30:c02c2a15ce8f 37 return true;
mutech 7:3814d72b8166 38 }
mutech 7:3814d72b8166 39
mutech 30:c02c2a15ce8f 40 bool Watchdog::stop(void)
mutech 30:c02c2a15ce8f 41 {
mutech 30:c02c2a15ce8f 42 return false;
mutech 30:c02c2a15ce8f 43 }
mutech 30:c02c2a15ce8f 44
mutech 30:c02c2a15ce8f 45 void Watchdog::kick(void)
mutech 27:b16166a526a2 46 {
WiredHome 0:7a316f14da9c 47 LPC_WDT->WDFEED = 0xAA;
WiredHome 0:7a316f14da9c 48 LPC_WDT->WDFEED = 0x55;
WiredHome 0:7a316f14da9c 49 }
WiredHome 0:7a316f14da9c 50
mutech 30:c02c2a15ce8f 51 // deprecated routines
mutech 30:c02c2a15ce8f 52 /// Load timeout value in watchdog timer and enable
mutech 30:c02c2a15ce8f 53 void Watchdog::Configure(float s)
mutech 30:c02c2a15ce8f 54 {
mutech 30:c02c2a15ce8f 55 start((uint32_t)(s * 1000.0f));
mutech 30:c02c2a15ce8f 56 }
mutech 30:c02c2a15ce8f 57
mutech 30:c02c2a15ce8f 58 void Watchdog::Configure(int ms)
mutech 30:c02c2a15ce8f 59 {
mutech 30:c02c2a15ce8f 60 start(static_cast<uint32_t>(ms));
mutech 30:c02c2a15ce8f 61 }
mutech 30:c02c2a15ce8f 62
mutech 30:c02c2a15ce8f 63 /// "Service", "kick" or "feed" the dog - reset the watchdog timer
mutech 30:c02c2a15ce8f 64 /// by writing this required bit pattern
mutech 30:c02c2a15ce8f 65 void Watchdog::Service(void)
mutech 30:c02c2a15ce8f 66 {
mutech 30:c02c2a15ce8f 67 kick();
mutech 30:c02c2a15ce8f 68 }
mutech 30:c02c2a15ce8f 69
WiredHome 0:7a316f14da9c 70 /// get the flag to indicate if the watchdog causes the reset
mutech 30:c02c2a15ce8f 71 bool Watchdog::WatchdogCausedReset(void)
mutech 27:b16166a526a2 72 {
mutech 15:e0e4c2268558 73 return _wdreset;
WiredHome 0:7a316f14da9c 74 }
mutech 27:b16166a526a2 75
mutech 30:c02c2a15ce8f 76 #elif defined(TARGET_LPC4088)
WiredHome 5:2dad2a78ffbd 77 // from Gesotec Gesotec
WiredHome 5:2dad2a78ffbd 78 /// Watchdog gets instantiated at the module level
mutech 27:b16166a526a2 79 Watchdog::Watchdog()
mutech 27:b16166a526a2 80 {
mutech 15:e0e4c2268558 81 _wdreset = (LPC_WDT->MOD >> 2) & 1; // capture the cause of the previous reset
WiredHome 5:2dad2a78ffbd 82 }
WiredHome 5:2dad2a78ffbd 83
mutech 30:c02c2a15ce8f 84 // mbed-os5 compatible routines
mutech 30:c02c2a15ce8f 85 bool Watchdog::start(uint32_t timeout_ms)
mutech 27:b16166a526a2 86 {
WiredHome 5:2dad2a78ffbd 87 //LPC_WDT->CLKSEL = 0x1; // Set CLK src to PCLK
WiredHome 5:2dad2a78ffbd 88 uint32_t clk = 500000 / 4; // WD has a fixed /4 prescaler, and a 500khz oscillator
mutech 30:c02c2a15ce8f 89 LPC_WDT->TC = (timeout_ms * clk) / 1000;
WiredHome 5:2dad2a78ffbd 90 LPC_WDT->MOD = 0x3; // Enabled and Reset
mutech 30:c02c2a15ce8f 91 kick();
mutech 30:c02c2a15ce8f 92 return true;
mutech 30:c02c2a15ce8f 93 }
mutech 30:c02c2a15ce8f 94
mutech 30:c02c2a15ce8f 95 bool Watchdog::stop(void)
mutech 30:c02c2a15ce8f 96 {
mutech 30:c02c2a15ce8f 97 return false;
WiredHome 5:2dad2a78ffbd 98 }
mutech 7:3814d72b8166 99
mutech 30:c02c2a15ce8f 100 void Watchdog::kick(void)
mutech 27:b16166a526a2 101 {
mutech 30:c02c2a15ce8f 102 LPC_WDT->FEED = 0xAA;
mutech 30:c02c2a15ce8f 103 LPC_WDT->FEED = 0x55;
mutech 30:c02c2a15ce8f 104 }
mutech 30:c02c2a15ce8f 105
mutech 30:c02c2a15ce8f 106 // deprecated routines
mutech 30:c02c2a15ce8f 107 /// Load timeout value in watchdog timer and enable
mutech 30:c02c2a15ce8f 108 void Watchdog::Configure(float s)
mutech 30:c02c2a15ce8f 109 {
mutech 30:c02c2a15ce8f 110 start((uint32_t)(s * 1000.0f));
mutech 30:c02c2a15ce8f 111 }
mutech 30:c02c2a15ce8f 112
mutech 30:c02c2a15ce8f 113 void Watchdog::Configure(int ms)
mutech 30:c02c2a15ce8f 114 {
mutech 30:c02c2a15ce8f 115 start(static_cast<uint32_t>(ms));
mutech 7:3814d72b8166 116 }
mutech 7:3814d72b8166 117
WiredHome 5:2dad2a78ffbd 118 /// "Service", "kick" or "feed" the dog - reset the watchdog timer
WiredHome 5:2dad2a78ffbd 119 /// by writing this required bit pattern
mutech 30:c02c2a15ce8f 120 void Watchdog::Service(void)
mutech 27:b16166a526a2 121 {
mutech 30:c02c2a15ce8f 122 kick();
WiredHome 5:2dad2a78ffbd 123 }
WiredHome 5:2dad2a78ffbd 124
WiredHome 5:2dad2a78ffbd 125 /// get the flag to indicate if the watchdog causes the reset
mutech 30:c02c2a15ce8f 126 bool Watchdog::WatchdogCausedReset(void)
mutech 27:b16166a526a2 127 {
mutech 15:e0e4c2268558 128 return _wdreset;
WiredHome 5:2dad2a78ffbd 129 }
mutech 17:ccd155378a9b 130
mutech 17:ccd155378a9b 131 #elif defined(TARGET_LPC81X) || defined(TARGET_LPC82X)
mutech 18:edfbf294c9e2 132
mutech 17:ccd155378a9b 133 // from Gesotec Gesotec
mutech 17:ccd155378a9b 134 /// Watchdog gets instantiated at the module level
mutech 17:ccd155378a9b 135 Watchdog::Watchdog()
mutech 17:ccd155378a9b 136 {
mutech 17:ccd155378a9b 137 _wdreset = (LPC_WWDT->MOD >> 2) & 1; // capture the cause of the previous reset
mutech 17:ccd155378a9b 138 }
mutech 17:ccd155378a9b 139
mutech 30:c02c2a15ce8f 140 // mbed-os5 compatible routines
mutech 30:c02c2a15ce8f 141 bool Watchdog::start(uint32_t timeout_ms)
mutech 17:ccd155378a9b 142 {
mutech 18:edfbf294c9e2 143 #if 0
mutech 18:edfbf294c9e2 144 uint32_t clk = get_wdtclock() / 4; // WD has a fixed /4 prescaler, and a 500khz oscillator
mutech 30:c02c2a15ce8f 145 LPC_WWDT->TC = (timeout_ms * clk) / 1000;
mutech 18:edfbf294c9e2 146 #else
mutech 19:3b172e42d8ee 147 LPC_SYSCON->WDTOSCCTRL = WDTOSCCTRL_Val(10, 2); // wdt_osc_clk = Fclkana/2, Fclkana = 3.5MHz
mutech 18:edfbf294c9e2 148 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 17); // Enable Clock WWDT
mutech 18:edfbf294c9e2 149 LPC_SYSCON->PDRUNCFG &= ~(1 << 6); // Enable Power WDTOSC_PD
mutech 18:edfbf294c9e2 150 uint32_t clk = ((3500000/2)/4); // COUNT = wdt_osc_clk/4
mutech 30:c02c2a15ce8f 151 LPC_WWDT->TC = (timeout_ms * clk) / 1000;
mutech 18:edfbf294c9e2 152 #endif
mutech 18:edfbf294c9e2 153 LPC_WWDT->MOD = 0x3; // Enabled and Reset
mutech 30:c02c2a15ce8f 154 kick();
mutech 30:c02c2a15ce8f 155 return true;
mutech 30:c02c2a15ce8f 156 }
mutech 30:c02c2a15ce8f 157
mutech 30:c02c2a15ce8f 158 bool Watchdog::stop(void)
mutech 30:c02c2a15ce8f 159 {
mutech 30:c02c2a15ce8f 160 return false;
mutech 30:c02c2a15ce8f 161 }
mutech 30:c02c2a15ce8f 162
mutech 30:c02c2a15ce8f 163 void Watchdog::kick(void)
mutech 30:c02c2a15ce8f 164 {
mutech 30:c02c2a15ce8f 165 LPC_WWDT->FEED = 0xAA;
mutech 30:c02c2a15ce8f 166 LPC_WWDT->FEED = 0x55;
mutech 18:edfbf294c9e2 167 }
mutech 18:edfbf294c9e2 168
mutech 30:c02c2a15ce8f 169 // deprecated routines
mutech 30:c02c2a15ce8f 170 /// Load timeout value in watchdog timer and enable
mutech 30:c02c2a15ce8f 171 void Watchdog::Configure(float s)
mutech 30:c02c2a15ce8f 172 {
mutech 30:c02c2a15ce8f 173 start((uint32_t)(s * 1000.0f));
mutech 30:c02c2a15ce8f 174 }
mutech 30:c02c2a15ce8f 175
mutech 30:c02c2a15ce8f 176 #define WDTOSCCTRL_Val(clk, div) ((((uint32_t)(clk)) << 5) | (((div) >> 1) - 1))
mutech 30:c02c2a15ce8f 177
mutech 30:c02c2a15ce8f 178 void Watchdog::Configure(int ms)
mutech 30:c02c2a15ce8f 179 {
mutech 30:c02c2a15ce8f 180 start(static_cast<uint32_t>(ms));
mutech 30:c02c2a15ce8f 181 }
mutech 30:c02c2a15ce8f 182
mutech 30:c02c2a15ce8f 183 uint32_t Watchdog::get_wdtclock(void)
mutech 18:edfbf294c9e2 184 {
mutech 22:3c7ea2ad3a85 185 #if 0
mutech 17:ccd155378a9b 186 uint32_t wdt_osc = 0;
mutech 18:edfbf294c9e2 187
mutech 17:ccd155378a9b 188 /* Determine clock frequency according to clock register values */
mutech 17:ccd155378a9b 189 switch ((LPC_SYSCON->WDTOSCCTRL >> 5) & 0x0F)
mutech 17:ccd155378a9b 190 {
mutech 17:ccd155378a9b 191 case 0: wdt_osc = 0; break;
mutech 18:edfbf294c9e2 192 case 1: wdt_osc = 600000; break;
mutech 18:edfbf294c9e2 193 case 2: wdt_osc = 1050000; break;
mutech 18:edfbf294c9e2 194 case 3: wdt_osc = 1400000; break;
mutech 18:edfbf294c9e2 195 case 4: wdt_osc = 1750000; break;
mutech 18:edfbf294c9e2 196 case 5: wdt_osc = 2100000; break;
mutech 18:edfbf294c9e2 197 case 6: wdt_osc = 2400000; break;
mutech 18:edfbf294c9e2 198 case 7: wdt_osc = 2700000; break;
mutech 18:edfbf294c9e2 199 case 8: wdt_osc = 3000000; break;
mutech 18:edfbf294c9e2 200 case 9: wdt_osc = 3250000; break;
mutech 18:edfbf294c9e2 201 case 10: wdt_osc = 3500000; break;
mutech 18:edfbf294c9e2 202 case 11: wdt_osc = 3750000; break;
mutech 18:edfbf294c9e2 203 case 12: wdt_osc = 4000000; break;
mutech 18:edfbf294c9e2 204 case 13: wdt_osc = 4200000; break;
mutech 18:edfbf294c9e2 205 case 14: wdt_osc = 4400000; break;
mutech 18:edfbf294c9e2 206 case 15: wdt_osc = 4600000; break;
mutech 17:ccd155378a9b 207 }
mutech 22:3c7ea2ad3a85 208 #else
mutech 22:3c7ea2ad3a85 209 const uint32_t osctab[16] =
mutech 22:3c7ea2ad3a85 210 {
mutech 22:3c7ea2ad3a85 211 0, // 0
mutech 22:3c7ea2ad3a85 212 600000, // 1
mutech 22:3c7ea2ad3a85 213 1050000, // 2
mutech 22:3c7ea2ad3a85 214 1400000, // 3
mutech 22:3c7ea2ad3a85 215 1750000, // 4
mutech 22:3c7ea2ad3a85 216 2100000, // 5
mutech 22:3c7ea2ad3a85 217 2400000, // 6
mutech 22:3c7ea2ad3a85 218 2700000, // 7
mutech 22:3c7ea2ad3a85 219 3000000, // 8
mutech 22:3c7ea2ad3a85 220 3250000, // 9
mutech 22:3c7ea2ad3a85 221 3500000, // 10
mutech 22:3c7ea2ad3a85 222 3750000, // 11
mutech 22:3c7ea2ad3a85 223 4000000, // 12
mutech 22:3c7ea2ad3a85 224 4200000, // 13
mutech 22:3c7ea2ad3a85 225 4400000, // 14
mutech 22:3c7ea2ad3a85 226 4600000 // 15
mutech 22:3c7ea2ad3a85 227 };
mutech 22:3c7ea2ad3a85 228 #endif
mutech 22:3c7ea2ad3a85 229 uint32_t wdt_osc = osctab[(LPC_SYSCON->WDTOSCCTRL >> 5) & 0x0F];
mutech 22:3c7ea2ad3a85 230
mutech 18:edfbf294c9e2 231 // wdt_osc /= ((LPC_SYSCON->WDTOSCCTRL & 0x1F) << 1) + 2;
mutech 18:edfbf294c9e2 232 return wdt_osc;
mutech 17:ccd155378a9b 233 }
mutech 17:ccd155378a9b 234
mutech 17:ccd155378a9b 235 /// "Service", "kick" or "feed" the dog - reset the watchdog timer
mutech 17:ccd155378a9b 236 /// by writing this required bit pattern
mutech 30:c02c2a15ce8f 237 void Watchdog::Service(void)
mutech 17:ccd155378a9b 238 {
mutech 30:c02c2a15ce8f 239 kick();
mutech 17:ccd155378a9b 240 }
mutech 17:ccd155378a9b 241
mutech 17:ccd155378a9b 242 /// get the flag to indicate if the watchdog causes the reset
mutech 30:c02c2a15ce8f 243 bool Watchdog::WatchdogCausedReset(void)
mutech 17:ccd155378a9b 244 {
mutech 17:ccd155378a9b 245 return _wdreset;
mutech 17:ccd155378a9b 246 }
mutech 17:ccd155378a9b 247
mutech 7:3814d72b8166 248 #elif defined(TARGET_STM)
mutech 30:c02c2a15ce8f 249 Watchdog::Watchdog()
mutech 30:c02c2a15ce8f 250 {
mutech 30:c02c2a15ce8f 251 _rcc_csr = RCC->CSR;
mutech 30:c02c2a15ce8f 252 RCC->CSR |= RCC_CSR_RMVF; // clear reset flag
mutech 30:c02c2a15ce8f 253 }
WiredHome 0:7a316f14da9c 254
mutech 11:a1611543c454 255 // 整数Xを含む最小のべき乗指数
mutech 30:c02c2a15ce8f 256 int Watchdog::calcExponent16bit(uint16_t v)
mutech 11:a1611543c454 257 {
mutech 11:a1611543c454 258 // return (v == 0) ? 0 : MSB16bit(v - 1) + 1;
mutech 11:a1611543c454 259 if (!v)
mutech 11:a1611543c454 260 return 0;
mutech 11:a1611543c454 261 --v;
mutech 7:3814d72b8166 262 // 最大有効ビット数（MSB：Most Significant Bit）
mutech 7:3814d72b8166 263 v |= (v >> 1);
mutech 7:3814d72b8166 264 v |= (v >> 2);
mutech 7:3814d72b8166 265 v |= (v >> 4);
mutech 7:3814d72b8166 266 v |= (v >> 8);
mutech 7:3814d72b8166 267 // return count16bit(v) - 1;
mutech 7:3814d72b8166 268 // 立っているビットの数を数える
mutech 7:3814d72b8166 269 v = (v & 0x5555) + ((v >> 1) & 0x5555);
mutech 7:3814d72b8166 270 v = (v & 0x3333) + ((v >> 2) & 0x3333);
mutech 7:3814d72b8166 271 v = (v & 0x0f0f) + ((v >> 4) & 0x0f0f);
mutech 11:a1611543c454 272 return (v & 0x00ff) + ((v >> 8) & 0x00ff);
mutech 7:3814d72b8166 273 }
mutech 7:3814d72b8166 274
mutech 24:bb99754d8098 275 #if defined(TARGET_STM32F0) || defined(TARGET_STM32F1) || defined(TARGET_STM32F3)
mutech 14:30665d9afe68 276 #define WDT_CLOCK 40000U // 40 kHz
mutech 14:30665d9afe68 277 #else
mutech 24:bb99754d8098 278 // TARGET_STM32L0/STM32L1/STM32L4/STM32F4/STM32F7
mutech 14:30665d9afe68 279 #define WDT_CLOCK 32768U // 32.768 kHz
mutech 14:30665d9afe68 280 #endif
mutech 7:3814d72b8166 281
mutech 30:c02c2a15ce8f 282 // mbed-os5 compatible routines
mutech 30:c02c2a15ce8f 283 bool Watchdog::start(uint32_t timeout_ms)
mutech 7:3814d72b8166 284 {
WiredHome 5:2dad2a78ffbd 285 // http://www.st.com/web/en/resource/technical/document/reference_manual/CD00171190.pdf
mutech 7:3814d72b8166 286
mutech 11:a1611543c454 287 // Newer Nucleo boards have 32.768 kHz crystal. Without it, the internal
mutech 30:c02c2a15ce8f 288 // RC clock would have an average frequency of 40 kHz (variable between 30 and 60 kHz)
mutech 30:c02c2a15ce8f 289 // tick = (ms / (1/WDT_CLOCK))/1000;
mutech 30:c02c2a15ce8f 290 uint32_t tick = ((uint32_t)timeout_ms * WDT_CLOCK + 500U) / 1000U;
mutech 11:a1611543c454 291 // The RLR register is 12 bits and beyond that a prescaler should be used
mutech 11:a1611543c454 292 int scale = calcExponent16bit((tick + 4095) >> 12);
mutech 7:3814d72b8166 293 if (scale < 2)
mutech 7:3814d72b8166 294 scale = 2;
mutech 10:673dff2b0ee6 295 else if (scale > 8) // STM32 allows a maximum time of around 26.2 seconds for the Watchdog timer
mutech 7:3814d72b8166 296 scale = 8;
mutech 11:a1611543c454 297
mutech 11:a1611543c454 298 int residual = tick / (1 << scale); // The value for the RLR register
mutech 11:a1611543c454 299 if (residual < 1)
mutech 11:a1611543c454 300 residual = 1;
mutech 11:a1611543c454 301 else if (residual > 4096)
mutech 7:3814d72b8166 302 residual = 4096;
mutech 7:3814d72b8166 303
WiredHome 5:2dad2a78ffbd 304 IWDG->KR = 0x5555; // enable write to PR, RLR
mutech 7:3814d72b8166 305 IWDG->PR = scale - 2; // Prescaler has values of multiples of 4 (i.e. 2 ^2), page 486 Reference Manual
mutech 7:3814d72b8166 306 IWDG->RLR = residual - 1; // Init RLR
mutech 7:3814d72b8166 307 IWDG->KR = 0xAAAA; // Reload the watchdog
mutech 7:3814d72b8166 308 IWDG->KR = 0xCCCC; // Starts the WD
mutech 30:c02c2a15ce8f 309 return true;
mutech 30:c02c2a15ce8f 310 }
mutech 30:c02c2a15ce8f 311
mutech 30:c02c2a15ce8f 312 bool Watchdog::stop(void)
mutech 30:c02c2a15ce8f 313 {
mutech 30:c02c2a15ce8f 314 return false;
mutech 7:3814d72b8166 315 }
mutech 7:3814d72b8166 316
mutech 30:c02c2a15ce8f 317 void Watchdog::kick(void)
mutech 7:3814d72b8166 318 {
mutech 30:c02c2a15ce8f 319 IWDG->KR = 0xAAAA;
mutech 30:c02c2a15ce8f 320 }
mutech 7:3814d72b8166 321
mutech 30:c02c2a15ce8f 322 // deprecated routines
mutech 30:c02c2a15ce8f 323 /// Load timeout value in watchdog timer and enable
mutech 30:c02c2a15ce8f 324 void Watchdog::Configure(float s)
mutech 30:c02c2a15ce8f 325 {
mutech 30:c02c2a15ce8f 326 start((uint32_t)(s * 1000.0f));
mutech 30:c02c2a15ce8f 327 }
mutech 10:673dff2b0ee6 328
mutech 30:c02c2a15ce8f 329 void Watchdog::Configure(int ms)
mutech 30:c02c2a15ce8f 330 {
mutech 30:c02c2a15ce8f 331 start(static_cast<uint32_t>(ms));
WiredHome 5:2dad2a78ffbd 332 }
WiredHome 0:7a316f14da9c 333
WiredHome 5:2dad2a78ffbd 334 /// "Service", "kick" or "feed" the dog - reset the watchdog timer
mutech 30:c02c2a15ce8f 335 void Watchdog::Service()
mutech 7:3814d72b8166 336 {
mutech 30:c02c2a15ce8f 337 kick();
WiredHome 5:2dad2a78ffbd 338 }
WiredHome 5:2dad2a78ffbd 339
WiredHome 5:2dad2a78ffbd 340 /// get the flag to indicate if the watchdog causes the reset
mutech 7:3814d72b8166 341 bool Watchdog::WatchdogCausedReset()
mutech 7:3814d72b8166 342 {
mutech 25:4eecd15f0c38 343 #if defined(RCC_CSR_IWDGRSTF)
mutech 15:e0e4c2268558 344 return (_rcc_csr & (RCC_CSR_IWDGRSTF | RCC_CSR_WWDGRSTF)) != 0; // read the IWDGRSTF (Independent WD, not the windows WD)
mutech 25:4eecd15f0c38 345 #else
mutech 25:4eecd15f0c38 346 // for old library
mutech 25:4eecd15f0c38 347 return (_rcc_csr & (RCC_CSR_WDGRSTF | RCC_CSR_WWDGRSTF)) != 0; // read the IWDGRSTF (Independent WD, not the windows WD)
mutech 25:4eecd15f0c38 348 #endif
WiredHome 5:2dad2a78ffbd 349 }
mutech 27:b16166a526a2 350
WiredHome 5:2dad2a78ffbd 351 #endif
mutech 30:c02c2a15ce8f 352 //------------------------------------------------------------------------------