mirza sarwar / Mbed 2 deprecated BLE_HeartRate_30102

hr with 30102

Dependencies:   BLE_API mbed X_NUCLEO_IDB0XA1

Fork of BLE_HeartRate by Bluetooth Low Energy

MAX30102/MAX30102.cpp@80:808f6f367f45, 2017-07-30 (annotated)

Committer:
mssarwar
Date:
Sun Jul 30 05:52:57 2017 +0000
Revision:
80:808f6f367f45
with 30102;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mssarwar 80:808f6f367f45 1 /** \file max30102.cpp ******************************************************
mssarwar 80:808f6f367f45 2 *
mssarwar 80:808f6f367f45 3 * Project: MAXREFDES117#
mssarwar 80:808f6f367f45 4 * Filename: max30102.cpp
mssarwar 80:808f6f367f45 5 * Description: This module is an embedded controller driver for the MAX30102
mssarwar 80:808f6f367f45 6 *
mssarwar 80:808f6f367f45 7 *
mssarwar 80:808f6f367f45 8 * --------------------------------------------------------------------
mssarwar 80:808f6f367f45 9 *
mssarwar 80:808f6f367f45 10 * This code follows the following naming conventions:
mssarwar 80:808f6f367f45 11 *
mssarwar 80:808f6f367f45 12 * char ch_pmod_value
mssarwar 80:808f6f367f45 13 * char (array) s_pmod_s_string[16]
mssarwar 80:808f6f367f45 14 * float f_pmod_value
mssarwar 80:808f6f367f45 15 * int32_t n_pmod_value
mssarwar 80:808f6f367f45 16 * int32_t (array) an_pmod_value[16]
mssarwar 80:808f6f367f45 17 * int16_t w_pmod_value
mssarwar 80:808f6f367f45 18 * int16_t (array) aw_pmod_value[16]
mssarwar 80:808f6f367f45 19 * uint16_t uw_pmod_value
mssarwar 80:808f6f367f45 20 * uint16_t (array) auw_pmod_value[16]
mssarwar 80:808f6f367f45 21 * uint8_t uch_pmod_value
mssarwar 80:808f6f367f45 22 * uint8_t (array) auch_pmod_buffer[16]
mssarwar 80:808f6f367f45 23 * uint32_t un_pmod_value
mssarwar 80:808f6f367f45 24 * int32_t * pn_pmod_value
mssarwar 80:808f6f367f45 25 *
mssarwar 80:808f6f367f45 26 * ------------------------------------------------------------------------- */
mssarwar 80:808f6f367f45 27 /*******************************************************************************
mssarwar 80:808f6f367f45 28 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
mssarwar 80:808f6f367f45 29 *
mssarwar 80:808f6f367f45 30 * Permission is hereby granted, free of charge, to any person obtaining a
mssarwar 80:808f6f367f45 31 * copy of this software and associated documentation files (the "Software"),
mssarwar 80:808f6f367f45 32 * to deal in the Software without restriction, including without limitation
mssarwar 80:808f6f367f45 33 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mssarwar 80:808f6f367f45 34 * and/or sell copies of the Software, and to permit persons to whom the
mssarwar 80:808f6f367f45 35 * Software is furnished to do so, subject to the following conditions:
mssarwar 80:808f6f367f45 36 *
mssarwar 80:808f6f367f45 37 * The above copyright notice and this permission notice shall be included
mssarwar 80:808f6f367f45 38 * in all copies or substantial portions of the Software.
mssarwar 80:808f6f367f45 39 *
mssarwar 80:808f6f367f45 40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mssarwar 80:808f6f367f45 41 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mssarwar 80:808f6f367f45 42 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mssarwar 80:808f6f367f45 43 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mssarwar 80:808f6f367f45 44 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mssarwar 80:808f6f367f45 45 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mssarwar 80:808f6f367f45 46 * OTHER DEALINGS IN THE SOFTWARE.
mssarwar 80:808f6f367f45 47 *
mssarwar 80:808f6f367f45 48 * Except as contained in this notice, the name of Maxim Integrated
mssarwar 80:808f6f367f45 49 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mssarwar 80:808f6f367f45 50 * Products, Inc. Branding Policy.
mssarwar 80:808f6f367f45 51 *
mssarwar 80:808f6f367f45 52 * The mere transfer of this software does not imply any licenses
mssarwar 80:808f6f367f45 53 * of trade secrets, proprietary technology, copyrights, patents,
mssarwar 80:808f6f367f45 54 * trademarks, maskwork rights, or any other form of intellectual
mssarwar 80:808f6f367f45 55 * property whatsoever. Maxim Integrated Products, Inc. retains all
mssarwar 80:808f6f367f45 56 * ownership rights.
mssarwar 80:808f6f367f45 57 *******************************************************************************
mssarwar 80:808f6f367f45 58 */
mssarwar 80:808f6f367f45 59 #include "mbed.h"
mssarwar 80:808f6f367f45 60 #include "MAX30102.h"
mssarwar 80:808f6f367f45 61
mssarwar 80:808f6f367f45 62 #ifdef TARGET_MAX32600MBED
mssarwar 80:808f6f367f45 63 I2C i2c(I2C1_SDA, I2C1_SCL);
mssarwar 80:808f6f367f45 64 #else
mssarwar 80:808f6f367f45 65 I2C i2c(P0_29, P0_28);
mssarwar 80:808f6f367f45 66 #endif
mssarwar 80:808f6f367f45 67
mssarwar 80:808f6f367f45 68 bool maxim_max30102_write_reg(uint8_t uch_addr, uint8_t uch_data)
mssarwar 80:808f6f367f45 69 /**
mssarwar 80:808f6f367f45 70 * \brief Write a value to a MAX30102 register
mssarwar 80:808f6f367f45 71 * \par Details
mssarwar 80:808f6f367f45 72 * This function writes a value to a MAX30102 register
mssarwar 80:808f6f367f45 73 *
mssarwar 80:808f6f367f45 74 * \param[in] uch_addr - register address
mssarwar 80:808f6f367f45 75 * \param[in] uch_data - register data
mssarwar 80:808f6f367f45 76 *
mssarwar 80:808f6f367f45 77 * \retval true on success
mssarwar 80:808f6f367f45 78 */
mssarwar 80:808f6f367f45 79 {
mssarwar 80:808f6f367f45 80 char ach_i2c_data[2];
mssarwar 80:808f6f367f45 81 ach_i2c_data[0]=uch_addr;
mssarwar 80:808f6f367f45 82 ach_i2c_data[1]=uch_data;
mssarwar 80:808f6f367f45 83
mssarwar 80:808f6f367f45 84 if(i2c.write(I2C_WRITE_ADDR, ach_i2c_data, 2, false)==0)
mssarwar 80:808f6f367f45 85 return true;
mssarwar 80:808f6f367f45 86 else
mssarwar 80:808f6f367f45 87 return false;
mssarwar 80:808f6f367f45 88 }
mssarwar 80:808f6f367f45 89
mssarwar 80:808f6f367f45 90 bool maxim_max30102_read_reg(uint8_t uch_addr, uint8_t *puch_data)
mssarwar 80:808f6f367f45 91 /**
mssarwar 80:808f6f367f45 92 * \brief Read a MAX30102 register
mssarwar 80:808f6f367f45 93 * \par Details
mssarwar 80:808f6f367f45 94 * This function reads a MAX30102 register
mssarwar 80:808f6f367f45 95 *
mssarwar 80:808f6f367f45 96 * \param[in] uch_addr - register address
mssarwar 80:808f6f367f45 97 * \param[out] puch_data - pointer that stores the register data
mssarwar 80:808f6f367f45 98 *
mssarwar 80:808f6f367f45 99 * \retval true on success
mssarwar 80:808f6f367f45 100 */
mssarwar 80:808f6f367f45 101 {
mssarwar 80:808f6f367f45 102 char ch_i2c_data;
mssarwar 80:808f6f367f45 103 ch_i2c_data=uch_addr;
mssarwar 80:808f6f367f45 104 if(i2c.write(I2C_WRITE_ADDR, &ch_i2c_data, 1, true)!=0)
mssarwar 80:808f6f367f45 105 return false;
mssarwar 80:808f6f367f45 106 if(i2c.read(I2C_READ_ADDR, &ch_i2c_data, 1, false)==0)
mssarwar 80:808f6f367f45 107 {
mssarwar 80:808f6f367f45 108 *puch_data=(uint8_t) ch_i2c_data;
mssarwar 80:808f6f367f45 109 return true;
mssarwar 80:808f6f367f45 110 }
mssarwar 80:808f6f367f45 111 else
mssarwar 80:808f6f367f45 112 return false;
mssarwar 80:808f6f367f45 113 }
mssarwar 80:808f6f367f45 114
mssarwar 80:808f6f367f45 115 bool maxim_max30102_init()
mssarwar 80:808f6f367f45 116 /**
mssarwar 80:808f6f367f45 117 * \brief Initialize the MAX30102
mssarwar 80:808f6f367f45 118 * \par Details
mssarwar 80:808f6f367f45 119 * This function initializes the MAX30102
mssarwar 80:808f6f367f45 120 *
mssarwar 80:808f6f367f45 121 * \param None
mssarwar 80:808f6f367f45 122 *
mssarwar 80:808f6f367f45 123 * \retval true on success
mssarwar 80:808f6f367f45 124 */
mssarwar 80:808f6f367f45 125 {
mssarwar 80:808f6f367f45 126 if(!maxim_max30102_write_reg(REG_INTR_ENABLE_1,0xc0)) // INTR setting
mssarwar 80:808f6f367f45 127 return false;
mssarwar 80:808f6f367f45 128 if(!maxim_max30102_write_reg(REG_INTR_ENABLE_2,0x00))
mssarwar 80:808f6f367f45 129 return false;
mssarwar 80:808f6f367f45 130 if(!maxim_max30102_write_reg(REG_FIFO_WR_PTR,0x00)) //FIFO_WR_PTR[4:0]
mssarwar 80:808f6f367f45 131 return false;
mssarwar 80:808f6f367f45 132 if(!maxim_max30102_write_reg(REG_OVF_COUNTER,0x00)) //OVF_COUNTER[4:0]
mssarwar 80:808f6f367f45 133 return false;
mssarwar 80:808f6f367f45 134 if(!maxim_max30102_write_reg(REG_FIFO_RD_PTR,0x00)) //FIFO_RD_PTR[4:0]
mssarwar 80:808f6f367f45 135 return false;
mssarwar 80:808f6f367f45 136 if(!maxim_max30102_write_reg(REG_FIFO_CONFIG,0x0f)) //sample avg = 1, fifo rollover=false, fifo almost full = 17
mssarwar 80:808f6f367f45 137 return false;
mssarwar 80:808f6f367f45 138 if(!maxim_max30102_write_reg(REG_MODE_CONFIG,0x03)) //0x02 for Red only, 0x03 for SpO2 mode 0x07 multimode LED
mssarwar 80:808f6f367f45 139 return false;
mssarwar 80:808f6f367f45 140 if(!maxim_max30102_write_reg(REG_SPO2_CONFIG,0x27)) // SPO2_ADC range = 4096nA, SPO2 sample rate (100 Hz), LED pulseWidth (400uS)
mssarwar 80:808f6f367f45 141 return false;
mssarwar 80:808f6f367f45 142
mssarwar 80:808f6f367f45 143 if(!maxim_max30102_write_reg(REG_LED1_PA,0x24)) //Choose value for ~ 7mA for LED1
mssarwar 80:808f6f367f45 144 return false;
mssarwar 80:808f6f367f45 145 if(!maxim_max30102_write_reg(REG_LED2_PA,0x24)) // Choose value for ~ 7mA for LED2
mssarwar 80:808f6f367f45 146 return false;
mssarwar 80:808f6f367f45 147 if(!maxim_max30102_write_reg(REG_PILOT_PA,0x7f)) // Choose value for ~ 25mA for Pilot LED
mssarwar 80:808f6f367f45 148 return false;
mssarwar 80:808f6f367f45 149 return true;
mssarwar 80:808f6f367f45 150 }
mssarwar 80:808f6f367f45 151
mssarwar 80:808f6f367f45 152 bool maxim_max30102_read_fifo(uint32_t *pun_red_led, uint32_t *pun_ir_led)
mssarwar 80:808f6f367f45 153 /**
mssarwar 80:808f6f367f45 154 * \brief Read a set of samples from the MAX30102 FIFO register
mssarwar 80:808f6f367f45 155 * \par Details
mssarwar 80:808f6f367f45 156 * This function reads a set of samples from the MAX30102 FIFO register
mssarwar 80:808f6f367f45 157 *
mssarwar 80:808f6f367f45 158 * \param[out] *pun_red_led - pointer that stores the red LED reading data
mssarwar 80:808f6f367f45 159 * \param[out] *pun_ir_led - pointer that stores the IR LED reading data
mssarwar 80:808f6f367f45 160 *
mssarwar 80:808f6f367f45 161 * \retval true on success
mssarwar 80:808f6f367f45 162 */
mssarwar 80:808f6f367f45 163 {
mssarwar 80:808f6f367f45 164 uint32_t un_temp;
mssarwar 80:808f6f367f45 165 unsigned char uch_temp;
mssarwar 80:808f6f367f45 166 *pun_red_led=0;
mssarwar 80:808f6f367f45 167 *pun_ir_led=0;
mssarwar 80:808f6f367f45 168 char ach_i2c_data[6];
mssarwar 80:808f6f367f45 169
mssarwar 80:808f6f367f45 170 //read and clear status register
mssarwar 80:808f6f367f45 171 maxim_max30102_read_reg(REG_INTR_STATUS_1, &uch_temp);
mssarwar 80:808f6f367f45 172 maxim_max30102_read_reg(REG_INTR_STATUS_2, &uch_temp);
mssarwar 80:808f6f367f45 173
mssarwar 80:808f6f367f45 174 ach_i2c_data[0]=REG_FIFO_DATA;
mssarwar 80:808f6f367f45 175 if(i2c.write(I2C_WRITE_ADDR, ach_i2c_data, 1, true)!=0)
mssarwar 80:808f6f367f45 176 return false;
mssarwar 80:808f6f367f45 177 if(i2c.read(I2C_READ_ADDR, ach_i2c_data, 6, false)!=0)
mssarwar 80:808f6f367f45 178 {
mssarwar 80:808f6f367f45 179 return false;
mssarwar 80:808f6f367f45 180 }
mssarwar 80:808f6f367f45 181 un_temp=(unsigned char) ach_i2c_data[0];
mssarwar 80:808f6f367f45 182 un_temp<<=16;
mssarwar 80:808f6f367f45 183 *pun_red_led+=un_temp;
mssarwar 80:808f6f367f45 184 un_temp=(unsigned char) ach_i2c_data[1];
mssarwar 80:808f6f367f45 185 un_temp<<=8;
mssarwar 80:808f6f367f45 186 *pun_red_led+=un_temp;
mssarwar 80:808f6f367f45 187 un_temp=(unsigned char) ach_i2c_data[2];
mssarwar 80:808f6f367f45 188 *pun_red_led+=un_temp;
mssarwar 80:808f6f367f45 189
mssarwar 80:808f6f367f45 190 un_temp=(unsigned char) ach_i2c_data[3];
mssarwar 80:808f6f367f45 191 un_temp<<=16;
mssarwar 80:808f6f367f45 192 *pun_ir_led+=un_temp;
mssarwar 80:808f6f367f45 193 un_temp=(unsigned char) ach_i2c_data[4];
mssarwar 80:808f6f367f45 194 un_temp<<=8;
mssarwar 80:808f6f367f45 195 *pun_ir_led+=un_temp;
mssarwar 80:808f6f367f45 196 un_temp=(unsigned char) ach_i2c_data[5];
mssarwar 80:808f6f367f45 197 *pun_ir_led+=un_temp;
mssarwar 80:808f6f367f45 198 *pun_red_led&=0x03FFFF; //Mask MSB [23:18]
mssarwar 80:808f6f367f45 199 *pun_ir_led&=0x03FFFF; //Mask MSB [23:18]
mssarwar 80:808f6f367f45 200
mssarwar 80:808f6f367f45 201
mssarwar 80:808f6f367f45 202 return true;
mssarwar 80:808f6f367f45 203 }
mssarwar 80:808f6f367f45 204
mssarwar 80:808f6f367f45 205
mssarwar 80:808f6f367f45 206 bool maxim_max30102_read_fifo_mss(uint8_t *pun_red_led, uint8_t *pun_ir_led)
mssarwar 80:808f6f367f45 207 /**
mssarwar 80:808f6f367f45 208 * \brief Read a set of samples from the MAX30102 FIFO register
mssarwar 80:808f6f367f45 209 * \par Details
mssarwar 80:808f6f367f45 210 * This function reads a set of samples from the MAX30102 FIFO register
mssarwar 80:808f6f367f45 211 *
mssarwar 80:808f6f367f45 212 * \param[out] *pun_red_led - pointer that stores the red LED reading data
mssarwar 80:808f6f367f45 213 * \param[out] *pun_ir_led - pointer that stores the IR LED reading data
mssarwar 80:808f6f367f45 214 *
mssarwar 80:808f6f367f45 215 * \retval true on success
mssarwar 80:808f6f367f45 216 */
mssarwar 80:808f6f367f45 217 {
mssarwar 80:808f6f367f45 218 uint32_t un_temp;
mssarwar 80:808f6f367f45 219 unsigned char uch_temp;
mssarwar 80:808f6f367f45 220 *pun_red_led=0;
mssarwar 80:808f6f367f45 221 *pun_ir_led=0;
mssarwar 80:808f6f367f45 222 char ach_i2c_data[6];
mssarwar 80:808f6f367f45 223
mssarwar 80:808f6f367f45 224 //read and clear status register
mssarwar 80:808f6f367f45 225 maxim_max30102_read_reg(REG_INTR_STATUS_1, &uch_temp);
mssarwar 80:808f6f367f45 226 maxim_max30102_read_reg(REG_INTR_STATUS_2, &uch_temp);
mssarwar 80:808f6f367f45 227
mssarwar 80:808f6f367f45 228 ach_i2c_data[0]=REG_FIFO_DATA;
mssarwar 80:808f6f367f45 229 if(i2c.write(I2C_WRITE_ADDR, ach_i2c_data, 1, true)!=0)
mssarwar 80:808f6f367f45 230 return false;
mssarwar 80:808f6f367f45 231 if(i2c.read(I2C_READ_ADDR, ach_i2c_data, 6, false)!=0)
mssarwar 80:808f6f367f45 232 {
mssarwar 80:808f6f367f45 233 return false;
mssarwar 80:808f6f367f45 234 }
mssarwar 80:808f6f367f45 235 un_temp=(unsigned char) ach_i2c_data[0];
mssarwar 80:808f6f367f45 236 un_temp<<=16;
mssarwar 80:808f6f367f45 237 *pun_red_led+=un_temp;
mssarwar 80:808f6f367f45 238 un_temp=(unsigned char) ach_i2c_data[1];
mssarwar 80:808f6f367f45 239 un_temp<<=8;
mssarwar 80:808f6f367f45 240 *pun_red_led+=un_temp;
mssarwar 80:808f6f367f45 241 un_temp=(unsigned char) ach_i2c_data[2];
mssarwar 80:808f6f367f45 242 *pun_red_led+=un_temp;
mssarwar 80:808f6f367f45 243
mssarwar 80:808f6f367f45 244 un_temp=(unsigned char) ach_i2c_data[3];
mssarwar 80:808f6f367f45 245 un_temp<<=16;
mssarwar 80:808f6f367f45 246 *pun_ir_led+=un_temp;
mssarwar 80:808f6f367f45 247 un_temp=(unsigned char) ach_i2c_data[4];
mssarwar 80:808f6f367f45 248 un_temp<<=8;
mssarwar 80:808f6f367f45 249 *pun_ir_led+=un_temp;
mssarwar 80:808f6f367f45 250 un_temp=(unsigned char) ach_i2c_data[5];
mssarwar 80:808f6f367f45 251 *pun_ir_led+=un_temp;
mssarwar 80:808f6f367f45 252 *pun_red_led&=0x03FFFF; //Mask MSB [23:18]
mssarwar 80:808f6f367f45 253 *pun_ir_led&=0x03FFFF; //Mask MSB [23:18]
mssarwar 80:808f6f367f45 254
mssarwar 80:808f6f367f45 255
mssarwar 80:808f6f367f45 256 return true;
mssarwar 80:808f6f367f45 257 }
mssarwar 80:808f6f367f45 258
mssarwar 80:808f6f367f45 259
mssarwar 80:808f6f367f45 260 bool maxim_max30102_reset()
mssarwar 80:808f6f367f45 261 /**
mssarwar 80:808f6f367f45 262 * \brief Reset the MAX30102
mssarwar 80:808f6f367f45 263 * \par Details
mssarwar 80:808f6f367f45 264 * This function resets the MAX30102
mssarwar 80:808f6f367f45 265 *
mssarwar 80:808f6f367f45 266 * \param None
mssarwar 80:808f6f367f45 267 *
mssarwar 80:808f6f367f45 268 * \retval true on success
mssarwar 80:808f6f367f45 269 */
mssarwar 80:808f6f367f45 270 {
mssarwar 80:808f6f367f45 271 if(!maxim_max30102_write_reg(REG_MODE_CONFIG,0x40))
mssarwar 80:808f6f367f45 272 return false;
mssarwar 80:808f6f367f45 273 else
mssarwar 80:808f6f367f45 274 return true;
mssarwar 80:808f6f367f45 275 }