hongwei liu / HKC_MiniCheetah

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Dependencies:   mbed-dev-f303 FastPWM3

DRV8323/DRV.cpp@58:4f8f58ecb52a, 2021-09-22 (annotated)

Committer:
monkey61
Date:
Wed Sep 22 09:30:48 2021 +0000
Revision:
58:4f8f58ecb52a
Parent:
57:f3336e9eb1f2
Child:
59:b41cbfa3b30e
The function of error reporting through CAN bus is added

Who changed what in which revision?

UserRevisionLine numberNew contents of line
benkatz 44:8040fa2fcb0d 1 #include "mbed.h"
benkatz 44:8040fa2fcb0d 2 #include "DRV.h"
benkatz 44:8040fa2fcb0d 3
monkey61 58:4f8f58ecb52a 4 #include "structs.h"
monkey61 58:4f8f58ecb52a 5 #include "foc.h"
monkey61 58:4f8f58ecb52a 6 #include "hw_setup.h"
monkey61 58:4f8f58ecb52a 7 #include "hw_config.h"
monkey61 58:4f8f58ecb52a 8 #include "motor_config.h"
monkey61 58:4f8f58ecb52a 9 #include "stm32f4xx_flash.h"
monkey61 58:4f8f58ecb52a 10 #include "CAN_com.h"
monkey61 58:4f8f58ecb52a 11
monkey61 58:4f8f58ecb52a 12
benkatz 44:8040fa2fcb0d 13 DRV832x::DRV832x(SPI *spi, DigitalOut *cs){
benkatz 44:8040fa2fcb0d 14 _spi = spi;
benkatz 44:8040fa2fcb0d 15 _cs = cs;
benkatz 44:8040fa2fcb0d 16 _cs->write(1);
benkatz 44:8040fa2fcb0d 17 wait_us(10);
benkatz 44:8040fa2fcb0d 18 _spi->format(16, 1);
benkatz 44:8040fa2fcb0d 19 _spi->frequency(500000);
benkatz 44:8040fa2fcb0d 20 }
benkatz 44:8040fa2fcb0d 21
benkatz 44:8040fa2fcb0d 22 uint16_t DRV832x::spi_write(uint16_t val)
benkatz 44:8040fa2fcb0d 23 {
benkatz 44:8040fa2fcb0d 24 _cs->write(0);
benkatz 44:8040fa2fcb0d 25 wait_us(10);
benkatz 44:8040fa2fcb0d 26 uint16_t reply = _spi->write(val);
benkatz 44:8040fa2fcb0d 27 _cs->write(1);
benkatz 44:8040fa2fcb0d 28 return reply;
benkatz 44:8040fa2fcb0d 29 }
benkatz 44:8040fa2fcb0d 30
benkatz 44:8040fa2fcb0d 31 int DRV832x::read_FSR1(void)
benkatz 44:8040fa2fcb0d 32 {
benkatz 44:8040fa2fcb0d 33 uint16_t val = (1<<15) | FSR1;
benkatz 44:8040fa2fcb0d 34 return spi_write(val);
benkatz 44:8040fa2fcb0d 35 }
benkatz 44:8040fa2fcb0d 36
benkatz 44:8040fa2fcb0d 37 int DRV832x::read_FSR2(void)
benkatz 44:8040fa2fcb0d 38 {
benkatz 44:8040fa2fcb0d 39 uint16_t val = (1<<15) | FSR2;
benkatz 44:8040fa2fcb0d 40 return spi_write(val);
benkatz 44:8040fa2fcb0d 41 }
benkatz 44:8040fa2fcb0d 42
benkatz 44:8040fa2fcb0d 43 int DRV832x::read_register(int reg)
benkatz 44:8040fa2fcb0d 44 {
benkatz 44:8040fa2fcb0d 45 return spi_write((1<<15) | (reg<<11));
benkatz 44:8040fa2fcb0d 46 }
benkatz 44:8040fa2fcb0d 47
benkatz 44:8040fa2fcb0d 48 void DRV832x::write_register(int reg, int val)
benkatz 44:8040fa2fcb0d 49 {
benkatz 44:8040fa2fcb0d 50 spi_write((reg<<11) | val);
benkatz 44:8040fa2fcb0d 51 }
benkatz 44:8040fa2fcb0d 52 void DRV832x::write_DCR(int DIS_CPUV, int DIS_GDF, int OTW_REP, int PWM_MODE, int PWM_COM, int PWM_DIR, int COAST, int BRAKE, int CLR_FLT)
benkatz 44:8040fa2fcb0d 53 {
benkatz 44:8040fa2fcb0d 54 uint16_t val = (DCR<<11) | (DIS_CPUV<<9) | (DIS_GDF<<8) | (OTW_REP<<7) | (PWM_MODE<<5) | (PWM_COM<<4) | (PWM_DIR<<3) | (COAST<<2) | (BRAKE<<1) | CLR_FLT;
benkatz 44:8040fa2fcb0d 55 spi_write(val);
benkatz 44:8040fa2fcb0d 56 }
benkatz 44:8040fa2fcb0d 57 void DRV832x::write_HSR(int LOCK, int IDRIVEP_HS, int IDRIVEN_HS)
benkatz 44:8040fa2fcb0d 58 {
benkatz 44:8040fa2fcb0d 59 uint16_t val = (HSR<<11) | (LOCK<<8) | (IDRIVEP_HS<<4) | IDRIVEN_HS;
benkatz 44:8040fa2fcb0d 60 spi_write(val);
benkatz 44:8040fa2fcb0d 61 }
benkatz 44:8040fa2fcb0d 62 void DRV832x::write_LSR(int CBC, int TDRIVE, int IDRIVEP_LS, int IDRIVEN_LS)
benkatz 44:8040fa2fcb0d 63 {
benkatz 44:8040fa2fcb0d 64 uint16_t val = (LSR<<11) | (CBC<<10) | (TDRIVE<<8) | (IDRIVEP_LS<<4) | IDRIVEN_LS;
benkatz 44:8040fa2fcb0d 65 spi_write(val);
benkatz 44:8040fa2fcb0d 66 }
benkatz 44:8040fa2fcb0d 67 void DRV832x::write_OCPCR(int TRETRY, int DEAD_TIME, int OCP_MODE, int OCP_DEG, int VDS_LVL)
benkatz 44:8040fa2fcb0d 68 {
benkatz 44:8040fa2fcb0d 69 uint16_t val = (OCPCR<<11) | (TRETRY<<10) | (DEAD_TIME<<8) | (OCP_MODE<<6) | (OCP_DEG<<4) | VDS_LVL;
benkatz 44:8040fa2fcb0d 70 spi_write(val);
benkatz 44:8040fa2fcb0d 71 }
benkatz 44:8040fa2fcb0d 72 void DRV832x::write_CSACR(int CSA_FET, int VREF_DIV, int LS_REF, int CSA_GAIN, int DIS_SEN, int CSA_CAL_A, int CSA_CAL_B, int CSA_CAL_C, int SEN_LVL)
benkatz 44:8040fa2fcb0d 73 {
benkatz 44:8040fa2fcb0d 74 uint16_t val = (CSACR<<11) | (CSA_FET<<10) | (VREF_DIV<<9) | (LS_REF<<8) | (CSA_GAIN<<6) | (DIS_SEN<<5) | (CSA_CAL_A<<4) | (CSA_CAL_B<<3) | (CSA_CAL_C<<2) | SEN_LVL;
benkatz 44:8040fa2fcb0d 75 spi_write(val);
benkatz 44:8040fa2fcb0d 76 }
monkey61 57:f3336e9eb1f2 77
monkey61 57:f3336e9eb1f2 78
monkey61 58:4f8f58ecb52a 79 CANMessage txMsg_liu;
monkey61 58:4f8f58ecb52a 80 void DRV832x::print_faults(CAN *_can)
benkatz 44:8040fa2fcb0d 81 {
benkatz 44:8040fa2fcb0d 82 uint16_t val1 = read_FSR1();
benkatz 44:8040fa2fcb0d 83 wait_us(10);
benkatz 44:8040fa2fcb0d 84 uint16_t val2 = read_FSR2();
benkatz 44:8040fa2fcb0d 85 wait_us(10);
benkatz 44:8040fa2fcb0d 86
benkatz 44:8040fa2fcb0d 87 if(val1 & (1<<10)){printf("\n\rFAULT\n\r");}
benkatz 44:8040fa2fcb0d 88
benkatz 44:8040fa2fcb0d 89 if(val1 & (1<<9)){printf("VDS_OCP\n\r");}
benkatz 44:8040fa2fcb0d 90 if(val1 & (1<<8)){printf("GDF\n\r");}
benkatz 44:8040fa2fcb0d 91 if(val1 & (1<<7)){printf("UVLO\n\r");}
benkatz 44:8040fa2fcb0d 92 if(val1 & (1<<6)){printf("OTSD\n\r");}
benkatz 44:8040fa2fcb0d 93 if(val1 & (1<<5)){printf("VDS_HA\n\r");}
benkatz 44:8040fa2fcb0d 94 if(val1 & (1<<4)){printf("VDS_LA\n\r");}
benkatz 44:8040fa2fcb0d 95 if(val1 & (1<<3)){printf("VDS_HB\n\r");}
benkatz 44:8040fa2fcb0d 96 if(val1 & (1<<2)){printf("VDS_LB\n\r");}
benkatz 44:8040fa2fcb0d 97 if(val1 & (1<<1)){printf("VDS_HC\n\r");}
benkatz 44:8040fa2fcb0d 98 if(val1 & (1)){printf("VDS_LC\n\r");}
benkatz 44:8040fa2fcb0d 99
benkatz 44:8040fa2fcb0d 100 if(val2 & (1<<10)){printf("SA_OC\n\r");}
benkatz 44:8040fa2fcb0d 101 if(val2 & (1<<9)){printf("SB_OC\n\r");}
benkatz 44:8040fa2fcb0d 102 if(val2 & (1<<8)){printf("SC_OC\n\r");}
benkatz 44:8040fa2fcb0d 103 if(val2 & (1<<7)){printf("OTW\n\r");}
benkatz 44:8040fa2fcb0d 104 if(val2 & (1<<6)){printf("CPUV\n\r");}
benkatz 44:8040fa2fcb0d 105 if(val2 & (1<<5)){printf("VGS_HA\n\r");}
benkatz 44:8040fa2fcb0d 106 if(val2 & (1<<4)){printf("VGS_LA\n\r");}
benkatz 44:8040fa2fcb0d 107 if(val2 & (1<<3)){printf("VGS_HB\n\r");}
benkatz 44:8040fa2fcb0d 108 if(val2 & (1<<2)){printf("VGS_LB\n\r");}
benkatz 44:8040fa2fcb0d 109 if(val2 & (1<<1)){printf("VGS_HC\n\r");}
benkatz 44:8040fa2fcb0d 110 if(val2 & (1)){printf("VGS_LC\n\r");}
monkey61 57:f3336e9eb1f2 111
monkey61 58:4f8f58ecb52a 112 if(val1 >0 || val2>0)
monkey61 58:4f8f58ecb52a 113 {
monkey61 58:4f8f58ecb52a 114 txMsg_liu.id = 10;
monkey61 58:4f8f58ecb52a 115 txMsg_liu.data[0] = (val1>>8)&0xff;
monkey61 58:4f8f58ecb52a 116 txMsg_liu.data[1] = (val1)&0xff;
monkey61 58:4f8f58ecb52a 117 txMsg_liu.data[2] = (val2>>8)&0xff;
monkey61 58:4f8f58ecb52a 118 txMsg_liu.data[3] = (val2)&0xff;
monkey61 58:4f8f58ecb52a 119 txMsg_liu.len = 4;
monkey61 58:4f8f58ecb52a 120 _can->write(txMsg_liu);
monkey61 58:4f8f58ecb52a 121
monkey61 57:f3336e9eb1f2 122
monkey61 57:f3336e9eb1f2 123
benkatz 44:8040fa2fcb0d 124 }
monkey61 58:4f8f58ecb52a 125 }
benkatz 44:8040fa2fcb0d 126 void DRV832x::enable_gd(void)
benkatz 44:8040fa2fcb0d 127 {
benkatz 44:8040fa2fcb0d 128 uint16_t val = (read_register(DCR)) & (~(0x1<<2));
benkatz 44:8040fa2fcb0d 129 write_register(DCR, val);
benkatz 44:8040fa2fcb0d 130 }
benkatz 44:8040fa2fcb0d 131
benkatz 44:8040fa2fcb0d 132 void DRV832x::disable_gd(void)
benkatz 44:8040fa2fcb0d 133 {
benkatz 44:8040fa2fcb0d 134 uint16_t val = (read_register(DCR)) | (0x1<<2);
benkatz 44:8040fa2fcb0d 135 write_register(DCR, val);
benkatz 45:26801179208e 136 }
benkatz 45:26801179208e 137
benkatz 45:26801179208e 138 void DRV832x::calibrate(void)
benkatz 45:26801179208e 139 {
benkatz 45:26801179208e 140 uint16_t val = 0x1<<4 + 0x1<<3 + 0x1<<2;
benkatz 45:26801179208e 141 write_register(CSACR, val);
benkatz 44:8040fa2fcb0d 142 }