mi mi / SDFileSystemDMA Featured

first 2016/02 SDFileSystemDMA inherited from Official SDFileSystem.

Dependents:   SDFileSystemDMA-test DmdFullRGB_0_1

Fork of SDFileSystemDMA by mi mi

SDFileSystemDMA is enhanced SDFileSystem library for STM32 micros by using DMA functionality.
Max read transfer rate reaches over 2MByte/sec at 24MHz SPI clock if enough read buffer size is set.
Even though minimum read buffer size (512Byte) is set, read transfer rate will reach over 1MByte/sec at 24MHz SPI Clock.
( but depends on the ability of each SD card)

Test program is here.
https://developer.mbed.org/users/mimi3/code/SDFileSystemDMA-test/

/media/uploads/mimi3/sdfilesystemdma-speed-test3-read-buffer-512byte.png

/media/uploads/mimi3/sdfilesystemdma-speed-test-buffer-vs-spi-clock-nucleo-f411re-96mhz.png

Supported SPI port is shown below table.

(v): Verified. It works well.
(w): Probably it will work well. (not tested)
(c): Only compiled. (not tested)
(f): Over flash.
(r): Only read mode. (when _FS_READONLY==1)
(u) Under construction
(z): Dose not work.

Caution

If your board has SRAM less than or equal to 8KB, the buffer size must be set to 512 Bytes.

Supported Boards:
Cortex-M0

BoardSRAMSPI1SPI2SPI3
NUCLEO-F030R88KB(v)
DISCO-F051R88KB(w)
NUCLEO-F031K64KB(f)
NUCLEO-F042K66KB(r)
NUCLEO-F070RB16KB(w)
NUCLEO-F072RB16KB(w)
NUCLEO-F091RC32KB(c)

Cortex-L0

BoardSRAMSPI1SPI2SPI3
DISCO-L053C88KB(c)
NUCLEO-L053R88KB(c)
NUCLEO-L073RZ20KB(c)

Cortex-M3

BoardSRAMSPI1SPI2SPI3
DISCO-F100RB8KB(v)(v)-
BLUEPILL-F103CB20KB(w)(w)-
NUCLEO-F103RB20KB(v)(v)-
NUCLEO-L152RE80KB(v)(w)-
MOTE-L152RC32KB(w)(w)-

Cortex-M4
F3

BoardSRAMSPI1SPI2SPI3
DISCO-F303VC40KB-(v)(v)
NUCLEO-F303RE64KB(w)(w)(w)
NUCLEO-F302R816KB--(c)
NUCLEO-F303K812KB(c)--
DISCO-F334C812KB(c)--
NUCLEO-F334R812KB(c)--

F4

BoardSPI1SPI2SPI3
ELMO-F411RE(w)-(w)
MTS-MDOT-F411RE(u)-(u)
MTS-DRAGONFLY-F411RE(w)-(w)
NUCLEO-F411RE(v)-(v)
NUCLEO-F401RE(w)-(w)
MTS-MDOT-F405RG(u)-(u)
NUCLEO-F410RB(c)-(c)
NUCLEO-F446RE(c)-(c)
NUCLEO-F429ZI(c)-(c)
B96B-F446VE(c)-(c)
NUCLEO-F446ZE(c)-(c)
DISCO-F429ZI(u)-(u)
DISCO-F469NI(c)-(c)

Information

This library is set to use "short file name" in SDFileSystemDMA/FATFileSystem/ChaN/ffconf.h . ( _USE_LFN=0)
You can change this option to _USE_LFN=1 .

spi_dma/spi_dma_stm32f0.c

Committer:
mimi3
Date:
2017-01-22
Revision:
38:7077795dbf81
Parent:
30:dde6a5f67add

File content as of revision 38:7077795dbf81:

#if defined(TARGET_STM32F0) || defined(TARGET_STM32L0)
/*

This file is licensed under Apache 2.0 license.
(C) 2016 dinau

*/
#include "spi_dma.h"

/* For SPI1 */
#define DMAx_CLK_ENABLE()     __DMA1_CLK_ENABLE()    
#define SPIx_TX_DMA_CHANNEL   DMA1_Channel3
#define SPIx_RX_DMA_CHANNEL   DMA1_Channel2

#if defined(TARGET_STM32F091RC) 
#define SPIx_DMA_IRQn         DMA1_Ch2_3_DMA2_Ch1_2_IRQn
#define DMA_SPI_IRQHandler    DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#else
#define SPIx_DMA_IRQn         DMA1_Channel2_3_IRQn    
#define DMA_SPI_IRQHandler    DMA1_Channel2_3_IRQHandler
#endif



#define readReg( reg, mask)  (  (reg) & (mask)  )    

void spi_dma_get_info( SPI_TypeDef *spi )
{
    SpiHandle.Instance               = spi;
    SpiHandle.Init.Mode              = readReg(spi->CR1, SPI_MODE_MASTER); 
    SpiHandle.Init.BaudRatePrescaler = readReg(spi->CR1, SPI_CR1_BR);
    SpiHandle.Init.Direction         = readReg(spi->CR1, SPI_CR1_BIDIMODE); 
    SpiHandle.Init.CLKPhase          = readReg(spi->CR1, SPI_CR1_CPHA);
    SpiHandle.Init.CLKPolarity       = readReg(spi->CR1, SPI_CR1_CPOL);
    SpiHandle.Init.CRCCalculation    = readReg(spi->CR1, SPI_CR1_CRCEN);
    SpiHandle.Init.CRCPolynomial     = spi->CRCPR & 0xFFFF;
#if defined(TARGET_STM32F0)
    SpiHandle.Init.DataSize          = readReg(spi->CR2, SPI_CR2_DS);
#endif
    SpiHandle.Init.FirstBit          = SPI_FIRSTBIT_MSB;
    SpiHandle.Init.NSS               = readReg(spi->CR1, SPI_CR1_SSM);
    SpiHandle.Init.TIMode            = SPI_TIMODE_DISABLED;
    SpiHandle.State                  = HAL_SPI_STATE_READY;
}

void spi_dma_handle_setup( SPI_TypeDef *spi, uint8_t mode )
{
	(void)spi;
	static uint8_t dma_handle_inited = 0;
	/* Peripheral DMA init*/
	/* TX: */
	if( !dma_handle_inited ){
		hdma_spi_tx.Instance                 = SPIx_TX_DMA_CHANNEL;
		hdma_spi_tx.Init.Direction           = DMA_MEMORY_TO_PERIPH;
		hdma_spi_tx.Init.PeriphInc           = DMA_PINC_DISABLE;
		hdma_spi_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
		hdma_spi_tx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
		hdma_spi_tx.Init.Mode                = DMA_NORMAL;
		hdma_spi_tx.Init.Priority            = DMA_PRIORITY_HIGH;
	}
	hdma_spi_tx.Init.MemInc = ( mode == DMA_SPI_READ) ? DMA_MINC_DISABLE : DMA_MINC_ENABLE;
	HAL_DMA_Init(&hdma_spi_tx);
	__HAL_LINKDMA( &SpiHandle,hdmatx,hdma_spi_tx);
	/* RX: */
	if( !dma_handle_inited ){
		hdma_spi_rx.Instance                 = SPIx_RX_DMA_CHANNEL;
		hdma_spi_rx.Init.Direction           = DMA_PERIPH_TO_MEMORY;
		hdma_spi_rx.Init.PeriphInc           = DMA_PINC_DISABLE;
		hdma_spi_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
		hdma_spi_rx.Init.MemDataAlignment    = DMA_MDATAALIGN_BYTE;
		hdma_spi_rx.Init.Mode                = DMA_NORMAL;
		hdma_spi_rx.Init.Priority            = DMA_PRIORITY_LOW;
	}
	hdma_spi_rx.Init.MemInc = (mode == DMA_SPI_READ) ? DMA_MINC_ENABLE : DMA_MINC_DISABLE;
	HAL_DMA_Init(&hdma_spi_rx);
	__HAL_LINKDMA( &SpiHandle,hdmarx,hdma_spi_rx);

	dma_handle_inited = 1;
}

void spi_dma_irq_setup( SPI_TypeDef *spi) 
{
	(void)spi;
	/* DMA controller clock enable */
	DMAx_CLK_ENABLE();

	/* DMA interrupt init */
	HAL_NVIC_SetPriority(SPIx_DMA_IRQn, 1, 0);
	HAL_NVIC_EnableIRQ(  SPIx_DMA_IRQn);
}

void DMA_SPI_IRQHandler(void)
{
  HAL_DMA_IRQHandler(&hdma_spi_rx);
  HAL_DMA_IRQHandler(&hdma_spi_tx);
}


#endif /* TARGET_STM32F0 */