Alex Millane / Mbed 2 deprecated IFARanging

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Dependencies:   mbed

DW1000/DW1000.cpp@0:99928431bb44, 2015-07-07 (annotated)

Committer:
millanea
Date:
Tue Jul 07 09:36:12 2015 +0000
Revision:
0:99928431bb44
First commit. Committing the entire project such that it can be published.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
millanea 0:99928431bb44 1 #include "DW1000.h"
millanea 0:99928431bb44 2
millanea 0:99928431bb44 3 DW1000::DW1000(PinName MOSI, PinName MISO, PinName SCLK, PinName CS, PinName IRQ) : irq(IRQ), spi(MOSI, MISO, SCLK), cs(CS) {
millanea 0:99928431bb44 4 setCallbacks(NULL, NULL);
millanea 0:99928431bb44 5
millanea 0:99928431bb44 6 deselect(); // Chip must be deselected first
millanea 0:99928431bb44 7 spi.format(8,0); // Setup the spi for standard 8 bit data and SPI-Mode 0 (GPIO5, GPIO6 open circuit or ground on DW1000)
millanea 0:99928431bb44 8 spi.frequency(5000000); // with a 1MHz clock rate (worked up to 49MHz in our Test)
millanea 0:99928431bb44 9
millanea 0:99928431bb44 10 resetAll(); // we do a soft reset of the DW1000 everytime the driver starts
millanea 0:99928431bb44 11
millanea 0:99928431bb44 12 // Configuration TODO: make method for that
millanea 0:99928431bb44 13 // User Manual "2.5.5 Default Configurations that should be modified" p. 22
millanea 0:99928431bb44 14 //Those values are for the standard mode (6.8Mbps, 5, 16Mhz, 32 Symbols) and are INCOMPLETE!
millanea 0:99928431bb44 15 // writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);
millanea 0:99928431bb44 16 // writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);
millanea 0:99928431bb44 17 // writeRegister32(DW1000_DRX_CONF, 0x08, 0x311A002D);
millanea 0:99928431bb44 18 // writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD);
millanea 0:99928431bb44 19 // writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607);
millanea 0:99928431bb44 20 // writeRegister32(DW1000_TX_POWER, 0, 0x0E082848);
millanea 0:99928431bb44 21 // writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0);
millanea 0:99928431bb44 22 // writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0);
millanea 0:99928431bb44 23 // writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6);
millanea 0:99928431bb44 24
millanea 0:99928431bb44 25
millanea 0:99928431bb44 26 //Those values are for the 110kbps mode (5, 16MHz, 1024 Symbols) and are quite complete
millanea 0:99928431bb44 27 writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870); //AGC_TUNE1 for 16MHz PRF
millanea 0:99928431bb44 28 writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907); //AGC_TUNE2 (Universal)
millanea 0:99928431bb44 29 writeRegister16(DW1000_AGC_CTRL, 0x12, 0x0055); //AGC_TUNE3 (Universal)
millanea 0:99928431bb44 30
millanea 0:99928431bb44 31 writeRegister16(DW1000_DRX_CONF, 0x02, 0x000A); //DRX_TUNE0b for 110kbps
millanea 0:99928431bb44 32 writeRegister16(DW1000_DRX_CONF, 0x04, 0x0087); //DRX_TUNE1a for 16MHz PRF
millanea 0:99928431bb44 33 writeRegister16(DW1000_DRX_CONF, 0x06, 0x0064); //DRX_TUNE1b for 110kbps & > 1024 symbols
millanea 0:99928431bb44 34 writeRegister32(DW1000_DRX_CONF, 0x08, 0x351A009A); //PAC size for 1024 symbols preamble & 16MHz PRF
millanea 0:99928431bb44 35 //writeRegister32(DW1000_DRX_CONF, 0x08, 0x371A011D); //PAC size for 2048 symbols preamble
millanea 0:99928431bb44 36
millanea 0:99928431bb44 37 writeRegister8 (DW1000_LDE_CTRL, 0x0806, 0xD); //LDE_CFG1
millanea 0:99928431bb44 38 writeRegister16(DW1000_LDE_CTRL, 0x1806, 0x1607); //LDE_CFG2 for 16MHz PRF
millanea 0:99928431bb44 39
millanea 0:99928431bb44 40 writeRegister32(DW1000_TX_POWER, 0, 0x28282828); //Power for channel 5
millanea 0:99928431bb44 41
millanea 0:99928431bb44 42 writeRegister8(DW1000_RF_CONF, 0x0B, 0xD8); //RF_RXCTRLH for channel 5
millanea 0:99928431bb44 43 writeRegister32(DW1000_RF_CONF, 0x0C, 0x001E3FE0); //RF_TXCTRL for channel 5
millanea 0:99928431bb44 44
millanea 0:99928431bb44 45 writeRegister8 (DW1000_TX_CAL, 0x0B, 0xC0); //TC_PGDELAY for channel 5
millanea 0:99928431bb44 46
millanea 0:99928431bb44 47 writeRegister32 (DW1000_FS_CTRL, 0x07, 0x0800041D); //FS_PLLCFG for channel 5
millanea 0:99928431bb44 48 writeRegister8 (DW1000_FS_CTRL, 0x0B, 0xA6); //FS_PLLTUNE for channel 5
millanea 0:99928431bb44 49
millanea 0:99928431bb44 50 loadLDE(); // important everytime DW1000 initialises/awakes otherwise the LDE algorithm must be turned off or there's receiving malfunction see User Manual LDELOAD on p22 & p158
millanea 0:99928431bb44 51
millanea 0:99928431bb44 52 // 110kbps CAUTION: a lot of other registers have to be set for an optimized operation on 110kbps
millanea 0:99928431bb44 53 writeRegister16(DW1000_TX_FCTRL, 1, 0x0800 | 0x0100 | 0x0080); // use 1024 symbols preamble (0x0800) (previously 2048 - 0x2800), 16MHz pulse repetition frequency (0x0100), 110kbps bit rate (0x0080) see p.69 of DW1000 User Manual
millanea 0:99928431bb44 54 writeRegister8(DW1000_SYS_CFG, 2, 0x44); // enable special receiving option for 110kbps (disable smartTxPower)!! (0x44) see p.64 of DW1000 User Manual [DO NOT enable 1024 byte frames (0x03) becuase it generates disturbance of ranging don't know why...]
millanea 0:99928431bb44 55
millanea 0:99928431bb44 56 writeRegister16(DW1000_TX_ANTD, 0, 16384); // set TX and RX Antenna delay to neutral because we calibrate afterwards
millanea 0:99928431bb44 57 writeRegister16(DW1000_LDE_CTRL, 0x1804, 16384); // = 2^14 a quarter of the range of the 16-Bit register which corresponds to zero calibration in a round trip (TX1+RX2+TX2+RX1)
millanea 0:99928431bb44 58
millanea 0:99928431bb44 59 writeRegister8(DW1000_SYS_CFG, 3, 0x20); // enable auto reenabling receiver after error
millanea 0:99928431bb44 60
millanea 0:99928431bb44 61 irq.rise(this, &DW1000::ISR); // attach interrupt handler to rising edge of interrupt pin from DW1000
millanea 0:99928431bb44 62 }
millanea 0:99928431bb44 63
millanea 0:99928431bb44 64 void DW1000::setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)) {
millanea 0:99928431bb44 65 bool RX = false;
millanea 0:99928431bb44 66 bool TX = false;
millanea 0:99928431bb44 67 if (callbackRX) {
millanea 0:99928431bb44 68 DW1000::callbackRX.attach(callbackRX);
millanea 0:99928431bb44 69 RX = true;
millanea 0:99928431bb44 70 }
millanea 0:99928431bb44 71 if (callbackTX) {
millanea 0:99928431bb44 72 DW1000::callbackTX.attach(callbackTX);
millanea 0:99928431bb44 73 TX = true;
millanea 0:99928431bb44 74 }
millanea 0:99928431bb44 75 setInterrupt(RX,TX);
millanea 0:99928431bb44 76 }
millanea 0:99928431bb44 77
millanea 0:99928431bb44 78 uint32_t DW1000::getDeviceID() {
millanea 0:99928431bb44 79 uint32_t result;
millanea 0:99928431bb44 80 readRegister(DW1000_DEV_ID, 0, (uint8_t*)&result, 4);
millanea 0:99928431bb44 81 return result;
millanea 0:99928431bb44 82 }
millanea 0:99928431bb44 83
millanea 0:99928431bb44 84 uint64_t DW1000::getEUI() {
millanea 0:99928431bb44 85 uint64_t result;
millanea 0:99928431bb44 86 readRegister(DW1000_EUI, 0, (uint8_t*)&result, 8);
millanea 0:99928431bb44 87 return result;
millanea 0:99928431bb44 88 }
millanea 0:99928431bb44 89
millanea 0:99928431bb44 90 void DW1000::setEUI(uint64_t EUI) {
millanea 0:99928431bb44 91 writeRegister(DW1000_EUI, 0, (uint8_t*)&EUI, 8);
millanea 0:99928431bb44 92 }
millanea 0:99928431bb44 93
millanea 0:99928431bb44 94 float DW1000::getVoltage() {
millanea 0:99928431bb44 95 uint8_t buffer[7] = {0x80, 0x0A, 0x0F, 0x01, 0x00}; // algorithm form User Manual p57
millanea 0:99928431bb44 96 writeRegister(DW1000_RF_CONF, 0x11, buffer, 2);
millanea 0:99928431bb44 97 writeRegister(DW1000_RF_CONF, 0x12, &buffer[2], 1);
millanea 0:99928431bb44 98 writeRegister(DW1000_TX_CAL, 0x00, &buffer[3], 1);
millanea 0:99928431bb44 99 writeRegister(DW1000_TX_CAL, 0x00, &buffer[4], 1);
millanea 0:99928431bb44 100 readRegister(DW1000_TX_CAL, 0x03, &buffer[5], 2); // get the 8-Bit readings for Voltage and Temperature
millanea 0:99928431bb44 101 float Voltage = buffer[5] * 0.0057 + 2.3;
millanea 0:99928431bb44 102 //float Temperature = buffer[6] * 1.13 - 113.0; // TODO: getTemperature was always ~35 degree with better formula/calibration
millanea 0:99928431bb44 103 return Voltage;
millanea 0:99928431bb44 104 }
millanea 0:99928431bb44 105
millanea 0:99928431bb44 106 uint64_t DW1000::getStatus() {
millanea 0:99928431bb44 107 return readRegister40(DW1000_SYS_STATUS, 0);
millanea 0:99928431bb44 108 }
millanea 0:99928431bb44 109
millanea 0:99928431bb44 110 uint64_t DW1000::getRXTimestamp() {
millanea 0:99928431bb44 111 return readRegister40(DW1000_RX_TIME, 0);
millanea 0:99928431bb44 112 }
millanea 0:99928431bb44 113
millanea 0:99928431bb44 114 uint64_t DW1000::getTXTimestamp() {
millanea 0:99928431bb44 115 return readRegister40(DW1000_TX_TIME, 0);
millanea 0:99928431bb44 116 }
millanea 0:99928431bb44 117
millanea 0:99928431bb44 118 void DW1000::sendString(char* message) {
millanea 0:99928431bb44 119 sendFrame((uint8_t*)message, strlen(message)+1);
millanea 0:99928431bb44 120 }
millanea 0:99928431bb44 121
millanea 0:99928431bb44 122 void DW1000::receiveString(char* message) {
millanea 0:99928431bb44 123 readRegister(DW1000_RX_BUFFER, 0, (uint8_t*)message, getFramelength()); // get data from buffer
millanea 0:99928431bb44 124 }
millanea 0:99928431bb44 125
millanea 0:99928431bb44 126 void DW1000::sendFrame(uint8_t* message, uint16_t length) {
millanea 0:99928431bb44 127 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
millanea 0:99928431bb44 128 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
millanea 0:99928431bb44 129 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
millanea 0:99928431bb44 130
millanea 0:99928431bb44 131 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
millanea 0:99928431bb44 132 length += 2; // including 2 CRC Bytes
millanea 0:99928431bb44 133 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
millanea 0:99928431bb44 134 writeRegister16(DW1000_TX_FCTRL, 0, length);
millanea 0:99928431bb44 135
millanea 0:99928431bb44 136 stopTRX(); // stop receiving
millanea 0:99928431bb44 137 writeRegister8(DW1000_SYS_CTRL, 0, 0x02); // trigger sending process by setting the TXSTRT bit
millanea 0:99928431bb44 138 startRX(); // enable receiver again
millanea 0:99928431bb44 139 }
millanea 0:99928431bb44 140
millanea 0:99928431bb44 141 void DW1000::sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp) {
millanea 0:99928431bb44 142 //if (length >= 1021) length = 1021; // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
millanea 0:99928431bb44 143 if (length >= 125) length = 125; // check for maximim length a frame can have with 127 Byte frames
millanea 0:99928431bb44 144 writeRegister(DW1000_TX_BUFFER, 0, message, length); // fill buffer
millanea 0:99928431bb44 145
millanea 0:99928431bb44 146 uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1); // put length of frame
millanea 0:99928431bb44 147 length += 2; // including 2 CRC Bytes
millanea 0:99928431bb44 148 length = ((backup & 0xFC) << 8) | (length & 0x03FF);
millanea 0:99928431bb44 149 writeRegister16(DW1000_TX_FCTRL, 0, length);
millanea 0:99928431bb44 150
millanea 0:99928431bb44 151 writeRegister40(DW1000_DX_TIME, 0, TxTimestamp); //write the timestamp on which to send the message
millanea 0:99928431bb44 152
millanea 0:99928431bb44 153 stopTRX(); // stop receiving
millanea 0:99928431bb44 154 writeRegister8(DW1000_SYS_CTRL, 0, 0x02 | 0x04); // trigger sending process by setting the TXSTRT and TXDLYS bit
millanea 0:99928431bb44 155 startRX(); // enable receiver again
millanea 0:99928431bb44 156 }
millanea 0:99928431bb44 157
millanea 0:99928431bb44 158 void DW1000::startRX() {
millanea 0:99928431bb44 159 writeRegister8(DW1000_SYS_CTRL, 0x01, 0x01); // start listening for preamble by setting the RXENAB bit
millanea 0:99928431bb44 160 }
millanea 0:99928431bb44 161
millanea 0:99928431bb44 162 void DW1000::stopTRX() {
millanea 0:99928431bb44 163 writeRegister8(DW1000_SYS_CTRL, 0, 0x40); // disable tranceiver go back to idle mode
millanea 0:99928431bb44 164 }
millanea 0:99928431bb44 165
millanea 0:99928431bb44 166 // PRIVATE Methods ------------------------------------------------------------------------------------
millanea 0:99928431bb44 167 void DW1000::loadLDE() { // initialise LDE algorithm LDELOAD User Manual p22
millanea 0:99928431bb44 168 writeRegister16(DW1000_PMSC, 0, 0x0301); // set clock to XTAL so OTP is reliable
millanea 0:99928431bb44 169 writeRegister16(DW1000_OTP_IF, 0x06, 0x8000); // set LDELOAD bit in OTP
millanea 0:99928431bb44 170 wait_us(150);
millanea 0:99928431bb44 171 writeRegister16(DW1000_PMSC, 0, 0x0200); // recover to PLL clock
millanea 0:99928431bb44 172 }
millanea 0:99928431bb44 173
millanea 0:99928431bb44 174 void DW1000::resetRX() {
millanea 0:99928431bb44 175 writeRegister8(DW1000_PMSC, 3, 0xE0); // set RX reset
millanea 0:99928431bb44 176 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear RX reset
millanea 0:99928431bb44 177 }
millanea 0:99928431bb44 178
millanea 0:99928431bb44 179 void DW1000::resetAll() {
millanea 0:99928431bb44 180 writeRegister8(DW1000_PMSC, 0, 0x01); // set clock to XTAL
millanea 0:99928431bb44 181 writeRegister8(DW1000_PMSC, 3, 0x00); // set All reset
millanea 0:99928431bb44 182 wait_us(10); // wait for PLL to lock
millanea 0:99928431bb44 183 writeRegister8(DW1000_PMSC, 3, 0xF0); // clear All reset
millanea 0:99928431bb44 184 }
millanea 0:99928431bb44 185
millanea 0:99928431bb44 186
millanea 0:99928431bb44 187 void DW1000::setInterrupt(bool RX, bool TX) {
millanea 0:99928431bb44 188 writeRegister16(DW1000_SYS_MASK, 0, RX*0x4000 | TX*0x0080); // RX good frame 0x4000, TX done 0x0080
millanea 0:99928431bb44 189 }
millanea 0:99928431bb44 190
millanea 0:99928431bb44 191 void DW1000::ISR() {
millanea 0:99928431bb44 192 uint64_t status = getStatus();
millanea 0:99928431bb44 193 if (status & 0x4000) { // a frame was received
millanea 0:99928431bb44 194 callbackRX.call();
millanea 0:99928431bb44 195 writeRegister16(DW1000_SYS_STATUS, 0, 0x6F00); // clearing of receiving status bits
millanea 0:99928431bb44 196 }
millanea 0:99928431bb44 197 if (status & 0x80) { // sending complete
millanea 0:99928431bb44 198 callbackTX.call();
millanea 0:99928431bb44 199 writeRegister8(DW1000_SYS_STATUS, 0, 0xF8); // clearing of sending status bits
millanea 0:99928431bb44 200 }
millanea 0:99928431bb44 201 }
millanea 0:99928431bb44 202
millanea 0:99928431bb44 203 uint16_t DW1000::getFramelength() {
millanea 0:99928431bb44 204 uint16_t framelength = readRegister16(DW1000_RX_FINFO, 0); // get framelength
millanea 0:99928431bb44 205 framelength = (framelength & 0x03FF) - 2; // take only the right bits and subtract the 2 CRC Bytes
millanea 0:99928431bb44 206 return framelength;
millanea 0:99928431bb44 207 }
millanea 0:99928431bb44 208
millanea 0:99928431bb44 209 // SPI Interface ------------------------------------------------------------------------------------
millanea 0:99928431bb44 210 uint8_t DW1000::readRegister8(uint8_t reg, uint16_t subaddress) {
millanea 0:99928431bb44 211 uint8_t result;
millanea 0:99928431bb44 212 readRegister(reg, subaddress, &result, 1);
millanea 0:99928431bb44 213 return result;
millanea 0:99928431bb44 214 }
millanea 0:99928431bb44 215
millanea 0:99928431bb44 216 uint16_t DW1000::readRegister16(uint8_t reg, uint16_t subaddress) {
millanea 0:99928431bb44 217 uint16_t result;
millanea 0:99928431bb44 218 readRegister(reg, subaddress, (uint8_t*)&result, 2);
millanea 0:99928431bb44 219 return result;
millanea 0:99928431bb44 220 }
millanea 0:99928431bb44 221
millanea 0:99928431bb44 222 uint64_t DW1000::readRegister40(uint8_t reg, uint16_t subaddress) {
millanea 0:99928431bb44 223 uint64_t result;
millanea 0:99928431bb44 224 readRegister(reg, subaddress, (uint8_t*)&result, 5);
millanea 0:99928431bb44 225 result &= 0xFFFFFFFFFF; // only 40-Bit
millanea 0:99928431bb44 226 return result;
millanea 0:99928431bb44 227 }
millanea 0:99928431bb44 228
millanea 0:99928431bb44 229 void DW1000::writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer) {
millanea 0:99928431bb44 230 writeRegister(reg, subaddress, &buffer, 1);
millanea 0:99928431bb44 231 }
millanea 0:99928431bb44 232
millanea 0:99928431bb44 233 void DW1000::writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer) {
millanea 0:99928431bb44 234 writeRegister(reg, subaddress, (uint8_t*)&buffer, 2);
millanea 0:99928431bb44 235 }
millanea 0:99928431bb44 236
millanea 0:99928431bb44 237 void DW1000::writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer) {
millanea 0:99928431bb44 238 writeRegister(reg, subaddress, (uint8_t*)&buffer, 4);
millanea 0:99928431bb44 239 }
millanea 0:99928431bb44 240
millanea 0:99928431bb44 241 void DW1000::writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer) {
millanea 0:99928431bb44 242 writeRegister(reg, subaddress, (uint8_t*)&buffer, 5);
millanea 0:99928431bb44 243 }
millanea 0:99928431bb44 244
millanea 0:99928431bb44 245 void DW1000::readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
millanea 0:99928431bb44 246 setupTransaction(reg, subaddress, false);
millanea 0:99928431bb44 247 for(int i=0; i<length; i++) // get data
millanea 0:99928431bb44 248 buffer[i] = spi.write(0x00);
millanea 0:99928431bb44 249 deselect();
millanea 0:99928431bb44 250 }
millanea 0:99928431bb44 251
millanea 0:99928431bb44 252 void DW1000::writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
millanea 0:99928431bb44 253 setupTransaction(reg, subaddress, true);
millanea 0:99928431bb44 254 for(int i=0; i<length; i++) // put data
millanea 0:99928431bb44 255 spi.write(buffer[i]);
millanea 0:99928431bb44 256 deselect();
millanea 0:99928431bb44 257 }
millanea 0:99928431bb44 258
millanea 0:99928431bb44 259 void DW1000::setupTransaction(uint8_t reg, uint16_t subaddress, bool write) {
millanea 0:99928431bb44 260 reg |= (write * DW1000_WRITE_FLAG); // set read/write flag
millanea 0:99928431bb44 261 select();
millanea 0:99928431bb44 262 if (subaddress > 0) { // there's a subadress, we need to set flag and send second header byte
millanea 0:99928431bb44 263 spi.write(reg | DW1000_SUBADDRESS_FLAG);
millanea 0:99928431bb44 264 if (subaddress > 0x7F) { // sub address too long, we need to set flag and send third header byte
millanea 0:99928431bb44 265 spi.write((uint8_t)(subaddress & 0x7F) | DW1000_2_SUBADDRESS_FLAG); // and
millanea 0:99928431bb44 266 spi.write((uint8_t)(subaddress >> 7));
millanea 0:99928431bb44 267 } else {
millanea 0:99928431bb44 268 spi.write((uint8_t)subaddress);
millanea 0:99928431bb44 269 }
millanea 0:99928431bb44 270 } else {
millanea 0:99928431bb44 271 spi.write(reg); // say which register address we want to access
millanea 0:99928431bb44 272 }
millanea 0:99928431bb44 273 }
millanea 0:99928431bb44 274
millanea 0:99928431bb44 275 void DW1000::select() { // always called to start an SPI transmission
millanea 0:99928431bb44 276 irq.disable_irq(); // disable interrupts from DW1000 during SPI becaus this leads to crashes! TODO: if you have other interrupt handlers attached on the micro controller, they could also interfere.
millanea 0:99928431bb44 277 cs = 0; // set Cable Select pin low to start transmission
millanea 0:99928431bb44 278 }
millanea 0:99928431bb44 279 void DW1000::deselect() { // always called to end an SPI transmission
millanea 0:99928431bb44 280 cs = 1; // set Cable Select pin high to stop transmission
millanea 0:99928431bb44 281 irq.enable_irq(); // reenable the interrupt handler
millanea 0:99928431bb44 282 }