Michele Riccio / mbed-dsp_F767ZI

mbed-os 6.10 versione

cmsis_dsp/BasicMathFunctions/arm_scale_q15.c@3:7a284390b0ce, 2013-11-08 (annotated)

Committer:
mbed_official
Date:
Fri Nov 08 13:45:10 2013 +0000
Revision:
3:7a284390b0ce
Parent:
2:da51fb522205 
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_scale_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Multiplies a Q15 vector by a scalar.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup scale
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Multiplies a Q15 vector by a scalar.
emilmont 1:fdd22bb7aa52 54 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 55 * @param[in] scaleFract fractional portion of the scale value
emilmont 1:fdd22bb7aa52 56 * @param[in] shift number of bits to shift the result by
emilmont 1:fdd22bb7aa52 57 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 58 * @param[in] blockSize number of samples in the vector
emilmont 1:fdd22bb7aa52 59 * @return none.
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 62 * \par
emilmont 1:fdd22bb7aa52 63 * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
emilmont 1:fdd22bb7aa52 64 * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
emilmont 1:fdd22bb7aa52 65 */
emilmont 1:fdd22bb7aa52 66
emilmont 1:fdd22bb7aa52 67
emilmont 1:fdd22bb7aa52 68 void arm_scale_q15(
emilmont 1:fdd22bb7aa52 69 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 70 q15_t scaleFract,
emilmont 1:fdd22bb7aa52 71 int8_t shift,
emilmont 1:fdd22bb7aa52 72 q15_t * pDst,
emilmont 1:fdd22bb7aa52 73 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 74 {
emilmont 1:fdd22bb7aa52 75 int8_t kShift = 15 - shift; /* shift to apply after scaling */
emilmont 1:fdd22bb7aa52 76 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 77
mbed_official 3:7a284390b0ce 78 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 79
emilmont 1:fdd22bb7aa52 80 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 81 q15_t in1, in2, in3, in4;
emilmont 1:fdd22bb7aa52 82 q31_t inA1, inA2; /* Temporary variables */
emilmont 1:fdd22bb7aa52 83 q31_t out1, out2, out3, out4;
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 87 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 88
emilmont 1:fdd22bb7aa52 89 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 90 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 91 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 92 {
emilmont 1:fdd22bb7aa52 93 /* Reading 2 inputs from memory */
emilmont 1:fdd22bb7aa52 94 inA1 = *__SIMD32(pSrc)++;
emilmont 1:fdd22bb7aa52 95 inA2 = *__SIMD32(pSrc)++;
emilmont 1:fdd22bb7aa52 96
emilmont 1:fdd22bb7aa52 97 /* C = A * scale */
emilmont 1:fdd22bb7aa52 98 /* Scale the inputs and then store the 2 results in the destination buffer
emilmont 1:fdd22bb7aa52 99 * in single cycle by packing the outputs */
emilmont 1:fdd22bb7aa52 100 out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
emilmont 1:fdd22bb7aa52 101 out2 = (q31_t) ((q15_t) inA1 * scaleFract);
emilmont 1:fdd22bb7aa52 102 out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
emilmont 1:fdd22bb7aa52 103 out4 = (q31_t) ((q15_t) inA2 * scaleFract);
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 /* apply shifting */
emilmont 1:fdd22bb7aa52 106 out1 = out1 >> kShift;
emilmont 1:fdd22bb7aa52 107 out2 = out2 >> kShift;
emilmont 1:fdd22bb7aa52 108 out3 = out3 >> kShift;
emilmont 1:fdd22bb7aa52 109 out4 = out4 >> kShift;
emilmont 1:fdd22bb7aa52 110
emilmont 1:fdd22bb7aa52 111 /* saturate the output */
emilmont 1:fdd22bb7aa52 112 in1 = (q15_t) (__SSAT(out1, 16));
emilmont 1:fdd22bb7aa52 113 in2 = (q15_t) (__SSAT(out2, 16));
emilmont 1:fdd22bb7aa52 114 in3 = (q15_t) (__SSAT(out3, 16));
emilmont 1:fdd22bb7aa52 115 in4 = (q15_t) (__SSAT(out4, 16));
emilmont 1:fdd22bb7aa52 116
emilmont 1:fdd22bb7aa52 117 /* store the result to destination */
emilmont 1:fdd22bb7aa52 118 *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
emilmont 1:fdd22bb7aa52 119 *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16);
emilmont 1:fdd22bb7aa52 120
emilmont 1:fdd22bb7aa52 121 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 122 blkCnt--;
emilmont 1:fdd22bb7aa52 123 }
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 126 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 127 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 130 {
emilmont 1:fdd22bb7aa52 131 /* C = A * scale */
emilmont 1:fdd22bb7aa52 132 /* Scale the input and then store the result in the destination buffer. */
emilmont 1:fdd22bb7aa52 133 *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 136 blkCnt--;
emilmont 1:fdd22bb7aa52 137 }
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 #else
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 142
emilmont 1:fdd22bb7aa52 143 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 144 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 147 {
emilmont 1:fdd22bb7aa52 148 /* C = A * scale */
emilmont 1:fdd22bb7aa52 149 /* Scale the input and then store the result in the destination buffer. */
emilmont 1:fdd22bb7aa52 150 *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 153 blkCnt--;
emilmont 1:fdd22bb7aa52 154 }
emilmont 1:fdd22bb7aa52 155
mbed_official 3:7a284390b0ce 156 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 157
emilmont 1:fdd22bb7aa52 158 }
emilmont 1:fdd22bb7aa52 159
emilmont 1:fdd22bb7aa52 160 /**
emilmont 1:fdd22bb7aa52 161 * @} end of scale group
emilmont 1:fdd22bb7aa52 162 */