Mike Fruge / OneWire

Implementation of 1-Wire with added Alarm Search Functionality

Dependents:   Max32630_One_Wire_Interface

Masters/DS2465/DS2465.cpp@75:8b627804927c, 2016-05-13 (annotated)

Committer:
IanBenzMaxim
Date:
Fri May 13 14:52:50 2016 -0500
Revision:
75:8b627804927c
Parent:
74:23be10c32fa3
Child:
76:84e6c4994e29
Code cleanup.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 75:8b627804927c 1 /******************************************************************//**
IanBenzMaxim 75:8b627804927c 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
IanBenzMaxim 75:8b627804927c 3 *
IanBenzMaxim 75:8b627804927c 4 * Permission is hereby granted, free of charge, to any person obtaining a
IanBenzMaxim 75:8b627804927c 5 * copy of this software and associated documentation files (the "Software"),
IanBenzMaxim 75:8b627804927c 6 * to deal in the Software without restriction, including without limitation
IanBenzMaxim 75:8b627804927c 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
IanBenzMaxim 75:8b627804927c 8 * and/or sell copies of the Software, and to permit persons to whom the
IanBenzMaxim 75:8b627804927c 9 * Software is furnished to do so, subject to the following conditions:
IanBenzMaxim 75:8b627804927c 10 *
IanBenzMaxim 75:8b627804927c 11 * The above copyright notice and this permission notice shall be included
IanBenzMaxim 75:8b627804927c 12 * in all copies or substantial portions of the Software.
IanBenzMaxim 75:8b627804927c 13 *
IanBenzMaxim 75:8b627804927c 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
IanBenzMaxim 75:8b627804927c 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
IanBenzMaxim 75:8b627804927c 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IanBenzMaxim 75:8b627804927c 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
IanBenzMaxim 75:8b627804927c 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
IanBenzMaxim 75:8b627804927c 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
IanBenzMaxim 75:8b627804927c 20 * OTHER DEALINGS IN THE SOFTWARE.
IanBenzMaxim 75:8b627804927c 21 *
IanBenzMaxim 75:8b627804927c 22 * Except as contained in this notice, the name of Maxim Integrated
IanBenzMaxim 75:8b627804927c 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
IanBenzMaxim 75:8b627804927c 24 * Products, Inc. Branding Policy.
IanBenzMaxim 75:8b627804927c 25 *
IanBenzMaxim 75:8b627804927c 26 * The mere transfer of this software does not imply any licenses
IanBenzMaxim 75:8b627804927c 27 * of trade secrets, proprietary technology, copyrights, patents,
IanBenzMaxim 75:8b627804927c 28 * trademarks, maskwork rights, or any other form of intellectual
IanBenzMaxim 75:8b627804927c 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
IanBenzMaxim 75:8b627804927c 30 * ownership rights.
IanBenzMaxim 75:8b627804927c 31 **********************************************************************/
IanBenzMaxim 75:8b627804927c 32
IanBenzMaxim 73:2cecc1372acc 33 #include "DS2465.h"
IanBenzMaxim 73:2cecc1372acc 34 #include "I2C.h"
IanBenzMaxim 73:2cecc1372acc 35 #include "wait_api.h"
IanBenzMaxim 21:00c94aeb533e 36
IanBenzMaxim 21:00c94aeb533e 37 #define I2C_WRITE 0
IanBenzMaxim 21:00c94aeb533e 38 #define I2C_READ 1
IanBenzMaxim 21:00c94aeb533e 39
IanBenzMaxim 21:00c94aeb533e 40 // DS2465 commands
IanBenzMaxim 21:00c94aeb533e 41 #define CMD_1WMR 0xF0
IanBenzMaxim 21:00c94aeb533e 42 #define CMD_WCFG 0xD2
IanBenzMaxim 21:00c94aeb533e 43 #define CMD_CHSL 0xC3
IanBenzMaxim 21:00c94aeb533e 44 #define CMD_SRP 0xE1
IanBenzMaxim 21:00c94aeb533e 45
IanBenzMaxim 21:00c94aeb533e 46 #define CMD_1WRS 0xB4
IanBenzMaxim 21:00c94aeb533e 47 #define CMD_1WWB 0xA5
IanBenzMaxim 21:00c94aeb533e 48 #define CMD_1WRB 0x96
IanBenzMaxim 21:00c94aeb533e 49 #define CMD_1WSB 0x87
IanBenzMaxim 21:00c94aeb533e 50 #define CMD_1WT 0x78
IanBenzMaxim 21:00c94aeb533e 51 #define CMD_1WTB 0x69
IanBenzMaxim 21:00c94aeb533e 52 #define CMD_1WRF 0xE1
IanBenzMaxim 21:00c94aeb533e 53 #define CMD_CPS 0x5A
IanBenzMaxim 21:00c94aeb533e 54 #define CMD_CSS 0x4B
IanBenzMaxim 21:00c94aeb533e 55 #define CMD_CSAM 0x3C
IanBenzMaxim 21:00c94aeb533e 56 #define CMD_CSWM 0x2D
IanBenzMaxim 21:00c94aeb533e 57 #define CMD_CNMS 0x1E
IanBenzMaxim 21:00c94aeb533e 58 #define CMD_SPR 0x0F
IanBenzMaxim 21:00c94aeb533e 59
IanBenzMaxim 21:00c94aeb533e 60 // DS2465 status bits
IanBenzMaxim 21:00c94aeb533e 61 #define STATUS_1WB 0x01
IanBenzMaxim 21:00c94aeb533e 62 #define STATUS_PPD 0x02
IanBenzMaxim 21:00c94aeb533e 63 #define STATUS_SD 0x04
IanBenzMaxim 21:00c94aeb533e 64 #define STATUS_LL 0x08
IanBenzMaxim 21:00c94aeb533e 65 #define STATUS_RST 0x10
IanBenzMaxim 21:00c94aeb533e 66 #define STATUS_SBR 0x20
IanBenzMaxim 21:00c94aeb533e 67 #define STATUS_TSB 0x40
IanBenzMaxim 21:00c94aeb533e 68 #define STATUS_DIR 0x80
IanBenzMaxim 21:00c94aeb533e 69
IanBenzMaxim 73:2cecc1372acc 70 using OneWire::Masters::OneWireMaster;
IanBenzMaxim 73:2cecc1372acc 71 using OneWire::Masters::DS2465;
IanBenzMaxim 73:2cecc1372acc 72 using OneWire::Authenticators::ISha256MacCoproc;
IanBenzMaxim 73:2cecc1372acc 73
IanBenzMaxim 21:00c94aeb533e 74 static const int I2C_WRITE_OK = 0;
IanBenzMaxim 21:00c94aeb533e 75
IanBenzMaxim 73:2cecc1372acc 76 uint8_t DS2465::Config::readByte() const
IanBenzMaxim 24:8942d8478d68 77 {
IanBenzMaxim 74:23be10c32fa3 78 uint8_t config = 0;
IanBenzMaxim 74:23be10c32fa3 79 if (get1WS())
IanBenzMaxim 74:23be10c32fa3 80 {
IanBenzMaxim 74:23be10c32fa3 81 config |= 0x08;
IanBenzMaxim 74:23be10c32fa3 82 }
IanBenzMaxim 74:23be10c32fa3 83 if (getSPU())
IanBenzMaxim 74:23be10c32fa3 84 {
IanBenzMaxim 74:23be10c32fa3 85 config |= 0x04;
IanBenzMaxim 74:23be10c32fa3 86 }
IanBenzMaxim 74:23be10c32fa3 87 if (getPDN())
IanBenzMaxim 74:23be10c32fa3 88 {
IanBenzMaxim 74:23be10c32fa3 89 config |= 0x02;
IanBenzMaxim 74:23be10c32fa3 90 }
IanBenzMaxim 74:23be10c32fa3 91 if (getAPU())
IanBenzMaxim 74:23be10c32fa3 92 {
IanBenzMaxim 74:23be10c32fa3 93 config |= 0x01;
IanBenzMaxim 74:23be10c32fa3 94 }
IanBenzMaxim 74:23be10c32fa3 95 return config;
IanBenzMaxim 24:8942d8478d68 96 }
IanBenzMaxim 24:8942d8478d68 97
IanBenzMaxim 73:2cecc1372acc 98 uint8_t DS2465::Config::writeByte() const
IanBenzMaxim 24:8942d8478d68 99 {
IanBenzMaxim 74:23be10c32fa3 100 uint8_t config = readByte();
IanBenzMaxim 74:23be10c32fa3 101 return ((~config << 4) | config);
IanBenzMaxim 24:8942d8478d68 102 }
IanBenzMaxim 24:8942d8478d68 103
IanBenzMaxim 24:8942d8478d68 104 void DS2465::Config::reset()
IanBenzMaxim 24:8942d8478d68 105 {
IanBenzMaxim 74:23be10c32fa3 106 set1WS(false);
IanBenzMaxim 74:23be10c32fa3 107 setSPU(false);
IanBenzMaxim 74:23be10c32fa3 108 setPDN(false);
IanBenzMaxim 74:23be10c32fa3 109 setAPU(true);
IanBenzMaxim 24:8942d8478d68 110 }
IanBenzMaxim 24:8942d8478d68 111
IanBenzMaxim 73:2cecc1372acc 112 DS2465::DS2465(mbed::I2C & I2C_interface, uint8_t I2C_address)
IanBenzMaxim 74:23be10c32fa3 113 : m_I2C_interface(I2C_interface), m_I2C_address(I2C_address)
IanBenzMaxim 21:00c94aeb533e 114 {
IanBenzMaxim 74:23be10c32fa3 115
IanBenzMaxim 21:00c94aeb533e 116 }
IanBenzMaxim 21:00c94aeb533e 117
IanBenzMaxim 21:00c94aeb533e 118 OneWireMaster::CmdResult DS2465::OWInitMaster()
IanBenzMaxim 21:00c94aeb533e 119 {
IanBenzMaxim 74:23be10c32fa3 120 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 121
IanBenzMaxim 74:23be10c32fa3 122 // reset DS2465
IanBenzMaxim 74:23be10c32fa3 123 result = reset();
IanBenzMaxim 74:23be10c32fa3 124 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 125 {
IanBenzMaxim 74:23be10c32fa3 126 return result;
IanBenzMaxim 74:23be10c32fa3 127 }
IanBenzMaxim 74:23be10c32fa3 128
IanBenzMaxim 74:23be10c32fa3 129 // write the default configuration setup
IanBenzMaxim 74:23be10c32fa3 130 Config defaultConfig;
IanBenzMaxim 74:23be10c32fa3 131 result = writeConfig(defaultConfig, true);
IanBenzMaxim 47:307dc45952db 132 return result;
IanBenzMaxim 21:00c94aeb533e 133 }
IanBenzMaxim 21:00c94aeb533e 134
IanBenzMaxim 33:a4c015046956 135 OneWireMaster::CmdResult DS2465::computeNextMasterSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 136 {
IanBenzMaxim 74:23be10c32fa3 137 uint8_t command[2] = { CMD_CNMS, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 138 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 139 }
IanBenzMaxim 21:00c94aeb533e 140
IanBenzMaxim 33:a4c015046956 141 OneWireMaster::CmdResult DS2465::computeWriteMac(bool regwrite, bool swap, unsigned int pageNum, unsigned int segmentNum) const
IanBenzMaxim 21:00c94aeb533e 142 {
IanBenzMaxim 74:23be10c32fa3 143 uint8_t command[2] = { CMD_CSWM, (uint8_t)((regwrite << 7) | (swap << 6) | (pageNum << 4) | segmentNum) };
IanBenzMaxim 74:23be10c32fa3 144 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 145 }
IanBenzMaxim 21:00c94aeb533e 146
IanBenzMaxim 33:a4c015046956 147 OneWireMaster::CmdResult DS2465::computeAuthMac(bool swap, unsigned int pageNum, PageRegion region) const
IanBenzMaxim 21:00c94aeb533e 148 {
IanBenzMaxim 74:23be10c32fa3 149 uint8_t command[2] = { CMD_CSAM, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 150 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 151 }
IanBenzMaxim 21:00c94aeb533e 152
IanBenzMaxim 33:a4c015046956 153 OneWireMaster::CmdResult DS2465::computeSlaveSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 154 {
IanBenzMaxim 74:23be10c32fa3 155 uint8_t command[2] = { CMD_CSS, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 156 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 157 }
IanBenzMaxim 21:00c94aeb533e 158
IanBenzMaxim 73:2cecc1372acc 159 ISha256MacCoproc::CmdResult DS2465::setMasterSecret(const Secret & masterSecret)
IanBenzMaxim 21:00c94aeb533e 160 {
IanBenzMaxim 74:23be10c32fa3 161 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 162 result = writeMemory(ADDR_SPAD, masterSecret, masterSecret.length);
IanBenzMaxim 74:23be10c32fa3 163 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 164 {
IanBenzMaxim 74:23be10c32fa3 165 result = copyScratchpadToSecret();
IanBenzMaxim 74:23be10c32fa3 166 }
IanBenzMaxim 74:23be10c32fa3 167 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 168 {
IanBenzMaxim 74:23be10c32fa3 169 wait_ms(eepromPageWriteDelayMs);
IanBenzMaxim 74:23be10c32fa3 170 }
IanBenzMaxim 74:23be10c32fa3 171 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 172 }
IanBenzMaxim 21:00c94aeb533e 173
IanBenzMaxim 73:2cecc1372acc 174 ISha256MacCoproc::CmdResult DS2465::computeWriteMac(const WriteMacData & writeMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 175 {
IanBenzMaxim 74:23be10c32fa3 176 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 177 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 178 result = writeScratchpad(writeMacData, writeMacData.length);
IanBenzMaxim 74:23be10c32fa3 179 // Compute MAC
IanBenzMaxim 74:23be10c32fa3 180 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 181 {
IanBenzMaxim 74:23be10c32fa3 182 result = computeWriteMac(false);
IanBenzMaxim 74:23be10c32fa3 183 }
IanBenzMaxim 74:23be10c32fa3 184 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 185 {
IanBenzMaxim 74:23be10c32fa3 186 wait_ms(shaComputationDelayMs);
IanBenzMaxim 74:23be10c32fa3 187 // Read MAC from register
IanBenzMaxim 74:23be10c32fa3 188 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 74:23be10c32fa3 189 }
IanBenzMaxim 74:23be10c32fa3 190 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 191 }
IanBenzMaxim 21:00c94aeb533e 192
IanBenzMaxim 73:2cecc1372acc 193 ISha256MacCoproc::CmdResult DS2465::computeAuthMac(const DevicePage & devicePage, const DeviceScratchpad & challenge, const AuthMacData & authMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 194 {
IanBenzMaxim 74:23be10c32fa3 195 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 196 int addr = ADDR_SPAD;
IanBenzMaxim 74:23be10c32fa3 197 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 198 result = cWriteMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 74:23be10c32fa3 199 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 200 {
IanBenzMaxim 74:23be10c32fa3 201 addr += devicePage.length;
IanBenzMaxim 74:23be10c32fa3 202 result = cWriteMemory(addr, challenge, challenge.length);
IanBenzMaxim 74:23be10c32fa3 203 }
IanBenzMaxim 74:23be10c32fa3 204 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 205 {
IanBenzMaxim 74:23be10c32fa3 206 addr += challenge.length;
IanBenzMaxim 74:23be10c32fa3 207 result = cWriteMemory(addr, authMacData, authMacData.length);
IanBenzMaxim 74:23be10c32fa3 208 }
IanBenzMaxim 74:23be10c32fa3 209 // Compute MAC
IanBenzMaxim 74:23be10c32fa3 210 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 211 {
IanBenzMaxim 74:23be10c32fa3 212 result = computeAuthMac();
IanBenzMaxim 74:23be10c32fa3 213 }
IanBenzMaxim 74:23be10c32fa3 214 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 215 {
IanBenzMaxim 74:23be10c32fa3 216 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 74:23be10c32fa3 217 // Read MAC from register
IanBenzMaxim 74:23be10c32fa3 218 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 74:23be10c32fa3 219 }
IanBenzMaxim 74:23be10c32fa3 220 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 221 }
IanBenzMaxim 21:00c94aeb533e 222
IanBenzMaxim 73:2cecc1372acc 223 ISha256MacCoproc::CmdResult DS2465::computeSlaveSecret(const DevicePage & devicePage, const DeviceScratchpad & deviceScratchpad, const SlaveSecretData & slaveSecretData)
IanBenzMaxim 21:00c94aeb533e 224 {
IanBenzMaxim 74:23be10c32fa3 225 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 226 int addr = ADDR_SPAD;
IanBenzMaxim 74:23be10c32fa3 227 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 228 result = writeMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 74:23be10c32fa3 229 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 230 {
IanBenzMaxim 74:23be10c32fa3 231 addr += devicePage.length;
IanBenzMaxim 74:23be10c32fa3 232 result = writeMemory(addr, deviceScratchpad, deviceScratchpad.length);
IanBenzMaxim 74:23be10c32fa3 233 }
IanBenzMaxim 74:23be10c32fa3 234 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 235 {
IanBenzMaxim 74:23be10c32fa3 236 addr += deviceScratchpad.length;
IanBenzMaxim 74:23be10c32fa3 237 result = writeMemory(addr, slaveSecretData, slaveSecretData.length);
IanBenzMaxim 74:23be10c32fa3 238 }
IanBenzMaxim 74:23be10c32fa3 239 // Compute secret
IanBenzMaxim 74:23be10c32fa3 240 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 241 {
IanBenzMaxim 74:23be10c32fa3 242 result = computeSlaveSecret();
IanBenzMaxim 74:23be10c32fa3 243 }
IanBenzMaxim 74:23be10c32fa3 244 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 245 {
IanBenzMaxim 74:23be10c32fa3 246 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 74:23be10c32fa3 247 }
IanBenzMaxim 74:23be10c32fa3 248 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 249 }
IanBenzMaxim 21:00c94aeb533e 250
IanBenzMaxim 74:23be10c32fa3 251 OneWireMaster::CmdResult DS2465::copyScratchpad(bool destSecret, unsigned int pageNum, bool notFull, unsigned int segmentNum)
IanBenzMaxim 21:00c94aeb533e 252 {
IanBenzMaxim 74:23be10c32fa3 253 uint8_t command[2] = { CMD_CPS, (uint8_t)(destSecret ? 0 : (0x80 | (pageNum << 4) | (notFull << 3) | segmentNum)) };
IanBenzMaxim 74:23be10c32fa3 254 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 255 }
IanBenzMaxim 21:00c94aeb533e 256
IanBenzMaxim 34:11fffbe98ef9 257 OneWireMaster::CmdResult DS2465::configureLevel(OWLevel level)
IanBenzMaxim 26:a361e3f42ba5 258 {
IanBenzMaxim 74:23be10c32fa3 259 OneWireMaster::CmdResult result;
IanBenzMaxim 75:8b627804927c 260 if (m_curConfig.getSPU() != (level == StrongLevel))
IanBenzMaxim 74:23be10c32fa3 261 {
IanBenzMaxim 74:23be10c32fa3 262 Config newConfig = m_curConfig;
IanBenzMaxim 75:8b627804927c 263 newConfig.setSPU(level == StrongLevel);
IanBenzMaxim 74:23be10c32fa3 264 result = writeConfig(newConfig, true);
IanBenzMaxim 74:23be10c32fa3 265 }
IanBenzMaxim 74:23be10c32fa3 266 else
IanBenzMaxim 74:23be10c32fa3 267 {
IanBenzMaxim 74:23be10c32fa3 268 result = OneWireMaster::Success;
IanBenzMaxim 74:23be10c32fa3 269 }
IanBenzMaxim 74:23be10c32fa3 270 return result;
IanBenzMaxim 21:00c94aeb533e 271 }
IanBenzMaxim 21:00c94aeb533e 272
IanBenzMaxim 75:8b627804927c 273 OneWireMaster::CmdResult DS2465::OWSetLevel(OWLevel newLevel)
IanBenzMaxim 21:00c94aeb533e 274 {
IanBenzMaxim 75:8b627804927c 275 if (newLevel == StrongLevel)
IanBenzMaxim 74:23be10c32fa3 276 {
IanBenzMaxim 74:23be10c32fa3 277 return OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 278 }
IanBenzMaxim 74:23be10c32fa3 279
IanBenzMaxim 75:8b627804927c 280 return configureLevel(newLevel);
IanBenzMaxim 21:00c94aeb533e 281 }
IanBenzMaxim 21:00c94aeb533e 282
IanBenzMaxim 75:8b627804927c 283 OneWireMaster::CmdResult DS2465::OWSetSpeed(OWSpeed newSpeed)
IanBenzMaxim 21:00c94aeb533e 284 {
IanBenzMaxim 74:23be10c32fa3 285 // Requested speed is already set
IanBenzMaxim 75:8b627804927c 286 if (m_curConfig.get1WS() == (newSpeed == OverdriveSpeed))
IanBenzMaxim 74:23be10c32fa3 287 {
IanBenzMaxim 74:23be10c32fa3 288 return OneWireMaster::Success;
IanBenzMaxim 74:23be10c32fa3 289 }
IanBenzMaxim 21:00c94aeb533e 290
IanBenzMaxim 74:23be10c32fa3 291 // set the speed
IanBenzMaxim 74:23be10c32fa3 292 Config newConfig = m_curConfig;
IanBenzMaxim 75:8b627804927c 293 newConfig.set1WS(newSpeed == OverdriveSpeed);
IanBenzMaxim 74:23be10c32fa3 294
IanBenzMaxim 74:23be10c32fa3 295 // write the new config
IanBenzMaxim 74:23be10c32fa3 296 return writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 297 }
IanBenzMaxim 21:00c94aeb533e 298
IanBenzMaxim 75:8b627804927c 299 OneWireMaster::CmdResult DS2465::OWTriplet(SearchDirection & searchDirection, uint8_t & sbr, uint8_t & tsb)
IanBenzMaxim 21:00c94aeb533e 300 {
IanBenzMaxim 74:23be10c32fa3 301 // 1-Wire Triplet (Case B)
IanBenzMaxim 74:23be10c32fa3 302 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 303 // \--------/
IanBenzMaxim 74:23be10c32fa3 304 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 305 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 306 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 74:23be10c32fa3 307
IanBenzMaxim 74:23be10c32fa3 308 OneWireMaster::CmdResult result;
IanBenzMaxim 75:8b627804927c 309 uint8_t command[2] = { CMD_1WT, (uint8_t)((searchDirection == WriteOne) ? 0x80 : 0x00) };
IanBenzMaxim 74:23be10c32fa3 310 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 32:bce180b544ed 311 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 312 {
IanBenzMaxim 74:23be10c32fa3 313 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 314 result = pollBusy(&status);
IanBenzMaxim 74:23be10c32fa3 315 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 316 {
IanBenzMaxim 74:23be10c32fa3 317 // check bit results in status byte
IanBenzMaxim 74:23be10c32fa3 318 sbr = ((status & STATUS_SBR) == STATUS_SBR);
IanBenzMaxim 74:23be10c32fa3 319 tsb = ((status & STATUS_TSB) == STATUS_TSB);
IanBenzMaxim 75:8b627804927c 320 searchDirection = ((status & STATUS_DIR) == STATUS_DIR) ? WriteOne : WriteZero;
IanBenzMaxim 74:23be10c32fa3 321 }
IanBenzMaxim 32:bce180b544ed 322 }
IanBenzMaxim 74:23be10c32fa3 323 return result;
IanBenzMaxim 21:00c94aeb533e 324 }
IanBenzMaxim 21:00c94aeb533e 325
IanBenzMaxim 75:8b627804927c 326 OneWireMaster::CmdResult DS2465::OWReadBlock(uint8_t *recvBuf, uint8_t recvLen)
IanBenzMaxim 21:00c94aeb533e 327 {
IanBenzMaxim 74:23be10c32fa3 328 // 1-Wire Receive Block (Case A)
IanBenzMaxim 74:23be10c32fa3 329 // S AD,0 [A] ADDR_CMD_REG [A] 1WRF [A] PR [A] P
IanBenzMaxim 74:23be10c32fa3 330 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 331 // PR indicates byte containing parameter
IanBenzMaxim 74:23be10c32fa3 332
IanBenzMaxim 74:23be10c32fa3 333 OneWireMaster::CmdResult result;
IanBenzMaxim 75:8b627804927c 334 uint8_t command[2] = { CMD_1WRF, recvLen };
IanBenzMaxim 21:00c94aeb533e 335
IanBenzMaxim 74:23be10c32fa3 336 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 337 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 338 {
IanBenzMaxim 74:23be10c32fa3 339 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 340 }
IanBenzMaxim 74:23be10c32fa3 341 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 342 {
IanBenzMaxim 75:8b627804927c 343 result = readMemory(ADDR_SPAD, recvBuf, recvLen, false);
IanBenzMaxim 74:23be10c32fa3 344 }
IanBenzMaxim 21:00c94aeb533e 345
IanBenzMaxim 74:23be10c32fa3 346 return result;
IanBenzMaxim 21:00c94aeb533e 347 }
IanBenzMaxim 21:00c94aeb533e 348
IanBenzMaxim 75:8b627804927c 349 OneWireMaster::CmdResult DS2465::OWWriteBlock(const uint8_t *sendBuf, uint8_t sendLen)
IanBenzMaxim 21:00c94aeb533e 350 {
IanBenzMaxim 75:8b627804927c 351 return OWWriteBlock(false, sendBuf, sendLen);
IanBenzMaxim 21:00c94aeb533e 352 }
IanBenzMaxim 21:00c94aeb533e 353
IanBenzMaxim 47:307dc45952db 354 OneWireMaster::CmdResult DS2465::OWWriteBlockMac()
IanBenzMaxim 47:307dc45952db 355 {
IanBenzMaxim 74:23be10c32fa3 356 return OWWriteBlock(true, NULL, 0);
IanBenzMaxim 47:307dc45952db 357 }
IanBenzMaxim 47:307dc45952db 358
IanBenzMaxim 73:2cecc1372acc 359 OneWireMaster::CmdResult DS2465::OWWriteBlock(bool tx_mac, const uint8_t *tran_buf, uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 360 {
IanBenzMaxim 74:23be10c32fa3 361 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 362 uint8_t command[2] = { CMD_1WTB, (uint8_t)(tx_mac ? 0xFF : tran_len) };
IanBenzMaxim 21:00c94aeb533e 363
IanBenzMaxim 74:23be10c32fa3 364 if (!tx_mac)
IanBenzMaxim 74:23be10c32fa3 365 {
IanBenzMaxim 74:23be10c32fa3 366 // prefill scratchpad with required data
IanBenzMaxim 74:23be10c32fa3 367 result = writeMemory(ADDR_SPAD, tran_buf, tran_len);
IanBenzMaxim 74:23be10c32fa3 368 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 369 {
IanBenzMaxim 74:23be10c32fa3 370 return result;
IanBenzMaxim 74:23be10c32fa3 371 }
IanBenzMaxim 74:23be10c32fa3 372 }
IanBenzMaxim 21:00c94aeb533e 373
IanBenzMaxim 74:23be10c32fa3 374 // 1-Wire Transmit Block (Case A)
IanBenzMaxim 74:23be10c32fa3 375 // S AD,0 [A] ADDR_CMD_REG [A] 1WTB [A] PR [A] P
IanBenzMaxim 74:23be10c32fa3 376 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 377 // PR indicates byte containing parameter
IanBenzMaxim 74:23be10c32fa3 378
IanBenzMaxim 74:23be10c32fa3 379 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 380
IanBenzMaxim 74:23be10c32fa3 381 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 382 {
IanBenzMaxim 74:23be10c32fa3 383 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 384 }
IanBenzMaxim 74:23be10c32fa3 385
IanBenzMaxim 74:23be10c32fa3 386 return result;
IanBenzMaxim 21:00c94aeb533e 387 }
IanBenzMaxim 21:00c94aeb533e 388
IanBenzMaxim 75:8b627804927c 389 OneWireMaster::CmdResult DS2465::OWReadByteSetLevel(uint8_t & recvByte, OWLevel afterLevel)
IanBenzMaxim 21:00c94aeb533e 390 {
IanBenzMaxim 74:23be10c32fa3 391 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 74:23be10c32fa3 392 // S AD,0 [A] ADDR_CMD_REG [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 74:23be10c32fa3 393 // \--------/
IanBenzMaxim 74:23be10c32fa3 394 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 395 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 74:23be10c32fa3 396 //
IanBenzMaxim 74:23be10c32fa3 397 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 398 // DD data read
IanBenzMaxim 74:23be10c32fa3 399
IanBenzMaxim 74:23be10c32fa3 400 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 401 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 402
IanBenzMaxim 75:8b627804927c 403 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 404 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 405 {
IanBenzMaxim 74:23be10c32fa3 406 return result;
IanBenzMaxim 74:23be10c32fa3 407 }
IanBenzMaxim 74:23be10c32fa3 408
IanBenzMaxim 74:23be10c32fa3 409 buf = CMD_1WRB;
IanBenzMaxim 74:23be10c32fa3 410 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 74:23be10c32fa3 411
IanBenzMaxim 74:23be10c32fa3 412 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 413 {
IanBenzMaxim 74:23be10c32fa3 414 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 415 }
IanBenzMaxim 74:23be10c32fa3 416
IanBenzMaxim 74:23be10c32fa3 417 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 418 {
IanBenzMaxim 74:23be10c32fa3 419 result = readMemory(ADDR_DATA_REG, &buf, 1);
IanBenzMaxim 74:23be10c32fa3 420 }
IanBenzMaxim 74:23be10c32fa3 421
IanBenzMaxim 74:23be10c32fa3 422 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 423 {
IanBenzMaxim 75:8b627804927c 424 recvByte = buf;
IanBenzMaxim 74:23be10c32fa3 425 }
IanBenzMaxim 74:23be10c32fa3 426
IanBenzMaxim 26:a361e3f42ba5 427 return result;
IanBenzMaxim 21:00c94aeb533e 428 }
IanBenzMaxim 21:00c94aeb533e 429
IanBenzMaxim 75:8b627804927c 430 OneWireMaster::CmdResult DS2465::OWWriteByteSetLevel(uint8_t sendByte, OWLevel afterLevel)
IanBenzMaxim 74:23be10c32fa3 431 {
IanBenzMaxim 74:23be10c32fa3 432 // 1-Wire Write Byte (Case B)
IanBenzMaxim 74:23be10c32fa3 433 // S AD,0 [A] ADDR_CMD_REG [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 434 // \--------/
IanBenzMaxim 74:23be10c32fa3 435 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 436 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 437 // DD data to write
IanBenzMaxim 74:23be10c32fa3 438
IanBenzMaxim 74:23be10c32fa3 439 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 440
IanBenzMaxim 75:8b627804927c 441 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 442 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 443 {
IanBenzMaxim 74:23be10c32fa3 444 return result;
IanBenzMaxim 74:23be10c32fa3 445 }
IanBenzMaxim 74:23be10c32fa3 446
IanBenzMaxim 75:8b627804927c 447 uint8_t command[2] = { CMD_1WWB, sendByte };
IanBenzMaxim 74:23be10c32fa3 448
IanBenzMaxim 74:23be10c32fa3 449 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 450 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 451 {
IanBenzMaxim 74:23be10c32fa3 452 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 453 }
IanBenzMaxim 74:23be10c32fa3 454
IanBenzMaxim 26:a361e3f42ba5 455 return result;
IanBenzMaxim 21:00c94aeb533e 456 }
IanBenzMaxim 21:00c94aeb533e 457
IanBenzMaxim 75:8b627804927c 458 OneWireMaster::CmdResult DS2465::OWTouchBitSetLevel(uint8_t & sendRecvBit, OWLevel afterLevel)
IanBenzMaxim 21:00c94aeb533e 459 {
IanBenzMaxim 74:23be10c32fa3 460 // 1-Wire bit (Case B)
IanBenzMaxim 74:23be10c32fa3 461 // S AD,0 [A] ADDR_CMD_REG [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 462 // \--------/
IanBenzMaxim 74:23be10c32fa3 463 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 464 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 465 // BB indicates byte containing bit value in msbit
IanBenzMaxim 74:23be10c32fa3 466
IanBenzMaxim 74:23be10c32fa3 467 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 468
IanBenzMaxim 75:8b627804927c 469 result = configureLevel(afterLevel);
IanBenzMaxim 74:23be10c32fa3 470 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 471 {
IanBenzMaxim 74:23be10c32fa3 472 return result;
IanBenzMaxim 74:23be10c32fa3 473 }
IanBenzMaxim 21:00c94aeb533e 474
IanBenzMaxim 75:8b627804927c 475 uint8_t command[2] = { CMD_1WSB, (uint8_t)(sendRecvBit ? 0x80 : 0x00) };
IanBenzMaxim 74:23be10c32fa3 476 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 477
IanBenzMaxim 74:23be10c32fa3 478 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 479
IanBenzMaxim 74:23be10c32fa3 480 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 481 {
IanBenzMaxim 74:23be10c32fa3 482 result = pollBusy(&status);
IanBenzMaxim 74:23be10c32fa3 483 }
IanBenzMaxim 74:23be10c32fa3 484
IanBenzMaxim 74:23be10c32fa3 485 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 486 {
IanBenzMaxim 75:8b627804927c 487 sendRecvBit = (status & STATUS_SBR);
IanBenzMaxim 74:23be10c32fa3 488 }
IanBenzMaxim 74:23be10c32fa3 489
IanBenzMaxim 26:a361e3f42ba5 490 return result;
IanBenzMaxim 21:00c94aeb533e 491 }
IanBenzMaxim 21:00c94aeb533e 492
IanBenzMaxim 73:2cecc1372acc 493 OneWireMaster::CmdResult DS2465::cWriteMemory(uint8_t addr, const uint8_t * buf, size_t bufLen) const
IanBenzMaxim 21:00c94aeb533e 494 {
IanBenzMaxim 74:23be10c32fa3 495 int i;
IanBenzMaxim 21:00c94aeb533e 496
IanBenzMaxim 74:23be10c32fa3 497 // Write SRAM (Case A)
IanBenzMaxim 74:23be10c32fa3 498 // S AD,0 [A] VSA [A] DD [A] P
IanBenzMaxim 74:23be10c32fa3 499 // \-----/
IanBenzMaxim 74:23be10c32fa3 500 // Repeat for each data byte
IanBenzMaxim 74:23be10c32fa3 501 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 502 // VSA valid SRAM memory address
IanBenzMaxim 74:23be10c32fa3 503 // DD memory data to write
IanBenzMaxim 74:23be10c32fa3 504
IanBenzMaxim 74:23be10c32fa3 505 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 506 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 507 {
IanBenzMaxim 21:00c94aeb533e 508 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 509 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 510 }
IanBenzMaxim 74:23be10c32fa3 511 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 512 {
IanBenzMaxim 74:23be10c32fa3 513 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 514 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 515 }
IanBenzMaxim 74:23be10c32fa3 516 // loop to write each byte
IanBenzMaxim 74:23be10c32fa3 517 for (i = 0; i < bufLen; i++)
IanBenzMaxim 74:23be10c32fa3 518 {
IanBenzMaxim 74:23be10c32fa3 519 if (m_I2C_interface.write(buf[i]) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 520 {
IanBenzMaxim 74:23be10c32fa3 521 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 522 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 523 }
IanBenzMaxim 74:23be10c32fa3 524 }
IanBenzMaxim 74:23be10c32fa3 525 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 526
IanBenzMaxim 74:23be10c32fa3 527 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 528 }
IanBenzMaxim 21:00c94aeb533e 529
IanBenzMaxim 73:2cecc1372acc 530 OneWireMaster::CmdResult DS2465::readMemory(uint8_t addr, uint8_t * buf, size_t bufLen, bool skipSetPointer) const
IanBenzMaxim 21:00c94aeb533e 531 {
IanBenzMaxim 74:23be10c32fa3 532 int i;
IanBenzMaxim 74:23be10c32fa3 533
IanBenzMaxim 74:23be10c32fa3 534 // Read (Case A)
IanBenzMaxim 74:23be10c32fa3 535 // S AD,0 [A] MA [A] Sr AD,1 [A] [DD] A [DD] A\ P
IanBenzMaxim 74:23be10c32fa3 536 // \-----/
IanBenzMaxim 74:23be10c32fa3 537 // Repeat for each data byte, NAK last byte
IanBenzMaxim 74:23be10c32fa3 538 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 539 // MA memory address
IanBenzMaxim 74:23be10c32fa3 540 // DD memory data read
IanBenzMaxim 21:00c94aeb533e 541
IanBenzMaxim 74:23be10c32fa3 542 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 543 if (!skipSetPointer)
IanBenzMaxim 74:23be10c32fa3 544 {
IanBenzMaxim 74:23be10c32fa3 545 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 546 {
IanBenzMaxim 74:23be10c32fa3 547 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 548 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 549 }
IanBenzMaxim 74:23be10c32fa3 550 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 551 {
IanBenzMaxim 74:23be10c32fa3 552 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 553 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 554 }
IanBenzMaxim 74:23be10c32fa3 555 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 556 }
IanBenzMaxim 21:00c94aeb533e 557
IanBenzMaxim 74:23be10c32fa3 558 if (m_I2C_interface.write((m_I2C_address | I2C_READ)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 559 {
IanBenzMaxim 47:307dc45952db 560 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 561 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 562 }
IanBenzMaxim 74:23be10c32fa3 563 // loop to read each byte, NAK last byte
IanBenzMaxim 74:23be10c32fa3 564 for (i = 0; i < bufLen; i++)
IanBenzMaxim 74:23be10c32fa3 565 {
IanBenzMaxim 74:23be10c32fa3 566 buf[i] = m_I2C_interface.read((i == (bufLen - 1)) ? mbed::I2C::NoACK : mbed::I2C::ACK);
IanBenzMaxim 74:23be10c32fa3 567 }
IanBenzMaxim 74:23be10c32fa3 568 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 569
IanBenzMaxim 74:23be10c32fa3 570 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 571 }
IanBenzMaxim 21:00c94aeb533e 572
IanBenzMaxim 34:11fffbe98ef9 573 OneWireMaster::CmdResult DS2465::writeConfig(const Config & config, bool verify)
IanBenzMaxim 21:00c94aeb533e 574 {
IanBenzMaxim 74:23be10c32fa3 575 uint8_t configBuf;
IanBenzMaxim 74:23be10c32fa3 576 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 577
IanBenzMaxim 74:23be10c32fa3 578 configBuf = config.writeByte();
IanBenzMaxim 74:23be10c32fa3 579 result = writeMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 74:23be10c32fa3 580 if (verify)
IanBenzMaxim 74:23be10c32fa3 581 {
IanBenzMaxim 74:23be10c32fa3 582 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 583 {
IanBenzMaxim 74:23be10c32fa3 584 result = readMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 74:23be10c32fa3 585 }
IanBenzMaxim 74:23be10c32fa3 586 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 587 {
IanBenzMaxim 74:23be10c32fa3 588 if (configBuf != config.readByte())
IanBenzMaxim 74:23be10c32fa3 589 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 590 }
IanBenzMaxim 74:23be10c32fa3 591 }
IanBenzMaxim 74:23be10c32fa3 592
IanBenzMaxim 35:5d23395628f6 593 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 594 {
IanBenzMaxim 74:23be10c32fa3 595 m_curConfig = config;
IanBenzMaxim 35:5d23395628f6 596 }
IanBenzMaxim 35:5d23395628f6 597
IanBenzMaxim 74:23be10c32fa3 598 return result;
IanBenzMaxim 24:8942d8478d68 599 }
IanBenzMaxim 24:8942d8478d68 600
IanBenzMaxim 73:2cecc1372acc 601 OneWireMaster::CmdResult DS2465::pollBusy(uint8_t * pStatus)
IanBenzMaxim 24:8942d8478d68 602 {
IanBenzMaxim 74:23be10c32fa3 603 const unsigned int pollLimit = 200;
IanBenzMaxim 74:23be10c32fa3 604
IanBenzMaxim 74:23be10c32fa3 605 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 606 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 607 unsigned int pollCount = 0;
IanBenzMaxim 47:307dc45952db 608
IanBenzMaxim 74:23be10c32fa3 609 do
IanBenzMaxim 74:23be10c32fa3 610 {
IanBenzMaxim 74:23be10c32fa3 611 result = readMemory(ADDR_STATUS_REG, &status, 1, true);
IanBenzMaxim 74:23be10c32fa3 612 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 613 {
IanBenzMaxim 74:23be10c32fa3 614 return result;
IanBenzMaxim 74:23be10c32fa3 615 }
IanBenzMaxim 74:23be10c32fa3 616 if (pStatus != NULL)
IanBenzMaxim 74:23be10c32fa3 617 {
IanBenzMaxim 74:23be10c32fa3 618 *pStatus = status;
IanBenzMaxim 74:23be10c32fa3 619 }
IanBenzMaxim 74:23be10c32fa3 620 if (pollCount++ >= pollLimit)
IanBenzMaxim 74:23be10c32fa3 621 {
IanBenzMaxim 74:23be10c32fa3 622 return OneWireMaster::TimeoutError;
IanBenzMaxim 74:23be10c32fa3 623 }
IanBenzMaxim 74:23be10c32fa3 624 } while (status & STATUS_1WB);
IanBenzMaxim 24:8942d8478d68 625
IanBenzMaxim 74:23be10c32fa3 626 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 627 }
IanBenzMaxim 21:00c94aeb533e 628
IanBenzMaxim 75:8b627804927c 629 OneWireMaster::CmdResult DS2465::OWReset()
IanBenzMaxim 74:23be10c32fa3 630 {
IanBenzMaxim 74:23be10c32fa3 631 // 1-Wire reset (Case B)
IanBenzMaxim 74:23be10c32fa3 632 // S AD,0 [A] ADDR_CMD_REG [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 633 // \--------/
IanBenzMaxim 74:23be10c32fa3 634 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 635 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 636
IanBenzMaxim 74:23be10c32fa3 637 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 638 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 639
IanBenzMaxim 74:23be10c32fa3 640 buf = CMD_1WRS;
IanBenzMaxim 74:23be10c32fa3 641 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 642
IanBenzMaxim 74:23be10c32fa3 643 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 644 {
IanBenzMaxim 74:23be10c32fa3 645 result = pollBusy(&buf);
IanBenzMaxim 74:23be10c32fa3 646 }
IanBenzMaxim 21:00c94aeb533e 647
IanBenzMaxim 74:23be10c32fa3 648 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 649 {
IanBenzMaxim 74:23be10c32fa3 650 // check for presence detect
IanBenzMaxim 74:23be10c32fa3 651 if ((buf & STATUS_PPD) != STATUS_PPD)
IanBenzMaxim 74:23be10c32fa3 652 {
IanBenzMaxim 74:23be10c32fa3 653 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 654 }
IanBenzMaxim 74:23be10c32fa3 655 }
IanBenzMaxim 74:23be10c32fa3 656
IanBenzMaxim 74:23be10c32fa3 657 return result;
IanBenzMaxim 21:00c94aeb533e 658 }
IanBenzMaxim 21:00c94aeb533e 659
IanBenzMaxim 75:8b627804927c 660 OneWireMaster::CmdResult DS2465::reset()
IanBenzMaxim 74:23be10c32fa3 661 {
IanBenzMaxim 74:23be10c32fa3 662 // Device Reset
IanBenzMaxim 74:23be10c32fa3 663 // S AD,0 [A] ADDR_CMD_REG [A] 1WMR [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 74:23be10c32fa3 664 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 665 // SS status byte to read to verify state
IanBenzMaxim 74:23be10c32fa3 666
IanBenzMaxim 74:23be10c32fa3 667 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 668 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 669
IanBenzMaxim 74:23be10c32fa3 670 buf = CMD_1WMR;
IanBenzMaxim 74:23be10c32fa3 671 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 24:8942d8478d68 672
IanBenzMaxim 74:23be10c32fa3 673 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 674 {
IanBenzMaxim 74:23be10c32fa3 675 result = readMemory(ADDR_STATUS_REG, &buf, 1, true);
IanBenzMaxim 74:23be10c32fa3 676 }
IanBenzMaxim 21:00c94aeb533e 677
IanBenzMaxim 74:23be10c32fa3 678 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 679 {
IanBenzMaxim 74:23be10c32fa3 680 if ((buf & 0xF7) != 0x10)
IanBenzMaxim 74:23be10c32fa3 681 {
IanBenzMaxim 74:23be10c32fa3 682 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 683 }
IanBenzMaxim 74:23be10c32fa3 684 }
IanBenzMaxim 74:23be10c32fa3 685
IanBenzMaxim 74:23be10c32fa3 686 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 687 {
IanBenzMaxim 74:23be10c32fa3 688 OWReset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 74:23be10c32fa3 689 }
IanBenzMaxim 74:23be10c32fa3 690
IanBenzMaxim 74:23be10c32fa3 691 return result;
IanBenzMaxim 21:00c94aeb533e 692 }