Mike Fruge / OneWire

Implementation of 1-Wire with added Alarm Search Functionality

Dependents:   Max32630_One_Wire_Interface

Masters/DS2465/DS2465.cpp@74:23be10c32fa3, 2016-05-13 (annotated)

Committer:
IanBenzMaxim
Date:
Fri May 13 07:48:35 2016 -0500
Revision:
74:23be10c32fa3
Parent:
73:2cecc1372acc
Child:
75:8b627804927c
Assimilated indentation and braces.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 73:2cecc1372acc 1 #include "DS2465.h"
IanBenzMaxim 73:2cecc1372acc 2 #include "I2C.h"
IanBenzMaxim 73:2cecc1372acc 3 #include "wait_api.h"
IanBenzMaxim 21:00c94aeb533e 4
IanBenzMaxim 21:00c94aeb533e 5 #define I2C_WRITE 0
IanBenzMaxim 21:00c94aeb533e 6 #define I2C_READ 1
IanBenzMaxim 21:00c94aeb533e 7
IanBenzMaxim 21:00c94aeb533e 8 // DS2465 commands
IanBenzMaxim 21:00c94aeb533e 9 #define CMD_1WMR 0xF0
IanBenzMaxim 21:00c94aeb533e 10 #define CMD_WCFG 0xD2
IanBenzMaxim 21:00c94aeb533e 11 #define CMD_CHSL 0xC3
IanBenzMaxim 21:00c94aeb533e 12 #define CMD_SRP 0xE1
IanBenzMaxim 21:00c94aeb533e 13
IanBenzMaxim 21:00c94aeb533e 14 #define CMD_1WRS 0xB4
IanBenzMaxim 21:00c94aeb533e 15 #define CMD_1WWB 0xA5
IanBenzMaxim 21:00c94aeb533e 16 #define CMD_1WRB 0x96
IanBenzMaxim 21:00c94aeb533e 17 #define CMD_1WSB 0x87
IanBenzMaxim 21:00c94aeb533e 18 #define CMD_1WT 0x78
IanBenzMaxim 21:00c94aeb533e 19 #define CMD_1WTB 0x69
IanBenzMaxim 21:00c94aeb533e 20 #define CMD_1WRF 0xE1
IanBenzMaxim 21:00c94aeb533e 21 #define CMD_CPS 0x5A
IanBenzMaxim 21:00c94aeb533e 22 #define CMD_CSS 0x4B
IanBenzMaxim 21:00c94aeb533e 23 #define CMD_CSAM 0x3C
IanBenzMaxim 21:00c94aeb533e 24 #define CMD_CSWM 0x2D
IanBenzMaxim 21:00c94aeb533e 25 #define CMD_CNMS 0x1E
IanBenzMaxim 21:00c94aeb533e 26 #define CMD_SPR 0x0F
IanBenzMaxim 21:00c94aeb533e 27
IanBenzMaxim 21:00c94aeb533e 28 // DS2465 status bits
IanBenzMaxim 21:00c94aeb533e 29 #define STATUS_1WB 0x01
IanBenzMaxim 21:00c94aeb533e 30 #define STATUS_PPD 0x02
IanBenzMaxim 21:00c94aeb533e 31 #define STATUS_SD 0x04
IanBenzMaxim 21:00c94aeb533e 32 #define STATUS_LL 0x08
IanBenzMaxim 21:00c94aeb533e 33 #define STATUS_RST 0x10
IanBenzMaxim 21:00c94aeb533e 34 #define STATUS_SBR 0x20
IanBenzMaxim 21:00c94aeb533e 35 #define STATUS_TSB 0x40
IanBenzMaxim 21:00c94aeb533e 36 #define STATUS_DIR 0x80
IanBenzMaxim 21:00c94aeb533e 37
IanBenzMaxim 73:2cecc1372acc 38 using OneWire::Masters::OneWireMaster;
IanBenzMaxim 73:2cecc1372acc 39 using OneWire::Masters::DS2465;
IanBenzMaxim 73:2cecc1372acc 40 using OneWire::Authenticators::ISha256MacCoproc;
IanBenzMaxim 73:2cecc1372acc 41
IanBenzMaxim 21:00c94aeb533e 42 static const int I2C_WRITE_OK = 0;
IanBenzMaxim 21:00c94aeb533e 43
IanBenzMaxim 73:2cecc1372acc 44 uint8_t DS2465::Config::readByte() const
IanBenzMaxim 24:8942d8478d68 45 {
IanBenzMaxim 74:23be10c32fa3 46 uint8_t config = 0;
IanBenzMaxim 74:23be10c32fa3 47 if (get1WS())
IanBenzMaxim 74:23be10c32fa3 48 {
IanBenzMaxim 74:23be10c32fa3 49 config |= 0x08;
IanBenzMaxim 74:23be10c32fa3 50 }
IanBenzMaxim 74:23be10c32fa3 51 if (getSPU())
IanBenzMaxim 74:23be10c32fa3 52 {
IanBenzMaxim 74:23be10c32fa3 53 config |= 0x04;
IanBenzMaxim 74:23be10c32fa3 54 }
IanBenzMaxim 74:23be10c32fa3 55 if (getPDN())
IanBenzMaxim 74:23be10c32fa3 56 {
IanBenzMaxim 74:23be10c32fa3 57 config |= 0x02;
IanBenzMaxim 74:23be10c32fa3 58 }
IanBenzMaxim 74:23be10c32fa3 59 if (getAPU())
IanBenzMaxim 74:23be10c32fa3 60 {
IanBenzMaxim 74:23be10c32fa3 61 config |= 0x01;
IanBenzMaxim 74:23be10c32fa3 62 }
IanBenzMaxim 74:23be10c32fa3 63 return config;
IanBenzMaxim 24:8942d8478d68 64 }
IanBenzMaxim 24:8942d8478d68 65
IanBenzMaxim 73:2cecc1372acc 66 uint8_t DS2465::Config::writeByte() const
IanBenzMaxim 24:8942d8478d68 67 {
IanBenzMaxim 74:23be10c32fa3 68 uint8_t config = readByte();
IanBenzMaxim 74:23be10c32fa3 69 return ((~config << 4) | config);
IanBenzMaxim 24:8942d8478d68 70 }
IanBenzMaxim 24:8942d8478d68 71
IanBenzMaxim 24:8942d8478d68 72 void DS2465::Config::reset()
IanBenzMaxim 24:8942d8478d68 73 {
IanBenzMaxim 74:23be10c32fa3 74 set1WS(false);
IanBenzMaxim 74:23be10c32fa3 75 setSPU(false);
IanBenzMaxim 74:23be10c32fa3 76 setPDN(false);
IanBenzMaxim 74:23be10c32fa3 77 setAPU(true);
IanBenzMaxim 24:8942d8478d68 78 }
IanBenzMaxim 24:8942d8478d68 79
IanBenzMaxim 73:2cecc1372acc 80 DS2465::DS2465(mbed::I2C & I2C_interface, uint8_t I2C_address)
IanBenzMaxim 74:23be10c32fa3 81 : m_I2C_interface(I2C_interface), m_I2C_address(I2C_address)
IanBenzMaxim 21:00c94aeb533e 82 {
IanBenzMaxim 74:23be10c32fa3 83
IanBenzMaxim 21:00c94aeb533e 84 }
IanBenzMaxim 21:00c94aeb533e 85
IanBenzMaxim 21:00c94aeb533e 86 OneWireMaster::CmdResult DS2465::OWInitMaster()
IanBenzMaxim 21:00c94aeb533e 87 {
IanBenzMaxim 74:23be10c32fa3 88 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 89
IanBenzMaxim 74:23be10c32fa3 90 // reset DS2465
IanBenzMaxim 74:23be10c32fa3 91 result = reset();
IanBenzMaxim 74:23be10c32fa3 92 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 93 {
IanBenzMaxim 74:23be10c32fa3 94 return result;
IanBenzMaxim 74:23be10c32fa3 95 }
IanBenzMaxim 74:23be10c32fa3 96
IanBenzMaxim 74:23be10c32fa3 97 // write the default configuration setup
IanBenzMaxim 74:23be10c32fa3 98 Config defaultConfig;
IanBenzMaxim 74:23be10c32fa3 99 result = writeConfig(defaultConfig, true);
IanBenzMaxim 47:307dc45952db 100 return result;
IanBenzMaxim 21:00c94aeb533e 101 }
IanBenzMaxim 21:00c94aeb533e 102
IanBenzMaxim 33:a4c015046956 103 OneWireMaster::CmdResult DS2465::computeNextMasterSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 104 {
IanBenzMaxim 74:23be10c32fa3 105 uint8_t command[2] = { CMD_CNMS, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 106 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 107 }
IanBenzMaxim 21:00c94aeb533e 108
IanBenzMaxim 33:a4c015046956 109 OneWireMaster::CmdResult DS2465::computeWriteMac(bool regwrite, bool swap, unsigned int pageNum, unsigned int segmentNum) const
IanBenzMaxim 21:00c94aeb533e 110 {
IanBenzMaxim 74:23be10c32fa3 111 uint8_t command[2] = { CMD_CSWM, (uint8_t)((regwrite << 7) | (swap << 6) | (pageNum << 4) | segmentNum) };
IanBenzMaxim 74:23be10c32fa3 112 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 113 }
IanBenzMaxim 21:00c94aeb533e 114
IanBenzMaxim 33:a4c015046956 115 OneWireMaster::CmdResult DS2465::computeAuthMac(bool swap, unsigned int pageNum, PageRegion region) const
IanBenzMaxim 21:00c94aeb533e 116 {
IanBenzMaxim 74:23be10c32fa3 117 uint8_t command[2] = { CMD_CSAM, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 118 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 119 }
IanBenzMaxim 21:00c94aeb533e 120
IanBenzMaxim 33:a4c015046956 121 OneWireMaster::CmdResult DS2465::computeSlaveSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 122 {
IanBenzMaxim 74:23be10c32fa3 123 uint8_t command[2] = { CMD_CSS, (uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 74:23be10c32fa3 124 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 125 }
IanBenzMaxim 21:00c94aeb533e 126
IanBenzMaxim 73:2cecc1372acc 127 ISha256MacCoproc::CmdResult DS2465::setMasterSecret(const Secret & masterSecret)
IanBenzMaxim 21:00c94aeb533e 128 {
IanBenzMaxim 74:23be10c32fa3 129 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 130 result = writeMemory(ADDR_SPAD, masterSecret, masterSecret.length);
IanBenzMaxim 74:23be10c32fa3 131 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 132 {
IanBenzMaxim 74:23be10c32fa3 133 result = copyScratchpadToSecret();
IanBenzMaxim 74:23be10c32fa3 134 }
IanBenzMaxim 74:23be10c32fa3 135 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 136 {
IanBenzMaxim 74:23be10c32fa3 137 wait_ms(eepromPageWriteDelayMs);
IanBenzMaxim 74:23be10c32fa3 138 }
IanBenzMaxim 74:23be10c32fa3 139 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 140 }
IanBenzMaxim 21:00c94aeb533e 141
IanBenzMaxim 73:2cecc1372acc 142 ISha256MacCoproc::CmdResult DS2465::computeWriteMac(const WriteMacData & writeMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 143 {
IanBenzMaxim 74:23be10c32fa3 144 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 145 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 146 result = writeScratchpad(writeMacData, writeMacData.length);
IanBenzMaxim 74:23be10c32fa3 147 // Compute MAC
IanBenzMaxim 74:23be10c32fa3 148 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 149 {
IanBenzMaxim 74:23be10c32fa3 150 result = computeWriteMac(false);
IanBenzMaxim 74:23be10c32fa3 151 }
IanBenzMaxim 74:23be10c32fa3 152 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 153 {
IanBenzMaxim 74:23be10c32fa3 154 wait_ms(shaComputationDelayMs);
IanBenzMaxim 74:23be10c32fa3 155 // Read MAC from register
IanBenzMaxim 74:23be10c32fa3 156 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 74:23be10c32fa3 157 }
IanBenzMaxim 74:23be10c32fa3 158 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 159 }
IanBenzMaxim 21:00c94aeb533e 160
IanBenzMaxim 73:2cecc1372acc 161 ISha256MacCoproc::CmdResult DS2465::computeAuthMac(const DevicePage & devicePage, const DeviceScratchpad & challenge, const AuthMacData & authMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 162 {
IanBenzMaxim 74:23be10c32fa3 163 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 164 int addr = ADDR_SPAD;
IanBenzMaxim 74:23be10c32fa3 165 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 166 result = cWriteMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 74:23be10c32fa3 167 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 168 {
IanBenzMaxim 74:23be10c32fa3 169 addr += devicePage.length;
IanBenzMaxim 74:23be10c32fa3 170 result = cWriteMemory(addr, challenge, challenge.length);
IanBenzMaxim 74:23be10c32fa3 171 }
IanBenzMaxim 74:23be10c32fa3 172 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 173 {
IanBenzMaxim 74:23be10c32fa3 174 addr += challenge.length;
IanBenzMaxim 74:23be10c32fa3 175 result = cWriteMemory(addr, authMacData, authMacData.length);
IanBenzMaxim 74:23be10c32fa3 176 }
IanBenzMaxim 74:23be10c32fa3 177 // Compute MAC
IanBenzMaxim 74:23be10c32fa3 178 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 179 {
IanBenzMaxim 74:23be10c32fa3 180 result = computeAuthMac();
IanBenzMaxim 74:23be10c32fa3 181 }
IanBenzMaxim 74:23be10c32fa3 182 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 183 {
IanBenzMaxim 74:23be10c32fa3 184 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 74:23be10c32fa3 185 // Read MAC from register
IanBenzMaxim 74:23be10c32fa3 186 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 74:23be10c32fa3 187 }
IanBenzMaxim 74:23be10c32fa3 188 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 189 }
IanBenzMaxim 21:00c94aeb533e 190
IanBenzMaxim 73:2cecc1372acc 191 ISha256MacCoproc::CmdResult DS2465::computeSlaveSecret(const DevicePage & devicePage, const DeviceScratchpad & deviceScratchpad, const SlaveSecretData & slaveSecretData)
IanBenzMaxim 21:00c94aeb533e 192 {
IanBenzMaxim 74:23be10c32fa3 193 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 194 int addr = ADDR_SPAD;
IanBenzMaxim 74:23be10c32fa3 195 // Write input data to scratchpad
IanBenzMaxim 74:23be10c32fa3 196 result = writeMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 74:23be10c32fa3 197 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 198 {
IanBenzMaxim 74:23be10c32fa3 199 addr += devicePage.length;
IanBenzMaxim 74:23be10c32fa3 200 result = writeMemory(addr, deviceScratchpad, deviceScratchpad.length);
IanBenzMaxim 74:23be10c32fa3 201 }
IanBenzMaxim 74:23be10c32fa3 202 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 203 {
IanBenzMaxim 74:23be10c32fa3 204 addr += deviceScratchpad.length;
IanBenzMaxim 74:23be10c32fa3 205 result = writeMemory(addr, slaveSecretData, slaveSecretData.length);
IanBenzMaxim 74:23be10c32fa3 206 }
IanBenzMaxim 74:23be10c32fa3 207 // Compute secret
IanBenzMaxim 74:23be10c32fa3 208 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 209 {
IanBenzMaxim 74:23be10c32fa3 210 result = computeSlaveSecret();
IanBenzMaxim 74:23be10c32fa3 211 }
IanBenzMaxim 74:23be10c32fa3 212 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 213 {
IanBenzMaxim 74:23be10c32fa3 214 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 74:23be10c32fa3 215 }
IanBenzMaxim 74:23be10c32fa3 216 return (result == OneWireMaster::Success ? ISha256MacCoproc::Success : ISha256MacCoproc::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 217 }
IanBenzMaxim 21:00c94aeb533e 218
IanBenzMaxim 74:23be10c32fa3 219 OneWireMaster::CmdResult DS2465::copyScratchpad(bool destSecret, unsigned int pageNum, bool notFull, unsigned int segmentNum)
IanBenzMaxim 21:00c94aeb533e 220 {
IanBenzMaxim 74:23be10c32fa3 221 uint8_t command[2] = { CMD_CPS, (uint8_t)(destSecret ? 0 : (0x80 | (pageNum << 4) | (notFull << 3) | segmentNum)) };
IanBenzMaxim 74:23be10c32fa3 222 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 223 }
IanBenzMaxim 21:00c94aeb533e 224
IanBenzMaxim 34:11fffbe98ef9 225 OneWireMaster::CmdResult DS2465::configureLevel(OWLevel level)
IanBenzMaxim 26:a361e3f42ba5 226 {
IanBenzMaxim 74:23be10c32fa3 227 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 228 if (m_curConfig.getSPU() != (level == LEVEL_STRONG))
IanBenzMaxim 74:23be10c32fa3 229 {
IanBenzMaxim 74:23be10c32fa3 230 Config newConfig = m_curConfig;
IanBenzMaxim 74:23be10c32fa3 231 newConfig.setSPU(level == LEVEL_STRONG);
IanBenzMaxim 74:23be10c32fa3 232 result = writeConfig(newConfig, true);
IanBenzMaxim 74:23be10c32fa3 233 }
IanBenzMaxim 74:23be10c32fa3 234 else
IanBenzMaxim 74:23be10c32fa3 235 {
IanBenzMaxim 74:23be10c32fa3 236 result = OneWireMaster::Success;
IanBenzMaxim 74:23be10c32fa3 237 }
IanBenzMaxim 74:23be10c32fa3 238 return result;
IanBenzMaxim 21:00c94aeb533e 239 }
IanBenzMaxim 21:00c94aeb533e 240
IanBenzMaxim 32:bce180b544ed 241 OneWireMaster::CmdResult DS2465::OWSetLevel(OWLevel new_level)
IanBenzMaxim 21:00c94aeb533e 242 {
IanBenzMaxim 74:23be10c32fa3 243 if (new_level == LEVEL_STRONG)
IanBenzMaxim 74:23be10c32fa3 244 {
IanBenzMaxim 74:23be10c32fa3 245 return OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 246 }
IanBenzMaxim 74:23be10c32fa3 247
IanBenzMaxim 74:23be10c32fa3 248 return configureLevel(new_level);
IanBenzMaxim 21:00c94aeb533e 249 }
IanBenzMaxim 21:00c94aeb533e 250
IanBenzMaxim 32:bce180b544ed 251 OneWireMaster::CmdResult DS2465::OWSetSpeed(OWSpeed new_speed)
IanBenzMaxim 21:00c94aeb533e 252 {
IanBenzMaxim 74:23be10c32fa3 253 // Requested speed is already set
IanBenzMaxim 74:23be10c32fa3 254 if (m_curConfig.get1WS() == (new_speed == SPEED_OVERDRIVE))
IanBenzMaxim 74:23be10c32fa3 255 {
IanBenzMaxim 74:23be10c32fa3 256 return OneWireMaster::Success;
IanBenzMaxim 74:23be10c32fa3 257 }
IanBenzMaxim 21:00c94aeb533e 258
IanBenzMaxim 74:23be10c32fa3 259 // set the speed
IanBenzMaxim 74:23be10c32fa3 260 Config newConfig = m_curConfig;
IanBenzMaxim 74:23be10c32fa3 261 newConfig.set1WS(new_speed == SPEED_OVERDRIVE);
IanBenzMaxim 74:23be10c32fa3 262
IanBenzMaxim 74:23be10c32fa3 263 // write the new config
IanBenzMaxim 74:23be10c32fa3 264 return writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 265 }
IanBenzMaxim 21:00c94aeb533e 266
IanBenzMaxim 74:23be10c32fa3 267 OneWireMaster::CmdResult DS2465::OWTriplet(SearchDirection & search_direction, uint8_t & sbr, uint8_t & tsb)
IanBenzMaxim 21:00c94aeb533e 268 {
IanBenzMaxim 74:23be10c32fa3 269 // 1-Wire Triplet (Case B)
IanBenzMaxim 74:23be10c32fa3 270 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 271 // \--------/
IanBenzMaxim 74:23be10c32fa3 272 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 273 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 274 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 74:23be10c32fa3 275
IanBenzMaxim 74:23be10c32fa3 276 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 277 uint8_t command[2] = { CMD_1WT, (uint8_t)((search_direction == DIRECTION_WRITE_ONE) ? 0x80 : 0x00) };
IanBenzMaxim 74:23be10c32fa3 278 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 32:bce180b544ed 279 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 280 {
IanBenzMaxim 74:23be10c32fa3 281 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 282 result = pollBusy(&status);
IanBenzMaxim 74:23be10c32fa3 283 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 284 {
IanBenzMaxim 74:23be10c32fa3 285 // check bit results in status byte
IanBenzMaxim 74:23be10c32fa3 286 sbr = ((status & STATUS_SBR) == STATUS_SBR);
IanBenzMaxim 74:23be10c32fa3 287 tsb = ((status & STATUS_TSB) == STATUS_TSB);
IanBenzMaxim 74:23be10c32fa3 288 search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? DIRECTION_WRITE_ONE : DIRECTION_WRITE_ZERO;
IanBenzMaxim 74:23be10c32fa3 289 }
IanBenzMaxim 32:bce180b544ed 290 }
IanBenzMaxim 74:23be10c32fa3 291 return result;
IanBenzMaxim 21:00c94aeb533e 292 }
IanBenzMaxim 21:00c94aeb533e 293
IanBenzMaxim 74:23be10c32fa3 294 OneWireMaster::CmdResult DS2465::OWReadBlock(uint8_t *rx_buf, uint8_t rx_len)
IanBenzMaxim 21:00c94aeb533e 295 {
IanBenzMaxim 74:23be10c32fa3 296 // 1-Wire Receive Block (Case A)
IanBenzMaxim 74:23be10c32fa3 297 // S AD,0 [A] ADDR_CMD_REG [A] 1WRF [A] PR [A] P
IanBenzMaxim 74:23be10c32fa3 298 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 299 // PR indicates byte containing parameter
IanBenzMaxim 74:23be10c32fa3 300
IanBenzMaxim 74:23be10c32fa3 301 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 302 uint8_t command[2] = { CMD_1WRF, rx_len };
IanBenzMaxim 21:00c94aeb533e 303
IanBenzMaxim 74:23be10c32fa3 304 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 305 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 306 {
IanBenzMaxim 74:23be10c32fa3 307 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 308 }
IanBenzMaxim 74:23be10c32fa3 309 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 310 {
IanBenzMaxim 74:23be10c32fa3 311 result = readMemory(ADDR_SPAD, rx_buf, rx_len, false);
IanBenzMaxim 74:23be10c32fa3 312 }
IanBenzMaxim 21:00c94aeb533e 313
IanBenzMaxim 74:23be10c32fa3 314 return result;
IanBenzMaxim 21:00c94aeb533e 315 }
IanBenzMaxim 21:00c94aeb533e 316
IanBenzMaxim 73:2cecc1372acc 317 OneWireMaster::CmdResult DS2465::OWWriteBlock(const uint8_t *tran_buf, uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 318 {
IanBenzMaxim 74:23be10c32fa3 319 return OWWriteBlock(false, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 320 }
IanBenzMaxim 21:00c94aeb533e 321
IanBenzMaxim 47:307dc45952db 322 OneWireMaster::CmdResult DS2465::OWWriteBlockMac()
IanBenzMaxim 47:307dc45952db 323 {
IanBenzMaxim 74:23be10c32fa3 324 return OWWriteBlock(true, NULL, 0);
IanBenzMaxim 47:307dc45952db 325 }
IanBenzMaxim 47:307dc45952db 326
IanBenzMaxim 73:2cecc1372acc 327 OneWireMaster::CmdResult DS2465::OWWriteBlock(bool tx_mac, const uint8_t *tran_buf, uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 328 {
IanBenzMaxim 74:23be10c32fa3 329 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 330 uint8_t command[2] = { CMD_1WTB, (uint8_t)(tx_mac ? 0xFF : tran_len) };
IanBenzMaxim 21:00c94aeb533e 331
IanBenzMaxim 74:23be10c32fa3 332 if (!tx_mac)
IanBenzMaxim 74:23be10c32fa3 333 {
IanBenzMaxim 74:23be10c32fa3 334 // prefill scratchpad with required data
IanBenzMaxim 74:23be10c32fa3 335 result = writeMemory(ADDR_SPAD, tran_buf, tran_len);
IanBenzMaxim 74:23be10c32fa3 336 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 337 {
IanBenzMaxim 74:23be10c32fa3 338 return result;
IanBenzMaxim 74:23be10c32fa3 339 }
IanBenzMaxim 74:23be10c32fa3 340 }
IanBenzMaxim 21:00c94aeb533e 341
IanBenzMaxim 74:23be10c32fa3 342 // 1-Wire Transmit Block (Case A)
IanBenzMaxim 74:23be10c32fa3 343 // S AD,0 [A] ADDR_CMD_REG [A] 1WTB [A] PR [A] P
IanBenzMaxim 74:23be10c32fa3 344 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 345 // PR indicates byte containing parameter
IanBenzMaxim 74:23be10c32fa3 346
IanBenzMaxim 74:23be10c32fa3 347 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 348
IanBenzMaxim 74:23be10c32fa3 349 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 350 {
IanBenzMaxim 74:23be10c32fa3 351 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 352 }
IanBenzMaxim 74:23be10c32fa3 353
IanBenzMaxim 74:23be10c32fa3 354 return result;
IanBenzMaxim 21:00c94aeb533e 355 }
IanBenzMaxim 21:00c94aeb533e 356
IanBenzMaxim 74:23be10c32fa3 357 OneWireMaster::CmdResult DS2465::OWReadByteSetLevel(uint8_t & recvbyte, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 358 {
IanBenzMaxim 74:23be10c32fa3 359 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 74:23be10c32fa3 360 // S AD,0 [A] ADDR_CMD_REG [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 74:23be10c32fa3 361 // \--------/
IanBenzMaxim 74:23be10c32fa3 362 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 363 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 74:23be10c32fa3 364 //
IanBenzMaxim 74:23be10c32fa3 365 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 366 // DD data read
IanBenzMaxim 74:23be10c32fa3 367
IanBenzMaxim 74:23be10c32fa3 368 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 369 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 370
IanBenzMaxim 74:23be10c32fa3 371 result = configureLevel(after_level);
IanBenzMaxim 74:23be10c32fa3 372 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 373 {
IanBenzMaxim 74:23be10c32fa3 374 return result;
IanBenzMaxim 74:23be10c32fa3 375 }
IanBenzMaxim 74:23be10c32fa3 376
IanBenzMaxim 74:23be10c32fa3 377 buf = CMD_1WRB;
IanBenzMaxim 74:23be10c32fa3 378 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 74:23be10c32fa3 379
IanBenzMaxim 74:23be10c32fa3 380 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 381 {
IanBenzMaxim 74:23be10c32fa3 382 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 383 }
IanBenzMaxim 74:23be10c32fa3 384
IanBenzMaxim 74:23be10c32fa3 385 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 386 {
IanBenzMaxim 74:23be10c32fa3 387 result = readMemory(ADDR_DATA_REG, &buf, 1);
IanBenzMaxim 74:23be10c32fa3 388 }
IanBenzMaxim 74:23be10c32fa3 389
IanBenzMaxim 74:23be10c32fa3 390 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 391 {
IanBenzMaxim 74:23be10c32fa3 392 recvbyte = buf;
IanBenzMaxim 74:23be10c32fa3 393 }
IanBenzMaxim 74:23be10c32fa3 394
IanBenzMaxim 26:a361e3f42ba5 395 return result;
IanBenzMaxim 21:00c94aeb533e 396 }
IanBenzMaxim 21:00c94aeb533e 397
IanBenzMaxim 74:23be10c32fa3 398 OneWireMaster::CmdResult DS2465::OWWriteByteSetLevel(uint8_t sendbyte, OWLevel after_level)
IanBenzMaxim 74:23be10c32fa3 399 {
IanBenzMaxim 74:23be10c32fa3 400 // 1-Wire Write Byte (Case B)
IanBenzMaxim 74:23be10c32fa3 401 // S AD,0 [A] ADDR_CMD_REG [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 402 // \--------/
IanBenzMaxim 74:23be10c32fa3 403 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 404 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 405 // DD data to write
IanBenzMaxim 74:23be10c32fa3 406
IanBenzMaxim 74:23be10c32fa3 407 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 408
IanBenzMaxim 74:23be10c32fa3 409 result = configureLevel(after_level);
IanBenzMaxim 74:23be10c32fa3 410 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 411 {
IanBenzMaxim 74:23be10c32fa3 412 return result;
IanBenzMaxim 74:23be10c32fa3 413 }
IanBenzMaxim 74:23be10c32fa3 414
IanBenzMaxim 74:23be10c32fa3 415 uint8_t command[2] = { CMD_1WWB, sendbyte };
IanBenzMaxim 74:23be10c32fa3 416
IanBenzMaxim 74:23be10c32fa3 417 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 418 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 419 {
IanBenzMaxim 74:23be10c32fa3 420 result = pollBusy();
IanBenzMaxim 74:23be10c32fa3 421 }
IanBenzMaxim 74:23be10c32fa3 422
IanBenzMaxim 26:a361e3f42ba5 423 return result;
IanBenzMaxim 21:00c94aeb533e 424 }
IanBenzMaxim 21:00c94aeb533e 425
IanBenzMaxim 74:23be10c32fa3 426 OneWireMaster::CmdResult DS2465::OWTouchBitSetLevel(uint8_t & sendrecvbit, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 427 {
IanBenzMaxim 74:23be10c32fa3 428 // 1-Wire bit (Case B)
IanBenzMaxim 74:23be10c32fa3 429 // S AD,0 [A] ADDR_CMD_REG [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 430 // \--------/
IanBenzMaxim 74:23be10c32fa3 431 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 432 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 433 // BB indicates byte containing bit value in msbit
IanBenzMaxim 74:23be10c32fa3 434
IanBenzMaxim 74:23be10c32fa3 435 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 436
IanBenzMaxim 74:23be10c32fa3 437 result = configureLevel(after_level);
IanBenzMaxim 74:23be10c32fa3 438 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 439 {
IanBenzMaxim 74:23be10c32fa3 440 return result;
IanBenzMaxim 74:23be10c32fa3 441 }
IanBenzMaxim 21:00c94aeb533e 442
IanBenzMaxim 74:23be10c32fa3 443 uint8_t command[2] = { CMD_1WSB, (uint8_t)(sendrecvbit ? 0x80 : 0x00) };
IanBenzMaxim 74:23be10c32fa3 444 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 445
IanBenzMaxim 74:23be10c32fa3 446 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 74:23be10c32fa3 447
IanBenzMaxim 74:23be10c32fa3 448 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 449 {
IanBenzMaxim 74:23be10c32fa3 450 result = pollBusy(&status);
IanBenzMaxim 74:23be10c32fa3 451 }
IanBenzMaxim 74:23be10c32fa3 452
IanBenzMaxim 74:23be10c32fa3 453 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 454 {
IanBenzMaxim 74:23be10c32fa3 455 sendrecvbit = (status & STATUS_SBR);
IanBenzMaxim 74:23be10c32fa3 456 }
IanBenzMaxim 74:23be10c32fa3 457
IanBenzMaxim 26:a361e3f42ba5 458 return result;
IanBenzMaxim 21:00c94aeb533e 459 }
IanBenzMaxim 21:00c94aeb533e 460
IanBenzMaxim 73:2cecc1372acc 461 OneWireMaster::CmdResult DS2465::cWriteMemory(uint8_t addr, const uint8_t * buf, size_t bufLen) const
IanBenzMaxim 21:00c94aeb533e 462 {
IanBenzMaxim 74:23be10c32fa3 463 int i;
IanBenzMaxim 21:00c94aeb533e 464
IanBenzMaxim 74:23be10c32fa3 465 // Write SRAM (Case A)
IanBenzMaxim 74:23be10c32fa3 466 // S AD,0 [A] VSA [A] DD [A] P
IanBenzMaxim 74:23be10c32fa3 467 // \-----/
IanBenzMaxim 74:23be10c32fa3 468 // Repeat for each data byte
IanBenzMaxim 74:23be10c32fa3 469 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 470 // VSA valid SRAM memory address
IanBenzMaxim 74:23be10c32fa3 471 // DD memory data to write
IanBenzMaxim 74:23be10c32fa3 472
IanBenzMaxim 74:23be10c32fa3 473 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 474 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 475 {
IanBenzMaxim 21:00c94aeb533e 476 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 477 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 478 }
IanBenzMaxim 74:23be10c32fa3 479 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 480 {
IanBenzMaxim 74:23be10c32fa3 481 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 482 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 483 }
IanBenzMaxim 74:23be10c32fa3 484 // loop to write each byte
IanBenzMaxim 74:23be10c32fa3 485 for (i = 0; i < bufLen; i++)
IanBenzMaxim 74:23be10c32fa3 486 {
IanBenzMaxim 74:23be10c32fa3 487 if (m_I2C_interface.write(buf[i]) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 488 {
IanBenzMaxim 74:23be10c32fa3 489 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 490 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 491 }
IanBenzMaxim 74:23be10c32fa3 492 }
IanBenzMaxim 74:23be10c32fa3 493 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 494
IanBenzMaxim 74:23be10c32fa3 495 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 496 }
IanBenzMaxim 21:00c94aeb533e 497
IanBenzMaxim 73:2cecc1372acc 498 OneWireMaster::CmdResult DS2465::readMemory(uint8_t addr, uint8_t * buf, size_t bufLen, bool skipSetPointer) const
IanBenzMaxim 21:00c94aeb533e 499 {
IanBenzMaxim 74:23be10c32fa3 500 int i;
IanBenzMaxim 74:23be10c32fa3 501
IanBenzMaxim 74:23be10c32fa3 502 // Read (Case A)
IanBenzMaxim 74:23be10c32fa3 503 // S AD,0 [A] MA [A] Sr AD,1 [A] [DD] A [DD] A\ P
IanBenzMaxim 74:23be10c32fa3 504 // \-----/
IanBenzMaxim 74:23be10c32fa3 505 // Repeat for each data byte, NAK last byte
IanBenzMaxim 74:23be10c32fa3 506 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 507 // MA memory address
IanBenzMaxim 74:23be10c32fa3 508 // DD memory data read
IanBenzMaxim 21:00c94aeb533e 509
IanBenzMaxim 74:23be10c32fa3 510 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 511 if (!skipSetPointer)
IanBenzMaxim 74:23be10c32fa3 512 {
IanBenzMaxim 74:23be10c32fa3 513 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 514 {
IanBenzMaxim 74:23be10c32fa3 515 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 516 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 517 }
IanBenzMaxim 74:23be10c32fa3 518 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 519 {
IanBenzMaxim 74:23be10c32fa3 520 m_I2C_interface.stop();
IanBenzMaxim 74:23be10c32fa3 521 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 522 }
IanBenzMaxim 74:23be10c32fa3 523 m_I2C_interface.start();
IanBenzMaxim 74:23be10c32fa3 524 }
IanBenzMaxim 21:00c94aeb533e 525
IanBenzMaxim 74:23be10c32fa3 526 if (m_I2C_interface.write((m_I2C_address | I2C_READ)) != I2C_WRITE_OK)
IanBenzMaxim 74:23be10c32fa3 527 {
IanBenzMaxim 47:307dc45952db 528 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 529 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 74:23be10c32fa3 530 }
IanBenzMaxim 74:23be10c32fa3 531 // loop to read each byte, NAK last byte
IanBenzMaxim 74:23be10c32fa3 532 for (i = 0; i < bufLen; i++)
IanBenzMaxim 74:23be10c32fa3 533 {
IanBenzMaxim 74:23be10c32fa3 534 buf[i] = m_I2C_interface.read((i == (bufLen - 1)) ? mbed::I2C::NoACK : mbed::I2C::ACK);
IanBenzMaxim 74:23be10c32fa3 535 }
IanBenzMaxim 74:23be10c32fa3 536 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 537
IanBenzMaxim 74:23be10c32fa3 538 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 539 }
IanBenzMaxim 21:00c94aeb533e 540
IanBenzMaxim 34:11fffbe98ef9 541 OneWireMaster::CmdResult DS2465::writeConfig(const Config & config, bool verify)
IanBenzMaxim 21:00c94aeb533e 542 {
IanBenzMaxim 74:23be10c32fa3 543 uint8_t configBuf;
IanBenzMaxim 74:23be10c32fa3 544 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 545
IanBenzMaxim 74:23be10c32fa3 546 configBuf = config.writeByte();
IanBenzMaxim 74:23be10c32fa3 547 result = writeMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 74:23be10c32fa3 548 if (verify)
IanBenzMaxim 74:23be10c32fa3 549 {
IanBenzMaxim 74:23be10c32fa3 550 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 551 {
IanBenzMaxim 74:23be10c32fa3 552 result = readMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 74:23be10c32fa3 553 }
IanBenzMaxim 74:23be10c32fa3 554 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 555 {
IanBenzMaxim 74:23be10c32fa3 556 if (configBuf != config.readByte())
IanBenzMaxim 74:23be10c32fa3 557 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 558 }
IanBenzMaxim 74:23be10c32fa3 559 }
IanBenzMaxim 74:23be10c32fa3 560
IanBenzMaxim 35:5d23395628f6 561 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 562 {
IanBenzMaxim 74:23be10c32fa3 563 m_curConfig = config;
IanBenzMaxim 35:5d23395628f6 564 }
IanBenzMaxim 35:5d23395628f6 565
IanBenzMaxim 74:23be10c32fa3 566 return result;
IanBenzMaxim 24:8942d8478d68 567 }
IanBenzMaxim 24:8942d8478d68 568
IanBenzMaxim 73:2cecc1372acc 569 OneWireMaster::CmdResult DS2465::pollBusy(uint8_t * pStatus)
IanBenzMaxim 24:8942d8478d68 570 {
IanBenzMaxim 74:23be10c32fa3 571 const unsigned int pollLimit = 200;
IanBenzMaxim 74:23be10c32fa3 572
IanBenzMaxim 74:23be10c32fa3 573 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 574 uint8_t status;
IanBenzMaxim 74:23be10c32fa3 575 unsigned int pollCount = 0;
IanBenzMaxim 47:307dc45952db 576
IanBenzMaxim 74:23be10c32fa3 577 do
IanBenzMaxim 74:23be10c32fa3 578 {
IanBenzMaxim 74:23be10c32fa3 579 result = readMemory(ADDR_STATUS_REG, &status, 1, true);
IanBenzMaxim 74:23be10c32fa3 580 if (result != OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 581 {
IanBenzMaxim 74:23be10c32fa3 582 return result;
IanBenzMaxim 74:23be10c32fa3 583 }
IanBenzMaxim 74:23be10c32fa3 584 if (pStatus != NULL)
IanBenzMaxim 74:23be10c32fa3 585 {
IanBenzMaxim 74:23be10c32fa3 586 *pStatus = status;
IanBenzMaxim 74:23be10c32fa3 587 }
IanBenzMaxim 74:23be10c32fa3 588 if (pollCount++ >= pollLimit)
IanBenzMaxim 74:23be10c32fa3 589 {
IanBenzMaxim 74:23be10c32fa3 590 return OneWireMaster::TimeoutError;
IanBenzMaxim 74:23be10c32fa3 591 }
IanBenzMaxim 74:23be10c32fa3 592 } while (status & STATUS_1WB);
IanBenzMaxim 24:8942d8478d68 593
IanBenzMaxim 74:23be10c32fa3 594 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 595 }
IanBenzMaxim 21:00c94aeb533e 596
IanBenzMaxim 21:00c94aeb533e 597 OneWireMaster::CmdResult DS2465::OWReset(void)
IanBenzMaxim 74:23be10c32fa3 598 {
IanBenzMaxim 74:23be10c32fa3 599 // 1-Wire reset (Case B)
IanBenzMaxim 74:23be10c32fa3 600 // S AD,0 [A] ADDR_CMD_REG [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 74:23be10c32fa3 601 // \--------/
IanBenzMaxim 74:23be10c32fa3 602 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 74:23be10c32fa3 603 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 604
IanBenzMaxim 74:23be10c32fa3 605 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 606 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 607
IanBenzMaxim 74:23be10c32fa3 608 buf = CMD_1WRS;
IanBenzMaxim 74:23be10c32fa3 609 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 610
IanBenzMaxim 74:23be10c32fa3 611 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 612 {
IanBenzMaxim 74:23be10c32fa3 613 result = pollBusy(&buf);
IanBenzMaxim 74:23be10c32fa3 614 }
IanBenzMaxim 21:00c94aeb533e 615
IanBenzMaxim 74:23be10c32fa3 616 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 617 {
IanBenzMaxim 74:23be10c32fa3 618 // check for presence detect
IanBenzMaxim 74:23be10c32fa3 619 if ((buf & STATUS_PPD) != STATUS_PPD)
IanBenzMaxim 74:23be10c32fa3 620 {
IanBenzMaxim 74:23be10c32fa3 621 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 622 }
IanBenzMaxim 74:23be10c32fa3 623 }
IanBenzMaxim 74:23be10c32fa3 624
IanBenzMaxim 74:23be10c32fa3 625 return result;
IanBenzMaxim 21:00c94aeb533e 626 }
IanBenzMaxim 21:00c94aeb533e 627
IanBenzMaxim 34:11fffbe98ef9 628 OneWireMaster::CmdResult DS2465::reset(void)
IanBenzMaxim 74:23be10c32fa3 629 {
IanBenzMaxim 74:23be10c32fa3 630 // Device Reset
IanBenzMaxim 74:23be10c32fa3 631 // S AD,0 [A] ADDR_CMD_REG [A] 1WMR [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 74:23be10c32fa3 632 // [] indicates from slave
IanBenzMaxim 74:23be10c32fa3 633 // SS status byte to read to verify state
IanBenzMaxim 74:23be10c32fa3 634
IanBenzMaxim 74:23be10c32fa3 635 OneWireMaster::CmdResult result;
IanBenzMaxim 74:23be10c32fa3 636 uint8_t buf;
IanBenzMaxim 74:23be10c32fa3 637
IanBenzMaxim 74:23be10c32fa3 638 buf = CMD_1WMR;
IanBenzMaxim 74:23be10c32fa3 639 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 24:8942d8478d68 640
IanBenzMaxim 74:23be10c32fa3 641 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 642 {
IanBenzMaxim 74:23be10c32fa3 643 result = readMemory(ADDR_STATUS_REG, &buf, 1, true);
IanBenzMaxim 74:23be10c32fa3 644 }
IanBenzMaxim 21:00c94aeb533e 645
IanBenzMaxim 74:23be10c32fa3 646 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 647 {
IanBenzMaxim 74:23be10c32fa3 648 if ((buf & 0xF7) != 0x10)
IanBenzMaxim 74:23be10c32fa3 649 {
IanBenzMaxim 74:23be10c32fa3 650 result = OneWireMaster::OperationFailure;
IanBenzMaxim 74:23be10c32fa3 651 }
IanBenzMaxim 74:23be10c32fa3 652 }
IanBenzMaxim 74:23be10c32fa3 653
IanBenzMaxim 74:23be10c32fa3 654 if (result == OneWireMaster::Success)
IanBenzMaxim 74:23be10c32fa3 655 {
IanBenzMaxim 74:23be10c32fa3 656 OWReset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 74:23be10c32fa3 657 }
IanBenzMaxim 74:23be10c32fa3 658
IanBenzMaxim 74:23be10c32fa3 659 return result;
IanBenzMaxim 21:00c94aeb533e 660 }