Matt Briggs / Mbed OS xDotBridge_update_dev_latest

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Dependencies:   BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated

Fork of xDotBridge_update_test20180823 by Matt Briggs

xDotBridge/src/main.cpp@34:5618603e5fc3, 2017-01-24 (annotated)

Committer:
Matt Briggs
Date:
Tue Jan 24 15:43:50 2017 -0700
Revision:
34:5618603e5fc3
Parent:
33:c7bb3fbc024a
Child:
36:0fb61acf7fae
Adding some quick tries of rewriting a maxium lib.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Matt Briggs 34:5618603e5fc3 1 #include <math.h>
Matt Briggs 22:9453658b8d4b 2 #include "config.h"
Matt Briggs 30:2e673a672884 3 #include "xdot_flash.h"
Mike Fiore 11:d2e31743433a 4 #include "dot_util.h"
Mike Fiore 14:19fae4509473 5 #include "RadioEvent.h"
Matt Briggs 34:5618603e5fc3 6 #include <DS2408.h>
Matt Briggs 34:5618603e5fc3 7 #include <OneWire.h>
Matt Briggs 34:5618603e5fc3 8 #include "OwGpio.h"
Mike Fiore 11:d2e31743433a 9
Matt Briggs 22:9453658b8d4b 10
mfiore 17:d4f82e16de5f 11 /////////////////////////////////////////////////////////////////////////////
mfiore 17:d4f82e16de5f 12 // -------------------- DOT LIBRARY REQUIRED ------------------------------//
mfiore 17:d4f82e16de5f 13 // * Because these example programs can be used for both mDot and xDot //
mfiore 17:d4f82e16de5f 14 // devices, the LoRa stack is not included. The libmDot library should //
mfiore 17:d4f82e16de5f 15 // be imported if building for mDot devices. The libxDot library //
mfiore 17:d4f82e16de5f 16 // should be imported if building for xDot devices. //
mfiore 17:d4f82e16de5f 17 // * https://developer.mbed.org/teams/MultiTech/code/libmDot-dev-mbed5/ //
mfiore 17:d4f82e16de5f 18 // * https://developer.mbed.org/teams/MultiTech/code/libmDot-mbed5/ //
mfiore 17:d4f82e16de5f 19 // * https://developer.mbed.org/teams/MultiTech/code/libxDot-dev-mbed5/ //
mfiore 17:d4f82e16de5f 20 // * https://developer.mbed.org/teams/MultiTech/code/libxDot-mbed5/ //
mfiore 17:d4f82e16de5f 21 /////////////////////////////////////////////////////////////////////////////
mfiore 17:d4f82e16de5f 22
Mike Fiore 11:d2e31743433a 23 /////////////////////////////////////////////////////////////
Mike Fiore 11:d2e31743433a 24 // * these options must match between the two devices in //
Mike Fiore 11:d2e31743433a 25 // order for communication to be successful
Mike Fiore 11:d2e31743433a 26 /////////////////////////////////////////////////////////////
Mike Fiore 11:d2e31743433a 27 static uint8_t network_address[] = { 0x01, 0x02, 0x03, 0x04 };
Mike Fiore 11:d2e31743433a 28 static uint8_t network_session_key[] = { 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04 };
mbriggs_vortex 19:75b28b4117cc 29 static uint8_t data_session_key[] = { 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04, 0x01, 0x02, 0x03, 0x04 };
Mike Fiore 11:d2e31743433a 30
Matt Briggs 26:9411b26a5084 31 // wireless bridge protocol
Matt Briggs 31:9c535a708ae9 32 const uint8_t TX_PWR = 20; // 20 dBm
Matt Briggs 31:9c535a708ae9 33 const float RX_SLEEP_TIME = 2000; // ms (one second resolution, min 2 seconds)
Matt Briggs 31:9c535a708ae9 34 const uint8_t TX_TIME = 30; // in ms
Matt Briggs 26:9411b26a5084 35
Matt Briggs 31:9c535a708ae9 36 //const uint8_t maxPayloadSize = 10; // Number of bytes (used for toa calcultion)
Matt Briggs 31:9c535a708ae9 37
Matt Briggs 31:9c535a708ae9 38 ///////////////////////
Matt Briggs 31:9c535a708ae9 39 // I/O Configuration //
Matt Briggs 31:9c535a708ae9 40 ///////////////////////
Matt Briggs 29:e05e35976cfe 41 DigitalOut led1(GPIO0);
Matt Briggs 29:e05e35976cfe 42 AnalogIn an1(GPIO1);
Matt Briggs 29:e05e35976cfe 43 AnalogIn an2(GPIO2);
Matt Briggs 29:e05e35976cfe 44
Matt Briggs 29:e05e35976cfe 45 // Inputs
Matt Briggs 29:e05e35976cfe 46 DigitalIn gpio3(GPIO3);
Matt Briggs 31:9c535a708ae9 47 //DigitalIn wake_DOUT(WAKE);
Matt Briggs 29:e05e35976cfe 48 DigitalIn i2cOut1(I2C1_SCL);
Matt Briggs 29:e05e35976cfe 49 DigitalIn i2cOut2(I2C1_SDA);
Matt Briggs 33:c7bb3fbc024a 50 //DigitalIn uartOut1(UART1_CTS);
Matt Briggs 33:c7bb3fbc024a 51 //DigitalIn uartOut2(UART1_RTS);
Matt Briggs 33:c7bb3fbc024a 52 //DigitalIn jtag_gpio1(SWDIO);
Matt Briggs 33:c7bb3fbc024a 53 //DigitalIn jtag_gpio2(SWCLK);
Matt Briggs 29:e05e35976cfe 54
Matt Briggs 29:e05e35976cfe 55 // Outputs
Matt Briggs 29:e05e35976cfe 56 //DigitalOut gpio3(GPIO3);
Matt Briggs 29:e05e35976cfe 57 ////DigitalOut wake_DOUT(WAKE);
Matt Briggs 29:e05e35976cfe 58 //DigitalOut i2cOut1(I2C1_SCL);
Matt Briggs 29:e05e35976cfe 59 //DigitalOut i2cOut2(I2C1_SDA);
Matt Briggs 29:e05e35976cfe 60 //
Matt Briggs 29:e05e35976cfe 61 //DigitalOut uartOut1(UART1_CTS);
Matt Briggs 29:e05e35976cfe 62 //DigitalOut uartOut2(UART1_RTS);
Matt Briggs 29:e05e35976cfe 63
Mike Fiore 11:d2e31743433a 64 mDot* dot = NULL;
Mike Fiore 11:d2e31743433a 65
Mike Fiore 11:d2e31743433a 66 Serial pc(USBTX, USBRX);
Mike Fiore 11:d2e31743433a 67
Mike Fiore 11:d2e31743433a 68 int main() {
Matt Briggs 31:9c535a708ae9 69 unsigned int wakeMode;
Matt Briggs 31:9c535a708ae9 70 RadioEvent events; // Custom event handler for automatically displaying RX data
Mike Fiore 11:d2e31743433a 71 uint32_t tx_frequency;
Mike Fiore 11:d2e31743433a 72 uint8_t tx_datarate;
Mike Fiore 11:d2e31743433a 73 uint8_t tx_power;
Mike Fiore 11:d2e31743433a 74 uint8_t frequency_band;
Mike Fiore 11:d2e31743433a 75
Mike Fiore 11:d2e31743433a 76 pc.baud(115200);
Mike Fiore 11:d2e31743433a 77
Matt Briggs 27:6b68ff715ae1 78 mts::MTSLog::setLogLevel(mts::MTSLog::TRACE_LEVEL);
Mike Fiore 11:d2e31743433a 79
Mike Fiore 11:d2e31743433a 80 dot = mDot::getInstance();
Mike Fiore 11:d2e31743433a 81
Mike Fiore 16:a3832552dfe1 82 logInfo("mbed-os library version: %d", MBED_LIBRARY_VERSION);
Mike Fiore 16:a3832552dfe1 83
Mike Fiore 12:ec9768677cea 84 // start from a well-known state
Mike Fiore 12:ec9768677cea 85 logInfo("defaulting Dot configuration");
Mike Fiore 12:ec9768677cea 86 dot->resetConfig();
Mike Fiore 12:ec9768677cea 87
Mike Fiore 11:d2e31743433a 88 // make sure library logging is turned on
Matt Briggs 27:6b68ff715ae1 89 dot->setLogLevel(mts::MTSLog::INFO_LEVEL);
Mike Fiore 11:d2e31743433a 90
Mike Fiore 11:d2e31743433a 91 // attach the custom events handler
Mike Fiore 11:d2e31743433a 92 dot->setEvents(&events);
Mike Fiore 11:d2e31743433a 93
Matt Briggs 31:9c535a708ae9 94 // Setup programmable voltage detector
Matt Briggs 31:9c535a708ae9 95 // PVD_LEVEL0 Falling 1.85
Matt Briggs 31:9c535a708ae9 96 // PVD_LEVEL1 Falling 2.04
Matt Briggs 31:9c535a708ae9 97 // PVD_LEVEL2 Falling 2.24
Matt Briggs 31:9c535a708ae9 98 // PVD_LEVEL3 Falling 2.44
Matt Briggs 31:9c535a708ae9 99 // PVD_LEVEL4 Falling 2.64
Matt Briggs 31:9c535a708ae9 100 // PVD_LEVEL5 Falling 2.84
Matt Briggs 31:9c535a708ae9 101 // PVD_LEVEL6 Falling 3.05
Matt Briggs 31:9c535a708ae9 102 PWR_PVDTypeDef pvdConfig;
Matt Briggs 31:9c535a708ae9 103 pvdConfig.Mode = PWR_PVD_MODE_NORMAL;
Matt Briggs 31:9c535a708ae9 104 pvdConfig.PVDLevel = PWR_PVDLEVEL_5;
Matt Briggs 31:9c535a708ae9 105
Matt Briggs 31:9c535a708ae9 106 HAL_PWR_ConfigPVD(&pvdConfig);
Matt Briggs 31:9c535a708ae9 107 HAL_PWR_EnablePVD();
Matt Briggs 31:9c535a708ae9 108 logInfo("Programmable Voltage Detector set for level: %d", pvdConfig.PVDLevel);
Matt Briggs 31:9c535a708ae9 109
Matt Briggs 31:9c535a708ae9 110 // TODO setup IO here
Matt Briggs 31:9c535a708ae9 111
Mike Fiore 11:d2e31743433a 112 // update configuration if necessary
Matt Briggs 31:9c535a708ae9 113 logInfo("Setting up peer to peer configuration");
Mike Fiore 11:d2e31743433a 114 if (dot->getJoinMode() != mDot::PEER_TO_PEER) {
Mike Fiore 11:d2e31743433a 115 logInfo("changing network join mode to PEER_TO_PEER");
Mike Fiore 11:d2e31743433a 116 if (dot->setJoinMode(mDot::PEER_TO_PEER) != mDot::MDOT_OK) {
Mike Fiore 11:d2e31743433a 117 logError("failed to set network join mode to PEER_TO_PEER");
Mike Fiore 11:d2e31743433a 118 }
Mike Fiore 11:d2e31743433a 119 }
Mike Fiore 11:d2e31743433a 120 frequency_band = dot->getFrequencyBand();
Mike Fiore 11:d2e31743433a 121 switch (frequency_band) {
Mike Fiore 11:d2e31743433a 122 case mDot::FB_EU868:
Mike Fiore 11:d2e31743433a 123 // 250kHz channels achieve higher throughput
Mike Fiore 11:d2e31743433a 124 // DR6 : SF7 @ 250kHz
Mike Fiore 11:d2e31743433a 125 // DR0 - DR5 (125kHz channels) available but much slower
Mike Fiore 11:d2e31743433a 126 tx_frequency = 869850000;
Mike Fiore 11:d2e31743433a 127 tx_datarate = mDot::DR6;
Mike Fiore 11:d2e31743433a 128 // the 869850000 frequency is 100% duty cycle if the total power is under 7 dBm - tx power 4 + antenna gain 3 = 7
Mike Fiore 11:d2e31743433a 129 tx_power = 4;
Mike Fiore 11:d2e31743433a 130 break;
Mike Fiore 11:d2e31743433a 131 case mDot::FB_US915:
Mike Fiore 11:d2e31743433a 132 case mDot::FB_AU915:
Mike Fiore 11:d2e31743433a 133 default:
Mike Fiore 11:d2e31743433a 134 // 500kHz channels achieve highest throughput
Mike Fiore 11:d2e31743433a 135 // DR8 : SF12 @ 500kHz
Mike Fiore 11:d2e31743433a 136 // DR9 : SF11 @ 500kHz
Mike Fiore 11:d2e31743433a 137 // DR10 : SF10 @ 500kHz
Mike Fiore 11:d2e31743433a 138 // DR11 : SF9 @ 500kHz
Mike Fiore 11:d2e31743433a 139 // DR12 : SF8 @ 500kHz
Mike Fiore 11:d2e31743433a 140 // DR13 : SF7 @ 500kHz
Mike Fiore 11:d2e31743433a 141 // DR0 - DR3 (125kHz channels) available but much slower
Mike Fiore 11:d2e31743433a 142 tx_frequency = 915500000;
Mike Fiore 11:d2e31743433a 143 tx_datarate = mDot::DR13;
Mike Fiore 11:d2e31743433a 144 // 915 bands have no duty cycle restrictions, set tx power to max
Mike Fiore 11:d2e31743433a 145 tx_power = 20;
Mike Fiore 11:d2e31743433a 146 break;
Mike Fiore 11:d2e31743433a 147 }
Mike Fiore 11:d2e31743433a 148 // in PEER_TO_PEER mode there is no join request/response transaction
Mike Fiore 11:d2e31743433a 149 // as long as both Dots are configured correctly, they should be able to communicate
Mike Fiore 11:d2e31743433a 150 update_peer_to_peer_config(network_address, network_session_key, data_session_key, tx_frequency, tx_datarate, tx_power);
Mike Fiore 11:d2e31743433a 151
Matt Briggs 24:fdf87e4b72e5 152 ///////////////////////////////
Matt Briggs 24:fdf87e4b72e5 153 // Transmitter Configuration //
Matt Briggs 24:fdf87e4b72e5 154 ///////////////////////////////
Matt Briggs 27:6b68ff715ae1 155 #if BRIDGE_TX_BRUTE
Matt Briggs 24:fdf87e4b72e5 156 wakeMode = mDot::INTERRUPT;
Matt Briggs 24:fdf87e4b72e5 157 #endif
Matt Briggs 24:fdf87e4b72e5 158
Matt Briggs 24:fdf87e4b72e5 159 ////////////////////////////
Matt Briggs 24:fdf87e4b72e5 160 // Receiver Configuration //
Matt Briggs 24:fdf87e4b72e5 161 ////////////////////////////
Matt Briggs 27:6b68ff715ae1 162 #if BRIDGE_RX_BRUTE
Matt Briggs 24:fdf87e4b72e5 163 wakeMode = mDot::RTC_ALARM_OR_INTERRUPT;
Matt Briggs 24:fdf87e4b72e5 164 #endif
Matt Briggs 24:fdf87e4b72e5 165
Matt Briggs 24:fdf87e4b72e5 166 // Common Configuration
Matt Briggs 33:c7bb3fbc024a 167 dot->setTxWait(false);
Matt Briggs 33:c7bb3fbc024a 168 dot->setAck(0); // Disable Ack
Matt Briggs 25:fea776239709 169 dot->setWakePin(WAKE); // Use the wake pin as sleep interrupt
Matt Briggs 25:fea776239709 170 dot->setClass("C"); // Set class C
Matt Briggs 31:9c535a708ae9 171 dot->setTxPower(TX_PWR);
Matt Briggs 24:fdf87e4b72e5 172
Mike Fiore 11:d2e31743433a 173 // save changes to configuration
Mike Fiore 11:d2e31743433a 174 logInfo("saving configuration");
Mike Fiore 11:d2e31743433a 175 if (!dot->saveConfig()) {
Mike Fiore 11:d2e31743433a 176 logError("failed to save configuration");
Mike Fiore 11:d2e31743433a 177 }
Mike Fiore 11:d2e31743433a 178
Mike Fiore 11:d2e31743433a 179 // display configuration
Mike Fiore 11:d2e31743433a 180 display_config();
Mike Fiore 11:d2e31743433a 181
Matt Briggs 26:9411b26a5084 182
Matt Briggs 31:9c535a708ae9 183 unsigned int nTimesToTx = ceil(RX_SLEEP_TIME / ((float)TX_TIME));
Matt Briggs 31:9c535a708ae9 184 logInfo("RX_SLEEP_TIME %f, timeOnAir %lu, nTimesToTx %lu", RX_SLEEP_TIME, TX_TIME, nTimesToTx);
Matt Briggs 26:9411b26a5084 185
mbriggs_vortex 23:4ed894108882 186 uint16_t seqNum=0;
Matt Briggs 26:9411b26a5084 187 uint32_t cDwnLink = dot->getDownLinkCounter();
Matt Briggs 30:2e673a672884 188
Mike Fiore 11:d2e31743433a 189 while (true) {
Matt Briggs 25:fea776239709 190 std::vector<uint8_t> data;
Matt Briggs 31:9c535a708ae9 191 led1=0;
Mike Fiore 11:d2e31743433a 192
Mike Fiore 11:d2e31743433a 193 // join network if not joined
Mike Fiore 11:d2e31743433a 194 if (!dot->getNetworkJoinStatus()) {
Mike Fiore 11:d2e31743433a 195 join_network();
Mike Fiore 11:d2e31743433a 196 }
Mike Fiore 11:d2e31743433a 197
Matt Briggs 31:9c535a708ae9 198 //////////////////////
Matt Briggs 31:9c535a708ae9 199 // Common main loop //
Matt Briggs 31:9c535a708ae9 200 //////////////////////
Matt Briggs 31:9c535a708ae9 201
Matt Briggs 31:9c535a708ae9 202 // TODO sample rotary
Matt Briggs 31:9c535a708ae9 203 // TODO sample DIPs
Matt Briggs 31:9c535a708ae9 204
Matt Briggs 27:6b68ff715ae1 205 //////////////////////////////////////////
Matt Briggs 27:6b68ff715ae1 206 // Brute Protocol Transmitter main loop //
Matt Briggs 27:6b68ff715ae1 207 //////////////////////////////////////////
Matt Briggs 27:6b68ff715ae1 208 #if BRIDGE_TX_BRUTE
Matt Briggs 31:9c535a708ae9 209 #if LED_FEEDBACK
Matt Briggs 26:9411b26a5084 210 led1=1;
Matt Briggs 31:9c535a708ae9 211 #endif
Matt Briggs 31:9c535a708ae9 212 // TODO check for CC_IN
Matt Briggs 31:9c535a708ae9 213
Matt Briggs 25:fea776239709 214 data.push_back((seqNum >> 8) & 0xFF);
Matt Briggs 25:fea776239709 215 data.push_back(seqNum & 0xFF);
Matt Briggs 27:6b68ff715ae1 216 logInfo("Starting TX. Time: %lu, seqNum: %lu", us_ticker_read(), seqNum);
Matt Briggs 26:9411b26a5084 217 for(uint i=0;i<nTimesToTx;++i) {
Matt Briggs 27:6b68ff715ae1 218 dot->send(data);
Matt Briggs 26:9411b26a5084 219 }
mbriggs_vortex 23:4ed894108882 220 seqNum++;
Matt Briggs 25:fea776239709 221 led1=0;
Matt Briggs 27:6b68ff715ae1 222 logInfo("Finished TX. Time: %lu", us_ticker_read());
mbriggs_vortex 23:4ed894108882 223
Matt Briggs 28:b14b2926e916 224 sleep_save_io();
Matt Briggs 28:b14b2926e916 225 sleep_configure_io();
Matt Briggs 24:fdf87e4b72e5 226 dot->sleep(0, wakeMode, false); // Go to sleep until wake button
Matt Briggs 28:b14b2926e916 227 sleep_restore_io();
Matt Briggs 24:fdf87e4b72e5 228 #endif
Matt Briggs 27:6b68ff715ae1 229
Matt Briggs 27:6b68ff715ae1 230 ///////////////////////////////////////
Matt Briggs 27:6b68ff715ae1 231 // Brute Protocol Receiver main loop //
Matt Briggs 27:6b68ff715ae1 232 ///////////////////////////////////////
Matt Briggs 27:6b68ff715ae1 233 #if BRIDGE_RX_BRUTE
Matt Briggs 27:6b68ff715ae1 234 logInfo("Waiting for new message current DLC: %d, Time %d", cDwnLink, us_ticker_read());
Matt Briggs 31:9c535a708ae9 235 wait(TX_TIME/1000.0); // Wait TX_TIME
Matt Briggs 31:9c535a708ae9 236
Matt Briggs 31:9c535a708ae9 237 // TODO need to figure out what to do when DLC get resets
Matt Briggs 31:9c535a708ae9 238
Matt Briggs 26:9411b26a5084 239 if (cDwnLink < dot->getDownLinkCounter()) {
Matt Briggs 26:9411b26a5084 240 cDwnLink = dot->getDownLinkCounter();
Matt Briggs 26:9411b26a5084 241 dot->recv(data);
Matt Briggs 26:9411b26a5084 242 std::string dataStr(data.begin(), data.end());
Matt Briggs 26:9411b26a5084 243 logInfo("Got msg num: %d, payload: %s", seqNum, dataStr.c_str());
Matt Briggs 31:9c535a708ae9 244 // TODO add CC_OUT code here
Matt Briggs 26:9411b26a5084 245 seqNum++;
Matt Briggs 31:9c535a708ae9 246 #if LED_FEEDBACK
Matt Briggs 31:9c535a708ae9 247 led1 = 1;
Matt Briggs 26:9411b26a5084 248 wait(0.5);
Matt Briggs 31:9c535a708ae9 249 #endif
Matt Briggs 25:fea776239709 250 }
Matt Briggs 26:9411b26a5084 251 led1=0;
Matt Briggs 27:6b68ff715ae1 252 logInfo("Sleeping. Time %d", us_ticker_read());
Matt Briggs 28:b14b2926e916 253 sleep_save_io();
Matt Briggs 28:b14b2926e916 254 sleep_configure_io();
Matt Briggs 31:9c535a708ae9 255 // TODO maybe add if statement here to prevent double hits by sleeping for a longer time
Matt Briggs 26:9411b26a5084 256 dot->sleep(2, wakeMode, false); // Go to sleep until wake button
Matt Briggs 28:b14b2926e916 257 sleep_restore_io();
Matt Briggs 25:fea776239709 258 #endif
Matt Briggs 31:9c535a708ae9 259
Matt Briggs 29:e05e35976cfe 260 //////////////
Matt Briggs 29:e05e35976cfe 261 // I/O Play //
Matt Briggs 29:e05e35976cfe 262 //////////////
Matt Briggs 29:e05e35976cfe 263
Matt Briggs 31:9c535a708ae9 264 // // Check Analog
Matt Briggs 31:9c535a708ae9 265 // logInfo("Read AN1/GPIO1: %f", an1.read());
Matt Briggs 31:9c535a708ae9 266 // logInfo("Read AN2/GPIO2: %f", an2.read()); // Ranges from 0.0 to 1.0
Matt Briggs 31:9c535a708ae9 267 //
Matt Briggs 31:9c535a708ae9 268 // // check inputs
Matt Briggs 31:9c535a708ae9 269 // logInfo("Read GPIO3: %d", gpio3.read());
Matt Briggs 31:9c535a708ae9 270 //// logInfo("Read wake_DOUT: %d", wake_DOUT.read());
Matt Briggs 31:9c535a708ae9 271 // logInfo("Read i2cOut1: %d", i2cOut1.read()); // Appears to be pulled up
Matt Briggs 31:9c535a708ae9 272 // logInfo("Read i2cOut2: %d", i2cOut2.read()); // Appears to be pulled up
Matt Briggs 31:9c535a708ae9 273 // logInfo("Read uartOut1: %d", uartOut1.read());
Matt Briggs 31:9c535a708ae9 274 // logInfo("Read uartOut2: %d", uartOut2.read());
Matt Briggs 31:9c535a708ae9 275 //
Matt Briggs 31:9c535a708ae9 276 // logInfo("Read jtag_gpio1: %d", jtag_gpio1.read());
Matt Briggs 31:9c535a708ae9 277 // logInfo("Read jtag_gpio2: %d", jtag_gpio2.read());
Matt Briggs 31:9c535a708ae9 278 //
Matt Briggs 31:9c535a708ae9 279 // if (jtag_gpio1.read() == 0) {
Matt Briggs 31:9c535a708ae9 280 // led1 = 1;
Matt Briggs 31:9c535a708ae9 281 // }
Matt Briggs 31:9c535a708ae9 282 // else {
Matt Briggs 31:9c535a708ae9 283 // led1 = 0;
Matt Briggs 31:9c535a708ae9 284 // }
Matt Briggs 29:e05e35976cfe 285
Matt Briggs 29:e05e35976cfe 286 // check digital outputs
Matt Briggs 29:e05e35976cfe 287 // led1 = !led1;
Matt Briggs 29:e05e35976cfe 288 // gpio3 = !gpio3;
Matt Briggs 29:e05e35976cfe 289 //// wake_DOUT = !wake_DOUT;
Matt Briggs 29:e05e35976cfe 290 // i2cOut1 = !i2cOut1;
Matt Briggs 29:e05e35976cfe 291 // i2cOut2 = !i2cOut2;
Matt Briggs 29:e05e35976cfe 292 //
Matt Briggs 29:e05e35976cfe 293 // uartOut1 = !uartOut1;
Matt Briggs 29:e05e35976cfe 294 // uartOut2 = !uartOut2;
Matt Briggs 29:e05e35976cfe 295
Matt Briggs 31:9c535a708ae9 296 // logInfo("================================");
Matt Briggs 31:9c535a708ae9 297 // wait(1.0);
Matt Briggs 34:5618603e5fc3 298 //////////////////
Matt Briggs 34:5618603e5fc3 299 // OneWire Play //
Matt Briggs 34:5618603e5fc3 300 //////////////////
Matt Briggs 34:5618603e5fc3 301
Matt Briggs 34:5618603e5fc3 302 // TODO search bus
Matt Briggs 34:5618603e5fc3 303
Matt Briggs 34:5618603e5fc3 304
Mike Fiore 11:d2e31743433a 305 }
Mike Fiore 11:d2e31743433a 306
Mike Fiore 11:d2e31743433a 307 return 0;
Mike Fiore 11:d2e31743433a 308 }
Mike Fiore 11:d2e31743433a 309
Matt Briggs 27:6b68ff715ae1 310