Fork to see if I can get working

Dependencies:   BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated

Fork of xDotBridge_update_test20180823 by Matt Briggs

Committer:
mbriggs_vortex
Date:
Wed Nov 29 13:54:36 2017 -0700
Revision:
100:0882cf295f8e
Parent:
67:2115a2f1b945
Adding relaese bin to repo

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Matt Briggs 40:2ec4be320961 1 /**
Matt Briggs 40:2ec4be320961 2 * Library for DS2408 on top of OneWire library
Matt Briggs 40:2ec4be320961 3 */
Matt Briggs 40:2ec4be320961 4
Matt Briggs 40:2ec4be320961 5 #ifndef XDOT_DS2408_H
Matt Briggs 40:2ec4be320961 6 #define XDOT_DS2408_H
Matt Briggs 40:2ec4be320961 7
Matt Briggs 40:2ec4be320961 8 #include "../config.h"
Matt Briggs 40:2ec4be320961 9 #include "OneWire.h"
Matt Briggs 40:2ec4be320961 10
Matt Briggs 50:e89647e77fd5 11 const uint8_t DS2408_NRETRIES = 5;
Matt Briggs 50:e89647e77fd5 12
Matt Briggs 40:2ec4be320961 13 /**
Matt Briggs 40:2ec4be320961 14 * @class DS2408
Matt Briggs 40:2ec4be320961 15 * @brief This class abstracts communicating with the DS2408 port expander.
Matt Briggs 40:2ec4be320961 16 * The OneWire library is used for physical layer communication and this class
Matt Briggs 40:2ec4be320961 17 * simply makes it easy to communicate with this one chip.
Matt Briggs 40:2ec4be320961 18 */
Matt Briggs 40:2ec4be320961 19 class DS2408
Matt Briggs 40:2ec4be320961 20 {
Matt Briggs 40:2ec4be320961 21 public:
Matt Briggs 40:2ec4be320961 22 enum DS2408RegAddr {
Matt Briggs 40:2ec4be320961 23 pioLogicStateReg = 0x88,
Matt Briggs 40:2ec4be320961 24 pioOutputLatchStateReg = 0x89,
Matt Briggs 40:2ec4be320961 25 pioActivityStateReg = 0x8A,
Matt Briggs 40:2ec4be320961 26 condSearchChSelMaskReg = 0x8B,
Matt Briggs 40:2ec4be320961 27 condSearchChPolMaskReg = 0x8C,
Matt Briggs 40:2ec4be320961 28 ctrlStatusReg = 0x8D
Matt Briggs 40:2ec4be320961 29 };
Matt Briggs 40:2ec4be320961 30
Matt Briggs 40:2ec4be320961 31 /**
Matt Briggs 40:2ec4be320961 32 * @brief DS2408 constructor
Matt Briggs 40:2ec4be320961 33 *
Matt Briggs 67:2115a2f1b945 34 * @details Just initialized internal variables and disables test mode
Matt Briggs 40:2ec4be320961 35 *
Matt Briggs 40:2ec4be320961 36 * On Entry:
Matt Briggs 40:2ec4be320961 37 * @param[in] owMaster - reference to 1-wire master
Matt Briggs 40:2ec4be320961 38 * @param[in] romAddr - 64-bit address of ROM
Matt Briggs 40:2ec4be320961 39 *
Matt Briggs 40:2ec4be320961 40 * On Exit:
Matt Briggs 40:2ec4be320961 41 *
Matt Briggs 40:2ec4be320961 42 * @return
Matt Briggs 40:2ec4be320961 43 */
Matt Briggs 40:2ec4be320961 44 DS2408(OneWire *owMaster, uint8_t romAddr[8]);
Matt Briggs 40:2ec4be320961 45
Matt Briggs 40:2ec4be320961 46 /**
Matt Briggs 40:2ec4be320961 47 * @brief registerRead()
Matt Briggs 40:2ec4be320961 48 *
Matt Briggs 40:2ec4be320961 49 * @details reads state of pio
Matt Briggs 40:2ec4be320961 50 *
Matt Briggs 40:2ec4be320961 51 *
Matt Briggs 40:2ec4be320961 52 * On Exit:
Matt Briggs 40:2ec4be320961 53 * @param[in] addr - per datasheet valid registers are from 0x88 to 0x8D.
Matt Briggs 40:2ec4be320961 54 * Note value will be automatically promoted to 16-bit value.
Matt Briggs 40:2ec4be320961 55 * @param[out] val - register value
Matt Briggs 40:2ec4be320961 56 *
Matt Briggs 40:2ec4be320961 57 * @return Result of operation zero for success
Matt Briggs 40:2ec4be320961 58 */
Matt Briggs 40:2ec4be320961 59 CmdResult registerRead(uint8_t addr, uint8_t &val);
Matt Briggs 40:2ec4be320961 60
Matt Briggs 56:40b454c952cc 61 CmdResult registerReadReliable(uint8_t addr, uint8_t &val);
Matt Briggs 56:40b454c952cc 62
Matt Briggs 40:2ec4be320961 63 /**
Matt Briggs 40:2ec4be320961 64 * @brief pioLogicRead()
Matt Briggs 40:2ec4be320961 65 *
Matt Briggs 40:2ec4be320961 66 * @details Uses regisrterRead to get logic values
Matt Briggs 40:2ec4be320961 67 *
Matt Briggs 40:2ec4be320961 68 *
Matt Briggs 40:2ec4be320961 69 * On Exit:
Matt Briggs 40:2ec4be320961 70 * @param[out] val - lsb represents the state of the pio
Matt Briggs 40:2ec4be320961 71 *
Matt Briggs 40:2ec4be320961 72 * @return Result of operation zero for success
Matt Briggs 40:2ec4be320961 73 */
Matt Briggs 40:2ec4be320961 74 CmdResult pioLogicRead(uint8_t &val);
Matt Briggs 50:e89647e77fd5 75
Matt Briggs 50:e89647e77fd5 76 /**
Matt Briggs 50:e89647e77fd5 77 * @brief pioLogicReliableRead()
Matt Briggs 50:e89647e77fd5 78 *
Matt Briggs 50:e89647e77fd5 79 * @details Uses regisrterRead to get logic values. Then reads again to check for bit errors.
Matt Briggs 50:e89647e77fd5 80 *
Matt Briggs 50:e89647e77fd5 81 *
Matt Briggs 50:e89647e77fd5 82 * On Exit:
Matt Briggs 50:e89647e77fd5 83 * @param[out] val - lsb represents the state of the pio
Matt Briggs 50:e89647e77fd5 84 *
Matt Briggs 50:e89647e77fd5 85 * @return Result of operation zero for success
Matt Briggs 50:e89647e77fd5 86 */
Matt Briggs 50:e89647e77fd5 87 CmdResult pioLogicReliableRead(uint8_t &val);
Matt Briggs 40:2ec4be320961 88 // TODO implement other register based functions
Matt Briggs 40:2ec4be320961 89
Matt Briggs 40:2ec4be320961 90 /**
Matt Briggs 50:e89647e77fd5 91 * @brief pioLogicReliableWrite()
Matt Briggs 50:e89647e77fd5 92 *
Matt Briggs 50:e89647e77fd5 93 * @details writes to pio. Note 0 means active pull down and 1 high-Z to
Matt Briggs 50:e89647e77fd5 94 * allow PIO to float high. This will automatically retry for DS2408_NRETRIES
Matt Briggs 50:e89647e77fd5 95 * times.
Matt Briggs 50:e89647e77fd5 96 *
Matt Briggs 50:e89647e77fd5 97 * On Entry:
Matt Briggs 50:e89647e77fd5 98 * @param[in] val - Value for IO.
Matt Briggs 50:e89647e77fd5 99 *
Matt Briggs 50:e89647e77fd5 100 * @return CmdResult - result of operation
Matt Briggs 50:e89647e77fd5 101 */
Matt Briggs 50:e89647e77fd5 102 CmdResult pioLogicReliableWrite(uint8_t val);
Matt Briggs 50:e89647e77fd5 103
Matt Briggs 50:e89647e77fd5 104 /**
Matt Briggs 40:2ec4be320961 105 * @brief pioLogicWrite()
Matt Briggs 40:2ec4be320961 106 *
Matt Briggs 40:2ec4be320961 107 * @details writes to pio. Note 0 means active pull down and 1 high-Z to
Matt Briggs 40:2ec4be320961 108 * allow PIO to float high.
Matt Briggs 40:2ec4be320961 109 *
Matt Briggs 40:2ec4be320961 110 * On Entry:
Matt Briggs 40:2ec4be320961 111 * @param[in] val - Value for IO.
Matt Briggs 40:2ec4be320961 112 *
Matt Briggs 40:2ec4be320961 113 * @return CmdResult - result of operation
Matt Briggs 40:2ec4be320961 114 */
Matt Briggs 40:2ec4be320961 115 CmdResult pioLogicWrite(uint8_t val);
Matt Briggs 40:2ec4be320961 116
Matt Briggs 40:2ec4be320961 117 private:
Matt Briggs 40:2ec4be320961 118 OneWire *mMaster;
Matt Briggs 40:2ec4be320961 119 uint8_t mRomAddr[8];
Matt Briggs 40:2ec4be320961 120
Matt Briggs 50:e89647e77fd5 121 /**
Matt Briggs 50:e89647e77fd5 122 * @brief disableTestMode()
Matt Briggs 50:e89647e77fd5 123 *
Matt Briggs 50:e89647e77fd5 124 * @details Per datasheet if slew power on has a specific slew rate the
Matt Briggs 57:bdac7dd17af2 125 * chip may enter a test mode. See page 38 of application information.
Matt Briggs 50:e89647e77fd5 126 *
Matt Briggs 50:e89647e77fd5 127 * @return CmdResult - result of operation
Matt Briggs 50:e89647e77fd5 128 */
Matt Briggs 50:e89647e77fd5 129 CmdResult disableTestMode();
Matt Briggs 50:e89647e77fd5 130
Matt Briggs 40:2ec4be320961 131 };
Matt Briggs 40:2ec4be320961 132
Matt Briggs 40:2ec4be320961 133 #endif