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Fork to see if I can get working
Dependencies: BufferedSerial OneWire WinbondSPIFlash libxDot-dev-mbed5-deprecated
Fork of xDotBridge_update_test20180823 by
xDotBridge/inc/DS2408.h@56:40b454c952cc, 2017-02-27 (annotated)
- Committer:
- Matt Briggs
- Date:
- Mon Feb 27 14:06:54 2017 -0700
- Revision:
- 56:40b454c952cc
- Parent:
- 50:e89647e77fd5
- Child:
- 57:bdac7dd17af2
Updated test BBIO to v3. Added some sanity checks for LRR if on a new board.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Matt Briggs | 40:2ec4be320961 | 1 | /** |
Matt Briggs | 40:2ec4be320961 | 2 | * Library for DS2408 on top of OneWire library |
Matt Briggs | 40:2ec4be320961 | 3 | */ |
Matt Briggs | 40:2ec4be320961 | 4 | |
Matt Briggs | 40:2ec4be320961 | 5 | #ifndef XDOT_DS2408_H |
Matt Briggs | 40:2ec4be320961 | 6 | #define XDOT_DS2408_H |
Matt Briggs | 40:2ec4be320961 | 7 | |
Matt Briggs | 40:2ec4be320961 | 8 | #include "../config.h" |
Matt Briggs | 40:2ec4be320961 | 9 | #include "OneWire.h" |
Matt Briggs | 40:2ec4be320961 | 10 | |
Matt Briggs | 50:e89647e77fd5 | 11 | const uint8_t DS2408_NRETRIES = 5; |
Matt Briggs | 50:e89647e77fd5 | 12 | |
Matt Briggs | 40:2ec4be320961 | 13 | /** |
Matt Briggs | 40:2ec4be320961 | 14 | * @class DS2408 |
Matt Briggs | 40:2ec4be320961 | 15 | * @brief This class abstracts communicating with the DS2408 port expander. |
Matt Briggs | 40:2ec4be320961 | 16 | * The OneWire library is used for physical layer communication and this class |
Matt Briggs | 40:2ec4be320961 | 17 | * simply makes it easy to communicate with this one chip. |
Matt Briggs | 40:2ec4be320961 | 18 | */ |
Matt Briggs | 40:2ec4be320961 | 19 | class DS2408 |
Matt Briggs | 40:2ec4be320961 | 20 | { |
Matt Briggs | 40:2ec4be320961 | 21 | public: |
Matt Briggs | 40:2ec4be320961 | 22 | enum DS2408RegAddr { |
Matt Briggs | 40:2ec4be320961 | 23 | pioLogicStateReg = 0x88, |
Matt Briggs | 40:2ec4be320961 | 24 | pioOutputLatchStateReg = 0x89, |
Matt Briggs | 40:2ec4be320961 | 25 | pioActivityStateReg = 0x8A, |
Matt Briggs | 40:2ec4be320961 | 26 | condSearchChSelMaskReg = 0x8B, |
Matt Briggs | 40:2ec4be320961 | 27 | condSearchChPolMaskReg = 0x8C, |
Matt Briggs | 40:2ec4be320961 | 28 | ctrlStatusReg = 0x8D |
Matt Briggs | 40:2ec4be320961 | 29 | }; |
Matt Briggs | 40:2ec4be320961 | 30 | |
Matt Briggs | 40:2ec4be320961 | 31 | /** |
Matt Briggs | 40:2ec4be320961 | 32 | * @brief DS2408 constructor |
Matt Briggs | 40:2ec4be320961 | 33 | * |
Matt Briggs | 40:2ec4be320961 | 34 | * @details Just initialized internal variables does not configure device |
Matt Briggs | 40:2ec4be320961 | 35 | * use init() for that. |
Matt Briggs | 40:2ec4be320961 | 36 | * |
Matt Briggs | 40:2ec4be320961 | 37 | * On Entry: |
Matt Briggs | 40:2ec4be320961 | 38 | * @param[in] owMaster - reference to 1-wire master |
Matt Briggs | 40:2ec4be320961 | 39 | * @param[in] romAddr - 64-bit address of ROM |
Matt Briggs | 40:2ec4be320961 | 40 | * |
Matt Briggs | 40:2ec4be320961 | 41 | * On Exit: |
Matt Briggs | 40:2ec4be320961 | 42 | * |
Matt Briggs | 40:2ec4be320961 | 43 | * @return |
Matt Briggs | 40:2ec4be320961 | 44 | */ |
Matt Briggs | 40:2ec4be320961 | 45 | DS2408(OneWire *owMaster, uint8_t romAddr[8]); |
Matt Briggs | 40:2ec4be320961 | 46 | |
Matt Briggs | 40:2ec4be320961 | 47 | /** |
Matt Briggs | 40:2ec4be320961 | 48 | * @brief init() |
Matt Briggs | 40:2ec4be320961 | 49 | * |
Matt Briggs | 47:a68747642a7a | 50 | * @details Just a placeholder for now. Does initiate a reset on the OneWire bus. |
Matt Briggs | 40:2ec4be320961 | 51 | * |
Matt Briggs | 40:2ec4be320961 | 52 | * On Entry: |
Matt Briggs | 40:2ec4be320961 | 53 | * |
Matt Briggs | 40:2ec4be320961 | 54 | * On Exit: |
Matt Briggs | 40:2ec4be320961 | 55 | * |
Matt Briggs | 40:2ec4be320961 | 56 | * @return Result of operation zero for success |
Matt Briggs | 40:2ec4be320961 | 57 | */ |
Matt Briggs | 40:2ec4be320961 | 58 | CmdResult init(); |
Matt Briggs | 40:2ec4be320961 | 59 | |
Matt Briggs | 40:2ec4be320961 | 60 | /** |
Matt Briggs | 40:2ec4be320961 | 61 | * @brief registerRead() |
Matt Briggs | 40:2ec4be320961 | 62 | * |
Matt Briggs | 40:2ec4be320961 | 63 | * @details reads state of pio |
Matt Briggs | 40:2ec4be320961 | 64 | * |
Matt Briggs | 40:2ec4be320961 | 65 | * |
Matt Briggs | 40:2ec4be320961 | 66 | * On Exit: |
Matt Briggs | 40:2ec4be320961 | 67 | * @param[in] addr - per datasheet valid registers are from 0x88 to 0x8D. |
Matt Briggs | 40:2ec4be320961 | 68 | * Note value will be automatically promoted to 16-bit value. |
Matt Briggs | 40:2ec4be320961 | 69 | * @param[out] val - register value |
Matt Briggs | 40:2ec4be320961 | 70 | * |
Matt Briggs | 40:2ec4be320961 | 71 | * @return Result of operation zero for success |
Matt Briggs | 40:2ec4be320961 | 72 | */ |
Matt Briggs | 40:2ec4be320961 | 73 | CmdResult registerRead(uint8_t addr, uint8_t &val); |
Matt Briggs | 40:2ec4be320961 | 74 | |
Matt Briggs | 56:40b454c952cc | 75 | CmdResult registerReadReliable(uint8_t addr, uint8_t &val); |
Matt Briggs | 56:40b454c952cc | 76 | |
Matt Briggs | 40:2ec4be320961 | 77 | /** |
Matt Briggs | 40:2ec4be320961 | 78 | * @brief pioLogicRead() |
Matt Briggs | 40:2ec4be320961 | 79 | * |
Matt Briggs | 40:2ec4be320961 | 80 | * @details Uses regisrterRead to get logic values |
Matt Briggs | 40:2ec4be320961 | 81 | * |
Matt Briggs | 40:2ec4be320961 | 82 | * |
Matt Briggs | 40:2ec4be320961 | 83 | * On Exit: |
Matt Briggs | 40:2ec4be320961 | 84 | * @param[out] val - lsb represents the state of the pio |
Matt Briggs | 40:2ec4be320961 | 85 | * |
Matt Briggs | 40:2ec4be320961 | 86 | * @return Result of operation zero for success |
Matt Briggs | 40:2ec4be320961 | 87 | */ |
Matt Briggs | 40:2ec4be320961 | 88 | CmdResult pioLogicRead(uint8_t &val); |
Matt Briggs | 50:e89647e77fd5 | 89 | |
Matt Briggs | 50:e89647e77fd5 | 90 | /** |
Matt Briggs | 50:e89647e77fd5 | 91 | * @brief pioLogicReliableRead() |
Matt Briggs | 50:e89647e77fd5 | 92 | * |
Matt Briggs | 50:e89647e77fd5 | 93 | * @details Uses regisrterRead to get logic values. Then reads again to check for bit errors. |
Matt Briggs | 50:e89647e77fd5 | 94 | * |
Matt Briggs | 50:e89647e77fd5 | 95 | * |
Matt Briggs | 50:e89647e77fd5 | 96 | * On Exit: |
Matt Briggs | 50:e89647e77fd5 | 97 | * @param[out] val - lsb represents the state of the pio |
Matt Briggs | 50:e89647e77fd5 | 98 | * |
Matt Briggs | 50:e89647e77fd5 | 99 | * @return Result of operation zero for success |
Matt Briggs | 50:e89647e77fd5 | 100 | */ |
Matt Briggs | 50:e89647e77fd5 | 101 | CmdResult pioLogicReliableRead(uint8_t &val); |
Matt Briggs | 40:2ec4be320961 | 102 | // TODO implement other register based functions |
Matt Briggs | 40:2ec4be320961 | 103 | |
Matt Briggs | 40:2ec4be320961 | 104 | /** |
Matt Briggs | 50:e89647e77fd5 | 105 | * @brief pioLogicReliableWrite() |
Matt Briggs | 50:e89647e77fd5 | 106 | * |
Matt Briggs | 50:e89647e77fd5 | 107 | * @details writes to pio. Note 0 means active pull down and 1 high-Z to |
Matt Briggs | 50:e89647e77fd5 | 108 | * allow PIO to float high. This will automatically retry for DS2408_NRETRIES |
Matt Briggs | 50:e89647e77fd5 | 109 | * times. |
Matt Briggs | 50:e89647e77fd5 | 110 | * |
Matt Briggs | 50:e89647e77fd5 | 111 | * On Entry: |
Matt Briggs | 50:e89647e77fd5 | 112 | * @param[in] val - Value for IO. |
Matt Briggs | 50:e89647e77fd5 | 113 | * |
Matt Briggs | 50:e89647e77fd5 | 114 | * @return CmdResult - result of operation |
Matt Briggs | 50:e89647e77fd5 | 115 | */ |
Matt Briggs | 50:e89647e77fd5 | 116 | CmdResult pioLogicReliableWrite(uint8_t val); |
Matt Briggs | 50:e89647e77fd5 | 117 | |
Matt Briggs | 50:e89647e77fd5 | 118 | /** |
Matt Briggs | 40:2ec4be320961 | 119 | * @brief pioLogicWrite() |
Matt Briggs | 40:2ec4be320961 | 120 | * |
Matt Briggs | 40:2ec4be320961 | 121 | * @details writes to pio. Note 0 means active pull down and 1 high-Z to |
Matt Briggs | 40:2ec4be320961 | 122 | * allow PIO to float high. |
Matt Briggs | 40:2ec4be320961 | 123 | * |
Matt Briggs | 40:2ec4be320961 | 124 | * On Entry: |
Matt Briggs | 40:2ec4be320961 | 125 | * @param[in] val - Value for IO. |
Matt Briggs | 40:2ec4be320961 | 126 | * |
Matt Briggs | 40:2ec4be320961 | 127 | * @return CmdResult - result of operation |
Matt Briggs | 40:2ec4be320961 | 128 | */ |
Matt Briggs | 40:2ec4be320961 | 129 | CmdResult pioLogicWrite(uint8_t val); |
Matt Briggs | 40:2ec4be320961 | 130 | |
Matt Briggs | 40:2ec4be320961 | 131 | private: |
Matt Briggs | 40:2ec4be320961 | 132 | OneWire *mMaster; |
Matt Briggs | 40:2ec4be320961 | 133 | uint8_t mRomAddr[8]; |
Matt Briggs | 40:2ec4be320961 | 134 | |
Matt Briggs | 50:e89647e77fd5 | 135 | /** |
Matt Briggs | 50:e89647e77fd5 | 136 | * @brief disableTestMode() |
Matt Briggs | 50:e89647e77fd5 | 137 | * |
Matt Briggs | 50:e89647e77fd5 | 138 | * @details Per datasheet if slew power on has a specific slew rate the |
Matt Briggs | 50:e89647e77fd5 | 139 | * chip may enter a test mode. |
Matt Briggs | 50:e89647e77fd5 | 140 | * |
Matt Briggs | 50:e89647e77fd5 | 141 | * @return CmdResult - result of operation |
Matt Briggs | 50:e89647e77fd5 | 142 | */ |
Matt Briggs | 50:e89647e77fd5 | 143 | CmdResult disableTestMode(); |
Matt Briggs | 50:e89647e77fd5 | 144 | |
Matt Briggs | 40:2ec4be320961 | 145 | }; |
Matt Briggs | 40:2ec4be320961 | 146 | |
Matt Briggs | 40:2ec4be320961 | 147 | #endif |